Unit 2
Unit 2
amplification
• The fusion of these two diodes produces a three layer, two junction, three terminal device
forming the basis of a Bipolar Junction Transistor.
• Act as either an insulator or a conductor by the application ofa small signal
voltage.
• Three regions of operation
•
•
Figure 1. PNP and NPN Transistors
• BASE connection is common to both the input signal AND the output signal
Figure 3. Common Base configuration
Application
• Commonly used only in single stage amplifier circuits such as microphone pre- amplifier
or radio frequency ( Rƒ ) amplifiers due to its very good high frequency response.
2.1.2 The Common Emitter (CE) Configuration
• The input signal is applied between the base and the emitter, while the
output is taken from between the collector and the emitter
• current flowing out of the transistor must be equal to the currents flowing into the
transistor as the emitter current is given as Ie = Ic + Ib
• Small change in the base current ( Ib ), will result in a much larger change
• Beta has a value between 20 and 200 for most general purpose
transistors.
• ie.. if a transistor has a Beta value of 100, then one electron will flow from the base
terminal for every 100 electrons flowing between the emitter- collector terminal.
• output signal has a 180o phase-shift with regards to the input voltage signal.
2.1.3 The Common Collector (CC) Configuration
• The input signal is connected directly to the base terminal, while the output signal is taken from
across the emitter load resistor as shown.
• Commonly known as a Voltage Follower or Emitter Follower circuit.
• The load resistance of the common collector transistor receives both the base and collector
currents giving a large current gain
• provides good current amplification with very little voltage gain
• Application
• The common collector, or emitter follower configuration is very useful for impedance matching
applications because of its very high input impedance, in the region of hundreds of thousands of
Ohms while having a relatively low output impedance.
Table 1 Charecteristics of BJT
2.1.4Biasing of BJT
• Biasing is the process of providing DC voltage which helps in the functioning of the circuit.
• A transistor is biased in order to make the emitter base junction forward biased and collector base
junction reverse biased, so that it maintains in active region, to work as an amplifier.
• If a signal of very small voltage is given to the input of BJT, it cannot be amplified. For BJT, to
amplify a signal, two conditions have to be met.
– The input voltage should exceed cut-in voltage for the transistor to be ON.
– The BJT should be in the active region, to be operated as an amplifier.
– If appropriate DC voltages and currents are given through BJT by external sources, so that
BJT operates in active region and superimpose the AC signals to be amplified, then this
problem can be avoided.
– The given DC voltage and currents are so chosen that the transistor remains in active
region for entire input AC cycle. Hence DC biasing is needed.
Figure 6. Common Collector configuration
2.2 JFET
Figure 7. JFET
• BJT “CURRENT” operated device (Beta model) as a smaller current can be used to switch a
larger load current.
• Field Effect Transistor a “VOLTAGE” operated device since their operation relies on an electric
field (hence the name field effect) generated by the input Gate voltage.
• Advantages of FET over BJT
-high efficiency, instant operation, robust and cheap
-can be used in most electronic circuit applications to replace their equivalent BJT
It provides
• Fast switching.
• For low frequency operation, source and drain can be interchanged.
• Gate voltage that controls drain current.
• Single majority carrier.
• Small in size.
• High “Z” input.
• N-type semiconductor channel with a P-type region called the Gate diffused into the N-type
channel forming a reverse biased PN-junction and it is this junction which forms the depletion
region around the Gate area when no external voltages are applied. JFETs are therefore known as
depletion mode devices.
• This depletion region produces a potential gradient which is of varying thickness around the PN-
junction and restrict the current flow through the channel by reducing its effective width and thus
increasing the overall resistance of the channel itself.
• Most-depleted portion of the depletion region is in between the Gate and the Drain, while the
least-depleted area is between the Gate and the Source. Then the JFET’s channel conducts with
zero bias voltage applied (ie, the depletion region has near zero width).
• With no external Gate voltage ( VG = 0 ), and a small voltage ( VDS ) applied between the Drain
and the Source, maximum saturation current ( IDSS ) will flow through the channel from the Drain
to the Source restricted only by the small depletion region around the junctions.
• If a small negative voltage ( -VGS ) is now applied to the Gate the size of the depletion region
begins to increase reducing the overall effective area of the channel and thus reducing the current
flowing through it, a sort of “squeezing” effect takes place. So by applying a reverse bias
voltage increases the width of the depletion region which in turn reduces the conduction of the
channel.
• Since the PN-junction is reverse biased, little current will flow into the gate connection. As the
Gate voltage ( -VGS ) is made more negative, the width of the channel decreases until no more
current flows between the Drain and the Source and the FET is said to be “pinched-off” (similar
to the cut-off region for a BJT). The voltage at which the channel closes is called the “pinch-off
voltage”, ( VP ).
The P-channel Junction Field Effect Transistor operates exactly the same as the N-channel
above, with the following exceptions: 1). Channel current is positive due to holes,
2). The polarity of the biasing voltage needs to be reversed.
• The voltage VGS applied to the Gate controls the current flowing between the Drain and the
Source terminals.
• JFET is a voltage controlled device, “NO current flows into the gate!” then the Source
current ( IS ) flowing out of the device equals the Drain current flowing into it and therefore
( ID = IS ).
• The characteristics curves example shown above, shows the four different regions of
operation for a JFET and these are given as:
• Ohmic Region – When VGS = 0 the depletion layer of the channel is very small and the
JFET acts like a voltage controlled resistor.
• Cut-off Region – This is also known as the pinch-off region were the Gate voltage, VGS is
sufficient to cause the JFET to act as an open circuit as the channel resistance is at
maximum.
• Saturation or Active Region – The JFET becomes a good conductor and is controlled by the
Gate-Source voltage, ( VGS ) while the Drain-Source voltage, ( VDS ) has little or no effect.
• Breakdown Region – The voltage between the Drain and the Source, ( VDS ) is high enough
to causes the JFET’s resistive channel to break down and pass uncontrolled maximum
current.
Figure 10. Common Source
Configuration
• The Depletion-mode MOSFET, which is less common than the enhancement mode types is
normally switched “ON” (conducting) without the application of a gate bias voltage. That is the
channel conducts when VGS = 0 making it a “normally-closed” device. The circuit symbol shown
above for a depletion MOS transistor uses a solid channel line to signify a normally closed
conductive channel.
• For the n-channel depletion MOS transistor, a negative gate-source voltage, -VGS will deplete
(hence its name) the conductive channel of its free electrons switching the transistor “OFF”.
Likewise for a p-channel depletion MOS transistor a positive gate-source voltage, +VGS will
deplete the channel of its free holes turning it “OFF”.
• -for an n-channel depletion mode MOSFET: +VGS means more electrons and more current. While
a -VGS means less electrons and less current. The opposite is also true for the p-channel types.
Then the depletion mode MOSFET is equivalent to a “normally-closed” switch.
• The more common Enhancement-mode MOSFET or eMOSFET, is the reverse of the depletion-
mode type. Here the conducting channel is lightly doped or even undoped making it non-
conductive. This results in the device being normally “OFF” (non-conducting) when the gate bias
voltage, VGS is equal to zero.
• For the n-channel enhancement MOS transistor a drain current will only flow when a gate voltage
( VGS ) is applied to the gate terminal greater than the threshold voltage ( VTH ) level in which
conductance takes place making it a transconductance device.
• The application of a positive (+ve) gate voltage to a n-type eMOSFET attracts more electrons
towards the oxide layer around the gate thereby increasing or enhancing (hence its name) the
thickness of the channel allowing more current to flow. It is called an enhancement mode device
as the application of a gate voltage enhances the channel.
• Increasing this positive gate voltage will cause the channel resistance to decrease further causing
an increase in the drain current, ID through the channel. In other words, for an n-channel
enhancement mode MOSFET: +VGS turns the transistor “ON”, while a zero or -VGS turns the
transistor “OFF”. Thus the enhancement-mode MOSFET is equivalent to a “normally-open”
switch.
• The reverse is true for the p-channel enhancement MOS transistor. When VGS = 0 the device is
“OFF” and the channel is open. The application of a negative (-ve) gate voltage to the p-type
eMOSFET enhances the channels conductivity turning it “ON”. Then for an p-channel
enhancement mode MOSFET: +VGS turns the transistor “OFF”, while -VGS turns the transistor
“ON”.
• The MOSFETs ability to change between these two states enables it to have two basic functions:
“switching” (digital electronics) or “amplification” (analogue electronics). Then MOSFETs have
the ability to operate within three different regions:
• 1. Cut-off Region – with VGS < Vthreshold the gate-source voltage is much lower than the
transistors threshold voltage so the MOSFET transistor is switched “fully-OFF” thus, ID = 0, with
the transistor acting like an open switch regardless of the value of VDS.
• 2. Linear (Ohmic) Region – with VGS > Vthreshold and VDS < VGS the transistor is in its constant
resistance region behaving as a voltage-controlled resistance whose resistive value is determined
by the gate voltage, VGS level.
• 3. Saturation Region – with VGS > Vthreshold and VDS > VGS the transistor is in its constant
current region and is therefore “fully-ON”. The Drain current ID = Maximum with the transistor
acting as a closed switch.
• DC gate voltage will be set by the bias circuit. Then the total gate-source voltage will be the sum
of VGS and Vi.
• The DC characteristics and therefore Q-point (quiescent point) are all functions of gate
voltage VGS, supply voltage VDD and load resistance RD.
• The MOS transistor is biased within the saturation region to establish the desired drain current
which will define the transistors Q-point. As the instantaneous value of VGS increases, the bias
point moves up the curve as shown allowing a larger drain current to flow as VDS decreases.
• Likewise, as the instantaneous value of VGS decreases (during the negative half of the input sine
wave), the bias point moves down the curve and a smaller VGS results in a smaller drain current
and increased VDS.
• Then in order to establish a large output swing we must bias the transistor well above threshold
level to ensure that the transistor stays in saturation over the full sinusoidal input cycle.
However, there is a limit on the amount of gate bias and drain current we can use. To allow for
maximum voltage swing of the output, the Q-point should be positioned approximately
halfway between the supply voltage VDD and the threshold voltage VTH.
• So for example, lets assume we want to construct a single stage NMOS common-source amplifier.
The threshold voltage, VTH of the eMOSFET is 2.5 volts and the supply voltage, VDD is +15 volts.
Then the DC bias point will be 15 – 2.5 = 12.5v or 6 volts to the nearest integer value.
Cutoff
Cutoff region is the area where the UJT doesn’t get sufficient voltage to turn on. The
applied voltage hasn’t reached the triggering voltage, thus making transistor to be in off
state.
Saturation
Saturation region is the area where the current and voltage raises, if the applied voltage to
emitter terminal increases.
Insulated Gate Bipolar Transistor is semiconductor switching device that has the output
characteristics of a bipolar junction transistor, BJT, but is controlled like a metal oxide field
effect transistor, MOSFET.
• One of the main advantages of the IGBT transistor is the simplicity by which it can be driven
“ON” by applying a positive gate voltage, or switched “OFF” by making the gate signal zero or
slightly negative allowing it to be used in a variety of switching applications. It can also be driven
in its linear active region for use in power amplifiers.
• With its lower on-state resistance and conduction losses as well as its ability to switch high
voltages at high frequencies without damage makes the Insulated Gate Bipolar Transistor ideal
for driving inductive loads such as coil windings, electromagnets and DC motors.
Figure 19 IGBT