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Computer Architecture and Organization

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Computer Architecture and Organization

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COMPUTER ARCHITECTURE AND ORGANIZATION

ASPECT COMPUTER ARCHITECTURE COMPUTER ORGANIZATION


DEFINITION Focuses on the attributes and Computer organization is about understanding how the different
design principles of a computer parts of a computer system work together to execute tasks. It focuses
system, including instruction sets, on the hardware components (like the CPU, memory, and
data types, and addressing modes. input/output devices) and how they are connected and interact with
each other to perform the instructions defined by the computer's
architecture.
PURPOSE Defines the conceptual structure of Implements the architecture's specifications into physical
a computer system means(creating components
a blueprint for how the computer
will work)

In summary, computer architecture is like designing the blueprint for a house, outlining the overall structure and
design principles, while computer organization is like building the house according to that blueprint, focusing on
the physical components and their interconnections to realize the architectural specifications.

Architecture – conceptual design and fundamental operational structure.

In architecture we deal with CPU design, what type of instruction CPU will support those instruction also you
need to give in the architecture of CPU, addressing mode, data format.

Architecture – CPU design, instructions, addressing mode and data format.

Organization – it means implementation of architecture.

It deals with physical devices and their interconnections with perspective of improving the performance.

Organization – I/O organization, memory organization and performance(pipeline).

SYLLABUS
 Memory interfacing
 I/O interfacing
 Machine instruction and addressing modes
 Control unit design
 Alu and data path
 Number system and conversion
 Data representation
 Pipelining

Syllabus 2

 Introduction of coa (component of computer, types of registers, instruction cycle, memory concept,
bytes and words addressable, system bus)
 Instruction format and addressing mode (instruction concept, machine instruction, instruction format,
expand opcode technique, addressing modes concept, type of addressing modes)
 Alu, Datapath and control unit (data path, micro instruction, micro program, control unit design)
 Floating point representation (IEEE754, single and double presion)
 Cache memory (memory concept, types of memory organization, cache memory, cache organization,
mapping technique, replacement algorithm, updating technique)
 Pipelining (pipeline concept, pipeline types, performance evaluation, dependencies in pipeline)
 Secondary memory and io interface (disk concept, disk structure, disk access time, io interface and its
type)

DATA REPRESENTATION (Floating Point Representation):

Data format: it is the binary representation of data values.

DATA

NUMEBER CHARACTERS

ASCII EBCDIC
FIXED POINT FLOATING POINT

SIGNED(ARITHEMATIC
UNSIGNED
NUMBER)

1'S COMPLEMENT

2'S COMPLEMENT

SIGN MAGNITUDE

Signed and unsigned are very important and asked in gate

Floating point representation and IEEE754 floating point representation asked in gate

Floating point representation why is it needed? Answer because it provides larger range of number with limited
numbers of bits.

This number is represented in format: of sign (+ve or -ve), exponent (it is stored in biased form) and mantissa
(signed normalized fraction number)

Now, you have to learn about biased and normalization (implicit and explicit) and then value formula, this is for
gate.

To overcome the disadvantages of floating-point representation we use, IEEE- 754 floating point representation

Denormalized number.

This topic is mainly important for gate as this include numerical.


INTRODUCTION TO COMPUTER SYSTEM AND MICROOPERATION

Stored Program Architecture:

The program which processor executes should be stored in memory (ram)

Two types of stored program architecture:

- Von Neumann’s architecture


- Harward architecture

Components Of Computer:

- CPU (consist of control unit and ALU)


- Memory (primary and secondary memory)
- I/O Device (Input and output)

Other Components:

- System bus (collection of communication lines between components of computer)


- CPU Register (small storage inside CPU is called register)

System Bus:
On the basis of type of content the bus carries, bus are of three types:

- Address bus (it is unidirectional)


- Data bus (it is bidirectional)
- Control bus (it is bidirectional but if go deep then individually all signal are unidirectional)

Memory concept:
Memory address (the memory means ram and ram is divided into cells and cells are numbered and this
numbering is called the memory address).

Memory access (CPU sends memory address through address bus to say that on which address which memory
operation is to be performed, after this, memory do the instructed operation and then send it to the CPU)

Memory operation (read (data goes from memory to CPU) and write (data goes from CPU to memory))

- Read (CPU sends address to memory through address bus and then CPU sends read control signal to
memory through control bus and then memory performs read sends data or content to CPU through
data bus)
- Write (CPU sends address to memory through address bus and then CPU sends data to memory through
data bus and then CPU sends a write control signal to memory through signal bus and then memory will
perform write operation)

Thus, CPU is the supervisor or head of hardware components like (memory and I/O devices)

And running program and operating system is the supervisor or head of CPU.

Ant the supervisor or head or running program and operating system is the user, programmer.

CPU Registers:
On the basis of type of content that register store, it is of two types

- General purpose register G.P.R (for storing general content)


- Special purpose register S.P.R (for storing special content)

Some special purpose registers

 Accumulator (AC) used to store result of ALU and sometimes one of the operands for ALU too.
 Program counter (PC) used to store address of next instruction to be executed.
 Instruction Register (IR) used to store current instruction
 Stack Pointer (SP) used to store address of the top of the stack
 Flag register/ Program status word (PSW) used to store status of ALU result
 Address register (AR)/ Memory Address register (MAR) used to send address to memory, it is like the
bus stop of address, where address come from different parts of CPU in this register then send to
memory.
 Data register (DR)/ Memory Data register (MDR)/ Memory Buffer register (MBR) used to send data to
memory (memory write) and to receive data from memory (memory read)

On the basis of ALU input, the types of architecture are these:

1. AC-BASED Architecture (when one input is come from AC and another input from anywhere)
2. Register Based Architecture (when both input comes from general purpose register)
3. Register-Memory Based Architecture (when one input comes from G.P.R and another input from G.P.R
or memory)
4. Complex System Architecture (when one input is comes from G.P.R or memory and another input also
from G.P.R or memory)
5. Stack Based Architecture (it is not useful now, when both input comes from operand stack)

Micro-operations – the operations executed on values stored in register. And symbolic notation to
describe the micro-operation is register transfer language (RTL)

RTL like arrow for content copying from one register to another register, comma for parallel micro-operation and
for memory transfer register name arrow memory address.
INSTRUCTION AND ADDRESSING MODE:
Instructions: a group of bits which instructs computer to perform some operation. And these instructions
are generated by language translator (that convert high level program into low level program)

the type of instruction in CPU is identified by its operation its op code.

Instruction set architecture (ISA): collection of all instructions supported by a CPU.

Types of instructions based on operation (not important):

- Data transfer: MOV, LDI, LDA


- Arithmetic and Logic: ADD, SUB, AND, OR
- Machine Control: EI, DI, PUSH, POP
- Iterative: LOOP, LOOPE, LOOPZ
- Branch: JMP, CALL, RET, JZ, JNZ

Types of instruction based on operands (important):

- 3 address instruction (maximum 3 addresses of operand)


- 2 address instruction (maximum 2 addresses of operand)
- 1 address instruction (maximum 1 addresses so, if needed 2nd operand is taken from accumulator and
such type of instruction is supported in AC-based architecture)
- 0 address instruction (it is supported in stack-based architecture)

Instruction length is of two types:

- Fixed length instruction: variable length of opcode


- Variable length instructions: fixed length of opcode

How instruction generated: language translator (compiler) generates instruction based on CPU. Means only
those types of instruction it will generate, which are supported by CPU.

How instruction executed: 6 steps are required to execute an instruction and these 6 steps are collectively
called instruction cycle. And this cycle is divided in two cycles, in this first step that is instruction fetch comes in
fetch cycle and other five steps are in execution cycle. And all steps are not required for all type of instructions.

Effective address: address of operand in a computation-type instruction or the target address in a branch-type
instruction.
Digital computer is the type of computer that takes input in digital form and give output in digital form and
also that work on binary number.

Input means (inputting program and data that get converted into binary number)

Addressing Mode: It specifies how and from where the operands are obtained for an instruction.
Types of addressing mode:

Non – computable mode (not any computation required) (computation means addition, subtraction, etc.)

1. Implied mode: the opcode definition itself defines the operand


2. Immediate mode: the address field of instruction specifies the operand value
3. Direct or absolute mode: the address field of instruction specifies the effective address that has operand
4. Indirect mode: the address field of instruction specifies the effective address having address of operand
5. Register mode/register direct: the address field of instruction specifies a register which holds operand
6. Register indirect mode: the address field of instruction specifies a register which holds effective address
that has address of operand

Computable mode (computation required)

7. Autoincrement – autodecrement mode: variant of register indirect mode in which the content of
register is automatically incremented or decremented to access the sequential data
8. Indexed/ index Register Mode: base address taken from address field of instruction and index value
from index register.
9. Pc – relative mode: pc value added in address field value (offset) of instruction to get effective address.
(branch instruction)
10. Base register mode: base register value added in address field value(offset) of instruction to get effective
address. (intra segment branching)

Addressing mode is important for gate and it has many question


CPU, DATA PATH AND CONTROL UNIT:

CPU DESIGN:
CPU: it is the brain of a computer, containing all the circuitry needed to process input, store data, and output
results

CPU cycle: time CPU takes to perform a micro- operation

CPU cycle time = 1 / clock rate

Cpi (cycle per instruction) formula

Execution time formula

MIPS (million instruction per second) – it is used to give CPU performance

MIPS formula

ALU
Datapath – collection of functional units such as arithmetic logic units or multiplexers. It performs data
processing operations.

Control unit – it generates control signals and sends to various components of computer. All components
operate according to these control signals.

Control variable: name of a control signal

Control word: collection of signals generated by control unit at once

Control unit organization

On the basis of how the cu generate signal

Hardwired control unit: control logic is implemented with gates, flip-flops, decoders and other digital circuits.

Advantages: can be optimized to product a faster mode of operation.

Disadvantages: reaaranging the wires among various components is difficult. Updation in control logic is difficult.

Microprogrammed control unit: control logic is implemented with micro-programs. All possible control words
are stored in a memory and based on requriements specific control word is fetched and sent to devices.

Advantage: updating the control logic is easy.


Disadvantages: slower than hardwired control unit.

Control word sequencing

Type of microprogrammed control unit – horizontal and vertical

Types of CPU design:


Risc (reduced instruction set computer): less number of instruction, fixed length instruction, simple instruction,
limited addressing modes, easy to implement using hardwired control unit, one cycle per instruction, register-to-
register arithmetic operation only, more number of registers, preferable for pipeline cpu.

Cisc (complex instruction set computer): more number of instruction, variable length instruction, complex
instruction, more and complex addressing modes, difficult to implement using hardwired control unit so used
microprogrammed control unit, multiples cycles per instruction, register-to-memory and memory-to- register
arithmetic operation is possible, less number of register

How to store large content

Byte vs word addressable memory


Byte ordering- little endian and big endian
Computer organization
I/O organization

Peripheral – devices connected to processor externally except main memory

Three categories: input devices, output device, storage devices

Can CPU access io directly?

No, CPU is not directly connected to io devices, there is a io interface between CPU and io devices that connect
them.

Io interface function is converting the signal of CPU to the signals that io devices can understand and vice versa.

Io interface provide synchronization between CPU and io devices for avoiding data loss as their speed is
mismatch

Io interface provide data form conversion

Io interface monitor the operation should be controlled so, that operation don’t disturb

Dma controller has facility of dma and interface and io processor has facility of dma, interface and io instruction
execution (graphic card)

Io vs memory bus

There are 3 ways to connect memory and io with CPU through buses

Separated buses for both


These topics are in computer organization and bold parts are very important among them.

Io mapped io and memory mapped io

Serial asynchronous transfer and programmed io

Interrupts io and types of interrupts

Dma (how dma works, modes of dma transfer)

Memory hierarchy and representation

Main memory ram rom

Ram and row chip with chip select

Locality of reference and cache memory

Cache and cache mapping complete

Magnetic disk

Pipelining

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