Digital Electronics 2019-20
Digital Electronics 2019-20
Digital Electronics 2019-20
Parts i) and ii) of each question are compulsory and each part carries 2 marks. Parts iii), iv) and
v) carry 8 marks each and the student may attempt any 2 parts.
Q1.
i) 1’s complement can be easily obtained by using _________
a) Comparator b) Inverter c) Adder d) Subtractor
(2 marks)
ii) An important drawback of binary system is ________
a) It requires very large string of 1’s and 0’s to represent a decimal number
b) It requires sparingly small string of 1’s and 0’s to represent a decimal number
c) It requires large string of 1’s and small string of 0’s to represent a decimal number
d) It requires small string of 1’s and large string of 0’s to represent a decimal number
(2 marks)
iii) Distinguish between analog and digital signals. List out advantages of using Digital circuitry. Is
7 Segment diaplay analog or digital?
(8 marks)
iv) Carry out following addition and subtraction of following numbers (17F68)16 and (3376)8with
result in ( ) 8 and ( ) 16 respectively.
(8 marks)
v)Write steps to convert
a) Binary code to octal and hexadecimal directly b) Gray code to binary code
c) Decimal number to any other base.
(8 marks)
Q2.
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ii) How many AND gates are required to realize Y = CD + EF + G?
a) 4 b) 5 c) 3 d) 2
(2 marks)
iii) Given the following truth table:
ABCY
0000
0011
0100
0110
1001
1010
1100
1111
Obtain the simplified functions in sum of products if Y denotes output. Also obtain the diagram
using NOR gates only.
(8 marks)
iv) Explain Quine McCluskey Method with example?
(8 marks)
v)Explain De Morgan’s theorem using example. Explain Identity, Complementation, Commutative,
Associative and Distributive Laws using examples.
(8 marks)
Q3.
i) In parts of the processor, adders are used to calculate ____________
a) Addresses b) Table indices
c) Increment and decrement operators d) All of the Mentioned
(2 marks)
ii) Which among the bipolar logic families is specifically adopted for high speed applications?
a) DTL b) TTL c) RTL d) All of the Mentioned
(2 marks)
iii) Describe code converters? Draw one circuit using 3 bit for gray to binary code converter.
(8 marks)
iv) Explain CMOS logic family using NAND and NOR Gates.
(8 marks)
v)Define CLC’s? You have to implement Y=AB’C using NAND and NOR gates and if cost of each
gate is 50 Rs. what will be cost of this circuit if implemented.
(8 marks)
Q4.
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iii) Define a shift register. In an 8 bit PIPO shift register, the data input is 10101101. Describe the
data outputs after 4 clock pulses?
(8 marks)
iv) Define a Counter & its applications. Describe modulus counters?
(8 marks)
v) Describe shift registers? List its different types.
(8 marks)
Q5.
i) ROM consist of __________
a) NOR and OR arrays b) NAND and NOR arrays
c) NAND and OR arrays d) NOR and AND arrays
(2 marks)
ii) A PLA is similar to a ROM in concept except that ____________
a) It hasn’t capability to read only b) It hasn’t capability to read or write operation
c) It doesn’t provide full decoding to the variables
d) It hasn’t capability to write only
(2 marks)
iii) How is memory size described? Explain with an example.
(8 marks)
iv) Define PLA? Draw a block diagram and explain its working.
(8 marks)
v) Distinguish between EPROM and EEPROM.
(8 marks)
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