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Elc2 Programming Manual

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You are on page 1/ 812

Effective March 2013

Supersedes December 2010

Eaton Logic Controller

Programming Manual

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w .ea t o n . c o m / p l c 1
ELC Programming Manual

Publication History
Release Description of Changes Date
First
The first edition is issued. 2010-12-09
Edition
The descriptions of ELC-PB/PC/PH are deleted,
Second
and the descriptions of ELC2 series are added 2014-05-02
Edition
to the manual.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w .ea t o n . c o m / p l c 2
ELC SERIES PLCS
Programming Manual
Table of Contents
Chapter 1 – ELC Concepts
1.1 ELC Scan Method ..............................................................................................................1-2

1.2 Current Flow .......................................................................................................................1-3

1.3 NO Contact, NC Contact ....................................................................................................1-3

1.4 ELC Registers and Relays .................................................................................................1-4

1.5 Ladder Logic Symbols.......................................................................................................1-5

1.5.1 Creating a ELC Ladder Program .............................................................................1-6

1.5.2 LD / LDI (Load NO contact / Load NC contact)........................................................1-7

1.5.3 LDP / LDF (Load Rising edge trigger/ Load Falling edge trigger) ............................1-7

1.5.4 AND / ANI (Connect NO contact in series / Connect NC contact in series) .............1-7

1.5.5 ANDP / ANDF (Connect Rising edge in series/ Connect Falling edge in series)......1-7

1.5.6 OR / ORI (Connect NO contact in parallel / Connect NC contact in parallel) ...........1-8

1.5.7 ORP / ORF (Connect Rising edge in parallel/ Connect Falling edge in parallel) ......1-8

1.5.8 ANB (Connect block in series).................................................................................1-8

1.5.9 ORB (Connect block in parallel) ..............................................................................1-8

1.5.10 MPS / MRD / MPP (Branch instructions) .................................................................1-8

1.5.11 STL (Step Ladder Programming) .............................................................................1-9

1.5.12 RET (Return) ...........................................................................................................1-9

1.6 Conversion between Ladder Diagram and Instruction List Mode ................................1-10

1.7 Correcting Ladder Diagram .............................................................................................1-12

1.8 Basic Program Design Examples ...................................................................................1-16

Chapter 2 – Programming Concepts

2.1 ELC Memory Map for ELCB-PB controllers .....................................................................2-2

2.2 ELC Memory Map for ELC-PAcontrollers .........................................................................2-4

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2.3 ELC Memory Map for ELC-PV and ELC2-PV controllers .................................................2-7

2.4 ELC Memory Map for ELCM-PH/PA controllers .............................................................2-10

2.5 ELC Memory Map for ELC2-PB controllers…… .............................................................2-13

2.6 ELC Memory Map for ELC2-PC/ELC2-PA controllers ....................................................2-15

2.7 ELC Memory Map for ELC2-PE controllers ....................................................................2-17

2.8 ELC Latched Memory Settings .......................................................................................2-19

2.9 ELC Latched Memory Modes ..........................................................................................2-23

2.10 ELC Bits, Nibbles, Bytes, Words, etc..............................................................................2-23

2.11 Binary, Octal, Decimal, BCD, Hex ...................................................................................2-24

2.12 Special M Relay ................................................................................................................2-26

2.13 S Relay ..............................................................................................................................2-51

2.14 T (Timer)............................................................................................................................2-51

2.15 C (Counter) .......................................................................................................................2-53

2.16 High-speed Counters .......................................................................................................2-55

2.17 Special Data Register.......................................................................................................2-64

2.18 E, F Index Registers .........................................................................................................2-78

2.19 File Register .....................................................................................................................2-78

2.20 Nest Level Pointer[N], Pointer[P], Interrupt Pointer [I] ..................................................2-80

2.21 Applications of Special M Relay and Special D Register ..............................................2-84

Chapter 3 – Instruction Set

3.1 Basic Instructions (without API numbers) .......................................................................3-2

3.2 Basic Instruction Explanations .........................................................................................3-3

3.3 Pointers ............................................................................................................................3-14

3.4 Interrupt Pointers .............................................................................................................3-15

3.5 Application Programming Instructions ..........................................................................3-17

3.6 Numerical List of Instructions.........................................................................................3-27

3.7 Detailed Instruction Explanation.....................................................................................3-40

Chapter 4 – Sequential Function Chart

4.1 Sequential Function Chart (SFC) ......................................................................................4-2

4.2 Basic Operation .................................................................................................................4-2

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4.3 SFC Viewed as Ladder and Instruction List .....................................................................4-8

Chapter 5 – Setting and Using an Ethernet ELC/Module

5.1 Specifications for an Ethernet ELC/Module .....................................................................5-2

5.2 Ethernet Control Registers................................................................................................5-2

5.2.1 ELC2-PE Series ELC (Ethernet ELC)......................................................................5-2

5.2.2 ELC-COENETM (Ethernet Communication Module) ...............................................5-3

5.3 Searching for an Ethernet ELC .........................................................................................5-5

5.3.1 Communication setting ............................................................................................5-5

5.3.2 Broadcast Search ....................................................................................................5-6

5.3.3 Searching for a Model Specified ..............................................................................5-8

5.3.4 Searching by an IP Address ....................................................................................5-9

5.4 Data Exchange .................................................................................................................5-10

5.5 EtherNet/IP List ................................................................................................................ 5-11

5.5.1 EtherNet/IP Information Supported by ELC2-PE series ELCs ............................... 5-11

5.5.2 EtherNet/IP Objects Supported by ELC2-PE series ELCs .....................................5-12

Appendix A – Communications
A.1 Communication Ports ....................................................................................................... A-2

A.2 Configuration of the communication ports ..................................................................... A-2

Selecting master or slave operation .................................................................................... A-2

Selecting transmission mode .............................................................................................. A-3

Selecting data packet format ............................................................................................... A-3

A.3 Communication Protocol ASCII transmission mode ...................................................... A-4

ADR (Modbus Address)....................................................................................................... A-4

CMD (Function code) and DATA (data characters) .............................................................. A-4

LRC CHK (check sum) ........................................................................................................ A-5

A.4 Communication Protocol RTU transmission mode ........................................................ A-6

Address (Modbus Address) ................................................................................................. A-6

CMD (Command code) and DATA....................................................................................... A-6

CRC CHK (check sum) ....................................................................................................... A-7

A.5 ELC Modbus Address mapping ....................................................................................... A-8

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A.6 Function Code support (Slave Mode) .............................................................................. A-9

Command Code: 01, Read Status of Contact (Input point X is not included) ..................... A-10

Command Code: 02, Read Status of Contact (Input point X is included) ........................... A-10

Command Code: 03, Read Content of Register (T, C, D) .................................................. A-11

Command Code: 05, Force ON/OFF single contact .......................................................... A-12

Command Code: 06, Set content of single register ........................................................... A-12

Command Code: 15, Force ON/OFF multiple contacts ..................................................... A-13

Command Code: 16, Set content of multiple registers ...................................................... A-14

Command Code: 17, Set content of multiple registers ...................................................... A-14

A.7 Function Code Support (Master mode) ......................................................................... A-15

Appendix B – Troubleshooting
B.1 Common Problems and Solutions ................................................................................... B-2

B.2 Fault code Table (Hex) ...................................................................................................... B-4

B.3 Error Detection Addresses ............................................................................................... B-5

B.3 Table for Self-Detecting Abnormality............................................................................... B-6

Appendix C – Installing a USB Driver in the ELC

B.1 Installing the USB Driver for ELC2-PE ............................................................................ C-2

B.2 Installing the USB Driver for ELC2-PA............................................................................. C-6

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w .ea t o n . c o m / p l c 6
ELC Concepts

This chapter introduces basic and advanced concepts of ladder logic, which is the most
used programming language with the ELC. Users familiar with the ELC concepts can
move to the next chapter for further programming concepts. Users not familiar with the
operating principles of the ELC, should read this chapter to get a full understanding of
these concepts.

This Chapter Contains

1.1 ELC Scan Method.................................................................................................................. 9

1.2 Current Flow ........................................................................................................................ 10

1.3 NO Contact, NC Contact ..................................................................................................... 10

1.4 ELC Registers and Relays .................................................................................................. 11

1.5 Ladder Logic Symbols ........................................................................................................ 12

1.5.1 Creating a ELC Ladder Program .............................................................................. 13

1.5.2 LD / LDI (Load NO contact / Load NC contact) ......................................................... 14

1.5.3 LDP / LDF (Load Rising edge trigger/ Load Falling edge trigger) ............................. 14

1.5.4 AND / ANI (Connect NO contact in series / Connect NC contact in series)............... 14

1.5.5 ANDP / ANDF (Connect Rising edge in series/ Connect Falling edge in series)....... 15

1.5.6 OR / ORI (Connect NO contact in parallel / Connect NC contact in parallel) ............ 16

1.5.7 ORP / ORF (Connect Rising edge in parallel/ Connect Falling edge in parallel) ....... 16

1.5.8 ANB (Connect block in series).................................................................................. 16

1.5.9 ORB (Connect block in parallel) ............................................................................... 16

1.5.10 MPS / MRD / MPP (Branch instructions) .................................................................. 16

1.5.11 STL (Step Ladder Programming) .............................................................................. 17

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1.5.12 RET (Return) ............................................................................................................ 17

1.6 Conversion between Ladder Diagram and Instruction List Mode ................................... 19

1.7 Correcting Ladder Diagram ................................................................................................ 21

1.8 Basic Program Design Examples ...................................................................................... 25

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w .ea t o n . c o m / p l c 8
1 . E L C C o n c e p ts

1 ELC Concepts
1.1 ELC Scan Method
ELC utilizes a standard scan method when evaluating the user program.
Scanning process:
Read the physical input status and store the data in internal
Scan input status
memory.
Evaluate the user program with data stored in internal memory.
Evaluate user program Program scanning starts from top to bottom and left to right until
reaching the end of the program.

Refresh the outputs Write the evaluated data to the physical outputs

Input signal Input X Input signal:

The ELC reads the ON/OFF status of each input
and stores the status into memory before
Input terminal evaluating the user program.
Store to memory Once the external input status is stored into
internal memory, any change at the external inputs
Input signal memory will not be updated until next scan cycle starts.
Read X0 status from memory Program:
Program
The ELC executes instructions in the user
X0 Write Y0 state into
program from top to down and left to right then
Device Memory

Y0 stores the evaluated data into internal memory.

Read Y0 state from memory Some of this memory is latched.
Y0
Output:
M0 When END command is reached the program
Write M0 state into evaluation is complete. The output memory is
transferred to the external physical outputs.
Output
Output Output latched memory

Output terminal

Output Y

Scan time
The duration of the full scan cycle (read, evaluate, write) is called the “scan time.” With more I/O or a
longer program, the scan time becomes longer.
The ELC measures its own scan time and stores the value (0.1ms) in register
Read
D1010, the minimum scan time in register D1011, and the maximum scan time
scan time
in register D1012.
Measure Scan time can also be measured by toggling an output every scan and then
scan time measuring the pulse width on the output being toggled.
Scan time can be calculated by adding the known time required for each
Calculate
instruction in the user program. For scan time information for each instruction,
scan time
please refer to Ch3 in this manual.

Scan time exception

The ELC can process certain items faster than the scan time. Program interrupts halt the scan
time to process the interrupt subroutine program. A direct I/O refresh instruction REF allows the
ELC to access I/O immediately during user program evaluation instead of waiting until the next scan

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1 . E L C C o n c e p ts

cycle.
1.2 Current Flow
Ladder logic follows a left to right principle. In the example below, the current flows through paths
started from either X0 or X3.
X0 X1 X2 Y0
Y0
X3 X4

Reverse Current
When a current flows from right to left, which makes a reverse current logic, an error will be detected
when compiling the program. The example below shows the reverse current flow.
X0 X1 X2 Y0
Y0
X3 a X4 b X5

1.3 NO Contact, NC Contact

NO contact
Normally Open Contact, A contact

NC Contact
Normally Closed Contact, B contact

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1 . E L C C o n c e p ts

1.4 ELC Registers and Relays

Introduction to the basic internal devices in an ELC
Bit memory which represents the physical input points and receives external
X
input signals.
(Input Relay)
 Represented as X and numbered in octal, e.g. X0~X7, X10~X17…
Bit memory which represents the physical output points and saves the status to
Y
be refreshed to physical output devices.
(Output Relay)
 Represented as Y and numbered in octal, e.g. Y0~Y7, Y10~Y17...
Bit memory indicates ELC status.
M
(Internal Relay)
 Internal bit memory: represented as M and numbered in decimal, e.g. M0,
M1, M2…
Bit memory indicates ELC status in Step Function Control (SFC) mode. If no
STL instruction is applied in program, step point S can be used as an internal
S
relay M as well as an annunciator.
(Step Relay)
 Internal bit memory: represented as S and numbered in decimal, e.g. S0,
S1, S2…
T Bit, word or double word memory used for timing. When its coil is ON and the
(Timer) set time is reached, the associated contact will be energized. Every timer has
(Relay) its resolution (unit: 1ms/10ms/100ms).
(Word)  Represented as T and numbered in decimal, e.g. T0, T1, T2…
C Bit, word or double word memory used for counting. The counter counts once
(Counter) (1 pulse) when the coil goes from OFF to ON. When the predefined counter
(Relay) value is reached, the associated contact will be energized. There are 16-bit and
(Word) 32-bit high-speed counters available for users.
(Dword)  Represented as C and numbered in decimal, e.g. C0, C1, C2…
Word memory stores values and parameters for data operations. Every register
D
is able to store a word (16-bit binary value). A double word will occupy 2
(Data register)
consecutive data registers.
(Word)
 Represented as D and numbered in decimal, e.g. D0, D1, D2…
Word memory used as a modifier to indicate a specified device (word and
E, F
double word) by defining an offset. Index registers not used as a modifier can
(Index register)
be used as general purpose registers.
(Word)
 Represented as E0 ~ E7 and F0 ~ F7.

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1 . E L C C o n c e p ts

1.5 Ladder Logic Symbols

The following table displays the list of ELCSoft program symbols, along with their description,
command, and memory registers that use them.
Ladder Diagram
Explanation Instruction Available Devices
Structure

NO (Normally Open)
LD X, Y, M, S, T, C
contact / A contact

NC (Normally Closed)
LDI X, Y, M, S, T, C
contact / B contact

NO contact in series AND X, Y, M, S, T, C

NC contact in series ANI X, Y, M, S, T, C

NO contact in parallel OR X, Y, M, S, T, C

NC contact in parallel ORI X, Y, M, S, T, C

Rising-edge trigger
LDP X, Y, M, S, T, C
switch
Falling-edge trigger
LDF X, Y, M, S, T, C
switch

Rising-edge trigger in
ANDP X, Y, M, S, T, C
series

Falling-edge trigger in
ANDF X, Y, M, S, T, C
series

Rising-edge trigger in
ORP X, Y, M, S, T, C
parallel

Falling-edge trigger in
ORF X, Y, M, S, T, C
parallel

Block in series ANB None

Block in parallel ORB None

MPS
Multiple output branches MRD None
MPP

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1 . E L C C o n c e p ts

Ladder Diagram
Explanation Instruction Available Devices
Structure

Output coil OUT Y, M, S

S Step ladder STL S

Basic instructions and API

Basic / Application
- instructions. Please refer to
instruction
chapter 3 Instruction Set

Inverse logic INV None

1.5.1 CREATING A ELC LADDER PROGRAM

Editing a program should start from the left side bus line to the right side bus line, and from top to
bottom. However, the right side bus line is omitted when editing in ELCSoft. A single row can have a
maximum of 11 contacts. If more than 11 contacts are connected, a continuous symbol “0” will be
generated automatically and the 12th contact will be placed at the start of next row. The same input
points can be used repeatedly. See the figure below:

X0 X1 X2 X3 X4 X5 X6 X7 X10 C0 C1
0
X11 X12 X13
0 Y1

When evaluating the user program, the ELC scan starts from left to right and proceeds to the next
row down until the ELC reaches END instruction. Output coils and basic / application instructions
are output instructions and are placed at the right of ladder diagram. The sample program below
explains the execution order of a ladder diagram. The numbers in the black circles indicate the
execution order.

X0 X1 Y1 X4
Y1
M0 T0 M3
TMR T0 K10
X3 M1

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1 . E L C C o n c e p ts

Execution order of the sample program:

1 LD X0
2 OR M0
3 AND X1
4 LD X3
AND M1
ORB
5 LD Y1
AND X4
6 LD T0
AND M3
ORB
7 ANB
8 OUT Y1
TMR T0 K10

1.5.2 LD / LDI (LOAD NO CONTACT / LOAD NC

CONTACT)
LD or LDI starts a row or block

LD instruction LD instruction

AND block OR block

1.5.3 LDP / LDF (LOAD RISING EDGE

TRIGGER/ LOAD FALLING EDGE
TRIGGER)
Similar to the LD instruction, LDP and LDF instructions act on the rising edge or falling edge when
the contact is ON, as shown in the figure below.

Rising-edge Falling-edge
X0 X0
Time Time
OFF ON OFF OFF ON OFF

1.5.4 AND / ANI (CONNECT NO CONTACTS IN

SERIES / CONNECT NC CONTACTS IN
SERIES)
AND (ANI) instruction connects a NO (NC) contact in series with another device or block.

AND instruction AND instruction

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1 . E L C C o n c e p ts

1.5.5 ANDP / ANDF (CONNECT RISING EDGE

IN SERIES/ CONNECT FALLING EDGE
IN SERIES)
Similar to AND instruction, ANDP (ANDF) instruction connects rising (falling) edge triggers in series
with another device or block.

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1 . E L C C o n c e p ts

1.5.6 OR / ORI (CONNECT NO CONTACT IN

PARALLEL / CONNECT NC CONTACT
IN PARALLEL)
OR (ORI) instruction connects a NO (NC) in parallel with another device or block.

OR instruction OR instruction OR instruction

1.5.7 ORP / ORF (CONNECT RISING EDGE IN

PARALLEL/ CONNECT FALLING EDGE
IN PARALLEL)
Similar to OR instruction, ORP (ORF) instruction connects rising (falling) edge triggers in parallel
with another device or block

1.5.8 ANB (CONNECT BLOCK IN SERIES)

ANB instruction connects a block in series with another block

ANB command

1.5.9 ORB (CONNECT BLOCK IN PARALLEL)

ORB instruction connects a block in parallel with another block

ORB instruction

1.5.10 MPS / MRD / MPP (BRANCH

INSTRUCTIONS)
These instructions provide a method to create multiplexed output branches based on the current
result stored by the MPS instruction.

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1 . E L C C o n c e p ts

Branch Branch
Description
instruction Symbol
Start of branches. Stores the current result of the
MPS ┬ program evaluation. Max. 8 MPS-MPP pairs can
be applied
Reads the stored current result from the previous
MRD ├
MPS
End of branches. Pops (reads then resets) the
MPP └
stored result in previous MPS

Note: When compiling ladder programs with ELCSoft, MPS, MRD and MPP could be automatically
added to the compiled results in instruction format. However, sometimes the branch instructions are
ignored by ELCSoft if not necessary. Users programming in instruction format can enter branch
instructions as required.
Connection points of MPS, MRD and MPP:
MPS

MPS

MRD

MPP
MPP

1.5.11 STL (STEP LADDER PROGRAMMING)

STL programming uses step points, e.g. S0 S21, S22, which allow users to program in a clear and
understandable way like drawing a flow chart. The program will proceed to the next step only if the
previous step is completed, therefore it forms a sequential control process similar to SFCs
(Sequential Function Charts). The STL sequence can be converted into an ELC ladder diagram
which is called “step ladder diagram” as below.

M1002
M1002 SET S0
initial S0
pulse S
S0 SET S21
S21
S SET S22
S21 S22
e
S S0

S22 RET

1.5.12 RET (RETURN)

A RET instruction must be placed at the end of a sequential control process to indicate the
completion of STL flow.

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1 . E L C C o n c e p ts

S20
e
S

RET

S20
e
S

RET

Note: Always connect the RET instruction immediately after the last step point indicated in the above
diagram or a program error may occur.

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1.6 Conversion between Ladder Diagram and Instruction List Mode

Ladder Diagram Instruction
LD X0 OR
X0 X2 X1 OR X1 block
Y0
LD X2 OR
X1 M0 C0
SET S0 OR M0 block
M1 ORI M1
ANB Block in series
M2 Y0 LD M2 AND
AND Y0 block
ORB Block in parallel The output
AN I X1 ANI continues
S0 X10 based on
S Y10 OUT Y0
status of
AND C0 Multiple
outputs
SET S10 SET S0
STL S0 Start of step ladder
LD X10 S0 status operates with X10
S10 X11 OUT Y10 Output Y10 and
S Y11 transfer of step point
SET S10
SET S11 STL S10 Read S10 status
LD X11
SET S12 OUT Y11
SET S11 Output Y11 and
SET S13 SET S12 transfer of step points
SET S13
STL S11 Read S11 status
S11 X12
S Y12 LD X12 S11 operates with X12
OUT Y12 Output Y12 and
SET S20 SET S20 transfer of step points
STL S20
S20 S12 S13 Convergence of
X13 STL S12 multiple status
S S S S0
STL S13 End of step
RET LD X13 Read X13 status and ladder
OUT S0 transfer of step point

X0 RET Return
CNT C0 K10 LD X0
CNT C0 K10
C0 X1 LD C0 Read C0
M0 MPS
X1 AND X1
M1
M2 OUT M0
M2 MRD
Multiple
AN I X1 outputs
RST C0 OUT M1
MPP
END AN I M2
OUT M2
RST C0
END End of program

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1 . E L C C o n c e p ts

Fuzzy Syntax
Generally, the ladder diagram programming is scanned “top to bottom and left to right”. However,
some programming methods do not follow this principle and still deliver the same control results.
Here are some examples explaining this kind of “fuzzy syntax.”
Example 1:
X0 X2 X4 Better method OK method

X1 X3 X5 LD X0 LD X0
OR X1 OR X1
LD X2 LD X2
OR X3 OR X3
ANB LD X4
LD X4 OR X5
OR X5 ANB
ANB ANB

The two instruction programs can be converted into the same ladder diagram. The difference
between the Better and the OK method is the ANB operation. The ANB instruction cannot be used
continuously more than 8 times. If more than 8 ANB instructions are used continuously, a program
error will occur. Therefore, applying the ANB instruction after a block is made is the better method to
prevent possible errors. In addition, it’s also the more logical and clearer programming method for
general users.
Example 2:
X0 Good method Bad method

X1 LD X0 LD X0
OR X1 LD X1
X2
OR X2 LD X2
X3 OR X3 LD X3
ORB
ORB
ORB

The difference between the Good and the Bad method is very clear. With longer program code, the
required memory increases in the Bad method. Following the general principle and applying good
/ better methods when editing programs prevents possible errors and improves program execution
speed as well.
Common Programming Errors
The ELC processes the diagram program from top to bottom and left to right. When editing ladder
diagrams users should adopt this principle as well or an error would be detected by ELCSoft when
compiling the user program. Common program errors are listed below:

OR operation upward is not allowed.

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1 . E L C C o n c e p ts

“Reverse current” flow is not allowed.

Reverse curr ent

Output should be connected on top of the circuit.

Block combination should be made on top of the

circuit.

Parallel connection without an instruction is not

allowed.

Parallel connection without an instruction is not

allowed.

No instruction in the middle block is not allowed.

Instructions and blocks in series should be

horizontally aligned

Label P0 should be at the first row of the

complete network.

“Reverse current” exists

1.7 Correcting Ladder Diagram

There are many ways to accomplish your ladder logic. The list below displays methods for creating
ladder logic. Some methods will not work and others could be better. For each method that will not
work or could be better, there is a suggested improvement. Review the instructions for each

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1 . E L C C o n c e p ts

method. The improved method will shorten the number of instructions, saving memory and
improving the scan time.
Example 1:
Connect the block to the front to eliminate the ANB instruction. This simplifies the program and
improves processing speed
X0 X1 Instruction List
LD X0
X2
LD X1
OR X2

ANB


Instruction List
X1 X0
LD X1
X2 OR X2
AND X0

Example 2:
When an instruction is to be connected to a block, connect the instruction to the lower row to omit
the ORB instruction.
Instruction List
T0 LD T0
LD X1
X1 X2
AND X2
ORB


X1 X2 Instruction List
LD X1
T0
AND X2
OR T0

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1 . E L C C o n c e p ts

Example 3:
“Reverse current” shown in diagram (a) is not allowed by the ELC.
Instruction List
X0
LD X0
X1 X2 OR X1
AND X2
X3 X4 LD X3
AND X4
(a) ORB

X3 X4 Instruction List
LD X3
X1 X2
AND X4
X0 LD X1
OR X0
(b) AND X2
ORB

Example 4:
For multiple outputs, connect the output without additional input devices to the top of the circuit to
omit the MPS and MPP instructions.
X0 Instruction List
Y1 MPS
AND X0
Y0 OUT Y1
MPP
OUT Y0


Instruction List
Y0
OUT Y0
X0 AND X0
Y1 OUT Y1

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1 . E L C C o n c e p ts

Example 5:
To correct the circuit with reverse current flow, refer to the diagrams below
X0 X1 X2

X0 X1 X2 X3 X4 X5

X3 X4 X5 X10


X6 X7 X10 LOO P1
X6 X7 X5

rev er se c urrent X10 LOOP1

Example 6:
To correct the circuit with reverse current flow, refer to the diagrams below

X0 X1 X2

X3 X4 X5
X0 X1 X2

X6 X7 X10 LOO P1 X3 X4 X5

X6
rev er se c urrent

X3 X7 X10

Reverse curr ent X6

LOOP1
X0 X1 X2
X0 X1 X4 X7 X10

X3 X4 X5
LOOP 2

X6 X7 X10

LOO P2

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1 . E L C C o n c e p ts

1.8 Basic Program Design Examples

The examples that follow illustrate how common functions can be programmed.
Example 1 - Stop First latched circuit
When X1 (START) = ON and X2 (STOP) = OFF, Y1 will be ON. If Y1 X2
X2 is turned on, Y1 will be OFF. This is a Stop First circuit Y1
because the STOP button has the control priority over the X1
START button.

Example 2 - Start First latched circuit

When X1 (START) = ON and X2 (STOP) = OFF, Y1 will be ON X1 X2
and latched. If X2 is turned ON, Y1 remains ON. This is a Start Y1
First circuit because the START button has the control priority Y1
over the STOP button.

Example 3 - Latched circuit using SET and RST

The diagrams are latched circuits using the RST and SET Stop first
instructions. X1
The instruction encountered last in a program will determine the SET Y1
final state of Y1. Therefore, if both X1 and X2 are ON and the X2
RST instruction is after the SET instruction, this forms a Stop RST Y1
First circuit. Conversely, if the SET instruction is after the RST
Start first
instruction, this forms a Start First circuit.
X2
RST Y1
X1
SET Y1

Example 4 - Power down latched circuit

The auxiliary relay M512 is a latched relay. Once X1 is ON, Y1 X1
retains its status before power down and resumes after power up. SET M512
X2
RST M512
M512
Y1

Example 5 - Conditional Control

X1 X3
Y1 X1

Y1 X3

X2
X2 X4 Y1
Y2 X4
Y2
Y1

Because NO contact Y1 is connected to the circuit of Y2 output, Y1 becomes one of the conditions
for enabling Y2, i.e. for turning on Y2, Y1 must be ON

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1 . E L C C o n c e p ts

Example 6- Interlock control

X1 X3 Y2
Y1 X1

Y1 X3

X2 X4 Y1 X4
Y2
Y1
Y2
Y2

NC contact Y1 is connected to the Y2 output circuit and the NC contact Y2 is connected to the Y1
output circuit. If Y1 is ON, Y2 will be OFF and vice versa. This forms an Interlock circuit which
prevents both outputs from being ON at the same time. Even if both X1 and X2 are ON, in this case
only Y1 will be enabled.
Example 7 - Sequential Control
X1 X3 Y2 Connect the NC contact Y2 to the Y1 output circuit
Y1 and the NO contact Y1 to the Y2 output circuit. Y1
Y1 becomes one of the conditions to turn on Y2. In
addition, Y1 will be OFF when Y2 is ON, which
X2 X4 Y1 forms a sequential control process.
Y2
Y2

Example 8 - Oscillating Circuit

An oscillating circuit with cycle time ∆T+∆T
Y1
Y1
Y1
T T
In the first scan, Y1 turns on. In the second scan, Y1 turns off due to the reversed state of contact Y1.
Y1 output status changes in every scan and forms an oscillating circuit with output
cycle∆T(ON)+∆T(OFF)
Example 9 – Oscillating Circuit with Timer
An oscillating circuit with cycle nT+ΔT
X0 Y1
X0
TMR T0 Kn
T0
Y1 Y1

nT T
When X0 = ON, T0 starts timing (nT). Once the set time is reached, contact T0 = ON to enable
Y1(ΔT). In next scan, Timer T0 is reset due to the reversed status of contact Y1. Therefore contact
T0 is reset and Y1 = OFF. In next scan, T0 starts timing again. The process forms an oscillating
circuit with output cycle nT+ΔT.

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1 . E L C C o n c e p ts

Example 10 - Flashing Circuit

The ladder diagram uses two timers to form an oscillating circuit which enables a flashing indicator
or a buzzing alarm. n1 and n2 refer to the set values in T1 and T2 and T refers to timer resolution.
X0 T2
TMR T1 Kn1 X0
n2 T
T1
TMR T2 Kn2
Y1
X0 T1
Y1
n1 T

Example 11 - Trigger Circuit

In this diagram, rising-edge contact X0 generates trigger pulses to control two actions executing
interchangeably.
X0
M0 X0
M0 Y1 T
Y1
M0
M0 Y1
Y1

Example 12 – OFF Delay Circuit

If X0 = ON, timer T10 is not energized but coil Y1 is ON. When X0 is OFF, T10 is activated. After 100
seconds (K1000 × 0.1 sec = 100 sec), NC contact T10 is ON to turn off Y1. Turn-off action is
delayed for 100 seconds by this OFF delay circuit.
X0
TMR T10 K1000 X0
T10
Y1 Y1
Timer Resolution: 0.1 sec
100 seconds
Example 13 - Output delay circuit
The output delay circuit is composed of two timers. If input X0 is ON or OFF, output Y4 will be
delayed.
X0
TMR T5 K50
5 secs
T5 T6
Y4 T5

Y4 X0 T
TMR T6 K30 T6
3 secs

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1 . E L C C o n c e p ts

Example 14 - Timing extension circuit

X0 The total delay time: (n1+n2)* T. T refers to the
TMR T11 Kn1 timer resolution.
T11 X0
TMR T12 Kn2 n1* T

T12 T11
Y1 n2* T
.
Timer = T11, T12 T12
Timer resolution: T
Y1
(n1+n2)* T

Example 15 – Cascading Counters

X13 The counting range of a 16-bit counter is 0 ~
CNT C5 Kn1 32,767. The circuit on the left uses two counters
C5 to increase the counting range to n1*n2. When
CNT C6 Kn2 the value in counter C6 reaches n2, The pulses
counted from X13 will be n1*n2.
RST C5
X14
RST C6
C6
Y1

Example 16 - Traffic light control (Step Ladder Logic)

Traffic light control
Green light
Red light Yellow light Green light
blinking
Vertical light Y0 Y1 Y2 Y2

Horizontal light Y20 Y21 Y22 Y22

Light Time 35 Sec 5 Sec 25 Sec 5 Sec

Vertical
Light

Horizontal
Light

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1 . E L C C o n c e p ts

Timing Diagram:
Vertical
Light

Red Y0

Yellow Y1

Green Y2 25 Sec

Horizontal 5 Sec 5 Sec

Light
Red Y20

Yellow Y21

Green Y22
25 Sec
5 Sec 5 Sec

SFC Figure:
M1002
S0

S20 Y0 S30 Y22

TMR T0 K350 TMR T10 K250

T0 T10
S21 Y2 S31 TMR T11 K50
M1013
TMR T1 K250 Y22
T1 T11
S22 TMR T2 K50 S32 Y21
M1013
Y2 TMR T12 K50
T2 T12
S23 Y1 S33 Y20

TMR T13 K350

T13

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1 . E L C C o n c e p ts

Ladder Diagram:
M1002
ZRST S0 S127

SET S0
S0
S SET S20

SET S30
S20
S Y0

TMR T0 K350
T0
SET S21
S21
S Y2

TMR T1 K250
T1
SET S22
S22
S TMR T2 K50
M1013
Y2
T2
SET S23
S23
S Y1
S30
S Y22

TMR T10 K250

T10
SET S31
S31
S TMR T11 K50
M1013
Y22
T11
SET S32
S32
S Y21

TMR T12 K50

T12
SET S33
S33
S Y20

TMR T13 K350

S23 S33 T13
S S S0

RET

END

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ELCSoft programming (SFC mode)

SFC logic Internal Ladder Logic

LAD-0

M1002
ZRST S0 S127
LAD-0
SET S0
S0

Transfer condition 1
0

T0
TRANS*
S20 S30

1 5
S22
S21 S31

2 6 TMR T2 K50
M1013
S22 S32
Y2

3 7

S23 S33 Transfer condition 4

T13
TRANS*
4

S0 Transfer condition 7

T12
TRANS*

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Programming Concepts

The Eaton Logic Controller (ELC) is a programmable logic controller spanning an I/O
range of 10 to 256 I/O points. ELC processors are so versatile they range from nano to
small application size without ever needing to change processors. The ELC can control
a wide variety of devices to solve your automation needs. The ELC monitors inputs and
manipulate outputs as controlled by the user program. The user program provides
features like boolean logic, counting, timing, complex math operations, and
communication with other products.

This Chapter Contains

2.1 ELC Memory Map for ELCB-PB controllers .......................................................................34

2.2 ELC Memory Map for ELC-PA controllers ..........................................................................36

2.3 ELC Memory Map for ELC-PV and ELC2-PV controllers ...................................................39

2.4 ELC Memory Map for ELCM-PH/PA controllers .................................................................42

2.5 ELC Memory Map for ELC2-PB controllers ........................................................................45

2.6 ELC Memory Map for ELC2-PC/ELC2-PA controllers ........................................................47

2.7 ELC Memory Map for ELC2-PE controllers ........................................................................49

2.8 ELC Latched Memory Settings ...........................................................................................51

2.9 ELC Latched Memory Modes ..............................................................................................55

2.10 ELC Bits, Nibbles, Bytes, Words, etc..................................................................................55

2.11 Binary, Octal, Decimal, BCD, Hex .......................................................................................56

2.12 Special M Relay ....................................................................................................................58

2.13 S Relay ..................................................................................................................................83

2.14 T (Timer)................................................................................................................................83

2.15 C (Counter) ...........................................................................................................................85

2.16 High-speed Counters ...........................................................................................................87

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2.17 Special Data Register ...........................................................................................................97

2.18 E, F Index Registers ........................................................................................................... 111

2.19 File Register ....................................................................................................................... 111

2.20 Nest Level Pointer[N], Pointer[P], Interrupt Pointer [I] .................................................... 113

2.21 Applications of Special M Relay and Special D Register ................................................ 117

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2 . P r o g r a m m i n g C o n c e p ts

2 Programming Concepts
2.1 ELC Memory Map for ELCB-PB controllers
Items Specifications Remarks

Control Method Stored program, cyclic scan system

Batch processing method Fast I/O refresh instruction
I/O Processing Method
(when END instruction is executed) can override batch update
Basic instructions – 3.5 seconds Application instructions
Execution Speed
minimum varies per instruction
Program language Instructions + Ladder Logic + SFC

Program Capacity 3792 Steps Built-in EEPROM

Instructions 32 Basic instructions, Application instructions: 109

X0~X177, octal number
X External inputs Physical input points
system, 128 points max. Total
Y0~Y177, octal number 256 I/O
Y External outputs Physical output points
system, 128 points max.
M0~M511, M768~M999
General
Auxiliary relay

744 points Note 1

M512~M767, 256 points Total Main internal relay area for
M Latched
Note 3 1280 bits general use.
M1000~M1279, 280 points,
Special
some are latched
100ms T0~T63, 64 points
Timer

10ms Total Contact = ON when timer

T T64~T126, 63 points
(M1028=ON) 128 bits reaches preset value.
Bit Contacts

1ms T127 1 points

C0~C111, Note 1
16-bit count up
C112~C127, Note 3
C235~C238, C241, C242,
C244, 1 phase 1 input, 7
Counter

Contact = ON when
points Note 4 Total
C counter reaches preset
32bit C246, C247, C249, 1 phase 141 bits
value.
high-speed 2 input, 3 points
count up/down Note 4
C251, C252, C254, 2 phase
2 input, 3 points
Note 4
Initial step point S0~S9, 10 points, Note 4
Step point

SFC usage
Total
S Zero return S10~S19, 10 points, Note 4 S10~S19 is used with IST
128 bits
instruction
Latched S20~S127, Note 4

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 34
2 . P r o g r a m m i n g C o n c e p ts

Items Specifications Remarks

T Current value T0~T127, 128 words

C0~C127, 16-bit counter,

C Current value
Word Register

C235~C254, 32-bit counter

General D0~D407, Note 1

Data register

Latched D408~D599, Note 3 Total

General storage for word
D 912
Special D1000~D1311, 312 words length data.
words
Index E=D1028, F=D1029, Note 1

N Master control loop N0~N7, 8 points

P Pointer P0~P63, 64 points Subroutines pointer

I001 (X0), I101 (X1),

External
Interrupt Service
Pointer

I201 (X2), I301 (X3);

interrupt
4 points (all are rising-edge trigger)
Address for interrupt
I
subroutines
I610~I699, 1 points
Time interrupt
(Timer resolution = 1ms)
Communication I150, 1 point

K-32,768 ~ K32,767 (16-bit operation)

K Decimal
Constant

K-2,147,483,648 ~ K2,147,483,647 (32-bit operation)

H0000 ~ HFFFF (16-bit operation),

H Hexadecimal
H00000000 ~ HFFFFFFFF (32-bit operation)
COM1: RS-232 (Slave),
Serial ports COM2: RS-485 (Master/Slave),
Both can be used at the same time.
Clock/Calendar (RTC) None

Special Expansion Modules Attach up to 8 modules of any type analog I/O expansion modules

Notes:
1. Data area is non-latched.
2. Default is non-latched, optionally can be set to latched.
3. Default is latched, optionally can be set to non-latched.
4. Data area is latched.

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2 . P r o g r a m m i n g C o n c e p ts

2.2 ELC Memory Map for ELC-PA controllers

Items Specifications Remarks

Control Method Stored program, cyclic scan system

Batch processing method Fast I/O refresh instruction
I/O Processing Method
(when END instruction is executed) can override batch update
Basic instructions – 2.5 seconds Application instructions
Execution Speed
minimum varies per instruction
Program language Instructions + Ladder Logic + SFC

Program Capacity 7920 STEPS SRAM + Battery

178 Application
Instructions 32 Basic instructions
instructions
X0~X177, octal number
X External inputs Physical input points
system, 128 points max. Total
Y0~Y177, octal number 256 I/O
Y External outputs Physical output points
system, 128 points max.
General M0~M511, Note 1
Auxiliary relay

M512~M999, Note 3 Total Main internal relay area for

M Latched
M2000~M4095, Note 3 4096 bits general use.
M1000~M1999
Special
some are latched
T0~T199, Note 1

100ms T192~T199 for Subroutine

T250~T255(accumulative),
6 points Note 4
Timer

Total Contact = ON when timer

Bit Contacts

T
T200~T239, Note 2 256 bits reaches preset value.
10ms T240~T245(accumulative),
6 points, Note 4
T246~T249(accumulative),
1ms
4 points, Note 4
C0~C95, Note 1
16-bit count up
C96~C199, Note 3 Total
C200~C215, Note 1 235 bits
32-bit count
up/down C216~C234, Note 3
Counter

Contact = ON when
C C235~C244, 1 phase 1 counter reaches preset
input, 9 points, Note 3 value.
32bit C246, C247, C249, 1 phase Total
high-speed 2 input, 3 points, Note 1 16 bits
count up/down C251, C252, C253, C254, 2
phase 2 input, 4 points,
Note 3

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2 . P r o g r a m m i n g C o n c e p ts

Items Specifications Remarks

S0~S9, 10 points
Initial step point
Note 1
S10~S19, 10 points (use
Zero point
with IST instruction)
return
Bit Contacts

Step point Note 1

Total Sequential Function Chart
S S20~S511, 492 points
General 1024 bits (SFC) usage
Note 1
S512~S895, 384 points
Latched
Note 3
S896~S1023, 128 points
Alarm
Note 3
T Current value T0~T255, 256 words
C0~C199, 16-bit counter, 200 words
C Current value
C200~C254, 32-bit counter
General D0~D199, Note 1
Word Register

Data register

D200~D999, Note 3
Latched Total
General storage for word
D D2000~D4999, Note 3 5000
length data
words
Special D1000~D1999, 1000 words
Index E0~E3, F0~F3, Note 1
None

0~1599, 1600 words Additional storage area to

File register
Note 4 be used

N Master control loop N0~N7, 8 points Master control nested loop

P Pointer P0~P255, 256 points Subroutine pointer
I001 (X0), I101 (X1), I201 (X2), I301
External
(X3), I401 (X4), I501 (X5); 6 points
interrupt
Interrupt Service

(all are rising-edge trigger)

Pointer

I601~I699, I701~I799, 2 points Address for interrupt

I Time interrupt
(Timer resolution = 1ms) subroutines
Hi-speed I010, I020, I030, I040, I050, I060;
counter 6 points
Communication I150, 1 point

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2 . P r o g r a m m i n g C o n c e p ts

Items Specifications Remarks

K-32,768 ~ K32,767 (16-bit operation),

Constant K Decimal
K-2,147,483,648 ~ K2,147,483,647 (32-bit operation)

H0000 ~ HFFFF (16-bit operation),

H Hexadecimal
H00000000 ~ HFFFFFFFF (32-bit operation)

COM1: RS-232 (Slave), COM2: RS-485 (Master/Slave)

Serial ports Both can be used at the same time.
COM1 is typically the programming port.

Year, Month, Day, Week, Hours,

Clock/Calendar (RTC) Keep by battery
Minutes, Seconds
Special Expansion Modules Attach up to 8 modules of any type analog I/O expansion modules

Notes:
1. Data area is non-latched.
2. Default is non-latched, optionally can be set to latched.
3. Default is latched, optionally can be set to non-latched.
4. Data area is latched.

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2 . P r o g r a m m i n g C o n c e p ts

2.3 ELC Memory Map for ELC-PV and ELC2-PV controllers

Items Specifications Remarks
Control Method Stored program, cyclic scan system
Batch processing method Fast I/O refresh instruction
I/O Processing Method
(when END instruction is executed) can override batch update
Basic instructions – 0.24 seconds Application instructions
Execution Speed
minimum varies per instruction
Program language Instructions + Ladder Logic + SFC
Program ELC-PV 15872 STEPS SRAM + Battery
Capacity ELC2-PV 30000 STEPS Flash ROM
197 Application
Instructions 32 Basic instructions
instructions
X0~X377, octal number
X External inputs Physical input points
system, 256 points max. Total
Y0~Y377, octal number 512 I/O
Y External outputs Physical output points
system, 256 points max.
General M0~M511, Note 2
Auxiliary

M512~M999, Note 3
Latched Total Main internal relay area for
relay

M M2000~M4095, Note 3
4096 bits general use.
M1000~M1999
Special
some are latched
T0~T199, Note 2
T192~T199 for Subroutine
100ms
T250~T255(accumulative),
Bit Contacts

6 points Note 4
Timer

Total Contact = ON when timer

T T200~T239, Note 2
256 bits reaches preset value.
10ms T240~T245(accumulative),
6 points, Note 4
T246~T249(accumulative),
1ms
4 points, Note 4
C0~C99, Note 2
16-bit count up
C100~C199, Note 3 Total
32-bit count C200~C219, Note 2 235 bits
up/down C220~C234, Note 3
Counter

Contact = ON when
C235~C244, 1 phase 1
C counter reaches preset
input, 10 points, Note 3
32bit value.
C246~C249, 1 phase 2 Total
high-speed
input, 4 points, Note 3 18 bits
count up/down
C251~C254, 2 phase 2
input, 4 points, Note 3

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 39
2 . P r o g r a m m i n g C o n c e p ts

Items Specifications Remarks

S0~S9, 10 points
Initial step point
Note 2
S10~S19, 10 points
Zero point
(use with IST instruction)
Bit Contacts

return
Step point Note 2
Total Sequential Function Chart
S S20~S499, 480 points
General 1024 bits (SFC) usage
Note 2
S500~S899, 400 points
Latched
Note 3
S900~S1023, 124 points
Alarm
Note 3
T Current value T0~T255, 256 words
C0~C199, 16-bit counter, 200 words
C Current value
C200~C254, 32-bit counter, 53 words
General D0~D199, Note 2
D200~D999, Note 3 Total For ELC-PV,
register

Latched
Data
Word Register

D D2000~D9999, Note 3 10000 General storage for word

Special D1000~D1999, 1000 words words length data
Index E0~E7, F0~F7, Note 1
General D0~D199, Note 2
D200~D999, Note 3 Total For ELC2-PV,
register

Latched
Data

D D2000~D11999, Note 3 12000 General storage for word

Special D1000~D1999, 1000 words words length data
Index E0~E7, F0~F7, Note 1
Additional storage area to
Non

File register 0~9999, 10000 words, Note 4

be used
N Master control loop N0~N7, 8 points Master control nested loop
P Pointer P0~P255, 256 points Subroutine pointer
I000/I001(X0), I100/I101 (X1),
I200/I201 (X2), I300/I301 (X3),
External I400/I401 (X4), I500/I501 (X5), 6 points
interrupt
(01, rising-edge trigger , 00,
falling-edge trigger )
I601~I699, I701~I799, 2 points
(Timer resolution = 1ms)
Interrupt Service

Time interrupt
I801~I899, 1 points
Pointer

(Timer resolution = 0.1ms)

Address for interrupt
I Interruption subroutines
inserted when
I010, I020, I030, I040, I050, I060,
high-speed
6 points
counter reaches
target
Pulse
I110, I120, I130, I140, 4 points
interruption
Hi-speed I010, I020, I030, I040, I050, I060;
counter 6 points
Communication I150, I160, I170, 3 points
Items Specifications Remarks
K-32,768 ~ K32,767 (16-bit operation),
Constant

K Decimal
K-2,147,483,648 ~ K2,147,483,647 (32-bit operation)
H0000 ~ HFFFF (16-bit operation),
H Hexadecimal
H00000000 ~ HFFFFFFFF (32-bit operation)
COM1: RS-232 (Slave), COM2: RS-485 (Master/Slave) Both can be
Serial ports used at the same time.
COM1 is typically the programming port.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 40
2 . P r o g r a m m i n g C o n c e p ts

Year, Month, Day, Week, Hours,

Clock/Calendar (RTC) Keep by battery
Minutes, Seconds
Analog Volume dial 2
Special Expansion Modules Attach up to 8 modules of any type analog I/O expansion modules
High Speed Expansion
Left side expansion port: Attach up to 8 high speed modules
Modules
Notes:
1. Data area is non-latched.
2. Default is non-latched, optionally can be set to latched.
3. Default is latched, optionally can be set to non-latched.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 41
2 . P r o g r a m m i n g C o n c e p ts

2.4 ELC Memory Map for ELCM-PH/PA controllers

Items Specifications Remarks
Control Method Stored program, cyclic scan system
Immediate I/O refresh
Batch processing method (when
I/O Processing Method instruction can override
END instruction is executed)
batch update
Execution Speed Basic instructions – 0.54s MOV instruction – 3.4s
Program language Instructions + Ladder Logic + SFC
Program Capacity 15872 STEPS Flash-ROM
200 Application
Instructions 32 Basic instructions
instructions
X0~X377, octal number
X External inputs system, 256 points max, Note Physical input points
Total
4
256+
Y0~Y377, octal number
16 I/O
Y External outputs system, 256 points max, Note Physical output points
4
M0~M511, 512 points, Note 1
M768~M999, 232 points,
General Note 1
Auxiliary relay

M2000~M2047, 48 points,
Note 1 Total
Main internal relay area for
M M512~M767, 256 points, 4096
general use.
Note 2 points
Latched
Bit Contacts

M2048~M4095, 2048 points,

Note 2
M1000~M1999, 1000 points,
Special
some are latched
T0~T126, 127 points, Note 1
100ms T128~T183, Note 1
(M1028=ON, T184~T199 for Subroutines,
T64~T126: 16 points, Note 1
10ms) T250~T255(accumulative),
6 points Note 1 Total
Timer

Contact = ON when timer

T 10ms T200~T239, 40 points, 256
reaches preset value.
(M1038=ON, Note 1 points
T200~T245: T240~T245(accumulative),
1ms) 6 points, Note 1
T127, 1 points, Note 1
1ms T246~T249(accumulative),
4 points, Note 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 42
2 . P r o g r a m m i n g C o n c e p ts

Items Specifications Remarks

C0~C111, 112 points, Note 1
C128~C199,72 points,
16-bit count up Note 1
Total
C112~C127,16 points,
232
Note 2
points
C200~C223, 24 points,
32-bit count
Note 1
up/down
C224~C231, 8 points, Note 2
Counter

Contact = ON when
C235~C242, 1 phase 1 input,
C counter reaches preset
Soft- 8 points, Note 2
value.
ware C232~C234, 2 phase 2 input,
32bit 3 points, Note 2
Bit Contacts

Total
Bit C t t

high-spe C243~C244, 1 phase 1 input,

23
ed count 2 points, Note 2
points
up/down Hard-w C245~C250, 1 phase 2 input,
are 6 points, Note 2
C251~C254 2 phase 2 input,
4 points, Note 2
Initial step point S0~S9, 10 points, Note 2
S10~S19, 10 points (use with
Zero point return
IST instruction), Note 2
Step point

S20~S127, 108 points, Total

Latched Sequential Function Chart
S Note 2 1024
(SFC) usage
S128~S911, 784 points, points
General
Note 1
S912~S1023, 112 points,
Alarm
Note 2
T Current value T0~T255, 256 words
C0~C199, 16-bit counter, 200 words
C Current value C200~C254, 32-bit counter, 55
words
Word Register

D0~D407, 408 words, Note 1

D600~D999, 400 words,
General Note 1
Data register

D3920~D9999, 6080 words,

General storage for word
D Note 1
length data
D408~D599, 192 words,
Note 2 Total
Latched 1000
D2000~D3919, 1920 words,
Note 2 0
D1000~D1999, 1000 words, points
Word Register

Special
Data register

some are latched

D9900~D9999，100 words, General storage for word
D For AIO modules
Note 1, Note 5 length data
E0~E7, F0~F7, 16 words,
Index
Note 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 43
2 . P r o g r a m m i n g C o n c e p ts

Items Specifications Remarks

N Master control loop N0~N7, 8 points Master control nested loop
The location point of CJ,
P Pointer P0~P255, 256 points
CALL
I000/I001(X0), I100/I101(X1),
I200/I201(X2), I300/I301(X3),
I400/I401(X4), I500/I501(X5),
External interrupt
Interrupt Service
I600/I601(X6), I700/I701(X7), 8
Pointer

points (01, rising-edge trigger ,

00, falling-edge trigger ) Address for interrupt
I
I602~I699, I702~I799, 2 points subroutines
Timer interrupt
(Timer resolution = 1ms)
High-speed I010, I020, I030, I040, I050, I060,
counter interrupt I070, I080,8 points
Communication I140(COM1), I150(COM2),
interrupt I160(COM3), 3 points, Note 3
K-32,768 ~ K32,767 (16-bit operation),
Constant

K Decimal
K-2,147,483,648 ~ K2,147,483,647 (32-bit operation)
H0000 ~ HFFFF (16-bit operation),
H Hexadecimal
H00000000 ~HFFFFFFFF (32-bit operation)
COM1: built-in RS-232 ((Master/Slave), COM2: built-in RS-485
Serial ports (Master/Slave), COM3: built-in RS-485 (Master/Slave),
COM1 is typically the programming port.
Can’t keep at version
Year, Month, Day, Week, Hour, 1.00.
Clock/Calendar (RTC)
Minute, Second Keep 1~2 week at
version 2.00.
Special Modules Up to 8 AIO modules can be connected
Notes:
1. Data area is non-latched.
2. Data area is latched.
3. COM1: built-in RS232 port. COM2: built-in RS485 port. COM3: built-in RS485 port.
4. When input points(X) are expanded to 256 points, only 16 output points(Y) are applicable. Also,
when output points(Y) are expanded to 256 points, only 16 input points(X) are applicable.
5. This area is applicable only when the MPU is connected with AIO modules. Every AIO module
occupies 10 points.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 44
2 . P r o g r a m m i n g C o n c e p ts

2.5 ELC Memory Map for ELC2-PB controllers

Specifications
Control Method Stored program, cyclic scan system
Batch processing method (when END instruction is
I/O Processing Method
executed)
Execution Speed LD instructions – 0.54s, MOV instructions – 3.4s
Program language Instruction List + Ladder + SFC
Program Capacity 7920 steps
X0~X377, octal number system, 256
X External inputs Total
points max.
480+14
Y0~Y377, octal number system, 256
Y External outputs I/O(*4)
points max.
M0~M511, 512 points, (*1)
General M768~M999, 232 points, (*1)
M2000~M2047, 48 points, (*1)
Auxiliary Total
M M512~M767, 256 points, (*2)
relay Latched 4096 points
M2048~M4095, 2048 points, (*2)
M1000~M1999, 1000 points, some
Special
are latched
T0~T126, 127 points, (*1)
100ms T128~T183, 56 points, (*1)
(M1028=ON, T184~T199 for Subroutines, 16
T64~T126: points, (*1)
10ms) T250~T255(accumulative),
6 points (*1) Total
T Timer
10ms T200~T239, 40 points, (*1) 256 points
(M1038=ON, T240~T245(accumulative),
T200~T245: 1ms) 6 points, (*1)
T127, 1 points, (*1)
Bit 1ms T246~T249(accumulative), 4 points,
Contacts (*1)
C0~C111, 112 points, (*1)
16-bit count up C128~C199, 72 points, (*1)
Total
C112~C127, 16 points, (*2)
233 points
32-bit count C200~C223, 24 points, (*1)
up/down C224~C232, 9 points, (*2)
C235~C242, 1 phase 1 input, 8
Soft-w points, (*2)
C Counter are C233~C234, 2 phase 2 input, 2
32bit points, (*2)
high-spe C243~C244, 1 phase 1 input, 2 Total
ed count points, (*2) 22 points
up/down Hard-wa C245~C250, 1 phase 2 input, 6
re points, (*2)
C251~C254 2 phase 2 input, 4
points, (*2)
Initial step point S0~S9, 10 points, (*2)
S10~S19, 10 points (use with IST
Zero point return
Step instruction), (*2) Total 1024
S
point Latched S20~S127, 108 points, (*2) points
General S128~S911, 784 points, (*1)
Alarm S912~S1023, 112 points, (*2)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 45
2 . P r o g r a m m i n g C o n c e p ts

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 46
2 . P r o g r a m m i n g C o n c e p ts

2.6 ELC Memory Map for ELC2-PC/ELC2-PA controllers

Specifications
Control Method Stored program, cyclic scan system
Batch processing method (when END instruction is
I/O Processing Method
executed)
Execution Speed LD instructions – 0.54s, MOV instructions – 3.4s
Program language Instruction List + Ladder + SFC
Program Capacity 15872 steps
X0~X377, octal number system, 256
X External inputs Total
points max.
480+32
Y0~Y377, octal number system, 256
Y External outputs I/O(*4)
points max.
M0~M511, 512 points, (*1)
General M768~M999, 232 points, (*1)
M2000~M2047, 48 points, (*1)
Auxiliary Total
M M512~M767, 256 points, (*2)
relay Latched 4096 points
M2048~M4095, 2048 points, (*2)
M1000~M1999, 1000 points, some
Special
are latched
T0~T126, 127 points, (*1)
100ms T128~T183, 56 points, (*1)
(M1028=ON, T184~T199 for Subroutines, 16
T64~T126: points (*1)
10ms) T250~T255(accumulative),
6 points (*1) Total
T Timer
10ms T200~T239, 40 points, (*1) 256 points
(M1038=ON, T240~T245(accumulative),
T200~T245: 1ms) 6 points, (*1)
T127, 1 points, (*1)
Bit 1ms T246~T249(accumulative), 4 points,
Contacts (*1)
C0~C111, 112 points, (*1)
16-bit count up C128~C199, 72 points, (*1)
Total
C112~C127, 16 points, (*2)
233 points
32-bit count C200~C223, 24 points, (*1)
up/down C224~C232, 9 points, (*2)
C235~C242, 1 phase 1 input, 8
Soft-w points, (*2)
C Counter are C233~C234, 2 phase 2 input, 2
32bit points, (*2)
high-spe C243~C244, 1 phase 1 input, 2 Total
ed count points, (*2) 22 points
up/down Hard-wa C245~C250, 1 phase 2 input, 6
re points, (*2)
C251~C254 2 phase 2 input, 4
points, (*2)
Initial step point S0~S9, 10 points, (*2)
S10~S19, 10 points (use with IST
Zero point return
Step instruction), (*2) Total 1024
S
point Latched S20~S127, 108 points, (*2) points
General S128~S911, 784 points, (*1)
Alarm S912~S1023, 112 points, (*2)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 47
2 . P r o g r a m m i n g C o n c e p ts

Specifications
T Current value T0~T255, 256 words
C0~C199, 16-bit counter, 200 words
C Current value
C200~C254, 32-bit counter, 55 words
D0~D407, 408 words, (*1)
General D600~D999, 400 words, (*1)
D3920~D9799, 5880 words, (*1)
D408~D599, 192 words, (*2)
Word Latched
D2000~D3919, 1920 words, (*2)
Register
Data D1000~D1999, 1000 words, some Total
D Special
register are latched 10000 points
Righ-side special
D9900~D9999, 100 words (*1) (*6)
module
Left-side special
D9800~D9899, 100 words (*1) (*7)
module
Index E0~E7, F0~F7, 16 words, (*1)
N Master control loop N0~N7, 8 points
P Pointer P0~P255, 256 points
I000/I001(X0), I100/I101(X1), I200/I201(X2),
I300/I301(X3), I400/I401(X4), I500/I501(X5),
External interrupt
I600/I601(X6), I700/I701(X7), 8 points (01:
rising-edge trigger , 00: falling-edge trigger )
Pointer
Interrupt I602~I699, I702~I799, 2 points (Timer resolution =
I Timer interrupt
Service 1ms)
High-speed I010, I020, I030, I040, I050, I060, I070, I080, 8
counter interrupt points
Communication I140(COM1), I150(COM2), I160(COM3), 3 points,
interrupt (*3)
K-32,768 ~ K32,767 (16-bit operation),
K Decimal K-2,147,483,648 ~ K2,147,483,647 (32-bit
Constant operation)
H0000 ~ HFFFF (16-bit operation),
H Hexadecimal
H00000000 ~HFFFFFFFF (32-bit operation)
COM1: built-in RS-232 ((Master/Slave)
ELC2-PC COM2: built-in RS-485 (Master/Slave)
COM3: built-in RS-485 (Master/Slave)
Serial Ports
COM1: built-in RS-232 ((Master/Slave)
ELC2-PA COM2: built-in RS-485 (Master/Slave)
COM3: built-in USB (Slave)
Year, Month, Day, Week, Hour, Minute, Second
Real Time Clock
Keep 1~2 week when the 24VDC power off.
Right side: Up to 8 I/O modules can be connected
Special I/O Modules Left side: Up to 8 high-speed I/O module can be
connected
File Register (*5) K0~K4999, 5000 points (*2)
Notes:
1. Non-latched area cannot be modified
2. Latched area cannot be modified
3. Please refer to the table above for more information about serial ports. SX2 does not support
I160.
4. There are 8 input points (X0~X17) and 4 output points (Y0~Y3) in an ELC2-PC series MPU. An
ELC2-PC series MPU occupies 16 input points (X0~X17), and 16 output points (Y0~Y17).
There are 8 input points (X0~X17), and 6 output points (Y0~Y5) in an ELC2-PA series MPU. An
ELC2-PA series MPU occupies 16 input points (X0~X17), and 16 output points (Y0~Y17).
Extension input points start from X20, and extension output points start from Y17.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 48
2 . P r o g r a m m i n g C o n c e p ts

5. Please refer to the instruction MEMR/MEMW for more information about the reading/writing of
data.
6. If an ELC2-PC/PA series MPU is connected to a right-side special module, and M1183 is Off,
the range of data registers can be used. Every special module connected to an ELC2-PC/PA
series MPU occupies ten data registers.
7. If an ELC2-PC/PA series MPU is connected to a left-side special module, and M1182 is Off, the
range of data registers can be used. Every special module connected to an ELC2-PC/PA series
MPU occupies ten data registers.
2.7 ELC Memory Map for ELC2-PE controllers
Specifications
Control Method Stored program, cyclic scan system
Batch processing method (when END instruction is
I/O Processing Method
executed)
LD instructions – 0.64s, MOV instructions – 2s,
Execution Speed
1000 steps – approximately 1ms
Program language Instruction List + Ladder diagram+ SFC
Program Capacity 15872 steps
X0~X377, octal number system, 256
X External inputs Total
points max.
480+12
Y0~Y377, octal number system, 256
Y External outputs I/O(*4)
points max.
M0~M511, 512 points, (*1)
General M768~M999, 232 points, (*1)
M2000~M2047, 48 points, (*1)
Auxiliary Total
M M512~M767, 256 points, (*2)
relay Latched 4096 points
M2048~M4095, 2048 points, (*2)
M1000~M1999, 1000 points, some
Special
are latched
T0~T126, 127 points, (*1)
100ms T128~T183, 56 points, (*1)
(M1028=ON, T184~T199 for Subroutines, 16
T64~T126: points, (*1)
10ms) T250~T255(accumulative),
6 points (*1) Total
T Timer
10ms T200~T239, 40 points, (*1) 256 points
Bit (M1038=ON, T240~T245(accumulative),
Contacts T200~T245: 1ms) 6 points, (*1)
T127, 1 points, (*1)
1ms T246~T249(accumulative), 4 points,
(*1)
C0~C111, 112 points, (*1)
16-bit count up C128~C199, 72 points, (*1)
Total
C112~C127, 16 points, (*2)
232 points
32-bit count C200~C223, 24 points, (*1)
up/down C224~C231, 8 points, (*2)
C235~C242, 1 phase 1 input, 8
Soft-w points, (*2)
C Counter are C233~C234, 2 phase 2 input, 2
32bit points, (*2)
high-spe C243~C244, 1 phase 1 input, 2 Total
ed count points, (*2) 20 points
up/down Hard-wa C245~C248, 1 phase 2 input, 4
re points, (*2)
C251~C254 2 phase 2 input, 4
points, (*2)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 49
2 . P r o g r a m m i n g C o n c e p ts

Specifications
Initial step pointS0~S9, 10 points, (*2)
S10~S19, 10 points (use with IST
Zero point return
Bit Step instruction), (*2) Total 1024
S
Contacts point Latched S20~S127, 108 points, (*2) points
General S128~S911, 784 points, (*1)
Alarm S912~S1023, 112 points, (*2)
T Current value T0~T255, 256 words
C0~C199, 16-bit counter, 200 words
C Current value
C200~C254, 32-bit counter, 55 words
D0~D407, 408 words, (*1)
D600~D999, 400 words, (*1)
General
D3920~D9799, 5880 words, (*1)
D10000~D11999, 2000 words, (*1)
Word D408~D599, 192 words, (*2)
Latched
Register D2000~D3919, 1920 words, (*2)
Data D1000~D1999, 1000 words, some Total
D
register Special are latched 12000 points
Right-side special
D9900~D9999, 100 words, (*1) (*5)
module
Left-side special
D9800~D9899, 100 words, (*1) (*6)
module
Index E0~E7, F0~F7, 16 words, (*1)
N Master control loop N0~N7, 8 points
P Pointer P0~P255, 256 points
I000/I001(X0), I100/I101(X1), I200/I201(X2),
I300/I301(X3), I400/I401(X4), I500/I501(X5),
External interrupt
I600/I601(X6), I700/I701(X7), 8 points (01:
Pointer rising-edge trigger , 00: falling-edge trigger )
Interrupt I602~I699, I702~I799, 2 points (Timer resolution =
I Timer interrupt
Service 1ms)
High-speed I010, I020, I030, I040, I050, I060, I070, I080, 8
counter interrupt points
Communication
I150 (COM2), I160 (COM3), 2 points, (*3)
interrupt
K-32,768 ~ K32,767 (16-bit operation),
K Decimal K-2,147,483,648 ~ K2,147,483,647 (32-bit
Constant operation)
H0000 ~ HFFFF (16-bit operation),
H Hexadecimal
H00000000 ~HFFFFFFFF (32-bit operation)
COM1: built-in USB (Slave)
COM2: built-in RS-485 (Master/Slave)
COM3: built-in RS-485 (Master/Slave)
Serial Ports
Ethernet: built-in Ethernet (Please refer to Appendix
B for more information.)
COM1 is typically the programming port.
Year, Month, Day, Week, Hours, Minutes, Seconds
Real Time Clock
Keep 1~2 week when 24VDC power off.
Right side: Up to 8 I/O modules can be connected
Special I/O Modules Left side: Up to 8 high-speed I/O modules can be
connected
Notes:
1. Non-latched area cannot be modified.
2. Latched area cannot be modified.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 50
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3. COM2: built-in RS485 port. COM3: built-in RS485 port.

4. There are 8 input points (X0~X7) and 4 output points (Y0~Y3) in an ELC2-PE MPU. An
ELC2-PE MPU occupies 16 input points (X0~X17) and 16 output points (Y0~Y17). Extension
input points start from X20, and output points start from Y20.
5. If an ELC2-PE series MPU is connected to a right-side special module, and M1183 is Off, the
range of data registers can be used. Every special module connected to an ELC2-PE series
MPU occupies ten data registers.
6. If an ELC2-PE series MPU is connected to a left-side special module, and M1182 is Off, the
range of data registers can be used. Every special module connected to an ELC2-PE series
MPU occupies ten data registers.
2.8 ELC Latched Memory Settings
ELC-PA Controllers
Special auxiliary
General Latched Latched
relay
M0~M511 M512~M999 M1000~M1999 M2000~M4095
M Latched (default) Latched (default)
Auxiliary
Some are
relay Start: Start: D1202
latched and they
Not latched D1200 (K512) (K2000)
cannot be
End: changed. End: D1203
D1201 (K999) (K4095)

100 ms 10 ms 10ms 1 ms 100 ms

T T0 ~T199 T200~T239 T240~T245 T246~T249 T250~T255
Timer
Accumulative
non-latched non-latched
latched

32-bit
16-bit count up 32-bit count up/down high-speed
count up/down
C0~C95 C96~C199 C200~C215 C216~C234 C235~C255
C Latched Latched
Latched (default)
Counter (default) (default)

Non-latched Non-latched Start: D1210 Start: D1212

Start: D1208 (K96) (K216) (K235)
End: D1209 (K199) End: D1211 End: D1213
(K234) (K255)

Initial Zero return General Latched Step alarm

S S0~S9 S10~S19 S20~S511 S512~S895 S896~S1023

Step Latched (default)
relay
Non-latched Start: D1214 (K512) Latched
End: D1215 (K895)

General Latched Special register Latched

D
D0~D199 D200~D999 D1000~D1999 D2000~D4999
Register
Non-latched Latched (default) Some are latched, Latched (default)

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2 . P r o g r a m m i n g C o n c e p ts

and cannot be
Start: D1216 (K200) changed Start: D1218 (K2000)
End: D1217 (K999) End: D1219 (K4999)

File K0-1599
Register Latched

ELC-PV Controllers
Special auxiliary
General Latched Latched
relay
M0~M499 M500~M999 M1000~M1999 M2000~M4095
M
Non-latched
Auxiliary Latched (default) Latched (default)
(default)
relay Some are latched
Start: D1202
and they cannot
Start: D1200 (K500) (K2000)
be changed.
End: D1201 (K999) End: D1203
(K4095)

100 ms 10 ms 10ms 1 ms 100 ms

T0 ~T199 T200~T239 T240~T245 T246~T249 T250~T255
Non-latched
Latched (default)
T (default)
Timer
Start: Start: Accumulative
D1204 (K-1)*1 D1206 (K-1)*1 latched
End: End:
D1205 (K-1)*1 D1207 (K-1)*1

32-bit
16-bit count up 32-bit count up/down high-speed
count up/down
C0~C99 C100~C199 C200~C219 C220~C234 C235~C255
C Non-latched Latched Non-latched Latched Latched
Counter (default) (default) (default) (default) (default)
Start: D1212
Start: D1208 (K96) Start: D1210 (K216) (K235)
End: D1209 (K199) End: D1211 (K234) End: D1213
(K255)

General Latched Special Latched General

S S0~S9 S10~S19 S20~S499 S500~S899 S900~S1023

Step Non-latched (default) Latched (default)
relay
Start: D1214 (K500) Latched
End: D1215 (K999)

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General Latched Special register Latched

D0~D199 D200~D999 D1000~D1999 D2000~D9999
D
Non-latched (default) Latched (default) Latched (default)
Register Some is latched,
Start: D1216 (K200) and cannot be Start: D1218 (K2000)
End: D1217 (K999) changed End: D1219 (K9999)

File K0-9999
Register Latched
*1: K-1 refers to the default setting is non-latched.

ELC2-PV Controllers
General purpose Latched Special auxiliary relay Latched
M M0 ~ M499 M500 ~ M999 M1000 ~ M1999 M2000 ~ M4095
(Auxiliary
Start: D1200 Some are latched
relay) Start: D1202 (K2,000)
(K500) and cannot be
End: D1203 (K4,095)
End: D1201 (K999) modified.

100 ms 10 ms 10 ms 1 ms 100 ms
T0 ~ T199 T200 ~ T239 T240 ~ T245 T246 ~ T249 T250 ~ T255
T
(Timer) Default: non-latched Default: non-latched
Accumulative type
Start: D1204 (K-1)*1 Start: D1206 (K-1)*1
It is fixed to be latched.
End: D1205 (K-1)*1 End: D1207 (K-1)*1

32-bit high-speed
16-bit counting up 32-bit counting up/down
counting up/down
C235 ~ C246 ~
C0 ~ C99 C100 ~ C199 C200 ~ C219 C220 ~ C234
C C245 C255
(Counter) Default: Default: Default: Default:
Default: latched
non-latched latched non-latched latched
Start: D1208 (K100) Start: D1210 (K220) Start: D1212 (K235)
End: D1209 (K199) End: D1211 (K234) End: D1213 (K255)

Initial Zero return General purpose Latched Step alarm

S0 ~ S9 S10 ~ S19 S20 ~ S499 S500 ~ S899 S900 ~ S1023
S
Non-latched (default) Latched (default)
(Step relay) It is fixed to be
Start: D1214 (K500) latched.
End: D1215 (K899)

General purpose Latched Special register Latched

D0 ~ D199 D200 ~ D999 D1000 ~ D1999 D2000 ~ D11999
D
(Register) Default: non-latched Default: latched Some is latched Default: latched
Start: D1216 (K200) and cannot be Start: D1218 (K2,000)
End: D1217 (K999) modified. End: D1219 (K9,999)

File K0 ~ K9,999
register It is fixed to be latched.

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ELCM-PH/ELCM-PA/ELC2-PB/ELC2-PC/ELC2-PA/ELC2-PE Controllers
General Latched Special auxiliary relay
M0~M511
M M512~M999
M768~M999 M1000~M1999
Auxiliary M2048~M4095
M2000~M2047
relay
Some are latched and
Not latched Latched
cannot be changed.

100 ms 100 ms 1 ms 10 ms 10ms 1 ms 100 ms

T0 ~T126
T184~T199 T127 T200~T239 T240~T245 T246~T249 T250~T255
T T128~T183
Timer M1028=1,T64 For M1038=1,T200~T245:
- -
~T126:10ms subroutine 1ms
non-latched non-latched Accumulative non-latched

32-bit high-speed
16-bit count up 32-bit count up/down
count up/down
C C0~C111
Counter C112~C127 C200~C223 C224~C232 C233~C254
C128~C199
Non-latched Latched Non-latched Latched Latched

Initial Zero return General Latched Step alarm

S
Step S0~S9 S10~S19 S20~S127 S128~S911 S912~S1023
relay
Latched Non-latched Latched

General Latched Special register For AIO

D0~D407
D408~D599
D D600~D999 D1000~D1999 D9800~D9999
D2000~D3919
Register D3920~D11999
Some are latched,
Non-latched Latched and cannot be Non-latched
changed

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2.9 ELC Latched Memory Modes

ELCB-PB Controllers
Clear all
Clear all
Power M1031 Factory
Memory type STOP=>RUN RUN=>STOP M1032
OFF=>ON Non-latched setting
latched area
area
When M1033=OFF, clear
Non-latched Clear Clear Unchanged 0
When M1033=ON, No change
Latched Unchanged Unchanged Clear Unchanged
Special M,
Special D, Initial
Initial Unchanged Unchanged
Index setting
Register

ELC-PA/ PV, ELC2-PV, ELCM-PH/ PA, ELC2- PB/PH/PA/PE Controllers

Clear all
Clear all
Power M1031 Factory
Memory type STOP=>RUN RUN=>STOP M1032
OFF=>ON Non-latched setting
latched area
area
When
M1033=OFF,
clear
Non-latched Clear Unchanged Clear Unchanged 0
When
M1033=ON, No
change
Latched Unchanged Unchanged Clear 0
Special M,
Special D, Initial
Initial Unchanged Unchanged
Index setting
Register
File
Unchanged 0/HFFFF*
Register
*: For ELC-PA/PV and ELC2-PV, it is K0. For ELCM-PH/PA and ELC2-PB/PH/PA/PE, it is HFFFF.
*: In ELCM-PH/PA, only ELCM-PH/PAV2.0 (and above) has file registers.
2.10 ELC Bits, Nibbles, Bytes, Words, etc
ELC controllers utilize five numeric types to perform different instructions. The following is the
explanation of numeric types.
Numeric Description
Bit Bit is the basic unit of a binary number system. Range is 0 or 1
4 consecutive bits, such as b3~b0.
Nibble Range 0 – 9 (BCD) or 0~F hexadecimal.

8 consecutive bits b7~b0

Byte Range 0 – 255 or 00 - FF hexadecimal

16 consecutive bits (2 consecutive bytes) b15~b0

Word Range -32,768 ~ 32,767 or 0000 ~ FFFF hexadecimal

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Numeric Description
32 consecutive bits (2 consecutive words) b31~b0
Double Word Range -2,147,483,648 ~ 2,147,483,647 or 00000000 - FFFFFFFF hexadecimal

The relationship among bit, nibble, byte, word, and double word are shown as below.
DW Double Word

W1 W0 Word

BY3 BY2 BY1 BY0 Byte

NB7 NB6 NB5 NB4 NB3 NB2 NB1 NB0 Nibble

Bit

2.11 Binary, Octal, Decimal, BCD, Hex

ELC is capable of using many different numbering systems.
1. Binary Number, (BIN)
ELC internally calculates, operates, and stores the value in Binary format.
2. Octal Number, (OCT)
The external I/O points of the ELC are numbered in octal format.

e.g.
External inputs: X0～X7, X10～X17, …, X377. (No. of input)
External outputs: Y0～Y7, Y10～Y17, …, Y377. (No. of output)
3. Decimal Number, (DEC)
ELC applies decimal operation in situations below:
 Set value for timers and counters, e.g. TMR C0 K50. (K value)
 No. of S, M, T, C, D, E, F, P, I, e.g. M10, T30. (No. of device)
 For use of operand in API instructions, e.g. MOV K123 D0. (K value)
 Constant K:
Decimal value in ELC operation is attached with a “K”, e.g. K100 indicates the value 100 in
Decimal format.
Exception:
When a constant K is used with bit devices X, Y, M, S, the value specified after K
indicates the groups of 4-bit units, which forms a digit(4-bit), byte(8 bit), word(16bit),
or double word(32-bit) data, e.g. K2Y10, K4M100, representing Y10 ~ Y17 and
M100~M115.
4. BCD (Binary Coded Decimal)
BCD format uses 1 Decimal digit to represent a 4 bit value, so that 16 consecutive data bits
can be represented by a 4-digit decimal value. Used mainly for reading values from DIP
switches or sending data to 7-segement displays
5. Hexadecimal Number, HEX
ELC applies Hexadecimal operation in situations below:
 For use of operand in API instructions, e.g. MOV H1A2B D0。(H value)
 Constant H:
Hexadecimal value in ELC operation is attached with an “H”, e.g. H100 indicates the value
100 in Hex format.
Reference Table:
Binary Octal Decimal (K) BCD Hexadecimal (H)
(BIN) (OCT) (DEC) (Binary Code Decimal) (HEX)

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For ELC Constant K, No. of

No. of X, Y For DIP Switch and
internal registers M, S, T, C, D, Constant H
relay 7-segment display
operation E, F, P, I

0000 0 0 0000 0

0001 1 1 0001 1

0010 2 2 0010 2

0011 3 3 0011 3

0100 4 4 0100 4

0101 5 5 0101 5

0110 6 6 0110 6

0111 7 7 0111 7

1000 10 8 1000 8

1001 11 9 1001 9

1010 12 10 0000 A

1011 13 11 0001 B

1100 14 12 0010 C

1101 15 13 0011 D

1110 16 14 0100 E

1111 17 15 0101 F

10000 20 16 0110 10

10001 21 17 0111 11

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2.12 Special M Relay

The special auxiliary relay (special M) are as shown in the following. Please notice that some SM
will be different to the different Controller. In the following chart, the values in the “Type” column are:
“R”: can only read. “R/W”: can read/write. A “-“means it can do nothing.
For ELCB-PB, ELC-PA, ELC-PV, and ELC2-PV:
OFF STOP RUN
ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
Normally open contact (a contact). This
M1000 contact is ON when running and it is ON Y Y Y Y OFF ON OFF R NO OFF
when the status is set to RUN.
Normally OFF contact (b contact). This
M1001 contact is OFF in running and it is OFF Y Y Y Y ON OFF ON R NO ON
when the status is set to RUN.
ON only for 1 scan after RUN. Initial pulse is
M1002 contact a. It will get positive pulse in the Y Y Y Y OFF ON OFF R NO OFF
RUN moment. Pulse width=scan period.
OFF only for 1 scan after RUN. Initial pulse
M1003 is contact a. It will get negative pulse in the Y Y Y Y ON OFF ON R NO ON
RUN moment. Pulse width=scan period.
M1004 ON when error occurs Y Y Y Y OFF OFF - R NO OFF
M1008 Monitor timer flag (ON: ELC WDT time out) Y Y Y Y OFF OFF - R NO OFF
History of LV signal due to 24VDC
M1009 Y Y - OFF - - R NO OFF
insufficiency
PLSY Y0 mode selection. ON = continuous
Y Y - - OFF - - R/W NO OFF
output
M1010
Pulse output when reaching END
- - Y Y OFF - - R/W NO OFF
instruction
M1011 10ms clock pulse, 5ms ON/5ms OFF Y Y Y Y OFF - - R NO OFF
M1012 100ms clock pulse, 50ms ON / 50ms OFF Y Y Y Y OFF - - R NO OFF
M1013 1s clock pulse, 0.5s ON / 0.5s OFF Y Y Y Y OFF - - R NO OFF
M1014 1min clock pulse, 30s ON / 30s OFF Y Y Y Y OFF - - R NO OFF
M1015 High-speed connection counter - Y Y Y OFF - - R/W NO OFF
Display year bit. When OFF = display two
right-most bits.
M1016 - Y Y Y OFF - - R/W NO OFF
When ON = display (two right-most bits +
2000).
M1017 ±30 seconds adjustment - Y Y Y OFF - - R/W NO OFF
M1018 Flag for Radian/Degree, ON for degree - Y Y Y OFF - - R/W NO OFF
M1019 Enabling frequency measurement card - - Y Y OFF - - R NO OFF
M1020 Zero flag Y Y Y Y OFF - - R NO OFF
M1021 Barrow flag Y Y Y Y OFF - - R NO OFF
M1022 Carry flag Y Y Y Y OFF - - R NO OFF
PLSY Y1 mode selection, ON = continuous
M1023 Y Y - - OFF - - R/W NO OFF
output.
M1024 COM1 monitor request Y Y Y Y OFF - - R NO OFF
If the ELC receives an illegal
communication request when PC or HMI
M1025 Y Y Y Y OFF - - R NO OFF
connects to an ELC, M1025 =ON and save
the error code in D1025.
M1026 Startup flag of RAMP module - Y Y Y OFF - - R/W NO OFF
M1027 PR output flag - Y Y Y OFF - - R/W NO OFF
10ms time switch flag. The base setting flag
of T64~T126 is 100ms, when timer is OFF
M1028 Y - - - OFF - - R/W NO OFF
and the base setting flag is 10ms when it is
ON.
Pulse output Y0 of PLSY and PLSR
instruction execution completed or other Y Y - - OFF - - R NO OFF
relative instruction execution completed
M1029
The 1st group pulse output CH0 (Y0, Y1) is
completed, or other relevant instructions - - Y Y OFF - - R NO OFF
complete their executions.
Pulse output Y1 of PLSY and PLSR
Y Y - - OFF - - R NO OFF
instruction execution completed
M1030 The 2nd group pulse output CH1 (Y2, Y3) is
completed, or other relevant instructions - - Y Y OFF - - R NO OFF
complete their executions.
M1031 Clear all non-latched memory Y Y Y Y OFF - - R/W NO OFF

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OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
M1032 Clear all latched memory Y Y Y Y OFF - - R/W NO OFF
M1033 Memory latched at STOP Y Y Y Y OFF - - R/W NO OFF
M1034 All Y outputs disable Y Y Y Y OFF - - R/W NO OFF
Start X input point to be RUN/STOP switch
M1035 and correspond to D1035 (ELC-PA - Y Y Y - - - R/W YES OFF
controllers indicate X3 only..)
The 3rd group pulse output CH2 (Y4, Y5) is
M1036 - - Y Y OFF - - R NO OFF
completed.
The 4th group pulse output CH3 (Y6, Y7) is
M1037 - - Y Y OFF - - R NO OFF
completed.
OFF: The time base of T200~T255 is 10ms.
M1038 - - Y Y OFF - - R/W NO OFF
ON: The time base of T200~T255 is 1ms.
M1039 Constant scan mode Y Y Y Y OFF - - R/W NO OFF
M1040 Step transition inhibit Y Y Y Y OFF - - R/W NO OFF
M1041 Step transition start Y Y Y Y OFF - OFF R/W NO OFF
M1042 Start pulse Y Y Y Y OFF - - R/W NO OFF
M1043 Zero point return completed Y Y Y Y OFF - OFF R/W NO OFF
M1044 Zero point condition Y Y Y Y OFF - OFF R/W NO OFF
M1045 All outputs clear inhibit Y Y Y Y OFF - - R/W NO OFF
M1046 STL state setting (ON) Y Y Y Y OFF - - R NO OFF
M1047 STL monitor enable - Y Y Y OFF - - R/W NO OFF
M1048 Flag for alarm point state - Y Y Y OFF - - R NO OFF
M1049 Monitor flag for alarm point - Y Y Y OFF - - R/W NO OFF
M1050 I000/I001 masked Y Y - - OFF - - R/W NO OFF
M1051 I100/I101 masked Y Y - - OFF - - R/W NO OFF
M1052 I200/I201 masked Y Y - - OFF - - R/W NO OFF
I300/I301 masked Y Y - - OFF - - R/W NO OFF
M1053
Enabling X4 speed detection - - Y Y OFF OFF OFF R/W NO OFF
I400/I401 masked - Y - - OFF - - R/W NO OFF
M1054
Enabling X10 speed detection - - Y Y OFF OFF OFF R/W NO OFF
I500/I501 masked - Y - - OFF - - R/W NO OFF
M1055
Enabling X14 speed detection - - Y Y OFF OFF OFF R/W NO OFF
I602~ I699 masked Y Y - - OFF - - R/W NO OFF
M1056 Enabling X1 interrupt to get the counting
- - - Y OFF OFF OFF R/W NO OFF
value of C241
I702~I799 masked - Y - - OFF - - R/W NO OFF
M1057 Enabling X2 interrupt to get the counting
- - - Y OFF OFF OFF R/W NO OFF
value of C241
M1058 COM3 monitor request - - - Y OFF - - R/W NO OFF
I010~I060 masked - Y - - OFF - - R/W NO OFF
M1059 Enabling X3 interrupt to get the counting
- - - Y OFF OFF OFF R/W NO OFF
value of C241
System error message 1: The peripheral
M1060 Y Y Y - OFF - - R NO OFF
circuit of the CPU breaks down.
System error message 2: The CPU flag
- Y Y - OFF - - R NO OFF
register breaks down.
M1061
System error message 2: An error occurs
Y - - - OFF - - R NO OFF
when the data in the latched area is read.
System error message 3: The CPU BIOS
M1062 Y Y Y - OFF - - R NO OFF
ROM breaks down.
System error message 4: The RAM in the
M1063 Y Y Y - OFF - - R NO OFF
CPU breaks down.
M1064 Operator error Y Y Y Y OFF OFF - R NO OFF
M1065 Syntax error Y Y Y Y OFF OFF - R NO OFF
M1066 Program error Y Y Y Y OFF OFF - R NO OFF
M1067 Program execution error Y Y Y Y OFF OFF - R NO OFF
M1068 Execution error latched (D1068) Y Y Y Y OFF - - R NO OFF
Y1 time base switching for PWM instruction
Y Y - OFF - - R/W NO OFF
(ON: 100us; OFF: 1ms)
M1070 Y0 time base switching for PWM instruction
(ON: 100us; OFF: 1ms) - - Y Y OFF - - R/W NO OFF
when On, D1371 will decide the time base)
Y2 time base switching for PWM instruction
M1071 (On: 100us; Off: 1ms) - - Y Y OFF - - R/W NO OFF
when On, D1372 will decide the time base)
M1072 Executing ELC RUN instruction Y Y Y Y OFF On Off R/W NO OFF

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OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
M1074 SRAM access error - - Y Y OFF - - R NO OFF
Error occurring when writing FLASH card or
M1075 - - Y Y OFF - - R NO OFF
Flash ROM
M1076 Real time clock malfunction - Y Y Y OFF - - R NO OFF
Battery in low voltage, malfunction or no
M1077 - Y Y Y OFF - - R NO OFF
battery
Immediately stopping Y0 pulse output for
M1078 Y Y - - OFF - - R/W NO OFF
PLSY instruction
Immediately stopping Y1 pulse output for
M1079 Y Y - - OFF - - R/W NO OFF
PLSY instruction
M1080 Requesting COM2 monitoring Y Y Y Y OFF - - R NO OFF
M1081 Changing direction for FLT instruction - Y Y Y OFF - - R/W NO OFF
M1082 Real time clock has been changed - Y Y Y OFF - - R NO Off
Allowing interruption subroutine in
M1083 - Y Y Y OFF - - R/W NO OFF
FROM/TO instructions
M1084 Detecting bandwidth Y Y - - OFF OFF OFF R/W NO OFF
Selecting ELC-ACPGMXFR duplicating
M1085 Y Y Y Y OFF - - R/W NO OFF
function
Setting up the switch for enabling password
M1086 Y Y Y Y OFF - - R/W NO OFF
function of ELC-ACPGMXFR
M1087 Enabling LV signal - - Y Y OFF - - R/W NO OFF
Matrix comparison.
Comparing between equivalent values
M1088 - Y Y Y OFF OFF - R/W NO OFF
(M1088 = 1) or different values (M1088 =
0).
Matrix search end flag. When the
M1089 - Y Y Y OFF OFF - R NO OFF
comparison reaches the last bit, M1089 = 1.
Matrix search start flag. Compare from the
M1090 - Y Y Y OFF OFF - R NO OFF
first bit and M1090=1.
Matrix finding bit flag. When find it, it will
M1091 - Y Y Y OFF OFF - R NO OFF
stop comparing and M1091=1.
Matrix pointer error flag. When pointer Pr
M1092 - Y Y Y OFF OFF - R NO OFF
exceeds this range, M1092=1.
Matrix pointer increase flag. It will add 1 to
M1093 - Y Y Y OFF OFF - R/W NO OFF
present pointer.
Matrix pointer clear flag. It will clear present
M1094 - Y Y Y OFF OFF - R/W NO OFF
pointer to 0.
M1095 Carry flag for matrix rotate/shift output - Y Y Y OFF OFF - R NO OFF
M1096 Complement flag for matrix shift input - Y Y Y OFF OFF - R/W NO OFF
M1097 Direction flag for matrix rotate/shift - Y Y Y OFF OFF - R/W NO OFF
M1098 Matrix count bit 0 or 1 flag - Y Y Y OFF OFF - R/W NO OFF
M1099 It is ON when matrix count result 0 - Y Y Y OFF OFF - R/W NO OFF
M1100 SPD instruction sampling once - - Y Y OFF - - R/W NO OFF
M1101 Start file register or not - Y Y Y - - - R/W Yes OFF
M1112 AY0 output point on 2DO card (transistor) - - Y - OFF OFF - R/W NO OFF
M1113 AY1 output point on 2DO card (transistor) - - Y - OFF OFF - R/W NO OFF
M1115 Start switch for accel/decel pulse output Y Y - - OFF OFF OFF R/W NO OFF
M1116 Acceleration flag Y Y - - OFF OFF OFF R/W NO OFF
M1117 Target attained frequency flag Y Y - - OFF OFF OFF R/W NO OFF
M1118 Deceleration flag Y Y - - OFF OFF OFF R/W NO OFF
Completed function flag Y Y - - OFF OFF OFF R/W NO OFF
M1119 Using the instruction DDRVI/DDRVA to
- - Y Y OFF OFF OFF R/W NO OFF
enable two target frequencies.
Set COM2 (RS-485) protocol kept on.
M1120 Y Y Y Y OFF OFF OFF R/W NO OFF
D1120 cannot be changed after the setting.
Waiting for the sending of COM2 (RS-485)
M1121 Y Y Y Y OFF OFF ON R NO OFF
communication data
M1122 COM2 (RS-485) sending request Y Y Y Y OFF OFF OFF R/W NO OFF
Receiving through COM2 (RS-485) is
M1123 Y Y Y Y OFF OFF OFF R/W NO OFF
completed
Waiting for receiving through COM2
M1124 Y Y Y Y OFF OFF OFF R/W NO OFF
(RS-485)
M1125 COM2 (RS-485) communication reset Y Y Y Y OFF OFF OFF R/W NO OFF
Selecting COM2 (RS-485) STX/ETX user
M1126 Y Y Y Y OFF OFF OFF R/W NO OFF
defined or system defined

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OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
Sending/receiving data of COM2 (RS-485)
M1127 communication instruction is completed Y Y Y Y OFF OFF OFF R/W NO OFF
(RS instruction not included)
Sending COM2 (RS-485)/receiving COM2
M1128 Y Y Y Y OFF OFF OFF R/W NO OFF
(RS-485) indication
M1129 COM2 (RS-485) receiving time-out Y Y Y Y OFF OFF - R/W NO OFF
Selecting COM2 (RS-485) STX/ETX user
M1130 Y Y Y Y OFF OFF - R/W NO OFF
defined or system defined
On during COM2 (RS-485)
M1131 MODRD/RDST/MODRW data are Y Y Y Y OFF OFF - R NO OFF
converted to hex data
ON= no relative communications instruction
M1132 Y Y Y Y OFF - - R NO OFF
in ELC program.
Special high speed pulse (50KHz) output
M1133 - Y - - OFF OFF OFF R/W NO OFF
switch (ON = start)
M1134 ON is continuous output switch - Y - - OFF OFF - R/W NO OFF
M1135 Output pulse numbers attained flag - Y - - OFF OFF OFF R/W NO OFF
Retain the data in DNET mapping area in
M1137 - - Y Y - - - R/W NO OFF
STOP state
Set COM1 (RS-232) protocol kept on.
M1138 Y Y Y Y OFF - - R/W NO OFF
D1036 cannot be changed after setting
COM1 (RS-232) ASCII/RTU mode
M1139 Y Y Y Y OFF - - R/W NO OFF
(OFF:ASCII, ON:RTU)
MODRD/MODWR/MODRW data received
M1140 Y Y Y Y OFF OFF - R NO OFF
error
MODRD/MODWR/MODRW instruction
M1141 Y Y Y Y OFF OFF - R NO OFF
error
COM2 (RS-485) ASCII/RTU mode.
M1143 Y Y Y Y OFF OFF - R/W NO OFF
(OFF:ASCII, ON:RTU)
Output start switch of accel/decel pulse
M1144 - Y - - OFF OFF OFF R/W NO OFF
output function of adjustable slope
Acceleration flag of accel/decel pulse
M1145 - Y - - OFF OFF - R NO OFF
output function of adjustable slope
Target attained frequency flag of
M1146 accel/decel pulse output function of - Y - - OFF OFF - R NO OFF
adjustable slope
Deceleration flag of accel/decel pulse
M1147 - Y - - OFF OFF - R NO OFF
output function of adjustable slope
Complete function flag of accel/decel pulse
M1148 - Y - - OFF OFF OFF R/W NO OFF
output function of adjustable slope
Stop counting temporality flag of
M1149 accel/decel pulse output function of - Y - - OFF OFF - R/W NO OFF
adjustable slope
DHSZ instruction in multiple set values
M1150 - - Y Y OFF - - R/W NO OFF
comparison mode
The execution of DHSZ multiple set values
M1151 - - Y Y OFF - - R NO OFF
comparison mode is completed.
Setting up DHSZ instruction as frequency
M1152 - - Y Y OFF - - R/W NO OFF
control mode
DHSZ frequency control mode has been
M1153 - - Y Y OFF - - R NO OFF
executed.
Start designated deceleration function flag
of accel/decel pulse output function of - Y - - OFF - - R/W NO OFF
M1154
adjustable slope
PWD bandwidth detection duty-off/duty-on - - Y Y OFF OFF - R/W NO OFF
Enable auto ramp up/down function for
M1155 - - Y Y OFF - - R/W NO OFF
DCIMA, DCIMR instructions
Enable CH0 pulse output pause (ramp
down) function when interrupt signal is
M1156 triggered from X0. (When both M1156 and - - Y Y OFF OFF - R/W NO OFF
M1538 is ON, the remaining pulses will be
executed by resetting M1108)
Enabling X1 interruption, immediate
M1157 decelerating and stopping CH1 high-speed - - Y Y OFF OFF - R/W NO OFF
output

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 61
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
Enabling X2 interruption, immediate
M1158 decelerating and stopping CH2 high-speed - - Y Y OFF OFF - R/W NO OFF
output
Enabling X3 interruption, immediate
M1159 decelerating and stopping CH3 high-speed - - Y Y OFF OFF - R/W NO OFF
output
M1160 X4, X5 bandwidth detection flag - Y - - OFF OFF - R/W NO OFF
8-bit mode
M1161 Y Y Y Y OFF - - R/W NO OFF
On: in 8-bit mode
Switching between decimal integer and
binary floating point for SCLP instruction
M1162 Y Y Y Y OFF - - R/W NO OFF
ON: binary floating point; OFF: decimal
integer
Read/write memory card according to value
M1163 in D1063 (automatically Off once the - - Y Y OFF - - R/W NO OFF
execution is completed)
Enable flash ROM access function
according to the value set in D1064 (M1164
M1164 - - Y Y OFF - - R/W NO OFF
resets automatically when data access is
completed)
When ON, the program and password on
M1165 flash will be copied to the ELC when the - - Y - - - - R/W YES OFF
ELC is powered.
When ON, the recipe on flash will be copied
M1166 - - Y - - - - R/W YES OFF
to the ELC when the ELC is powered.
M1167 HKY input is 16 bits mode - Y Y Y OFF - - R/W NO OFF
M1168 SMOV working mode indication - Y Y Y OFF - - R/W NO OFF
M1169 Selecting PWD modes - - Y Y OFF - - R/W NO OFF
M1170 Enabling single step execution - - Y Y OFF - - R/W NO OFF
M1171 Single step execution - - Y Y OFF - - R/W NO OFF
M1172 2-phase pulse output switch (on is start) - Y - - OFF OFF OFF R/W NO OFF
M1173 ON is continuous output switch - Y - - OFF - - R/W NO OFF
M1174 Output pulse number attained flag - Y - - OFF OFF OFF R/W NO OFF
M1175 Losing ELC parameter data - - Y Y - - - R YES OFF
M1176 Losing the data in the ELC program - - Y Y - - - R YES OFF
M1178 VR0 Variable resistor enable - Y Y Y OFF - - R/W NO OFF
M1179 VR1 Variable resistor enable - Y Y Y OFF - - R/W NO OFF
Enabling X2 interruption (I201) followed by
immediately clearing X0 high-speed
counting input value.
PS1: Only supports ELC-PA_V1.8 and
M1181 - Y - - OFF OFF - R/W NO OFF
above.
PS2: After the high-speed counting value is
obtained, the high-speed counting present
value will be cleared immediately.
Enabling X3 interruption (I301) followed by
immediately clearing X1 high-speed
counting input value.
PS1: Only supports ELC-PA _V1.8 and
M1182 - Y - - OFF OFF - R/W NO OFF
above.
PS2: After the high-speed counting value is
obtained, the high-speed counting present
value will be cleared immediately.
On: The automatic matching read/write
function of the special module is enabled.
M1183 - - - Y ON - - R/W NO ON
PS1: The right side module should support
this function.
Read/write of Memory card/Flash ROM
M1189 completed flag (Automatically reset to Off - - Y Y OFF - - R/W NO OFF
every time when enabled)
M1190 Set PLSY Y0 output as 0.01~100Hz - - Y Y OFF OFF - R/W NO OFF
M1191 Set PLSY Y2 output as 0.01~100Hz - - Y Y OFF OFF - R/W NO OFF
M1192 Set PLSY Y4 output as 0.01~100Hz - - Y Y OFF OFF - R/W NO OFF
M1193 Set PLSY Y6 output as 0.01~100Hz - - Y Y OFF OFF - R/W NO OFF
I40X, I50X interruptions is able to
M1194 immediately update the present pulse - - Y Y OFF OFF - R/W NO OFF
output value at CH0.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 62
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
I40X, I50X interruptions is able to
M1195 immediately update the present pulse - - Y Y OFF OFF - R/W NO OFF
output value at CH1.
7-Seg Display mode. ON=Hex,
M1196 - Y - - OFF - - R/W NO OFF
OFF=Decimal. PA controllers only
7-Seg display. Display decimal point to the
M1197 - Y - - OFF - - R/W NO OFF
right of the LSD. PA controllers only
7-Seg display. Display decimal point to the
M1198 - Y - - OFF - - R/W NO OFF
right of the MSD. PA controllers only
C200 counting mode setting (ON: count
M1200 - Y Y Y OFF - - R/W NO OFF
down)
C201 counting mode setting (ON: count
M1201 - Y Y Y OFF - - R/W NO OFF
down)
C202 counting mode setting (ON: count
M1202 - Y Y Y OFF - - R/W NO OFF
down)
C203 counting mode setting (ON: count
M1203 - Y Y Y OFF - - R/W NO OFF
down)
C204 counting mode setting (ON: count
M1204 - Y Y Y OFF - - R/W NO OFF
down)
C205 counting mode setting (ON: count
M1205 - Y Y Y OFF - - R/W NO OFF
down)
C206 counting mode setting (ON: count
M1206 - Y Y Y OFF - - R/W NO OFF
down)
C207 counting mode setting (ON: count
M1207 - Y Y Y OFF - - R/W NO OFF
down)
C208 counting mode setting (ON: count
M1208 - Y Y Y OFF - - R/W NO OFF
down)
C209 counting mode setting (ON: count
M1209 - Y Y Y OFF - - R/W NO OFF
down)
C210 counting mode setting (ON: count
M1210 - Y Y Y OFF - - R/W NO OFF
down)
C211 counting mode setting (ON: count
M1211 - Y Y Y OFF - - R/W NO OFF
down)
C212 counting mode setting (ON: count
M1212 - Y Y Y OFF - - R/W NO OFF
down)
C213 counting mode setting (ON: count
M1213 - Y Y Y OFF - - R/W NO OFF
down)
C214 counting mode setting (ON: count
M1214 - Y Y Y OFF - - R/W NO OFF
down)
C215 counting mode setting (ON: count
M1215 - Y Y Y OFF - - R/W NO OFF
down)
C216 counting mode setting (ON: count
M1216 - Y Y Y OFF - - R/W NO OFF
down)
C217 counting mode setting (ON: count
M1217 - Y Y Y OFF - - R/W NO OFF
down)
C218 counting mode setting (ON: count
M1218 - Y Y Y OFF - - R/W NO OFF
down)
C219 counting mode setting (ON: count
M1219 - Y Y Y OFF - - R/W NO OFF
down)
C220 counting mode setting (ON: count
M1220 - Y Y Y OFF - - R/W NO OFF
down)
C221 counting mode setting (ON: count
M1221 - Y Y Y OFF - - R/W NO OFF
down)
C222 counting mode setting (ON: count
M1222 - Y Y Y OFF - - R/W NO OFF
down)
C223 counting mode setting (ON: count
M1223 - Y Y Y OFF - - R/W NO OFF
down)
C224 counting mode setting (ON: count
M1224 - Y Y Y OFF - - R/W NO OFF
down)
C225 counting mode setting (ON: count
M1225 - Y Y Y OFF - - R/W NO OFF
down)
C226 counting mode setting (ON: count
M1226 - Y Y Y OFF - - R/W NO OFF
down)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 63
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
C227 counting mode setting (ON: count
M1227 - Y Y Y OFF - - R/W NO OFF
down)
C228 counting mode setting (ON: count
M1228 - Y Y Y OFF - - R/W NO OFF
down)
C229 counting mode setting (ON: count
M1229 - Y Y Y OFF - - R/W NO OFF
down)
C230 counting mode setting (ON: count
M1230 - Y Y Y OFF - - R/W NO OFF
down)
C231 counting mode setting (ON: count
M1231 - Y Y Y OFF - - R/W NO OFF
down)
C232 counting mode setting (ON: count
M1232 - Y Y Y OFF - - R/W NO OFF
down)
C233 counting mode setting (ON: count
M1233 - Y Y Y OFF - - R/W NO OFF
down)
C234 counting mode setting (ON: count
M1234 - Y Y Y OFF - - R/W NO OFF
down)
C235 counting mode setting (ON: count
M1235 Y Y Y Y OFF - - R/W NO OFF
down)
C236 counting mode setting (ON: count
M1236 Y Y Y Y OFF - - R/W NO OFF
down)
C237 counting mode setting (ON: count
M1237 Y Y Y Y OFF - - R/W NO OFF
down)
C238 counting mode setting (ON: count
M1238 Y Y Y Y OFF - - R/W NO OFF
down)
C239 counter mode setting (ON: count
M1239 - Y Y Y OFF - - R/W NO OFF
down)
C240 counter mode setting (ON: count
M1240 - Y Y Y OFF - - R/W NO OFF
down)
C241 counter mode setting (ON: count
M1241 Y Y Y Y OFF - - R/W NO OFF
down)
C242 counter mode setting (ON: count
M1242 Y Y Y Y OFF - - R/W NO OFF
down)
C243 counter mode setting (ON: count
M1243 - Y Y Y OFF - - R/W NO OFF
down)
C244 counter mode setting (ON: count
M1244 Y Y Y Y OFF - - R/W NO OFF
down)
C245 counter mode setting (ON: count
M1245 - Y - - OFF - - R/W NO OFF
down)
M1246 C246 counter monitor (ON: count down) Y Y Y Y OFF - - R NO OFF
M1247 C247 counter monitor (ON: count down) Y Y Y Y OFF - - R NO OFF
M1248 C248 counter monitor (ON: count down) - - Y Y OFF - - R NO OFF
M1249 C249 counter monitor (ON: count down) Y Y Y Y OFF - - R NO OFF
M1250 C250 counter monitor (ON: count down) - Y - - OFF - - R NO OFF
M1251 C251 counter monitor (ON: count down) Y Y Y Y OFF - - R NO OFF
M1252 C252 counter monitor (ON: count down) Y Y Y Y OFF - - R NO OFF
M1253 C253 counter monitor (ON: count down) - - Y Y OFF - - R NO OFF
M1254 C254 counter monitor (ON: count down) Y Y Y Y OFF - - R NO OFF
M1255 C255 counter monitor (ON: count down) - Y - - OFF - - R NO OFF
Set the ramp up/down of Y0, Y2 to be “S
M1257 - - Y Y OFF OFF - R NO OFF
curve.” ON = S curve.
Y0 pulse output signal reversing for PWM
M1258 - - Y Y OFF - - R/W NO OFF
instruction
Y2 pulse output signal reversing for PWM
M1259 - - Y Y OFF - - R/W NO OFF
instruction
Let X7 be the reset input signal of
M1260 - Y - - OFF - - R/W NO OFF
high-speed counters C235~C241
High-speed comparator comparison flag for
M1261 - - Y Y OFF - - R/W NO OFF
DHSCR instruction
Enable cyclic output for table output
M1262 - - - Y OFF OFF - R/W NO OFF
function of DPTPO instruction
M1264 Enabling reset function of HHSC0 - - Y Y OFF - - R/W NO OFF
M1265 Enabling start function of HHSC0 - - Y Y OFF - - R/W NO OFF
M1266 Enabling reset function of HHSC1 - - Y Y OFF - - R/W NO OFF
M1267 Enabling start function of HHSC1 - - Y Y OFF - - R/W NO OFF

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 64
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
M1268 Enabling reset function of HHSC2 - - Y Y OFF - - R/W NO OFF
M1269 Enabling start function of HHSC2 - - Y Y OFF - - R/W NO OFF
M1270 Enabling reset function of HHSC3 - - Y Y OFF - - R/W NO OFF
M1271 Enabling start function of HHSC3 - - Y Y OFF - - R/W NO OFF
M1272 Reset control of HHSC0 - - Y Y OFF - - R/W NO OFF
M1273 Start control of HHSC0 - - Y Y OFF - - R/W NO OFF
M1274 Reset control of HHSC1 - - Y Y OFF - - R/W NO OFF
M1275 Start control of HHSC1 - - Y Y OFF - - R/W NO OFF
M1276 Reset control of HHSC2 - - Y Y OFF - - R/W NO OFF
M1277 Start control of HHSC2 - - Y Y OFF - - R/W NO OFF
M1278 Reset control of HHSC3 - - Y Y OFF - - R/W NO OFF
M1279 Start control of HHSC3 - - Y Y OFF - - R/W NO OFF
M1280 Inhibiting I000/I001 - - Y Y OFF - - R/W NO OFF
M1281 Inhibiting I100/I101 - - Y Y OFF - - R/W NO OFF
M1282 Inhibiting I200/I201 - - Y Y OFF - - R/W NO OFF
M1283 Inhibiting I300/I301 - - Y Y OFF - - R/W NO OFF
Inhibiting I400/I401 - - Y Y OFF - - R/W NO OFF
M1284 For I400/I401, reverse interrupt trigger
- - - Y OFF OFF - R/W NO OFF
pulse direction (Rising/Falling)
M1285 Inhibiting I500/I501 - - Y Y OFF - - R/W NO OFF
M1286 Inhibiting I601~I699 - - Y Y OFF - - R/W NO OFF
M1287 Inhibiting I701~I799 - - Y Y OFF - - R/W NO OFF
M1288 Inhibiting I8801~I899 - - Y Y OFF - - R/W NO OFF
M1289 Inhibiting I010 - - Y Y OFF - - R/W NO OFF
M1290 Inhibiting I020 - - Y Y OFF - - R/W NO OFF
M1291 Inhibiting I030 - - Y Y OFF - - R/W NO OFF
M1292 Inhibiting I040 - - Y Y OFF - - R/W NO OFF
M1293 Inhibiting I050 - - Y Y OFF - - R/W NO OFF
M1294 Inhibiting I060 - - Y Y OFF - - R/W NO OFF
M1295 Inhibiting I110 - - Y Y OFF - - R/W NO OFF
M1296 Inhibiting I120 - - Y Y OFF - - R/W NO OFF
M1297 Inhibiting I130 - - Y Y OFF - - R/W NO OFF
M1298 Inhibiting I140 - - Y Y OFF - - R/W NO OFF
M1299 I150 flag disable - Y Y Y OFF - - R/W NO OFF
M1300 Inhibiting I160 - - Y Y OFF - - R/W NO OFF
M1301 Inhibiting I170 - - Y Y OFF - - R/W NO OFF
M1302 Inhibiting I180 - - Y Y OFF - - R/W NO OFF
High / low exchanged flag for XCH
M1303 - Y Y Y OFF - - R/W NO OFF
instruction
M1304 X input point can decide to be ON-OFF Y Y Y Y OFF - - R/W NO OFF
Operation direction of the 1st group pulse
M1305 CH0 (Y0, Y1) for PLSV/DPLSV/DRVI - - Y Y OFF - - R NO OFF
/DDRVI/DRVA/DDRVA instruction
Operation direction of the 2nd group pulse
M1306 CH1 (Y2, Y3) for PLSV/DPLSV/DRVI - - Y Y OFF - - R NO OFF
/DDRVI/DRVA/DDRVA instruction
Immediately shut down Y10 pulse output
- Y - - OFF OFF - R/W NO OFF
starting flag
M1310 Off->On: The 1st pulse group CH2 (Y4, Y5)
high-speed output immediately stops.
- - Y Y OFF OFF OFF R/W NO OFF
On->Off: Completing remaining number of
output pulses
Immediately shut down Y11 pulse output
- Y - - OFF OFF - R/W NO OFF
starting flag
M1311 Off->On: The 1st pulse group CH3 (Y6, Y7)
high-speed output immediately stops.
- - Y Y OFF OFF OFF R/W NO OFF
On->Off: Completing remaining number of
output pulses
Controlling start input point of C235 - - Y - OFF - - R/W NO OFF
M1312 For COM1(RS-232), sending request (Only
- - - Y OFF OFF - R/W NO OFF
applicable for MODRW and RS instruction)
Controlling start input point of C236 - - Y - OFF - - R/W NO OFF
For COM1(RS-232), ready for data
M1313
receiving (only applicable for MODRW and - - - Y OFF OFF - R NO OFF
RS instruction)
Controlling start input point of C237 - - Y - OFF - - R/W NO OFF
M1314
For COM1(RS-232), data receiving - - - Y OFF OFF - R/W NO OFF

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 65
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
completed (only applicable for MODRW
and RS instruction)
Controlling start input point of C238 - - Y - OFF - - R/W NO OFF
For COM1(RS-232), data receiving error
M1315
(only applicable for MODRW and RS - - - Y OFF OFF - R/W NO OFF
instruction)
M1316 Controlling start input point of C239 - - Y - OFF - - R/W NO OFF
M1317 Controlling start input point of C240 - - Y - OFF - - R/W NO OFF
M1320 Controlling reset input point of C235 - - Y - OFF - - R/W NO OFF
M1321 Controlling reset input point of C236 - - Y - OFF - - R/W NO OFF
M1322 Controlling reset input point of C237 - - Y - OFF - - R/W NO OFF
M1323 Controlling reset input point of C238 - - Y - OFF - - R/W NO OFF
M1324 Controlling reset input point of C239 - - Y - OFF - - R/W NO OFF
M1325 Controlling reset input point of C240 - - Y - OFF - - R/W NO OFF
M1328 Enabling start/reset of C235 - - Y - OFF - - R/W NO OFF
M1329 Enabling start/reset of C236 - - Y - OFF - - R/W NO OFF
M1330 Enabling start/reset of C237 - - Y - OFF - - R/W NO OFF
M1331 Enabling start/reset of C238 - - Y - OFF - - R/W NO OFF
M1332 Enabling start/reset of C239 - - Y - OFF - - R/W NO OFF
M1333 Enabling start/reset of C240 - - Y - OFF - - R/W NO OFF
Stopping the 1st group pulse output CH0
M1334 - Y Y Y OFF - - R/W NO OFF
(Y0, Y1)
Stopping the 2nd group pulse output CH1
M1335 - Y Y Y OFF - - R/W NO OFF
(Y2, Y3)
Sending out the 1st group pulse output CH0
M1336 - - Y Y OFF OFF OFF R NO OFF
(Y0, Y1)
Sending out the 2nd group pulse output
M1337 - - Y Y OFF OFF OFF R NO OFF
CH1 (Y2, Y3)
Enabling offset pulses of the 1st group
M1338 - - Y Y OFF - - R/W NO OFF
pulse output CH0 (Y0, Y1)
Enabling offset pulses of the 2nd group
M1339 - - Y Y OFF - - R/W NO OFF
pulse output CH1 (Y2, Y3)
Generating interruption I110 after the 1st
M1340 - - Y Y OFF - - R/W NO OFF
group pulse output CH0 (Y0, Y1) is sent out
Generating interruption I120 after the 2nd
M1341 - - Y Y OFF - - R/W NO OFF
group pulse output CH1 (Y2, Y3) is sent out
Generating interruption I130 when the 1st
M1342 - - Y Y OFF - - R/W NO OFF
group pulse output CH0 (Y0, Y1) is sent out
Generating interruption I140 when the 2nd
M1343 - - Y Y OFF - - R/W NO OFF
group pulse output CH1 (Y2, Y3) is sent out
Enabling the offset of the 1st group pulse
M1344 - - Y Y OFF - - R/W NO OFF
output CH0 (Y0, Y1)
Enabling the offset of the 2nd group pulse
M1345 - - Y Y OFF - - R/W NO OFF
output CH1 (Y2, Y3)
M1346 Enabling ZRN CLEAR output signal - - Y Y OFF - - R/W NO OFF
Reset after the 1st group pulse output CH0
- Y Y Y OFF - - R/W NO OFF
(Y0, Y1) is completed for PLSY instruction
M1347
Auto-reset Y0 when high speed pulse
- Y Y Y OFF - - R/W NO OFF
output completed
Reset after the 2nd group pulse output CH1
- Y Y Y OFF - - R/W NO OFF
(Y2, Y3) is completed for PLSY instruction
M1348
Auto-reset Y1 when high speed pulse
- Y Y Y OFF - - R/W NO OFF
output completed
M1350 Enable the function of ELC Link - Y Y Y OFF - - R/W NO OFF
M1351 Enable auto mode on ELC Link - Y Y Y OFF - - R/W NO OFF
M1352 Enable manual mode on ELC Link - Y Y Y OFF - - R/W NO OFF
Enable 32 slave unit linkage and up to 100
M1353 - - Y Y OFF - - R/W NO OFF
data length of data exchange on ELC LINK
Enable simultaneous data read/write in a
M1354 - Y Y Y OFF - - R/W NO OFF
polling of ELC Link
Select Slave linking mode in ELC LINK
M1355 - Y Y Y - - - R/W YES OFF
(ON: manual; OFF: auto-detection)
When the ELC link is enabled and M1356 is
ON, the values in D1900~D1931 are taken
M1356 - - - Y - - - R/W NO OFF
as the station address. The default station
address in D1399 is not used.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 66
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
M1360 Slave ID#1 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1361 Slave ID#2 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1362 Slave ID#3 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1363 Slave ID#4 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1364 Slave ID#5 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1365 Slave ID#6 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1366 Slave ID#7 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1367 Slave ID#8 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1368 Slave ID#9 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1369 Slave ID#10 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1370 Slave ID#11 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1371 Slave ID#12 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1372 Slave ID#13 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1373 Slave ID#14 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1374 Slave ID#15 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
M1375 Slave ID#16 status on ELC Link network - Y Y Y OFF - - R/W NO OFF
Indicating Slave ID#1 data transaction
M1376 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#2 data transaction
M1377 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#3 data transaction
M1378 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#4 data transaction
M1379 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#5 data transaction
M1380 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#6 data transaction
M1381 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#7 data transaction
M1382 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#8 data transaction
M1383 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#9 data transaction
M1384 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#10 data transaction
M1385 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#11 data transaction
M1386 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#12 data transaction
M1387 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#13 data transaction
M1388 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#14 data transaction
M1389 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#15 data transaction
M1390 - Y Y Y OFF - - R NO OFF
status on ELC Link
Indicating Slave ID#16 data transaction
M1391 - Y Y Y OFF - - R NO OFF
status on ELC Link
M1392 Slave ID#1 linking error - Y Y Y OFF - - R NO OFF
M1393 Slave ID#2 linking error - Y Y Y OFF - - R NO OFF
M1394 Slave ID#3 linking error - Y Y Y OFF - - R NO OFF
M1395 Slave ID#4 linking error - Y Y Y OFF - - R NO OFF
M1396 Slave ID#5 linking error - Y Y Y OFF - - R NO OFF
M1397 Slave ID#6 linking error - Y Y Y OFF - - R NO OFF
M1398 Slave ID#7 linking error - Y Y Y OFF - - R NO OFF
M1399 Slave ID#8 linking error - Y Y Y OFF - - R NO OFF
M1400 Slave ID#9 linking error - Y Y Y OFF - - R NO OFF
M1401 Slave ID#10 linking error - Y Y Y OFF - - R NO OFF
M1402 Slave ID#11 linking error - Y Y Y OFF - - R NO OFF
M1403 Slave ID#12 linking error - Y Y Y OFF - - R NO OFF
M1404 Slave ID#13 linking error - Y Y Y OFF - - R NO OFF
M1405 Slave ID#14 linking error - Y Y Y OFF - - R NO OFF
M1406 Slave ID#15 linking error - Y Y Y OFF - - R NO OFF
M1407 Slave ID#16 linking error - Y Y Y OFF - - R NO OFF
M1408 Indicating reading from Slave ID#1 is - Y Y Y OFF - - R NO OFF

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 67
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
completed
Indicating reading from Slave ID#2 is
M1409 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#3 is
M1410 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#4 is
M1411 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#5 is
M1412 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#6 is
M1413 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#7 is
M1414 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#8 is
M1415 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#9 is
M1416 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#10 is
M1417 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#11 is
M1418 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#12 is
M1419 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#13 is
M1420 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#14 is
M1421 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#15 is
M1422 - Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#16 is
M1423 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#1 is
M1424 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#2 is
M1425 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#3 is
M1426 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#4 is
M1427 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#5 is
M1428 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#6 is
M1429 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#7 is
M1430 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#8 is
M1431 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#9 is
M1432 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#10 is
M1433 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#11 is
M1434 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#12 is
M1435 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#13 is
M1436 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#14 is
M1437 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#15 is
M1438 - Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#16 is
M1439 - Y Y Y OFF - - R NO OFF
completed
M1440 Slave ID#17 status on ELC LINK network - - Y - OFF - - R NO OFF

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 68
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1441 Slave ID#18 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1442 Slave ID#19 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1443 Slave ID#20 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1444 Slave ID#21 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1445 Slave ID#22 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1446 Slave ID#23 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1447 Slave ID#24 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1448 Slave ID#25 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1449 Slave ID#26 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1450 Slave ID#27 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1451 Slave ID#28 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1452 Slave ID#29 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1453 Slave ID#30 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1454 Slave ID#31 status on ELC LINK network
- - - Y - - - R YES OFF
- - Y - OFF - - R NO OFF
M1455 Slave ID#32 status on ELC LINK network
- - - Y - - - R YES OFF
Indicating Slave ID#17 data transaction
M1456 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#18 data transaction
M1457 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#19 data transaction
M1458 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#20 data transaction
M1459 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#21 data transaction
M1460 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#22 data transaction
M1461 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#23 data transaction
M1462 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#24 data transaction
M1463 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#25 data transaction
M1464 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#26 data transaction
M1465 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#27 data transaction
M1466 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#28 data transaction
M1467 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#29 data transaction
M1468 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#30 data transaction
M1469 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#31 data transaction
M1470 - - Y Y OFF - - R NO OFF
status on ELC LINK
Indicating Slave ID#32 data transaction
M1471 - - Y Y OFF - - R NO OFF
status on ELC LINK
M1472 Slave ID#17 linking error - - Y Y OFF - - R NO OFF
M1473 Slave ID#18 linking error - - Y Y OFF - - R NO OFF

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 69
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
M1474 Slave ID#19 linking error - - Y Y OFF - - R NO OFF
M1475 Slave ID#20 linking error - - Y Y OFF - - R NO OFF
M1476 Slave ID#21 linking error - - Y Y OFF - - R NO OFF
M1477 Slave ID#22 linking error - - Y Y OFF - - R NO OFF
M1478 Slave ID#23 linking error - - Y Y OFF - - R NO OFF
M1479 Slave ID#24 linking error - - Y Y OFF - - R NO OFF
M1480 Slave ID#25 linking error - - Y Y OFF - - R NO OFF
M1481 Slave ID#26 linking error - - Y Y OFF - - R NO OFF
M1482 Slave ID#27 linking error - - Y Y OFF - - R NO OFF
M1483 Slave ID#28 linking error - - Y Y OFF - - R NO OFF
M1484 Slave ID#29 linking error - - Y Y OFF - - R NO OFF
M1485 Slave ID#30 linking error - - Y Y OFF - - R NO OFF
M1486 Slave ID#31 linking error - - Y Y OFF - - R NO OFF
M1487 Slave ID#32 linking error - - Y Y OFF - - R NO OFF
Indicating reading from Slave ID#17 is
M1488 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#18 is
M1489 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#19 is
M1490 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#20 is
M1491 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#21 is
M1492 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#22 is
M1493 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#23 is
M1494 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#24 is
M1495 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#25 is
M1496 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#26 is
M1497 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#27 is
M1498 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#28 is
M1499 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#29 is
M1500 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#30 is
M1501 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#31 is
M1502 - - Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#32 is
M1503 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#17 is
M1504 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#18 is
M1505 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#19 is
M1506 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#20 is
M1507 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#21 is
M1508 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#22 is
M1509 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#23 is
M1510 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#24 is
M1511 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#25 is
M1512 - - Y Y OFF - - R NO OFF
completed

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 70
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
Indicating writing to Slave ID#26 is
M1513 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#27 is
M1514 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#28 is
M1515 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#29 is
M1516 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#30 is
M1517 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#31 is
M1518 - - Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#32 is
M1519 - - Y Y OFF - - R NO OFF
completed
Stopping the 3rd group pulse output CH2
M1520 - - Y Y OFF - - R/W NO OFF
(Y4, Y5)
Stopping the 4th group pulse output CH3
M1521 - - Y Y OFF - - R/W NO OFF
(Y6, Y7)
Sending out the 3rd group pulse output
M1522 - - Y Y OFF - OFF R NO OFF
CH2 (Y4, Y5)
Sending out the 4th group pulse output
M1523 - - Y Y OFF - OFF R NO OFF
CH3 (Y6, Y7)
Auto-reset Y2 when high speed pulse
M1524 - Y Y Y OFF - - R/W NO OFF
output completes
Auto-reset Y3 when high speed pulse
M1525 - Y Y Y OFF - - R/W NO OFF
output completes
Reversing Y4 pulse output signal for PWM
M1526 - - Y Y OFF - - R/W NO OFF
instruction
Reversing Y6 pulse output signal for PWM
M1527 - - Y Y OFF - - R/W NO OFF
instruction
Enabling the instruction DICF to execute
M1528 - - - Y OFF OFF OFF R/W NO OFF
the constant speed output section
Enabling the instruction DICF to execute
M1529 - - - Y OFF OFF OFF R/W NO OFF
the final output section
Switching time resolution of Y4 output for
M1530 - - Y Y OFF - - R/W NO OFF
PWM instruction (ON: 100us; OFF: 1ms)
Switching time resolution of Y6 output for
M1531 - - Y Y OFF - - R/W NO OFF
PWM instruction (ON: 100us; OFF: 1ms)
Reverse operation of the 3rd group pulse
M1532 CH2 (Y4, Y5) for PLSV/DPLSV/DRVI - - Y Y OFF - - R/W NO OFF
/DDRVI/DRVA/DDRVA instruction
Reverse operation of the 4th group pulse
M1533 CH3 (Y6, Y7) for PLSV/DPLSV/DRVI - - Y Y OFF - - R/W NO OFF
/DDRVI/DRVA/DDRVA instruction
CH0 being able to designate deceleration
M1534 - - Y Y OFF - - R/W NO OFF
time. Has to be used with D1348.
CH1 being able to designate deceleration
M1535 - - Y Y OFF - - R/W NO OFF
time. Has to be used with D1349.
CH2 being able to designate deceleration
M1536 - - Y Y OFF - - R/W NO OFF
time. Has to be used with D1350.
CH3 being able to designate deceleration
M1537 - - Y Y OFF - - R/W NO OFF
time. Has to be used with D1351.
Indicating pause status of high speed
M1538 - - Y Y OFF - OFF R/W NO OFF
output in CH0
Indicating pause status of high speed
M1539 - - Y Y OFF - OFF R/W NO OFF
output in CH1
Indicating pause status of high speed
M1540 - - Y Y OFF - OFF R/W NO OFF
output in CH2
Indicating pause status of high speed
M1541 - - Y Y OFF - OFF R/W NO OFF
output in CH3
CH0 executes the function that the constant
M1542 speed output section reaches the target - - - Y OFF OFF - R/W NO OFF
frequency.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 71
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC ELC2 Factory
SM Function    Type Latched
-PB -PA -PV -PV setting
ON RUN STOP
CH0 executed the function that the constant
M1543 speed output section reaches the target - - - Y OFF OFF - R/W NO OFF
number.
CH1 executes the function that the constant
M1544 speed output section reaches the target - - - Y OFF OFF - R/W NO OFF
frequency.
CH1 executed the function that the constant
M1545 speed output section reaches the target - - - Y OFF OFF - R/W NO OFF
number.
CH2 executes the function that the constant
M1546 speed output section reaches the target - - - Y OFF OFF - R/W NO OFF
frequency.
CH2 executed the function that the constant
M1547 speed output section reaches the target - - - Y OFF OFF - R/W NO OFF
number.
CH3 executes the function that the constant
M1548 speed output section reaches the target - - - Y OFF OFF - R/W NO OFF
frequency.
CH3 executed the function that the constant
M1549 speed output section reaches the target - - - Y OFF OFF - R/W NO OFF
number.
Used with the instruction DCIF to clear the
M1550 - - - Y OFF OFF - R/W NO OFF
high-speed output couting number
M1560 Inhibiting I900 and I901 - - - Y OFF - - R/W NO OFF
M1561 Inhibiting I910 and I911 - - - Y OFF - - R/W NO OFF
M1562 Inhibiting I920 and I921 - - - Y OFF - - R/W NO OFF
M1563 Inhibiting I930 and I931 - - - Y OFF - - R/W NO OFF
M1564 Inhibiting I940 and I941 - - - Y OFF - - R/W NO OFF
M1565 Inhibiting I950 and I951 - - - Y OFF - - R/W NO OFF
M1566 Inhibiting I960 and I961 - - - Y OFF - - R/W NO OFF
M1567 Inhibiting I970 and I971 - - - Y OFF - - R/W NO OFF
Enabling the negative limit function of the
M1570 - - - Y OFF OFF - R/W NO OFF
high-speed output CH0
Enabling the negative limit function of the
M1571 - - - Y OFF OFF - R/W NO OFF
high-speed output CH1
Enabling the negative limit function of the
M1572 - - - Y OFF OFF - R/W NO OFF
high-speed output CH2
Enabling the negative limit function of the
M1573 - - - Y OFF OFF - R/W NO OFF
high-speed output CH3
The DOG of CH0 in the instruction ZRN is
M1574 - - - Y OFF OFF - R/W NO OFF
positive stop function.
The DOG of CH1 in the instruction ZRN is
M1575 - - - Y OFF OFF - R/W NO OFF
positive stop function.
The DOG of CH2 in the instruction ZRN is
M1576 - - - Y OFF OFF - R/W NO OFF
positive stop function.
The DOG of CH3 in the instruction ZRN is
M1577 - - - Y OFF OFF - R/W NO OFF
positive stop function.
Off: Number of times the instruction ZRN
search for the Z phase
M1578 On: The output designates the - - - Y OFF OFF - R/W NO OFF
displacement.
The flag is used with D1312.
Disable the checksum mechanism of the
M1579 left/right side module (On: Disable; Off: - - - Y - - - R/W YES OFF
Enable)

For ELCM-PH/ELCM-PA, ELC2-PB, ELC2-PC/ELC2-PE, and ELC2-PA:

ELCM ELC2- OFF STOP RUN
ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP
Normally open contact (a contact).
This contact is ON when running and
M1000 Y Y Y Y OFF ON OFF R NO OFF
it is ON when the status is set to
RUN.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 72
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2- OFF STOP RUN

ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP
Normally OFF contact (b contact).
This contact is OFF in running and it
M1001 Y Y Y Y ON OFF ON R NO ON
is OFF when the status is set to
RUN.
ON only for 1 scan after RUN. Initial
pulse is contact a. It will get positive
M1002 Y Y Y Y OFF ON OFF R NO OFF
pulse in the RUN moment. Pulse
width=scan period.
OFF only for 1 scan after RUN. Initial
pulse is contact a. It will get negative
M1003 Y Y Y Y ON OFF ON R NO ON
pulse in the RUN moment. Pulse
width=scan period.
M1004 ON when error occurs Y Y Y Y OFF OFF - R NO OFF
Monitor timer flag (ON: ELC WDT
M1008 Y Y Y Y OFF OFF - R NO OFF
time out)
History of LV signal due to 24VDC
M1009 Y Y Y Y OFF - - R NO OFF
insufficiency
M1011 10ms clock pulse, 5ms ON/5ms OFF Y Y Y Y OFF - - R NO OFF
100ms clock pulse, 50ms ON / 50ms
M1012 Y Y Y Y OFF - - R NO OFF
OFF
M1013 1s clock pulse, 0.5s ON / 0.5s OFF Y Y Y Y OFF - - R NO OFF
M1014 1min clock pulse, 30s ON / 30s OFF Y Y Y Y OFF - - R NO OFF
M1015 High-speed connection counter Y Y Y Y OFF - - R/W NO OFF
Display year bit. When OFF =
display two right-most bits.
M1016 Y Y Y Y OFF - - R/W NO OFF
When ON = display (two right-most
bits + 2000).
M1017 ±30 seconds adjustment Y Y Y Y OFF - - R/W NO OFF
Flag for Radian/Degree, ON for
M1018 Y Y Y Y OFF - - R/W NO OFF
degree
M1020 Zero flag Y Y Y Y OFF - - R NO OFF
M1021 Barrow flag Y Y Y Y OFF - - R NO OFF
M1022 Carry flag Y Y Y Y OFF - - R NO OFF
M1024 COM1 monitor request Y Y Y Y OFF - - R NO OFF
If the ELC receives an illegal
communication request when PC or
M1025 HMI connects to an ELC, M1025 Y Y Y Y OFF - - R NO OFF
=ON and save the error code in
D1025.
M1026 Startup flag of RAMP module Y Y Y Y OFF - - R/W NO OFF
M1027 PR output flag Y Y Y Y OFF - - R/W NO OFF
10ms time switch flag. The base
setting flag of T64~T126 is 100ms,
M1028 Y Y Y Y OFF - - R/W NO OFF
when timer is OFF and the base
setting flag is 10ms when it is ON.
Y0 or CH0 (Y0, Y1) pulse output
M1029 Y Y Y Y OFF - - R NO OFF
execution completed.
Pulse output Y1 execution
M1030 Y Y Y Y OFF - - R NO OFF
completed
M1031 Clear all non-latched memory Y Y Y Y OFF - - R/W NO OFF
M1032 Clear all latched memory Y Y Y Y OFF - - R/W NO OFF
M1033 Memory latched at STOP Y Y Y Y OFF - - R/W NO OFF
M1034 All Y outputs disable Y Y Y Y OFF - - R/W NO OFF
X7 input point to be RUN/STOP
M1035 Y Y Y Y - - - R/W YES OFF
switch
Enable 8-sets SPD function (Has to
M1037 1.4 1.2 Y 1.2 OFF OFF OFF R/W NO OFF
be used with D1037)
Switching T200~T255 timer
M1038 Y Y Y Y OFF - - R/W NO OFF
resolution (10ms/1ms). ON = 1ms.
M1039 Constant scan mode Y Y Y Y OFF - - R/W NO OFF
M1040 Step transition inhibit Y Y Y Y OFF - - R/W NO OFF
M1041 Step transition start Y Y Y Y OFF - OFF R/W NO OFF
M1042 Start pulse Y Y Y Y OFF - - R/W NO OFF
M1043 Zero point return completed Y Y Y Y OFF - OFF R/W NO OFF
M1044 Zero point condition Y Y Y Y OFF - OFF R/W NO OFF
M1045 All outputs clear inhibit Y Y Y Y OFF - - R/W NO OFF

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 73
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2- OFF STOP RUN

ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP
M1046 STL state setting (ON) Y Y Y Y OFF - - R NO OFF
M1047 STL monitor enable Y Y Y Y OFF - - R/W NO OFF
M1048 Flag for alarm point state Y Y Y Y OFF - - R NO OFF
M1049 Monitor flag for alarm point Y Y Y Y OFF - - R/W NO OFF
M1050 I000/I001 masked Y Y Y Y OFF - - R/W NO OFF
M1051 I100/I101 masked Y Y Y Y OFF - - R/W NO OFF
M1052 I200/I201 masked Y Y Y Y OFF - - R/W NO OFF
M1053 I300/I301 masked Y Y Y Y OFF - - R/W NO OFF
M1054 I400/I401 masked Y Y Y Y OFF - - R/W NO OFF
M1055 I500/I501 masked Y Y Y Y OFF - - R/W NO OFF
M1056 I602~ I699 masked Y Y Y Y OFF - - R/W NO OFF
M1057 I702~I799 masked Y Y Y Y OFF - - R/W NO OFF
M1058 COM3 monitor request Y - Y Y OFF - - R/W NO OFF
Disable high-speed counter
M1059 Y Y Y Y OFF - - R/W NO OFF
interruptions I010~I080
M1060 System error message 1 Y Y Y Y OFF - - R NO OFF
M1061 System error message 2 Y Y Y Y OFF - - R NO OFF
M1062 System error message 3 Y Y Y Y OFF - - R NO OFF
M1063 System error message 4 Y Y Y Y OFF - - R NO OFF
M1064 Operator error Y Y Y Y OFF OFF - R NO OFF
M1065 Syntax error Y Y Y Y OFF OFF - R NO OFF
M1066 Program error Y Y Y Y OFF OFF - R NO OFF
M1067 Program execution error Y Y Y Y OFF OFF - R NO OFF
M1068 Execution error latched (D1068) Y Y Y Y OFF - - R NO OFF
Y1 time base switching for PWM
M1070 Y Y Y Y OFF - - R/W NO OFF
instruction (ON: 100us; OFF: 1ms)
Switching clock pulse of Y3 for
M1071 PWM instruction (ON: 100us; OFF: Y Y Y Y OFF - - R/W NO OFF
1ms)
M1072 ELC status (RUN/STOP), ON = RUN Y Y Y Y OFF ON OFF R/W NO OFF
Error occurring when write in Flash
M1075 Y Y Y Y OFF - - R NO OFF
ROM
Y0/CH0(Y0, Y1) pulse output pause
M1078 Y Y Y Y OFF OFF - R/W NO OFF
(immediate)
M1079 Y1 pulse output pause (immediate) Y Y Y Y OFF OFF - R/W NO OFF
M1080 COM2 monitor request Y Y Y Y OFF - - R/W NO OFF
Changing conversion mode for FLT
M1081 Y Y Y Y OFF - - R/W NO OFF
instruction
Selecting X6 pulse-width detecting
mode. M1083 = ON, detecting
M1083 pulse-width when X6 = ON; M1083 = Y Y Y Y OFF - - R/W NO OFF
OFF, detecting pulse-width when X6
= OFF.
Enabling X6 Pulse width detecting
M1084 function. (has to be used with M1183 Y Y Y Y OFF OFF OFF R/W NO OFF
and D1023)
Selecting ELC-ACPGMXFR
M1085 Y Y Y Y OFF - - R/W NO OFF
duplicating function
Enabling password function for
M1086 Y Y Y Y OFF - - R/W NO OFF
ELC-ACPGMXFR
Matrix comparison.
Comparing between equivalent
M1088 Y Y Y Y OFF OFF - R/W NO OFF
values (M1088 = ON) or different
values (M1088 = OFF).
Indicating the end of matrix
M1089 comparison. When the comparison Y Y Y Y OFF OFF - R NO OFF
reaches the last bit, M1089 = ON.
Matrix search start flag. Compare
M1090 Y Y Y Y OFF OFF - R NO OFF
from the first bit and M1090=1.
Matrix finding bit flag. When find it, it
M1091 Y Y Y Y OFF OFF - R NO OFF
will stop comparing and M1091=1.
Matrix pointer error flag. When
M1092 pointer Pr exceeds this range, Y Y Y Y OFF OFF - R NO OFF
M1092=1.
Matrix pointer increase flag. It will
M1093 Y Y Y Y OFF OFF - R/W NO OFF
add 1 to present pointer.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 74
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2- OFF STOP RUN

ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP
Matrix pointer clear flag. It will clear
M1094 Y Y Y Y OFF OFF - R/W NO OFF
present pointer to 0.
Carry flag for matrix rotate/shift
M1095 Y Y Y Y OFF OFF - R NO OFF
output
Complement flag for matrix shift
M1096 Y Y Y Y OFF OFF - R/W NO OFF
input
M1097 Direction flag for matrix rotate/shift Y Y Y Y OFF OFF - R/W NO OFF
M1098 Matrix count bit 0 or 1 flag Y Y Y Y OFF OFF - R/W NO OFF
M1099 It is ON when matrix count result 0 Y Y Y Y OFF OFF - R/W NO OFF
Y2 pulse or CH1 (Y2, Y3) pulse
M1102 Y Y Y Y OFF - - R/W NO OFF
output execution completed
M1103 Y3 pulse output completed Y Y Y Y OFF - - R/W NO OFF
Y2 pulse or CH1 (Y2, Y3) pulse
M1104 Y Y Y Y OFF OFF - R/W NO OFF
output pause (immediate)
M1105 Y3 pulse output pause (immediate) Y Y Y Y OFF OFF - R/W NO OFF
Zero point selection. M1106=ON,
M1106 change the zero point to the right of Y Y Y Y OFF OFF - R/W NO OFF
DOG switch for zero return on CH0.
Zero point selection. M1107=ON,
M1107 change the zero point to the right of Y Y Y Y OFF OFF - R/W NO OFF
DOG switch for zero return on CH1.
Y0 pulse or CH0 (Y0, Y1) pulse
M1108 Y Y Y Y OFF OFF - R/W NO OFF
output pause (ramp down)
M1109 Y1 pulse output pause (ramp down) Y Y Y Y OFF OFF - R/W NO OFF
Y2 pulse or CH1 (Y2, Y3) pulse
M1110 Y Y Y Y OFF OFF - R/W NO OFF
output pause (ramp down)
M1111 Y3 pulse output pause (ramp down) Y Y Y Y OFF OFF - R/W NO OFF
Switching time resolution of Y0 for
M1112 PWM instruction (ON: 100us; OFF: Y Y Y Y OFF OFF - R/W NO OFF
1ms)
Switching time resolution of Y2 for
M1113 PWM instruction (ON: 100us; OFF: Y Y Y Y OFF OFF - R/W NO OFF
1ms)
Enable 2-speed output function of
M1119 Y - Y Y OFF OFF OFF R/W NO OFF
DDRVI instruction
Set COM2 (RS-485) protocol kept
M1120 on. D1120 cannot be changed after Y Y Y Y OFF OFF OFF R/W NO OFF
the setting.
M1121 Transmission ready Y Y Y Y OFF OFF ON R NO OFF
M1122 Sending request Y Y Y Y OFF OFF OFF R/W NO OFF
M1123 Receiving completed Y Y Y Y OFF OFF OFF R/W NO OFF
M1124 Receiving wait Y Y Y Y OFF OFF OFF R/W NO OFF
M1125 Communication reset Y Y Y Y OFF OFF OFF R/W NO OFF
M1126 STX/ETX user/system selection Y Y Y Y OFF OFF OFF R/W NO OFF
MODRD/RDST/MODRW
M1127 instructions. Data receiving Y Y Y Y OFF OFF OFF R/W NO OFF
completed.
M1128 Transmitting/Receiving Indication Y Y Y Y OFF OFF OFF R/W NO OFF
M1129 Receiving time out Y Y Y Y OFF OFF - R/W NO OFF
M1130 STX/ETX selection Y Y Y Y OFF OFF - R/W NO OFF
MODRD/RDST/MODRW,
M1131 M1131=ON when data convert to Y Y Y Y OFF OFF - R NO OFF
HEX
ON= no relative communications
M1132 Y Y Y Y OFF - - R NO OFF
instruction in ELC program.
For COM3(RS-485), retaining
M1136 Y - Y Y OFF - - R/W NO OFF
communication setting
Retain the data in DNET mapping
M1137 - - Y Y - - - R/W NO OFF
area in STOP state
Set COM1 (RS-232) protocol kept
M1138 on. D1036 cannot be changed after Y Y Y Y OFF - - R/W NO OFF
setting
COM1 (RS-232) ASCII/RTU mode
M1139 Y Y Y Y OFF - - R/W NO OFF
(OFF:ASCII, ON:RTU)
MODRD/MODWR/MODRW data
M1140 Y Y Y Y OFF OFF - R NO OFF
received error

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 75
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2- OFF STOP RUN

ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP
MODRD/MODWR/MODRW
M1141 Y Y Y Y OFF OFF - R NO OFF
instruction error
1. COM2 (RS-485) ASCII/RTU mode
M1143 Y Y Y Y OFF OFF - R/W NO OFF
(OFF:ASCII, ON:RTU)
If DELAY is used, the delay time unit
is 5us. If M1148 is ON, the delay time
unit us 5us. If M1148 is OFF, the V2.6
M1148 V3.2 V3.0 V2.4 OFF OFF OFF R/W NO OFF
delay time unit us 100us. If M1148 is V1.4
ON, it will become OFF after DELAY
is executed.
Enabling the mask and alignment
M1156 mark function on I400/I401(X4) Y Y Y Y OFF OFF - R/W NO OFF
corresponding to Y0
Enabling the mask and alignment
M1158 mark function on I600/I601(X6) Y Y Y Y OFF OFF - R/W NO OFF
corresponding to Y2
M1161 8/16 bits mode (ON = 8 bit mode) Y Y Y Y OFF - - R/W NO OFF
Switching between decimal integer
and binary floating point for SCLP
M1162 instruction Y Y Y Y OFF - - R/W NO OFF
ON: binary floating point; OFF:
decimal integer
M1167 HKY input is 16 bits mode Y Y Y Y OFF - - R/W NO OFF
M1168 SMOV working mode indication Y Y Y Y OFF - - R/W NO OFF
M1178 VR0 Variable resistor enable - - Y Y OFF - - R/W NO OFF
M1179 VR1 Variable resistor enable - - Y Y OFF - - R/W NO OFF
Read analog-to-digital values
ELCM-
M1180 immediately. (M1180 is used with - - Y OFF - - R/W NO OFF
PA
REF.)
Output digital-to-analog values
ELCM-
M1181 immediately. (M1181 is used with - - Y OFF - - R/W NO OFF
PA
REF.)
M1182 = ON, disable auto-mapping
function when connected with left-side
M1182 - - Y Y ON - - R/W NO ON
modules(values will be auto-mapped
to D9800 and above.).
M1183 = ON, disable auto mapping
function when connected with AIO
M1183 modules Y Y Y Y # - - R/W NO #
#: ELCM-PH/PA: OFF;
ELC2-PB/PH/PA/PE: ON
M1190 Set PLSY Y0 output as 0.01~10Hz Y Y Y Y OFF - - R/W NO OFF
M1191 Set PLSY Y1 output as 0.01~10Hz Y Y Y Y OFF - - R/W NO OFF
M1192 Set PLSY Y2 output as 0.01~10Hz Y Y Y Y OFF - - R/W NO OFF
M1193 Set PLSY Y3 output as 0.01~10Hz Y Y Y Y OFF - - R/W NO OFF
C200 counting mode setting (ON:
M1200 Y Y Y Y OFF - - R/W NO OFF
count down)
C201 counting mode setting (ON:
M1201 Y Y Y Y OFF - - R/W NO OFF
count down)
C202 counting mode setting (ON:
M1202 Y Y Y Y OFF - - R/W NO OFF
count down)
C203 counting mode setting (ON:
M1203 Y Y Y Y OFF - - R/W NO OFF
count down)
C204 counting mode setting (ON:
M1204 Y Y Y Y OFF - - R/W NO OFF
count down)
C205 counting mode setting (ON:
M1205 Y Y Y Y OFF - - R/W NO OFF
count down)
C206 counting mode setting (ON:
M1206 Y Y Y Y OFF - - R/W NO OFF
count down)
C207 counting mode setting (ON:
M1207 Y Y Y Y OFF - - R/W NO OFF
count down)
C208 counting mode setting (ON:
M1208 Y Y Y Y OFF - - R/W NO OFF
count down)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 76
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2- OFF STOP RUN

ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP

C209 counting mode setting (ON:

M1209 Y Y Y Y OFF - - R/W NO OFF
count down)
C210 counting mode setting (ON:
M1210 Y Y Y Y OFF - - R/W NO OFF
count down)
C211 counting mode setting (ON: coun
M1211 Y Y Y Y OFF - - R/W NO OFF
down)
C212 counting mode setting (ON:
M1212 Y Y Y Y OFF - - R/W NO OFF
count down)
C213 counting mode setting (ON:
M1213 Y Y Y Y OFF - - R/W NO OFF
count down)
C214 counting mode setting (ON:
M1214 Y Y Y Y OFF - - R/W NO OFF
count down)
C215 counting mode setting (ON:
M1215 Y Y Y Y OFF - - R/W NO OFF
count down)
C216 counting mode setting (ON:
M1216 Y Y Y Y OFF - - R/W NO OFF
count down)
C217 counting mode setting (ON:
M1217 Y Y Y Y OFF - - R/W NO OFF
count down)
C218 counting mode setting (ON:
M1218 Y Y Y Y OFF - - R/W NO OFF
count down)
C219 counting mode setting (ON:
M1219 Y Y Y Y OFF - - R/W NO OFF
count down)
C220 counting mode setting (ON:
M1220 Y Y Y Y OFF - - R/W NO OFF
count down)
C221 counting mode setting (ON:
M1221 Y Y Y Y OFF - - R/W NO OFF
count down)
C222 counting mode setting (ON:
M1222 Y Y Y Y OFF - - R/W NO OFF
count down)
C223 counting mode setting (ON:
M1223 Y Y Y Y OFF - - R/W NO OFF
count down)
C224 counting mode setting (ON:
M1224 Y Y Y Y OFF - - R/W NO OFF
count down)
C225 counting mode setting (ON:
M1225 Y Y Y Y OFF - - R/W NO OFF
count down)
C226 counting mode setting (ON:
M1226 Y Y Y Y OFF - - R/W NO OFF
count down)
C227 counting mode setting (ON:
M1227 Y Y Y Y OFF - - R/W NO OFF
count down)
C228 counting mode setting (ON:
M1228 Y Y Y Y OFF - - R/W NO OFF
count down)
C229 counting mode setting (ON:
M1229 Y Y Y Y OFF - - R/W NO OFF
count down)
C230 counting mode setting (ON:
M1230 Y Y Y Y OFF - - R/W NO OFF
count down)
C231 counting mode setting (ON:
M1231 Y Y Y Y OFF - - R/W NO OFF
count down)
C232 counting mode setting (ON:
- Y - - OFF - - R/W NO OFF
count down)
M1232
C232 counter mode monitor (ON:
Y - Y Y OFF - - R NO OFF
count down)
C233 counter mode monitor (ON:
M1233 Y Y Y Y OFF - - R NO OFF
count down)
C234 counter mode monitor (ON:
M1234 Y Y Y Y OFF - - R NO OFF
count down)
C235 counting mode setting (ON:
M1235 Y Y Y Y OFF - - R/W NO OFF
count down)
C236 counting mode setting (ON:
M1236 Y Y Y Y OFF - - R/W NO OFF
count down)
C237 counting mode setting (ON:
M1237 Y Y Y Y OFF - - R/W NO OFF
count down)
C238 counting mode setting (ON:
M1238 Y Y Y Y OFF - - R/W NO OFF
count down)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 77
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2- OFF STOP RUN

ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP
C239 counter mode setting (ON:
M1239 Y Y Y Y OFF - - R/W NO OFF
count down)
C240 counter mode setting (ON:
M1240 Y Y Y Y OFF - - R/W NO OFF
count down)
C241 counter mode setting (ON:
M1241 Y Y Y Y OFF - - R/W NO OFF
count down)
C242 counter mode setting (ON:
M1242 Y Y Y Y OFF - - R/W NO OFF
count down)
M1243 C243 Reset enable Y Y Y Y OFF - - R/W NO OFF
M1244 C244 Reset enable Y Y Y Y OFF - - R/W NO OFF
C245 counter mode monitor (ON: coun
M1245 Y Y Y Y OFF - - R NO OFF
down)
C246 counter monitor (ON: count
M1246 Y Y Y Y OFF - - R NO OFF
down)
C247 counter monitor (ON: count
M1247 Y Y Y Y OFF - - R NO OFF
down)
C248 counter monitor (ON: count
M1248 Y Y Y Y OFF - - R NO OFF
down)
C249 counter monitor (ON: count
M1249 Y Y Y Y OFF - - R NO OFF
down)
C250 counter monitor (ON: count
M1250 Y Y Y Y OFF - - R NO OFF
down)
C251 counter monitor (ON: count
M1251 Y Y Y Y OFF - - R NO OFF
down)
C252 counter monitor (ON: count
M1252 Y Y Y Y OFF - - R NO OFF
down)
C253 counter monitor (ON: count
M1253 Y Y Y Y OFF - - R NO OFF
down)
C254 counter monitor (ON: count
M1254 Y Y Y Y OFF - - R NO OFF
down)
Set the ramp up/down of Y0, Y2 to
M1257 Y Y Y Y OFF OFF - R/W NO OFF
be “S curve.” ON = S curve.
Let X7 be the reset input signal of
M1260 Y Y Y Y OFF - - R/W NO OFF
high-speed counters C235~C241
Enable cyclic output for table output
M1262 Y Y Y Y OFF OFF - R/W NO OFF
function of DPTPO instruction
C235 counting mode setting (ON:
M1270 Y Y Y Y OFF - - R/W NO OFF
falling-edge count)
C236 counting mode setting (ON:
M1271 Y Y Y Y OFF - - R/W NO OFF
falling-edge count)
C237 counting mode setting (ON:
M1272 Y Y Y Y OFF - - R/W NO OFF
falling-edge count)
C238 counting mode setting (ON:
M1273 Y Y Y Y OFF - - R/W NO OFF
falling-edge count)
C239 counting mode setting (ON:
M1274 Y Y Y Y OFF - - R/W NO OFF
falling-edge count)
C240 counting mode setting (ON:
M1275 Y Y Y Y OFF - - R/W NO OFF
falling-edge count)
C241 counting mode setting (ON:
M1276 Y Y Y Y OFF - - R/W NO OFF
falling-edge count)
C242 counting mode setting (ON:
M1277 Y Y Y Y OFF - - R/W NO OFF
falling-edge count)
For I000/I001, reverse interrupt
M1280 Y Y Y Y OFF OFF - R/W NO OFF
trigger pulse direction (Rising/Falling)
For I400/I401, reverse interrupt
M1284 Y Y Y Y OFF OFF - R/W NO OFF
trigger pulse direction (Rising/Falling)
For I600 / I601, reverse interrupt
M1286 Y Y Y Y OFF OFF - R/W NO OFF
trigger pulse direction (Rising/Falling)
High / low exchanged flag for XCH
M1303 Y Y Y Y OFF - - R/W NO OFF
instruction
X input point can decide to be
M1304 Y Y Y Y OFF - - R/W NO OFF
ON-OFF
Reverse Y1 pulse output direction in
M1305 Y Y Y Y OFF OFF - R/W NO OFF
high speed pulse output instructions

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 78
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2- OFF STOP RUN

ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP
Reverse Y3 pulse output direction in
M1306 Y Y Y Y OFF OFF - R/W NO OFF
high speed pulse output instructions
For ZRN instruction, enable left limit
M1307 Y Y Y Y OFF OFF - R/W NO OFF
switch
For COM1(RS-232), sending request
M1312 (Only applicable for MODRW and RS Y Y Y Y OFF OFF - R/W NO OFF
instruction)
For COM1(RS-232), ready for data
M1313 receiving (only applicable for Y Y Y Y OFF OFF - R/W NO OFF
MODRW and RS instruction)
For COM1(RS-232), data receiving
M1314 completed (only applicable for Y Y Y Y OFF OFF - R/W NO OFF
MODRW and RS instruction)
For COM1(RS-232), data receiving
M1315 error (only applicable for MODRW Y Y Y Y OFF OFF - R/W NO OFF
and RS instruction)
For COM3(RS-485), sending request
M1316 (only applicable for MODRW and RS Y - Y - OFF OFF - R/W NO OFF
instruction)
For COM3(RS-485), ready for data
M1317 receiving (only applicable for Y - Y - OFF OFF - R/W NO OFF
MODRW and RS instruction)
For COM3(RS-485), data receiving
M1318 completed (only applicable for Y - Y - OFF OFF - R/W NO OFF
MODRW and RS instruction)
For COM3(RS-485), data receiving
M1319 error (only applicable for MODRW Y - Y - OFF OFF - R/W NO OFF
and RS instruction)
For COM3 (RS-485), ASCII/RTU
M1320 mode selection. (OFF: ASCII; ON: Y - Y - OFF - - R/W NO OFF
RTU)
M1346 Enabling ZRN CLEAR output signal Y Y Y Y OFF - - R/W NO OFF
Auto-reset Y0 when high speed pulse
M1347 Y Y Y Y OFF - - R/W NO OFF
output completed
Auto-reset Y1 when high speed pulse
M1348 Y Y Y Y OFF - - R/W NO OFF
output completed
M1350 Enable the function of ELC Link Y Y Y Y OFF - OFF R/W NO OFF
M1351 Enable auto mode on ELC Link Y Y Y Y OFF - - R/W NO OFF
M1352 Enable manual mode on ELC Link Y Y Y Y OFF - - R/W NO OFF
Enable 32 slave unit linkage and up
ELCM-
to 100 data length of data exchange - - - OFF - - R/W NO OFF
PH
M1353 on ELC LINK
Enable up to 100 data length of data
V1.3 Y Y Y - - - R/W YES OFF
exchange
Enable simultaneous data read/write
M1354 Y Y Y Y OFF - - R/W NO OFF
in a polling of ELC Link
Select Slave linking mode in ELC
M1355 LINK (ON: manual; OFF: Y Y Y Y - - - R/W YES OFF
auto-detection)
Enable station number selection
function.
M1356 When both M1353 and M1356 are Y ╳ Y Y - - - R/W YES OFF
ON, the user can specify the station
number in D1900~D1931
Slave ID#1 status on ELC Link
M1360 Y Y Y Y - - - R/W YES OFF
network
Slave ID#2 status on ELC Link
M1361 Y Y Y Y - - - R/W YES OFF
network
Slave ID#3 status on ELC Link
M1362 Y Y Y Y - - - R/W YES OFF
network
Slave ID#4 status on ELC Link
M1363 Y Y Y Y - - - R/W YES OFF
network
Slave ID#5 status on ELC Link
M1364 Y Y Y Y - - - R/W YES OFF
network
Slave ID#6 status on ELC Link
M1365 Y Y Y Y - - - R/W YES OFF
network

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 79
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2- OFF STOP RUN

ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP
Slave ID#7 status on ELC Link
M1366 Y Y Y Y - - - R/W YES OFF
network
Slave ID#8 status on ELC Link
M1367 Y Y Y Y - - - R/W YES OFF
network
Slave ID#9 status on ELC Link
M1368 Y Y Y Y - - - R/W YES OFF
network
Slave ID#10 status on ELC Link
M1369 Y Y Y Y - - - R/W YES OFF
network
Slave ID#11 status on ELC Link
M1370 Y Y Y Y - - - R/W YES OFF
network
Slave ID#12 status on ELC Link
M1371 Y Y Y Y - - - R/W YES OFF
network
Slave ID#13 status on ELC Link
M1372 Y Y Y Y - - - R/W YES OFF
network
Slave ID#14 status on ELC Link
M1373 Y Y Y Y - - - R/W YES OFF
network
Slave ID#15 status on ELC Link
M1374 Y Y Y Y - - - R/W YES OFF
network
Slave ID#16 status on ELC Link
M1375 Y Y Y Y - - - R/W YES OFF
network
Indicating Slave ID#1 data
M1376 Y Y Y Y OFF - - R NO OFF
transaction status on ELC Link
Indicating Slave ID#2 data
M1377 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#3 data
M1378 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#4 data
M1379 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#5 data
M1380 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#6 data
M1381 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#7 data
M1382 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#8 data
M1383 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#9 data
M1384 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#10 data
M1385 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#11 data
M1386 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#12 data
M1387 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#13 data
M1388 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#14 data
M1389 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#15 data
M1390 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
Indicating Slave ID#16 data
M1391 transaction status on ELC Link Y Y Y Y OFF - - R NO OFF
M1392 Slave ID#1 linking error Y Y Y Y OFF - - R NO OFF
M1393 Slave ID#2 linking error Y Y Y Y OFF - - R NO OFF
M1394 Slave ID#3 linking error Y Y Y Y OFF - - R NO OFF
M1395 Slave ID#4 linking error Y Y Y Y OFF - - R NO OFF
M1396 Slave ID#5 linking error Y Y Y Y OFF - - R NO OFF
M1397 Slave ID#6 linking error Y Y Y Y OFF - - R NO OFF
M1398 Slave ID#7 linking error Y Y Y Y OFF - - R NO OFF
M1399 Slave ID#8 linking error Y Y Y Y OFF - - R NO OFF
M1400 Slave ID#9 linking error Y Y Y Y OFF - - R NO OFF
M1401 Slave ID#10 linking error Y Y Y Y OFF - - R NO OFF
M1402 Slave ID#11 linking error Y Y Y Y OFF - - R NO OFF

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 80
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2- OFF STOP RUN

ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP
M1403 Slave ID#12 linking error Y Y Y Y OFF - - R NO OFF
M1404 Slave ID#13 linking error Y Y Y Y OFF - - R NO OFF
M1405 Slave ID#14 linking error Y Y Y Y OFF - - R NO OFF
M1406 Slave ID#15 linking error Y Y Y Y OFF - - R NO OFF
M1407 Slave ID#16 linking error Y Y Y Y OFF - - R NO OFF
Indicating reading from Slave ID#1 is
M1408 Y Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#2 is
M1409 Y Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#3 is
M1410 Y Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#4 is
M1411 Y Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#5 is
M1412 Y Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#6 is
M1413 Y Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#7 is
M1414 Y Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#8 is
M1415 Y Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#9 is
M1416 Y Y Y Y OFF - - R NO OFF
completed
Indicating reading from Slave ID#10
M1417 Y Y Y Y OFF - - R NO OFF
is completed
Indicating reading from Slave ID#11
M1418 Y Y Y Y OFF - - R NO OFF
is completed
Indicating reading from Slave ID#12
M1419 Y Y Y Y OFF - - R NO OFF
is completed
Indicating reading from Slave ID#13
M1420 Y Y Y Y OFF - - R NO OFF
is completed
Indicating reading from Slave ID#14
M1421 Y Y Y Y OFF - - R NO OFF
is completed
Indicating reading from Slave ID#15
M1422 Y Y Y Y OFF - - R NO OFF
is completed
Indicating reading from Slave ID#16
M1423 Y Y Y Y OFF - - R NO OFF
is completed
Indicating writing to Slave ID#1 is
M1424 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#2 is
M1425 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#3 is
M1426 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#4 is
M1427 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#5 is
M1428 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#6 is
M1429 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#7 is
M1430 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#8 is
M1431 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#9 is
M1432 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#10 is
M1433 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#11 is
M1434 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#12 is
M1435 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#13 is
M1436 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#14 is
M1437 Y Y Y Y OFF - - R NO OFF
completed

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 81
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2- OFF STOP RUN

ELC2- ELC2 Factory
SM Function -PH PC    Type Latched
PB -PA setting
-PA -PE ON RUN STOP
Indicating writing to Slave ID#15 is
M1438 Y Y Y Y OFF - - R NO OFF
completed
Indicating writing to Slave ID#16 is
M1439 Y Y Y Y OFF - - R NO OFF
completed
Auto-reset Y2 when high speed pulse
M1524 Y Y Y Y OFF - - R/W NO OFF
output completes
Auto-reset Y3 when high speed pulse
M1525 Y Y Y Y OFF - - R/W NO OFF
output completes
Y0 being able to designate
M1534 deceleration time. Has to be used Y Y Y Y OFF - - R/W NO OFF
with D1348
Y2 being able to designate
M1535 deceleration time. Has to be used Y Y Y Y OFF - - R/W NO OFF
with D1349
M1538 Indicating pause status of Y0 Y Y Y Y OFF OFF - R/W NO OFF
M1539 Indicating pause status of Y1 Y Y Y Y OFF OFF - R/W NO OFF
M1540 Indicating pause status of Y2 Y Y Y Y OFF OFF - R/W NO OFF
M1541 Indicating pause status of Y3 Y Y Y Y OFF OFF - R/W NO OFF
The absolute position of Delta
V2.6
M1580 ASDA-A2 servo is read successfully V3.2 - V2.4 OFF OFF OFF R/W NO OFF
V1.4
by means of the instruction DABSR.
The absolute position of Delta
ASDA-A2 servo is not read V2.6
M1581 V3.2 - V2.4 OFF OFF OFF R/W NO OFF
successfully by means of the V1.4
instruction DABSR.
If the left limit switch of CH0 is
enabled, it can be triggered either by
a rising-edge signal or by a V2.8
M1584 V3.2 V3.0 V2.6 OFF OFF - R/W NO OFF
falling-edge signal. (OFF: V1.4
Rising-edge signal; ON: Falling-edge
signal)
If the left limit switch of CH1 is
enabled, it can be triggered either by
a rising-edge signal or by a V2.8
M1585 V3.2 V3.0 V2.6 OFF OFF - R/W NO OFF
falling-edge signal. (OFF: V1.4
Rising-edge signal; ON: Falling-edge
signal)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 82
2 . P r o g r a m m i n g C o n c e p ts

2.13 S Relay
Initial step relay Starting instruction in Sequential Function Chart (SFC).
Zero return step relay Returns to zero point when using IST instruction in program. Zero
return step relays not used for IST instruction can be used as
general step relays.
General purpose step relay S20 ~ S511, total 492 points (for ELC-PA controllers); S20 ~ S499,
total 480 points (for ELC-PV, ELC2-PV controllers); S128 ~ S911,
total 784 points (for ELCM-PH/PA, ELC2-PB/PH/PA/PE
controllers). General relays in sequential function chart (SFC).
They will be cleared if power is lost after running.
Latched step relay S512 ~ S895, total 384 points (for ELC-PA controllers); S20 ~
S127, total 108 points (for ELCB-PB, ELCM-PH/PA,
ELC2-PB/PH/PA/PE controllers); S500 ~ S899, total 400 points
(for ELC-PV, ELC2-PV controllers). In sequential function chart
(SFC), latched step relay will be saved when power is lost after
running. The state of power on after power is lost will be the same
as the state before power loss.
Alarm step relay S896 ~ S1023, total 128 points (for ELC-PA controllers); S900 ~
S1023, total 124 points (for ELC-PV, ELC2-PV controllers); S912
~ S1023, total 112 points (for ELCM-PH/PA, ELC2-PB/PH/PA/PE
controllers). The step relay for alarm uses with alarm drive
instruction ANS to the contact for alarm. It is used to record
warnings and eliminate external malfunctions.

2.14 T (Timer)
The timer increment in units of 1ms, 10ms and 100ms and the counting method is counting up.
When the present value in the timer equals the set value, the associated output coil will be ON. The
set value should be a K value in decimal and can be specified by the content of data register D.

The actual set time of the timer = timer resolution × set value
Ex: If the set value is K200 and timer resolution is 10ms, the actual set time in the timer will be 10ms
* 200 = 2000ms = 2 sec.
General Timer
For ELC-PA, ELCB-PB, ELCM-PH/PA, and ELC2- PB/PH/PA/PE controllers: The timer executes
once when the program reaches END instruction. When TMR instruction is executed, the timer coil
will be ON when the timing reaches its preset value.
For ELC-PV and ELC2-PV controllers: The timer executes once when the program reaches TMR
instruction. When TMR instruction is executed, the timer coil will be ON when the timing reaches its
preset value.
When X0 = ON, TMR instruction is driven. When current value reaches K100, the associated timer
contact, T0, turns ON to drive output Y0. If X0 = OFF or the power is off, the current value in T0
will be cleared as 0 and output Y0 driven by contact T0 will be OFF.
X0
TMR T0 K100

T0
Y0 10 sec

X0
K100
present
T0 value

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 83
2 . P r o g r a m m i n g C o n c e p ts

Accumulative Timer
For ELC-PA, ELCB-PB, ELCM-PH/PA, and ELC2-PB/PH/PA/PE controllers: The timer executes
once when the program reaches END instruction. When TMR instruction is executed, the timer coil
will be ON when the current value reaches its preset value. For accumulative timers, current value
will not be cleared when timing is interrupted.
For ELC-PV, ELC2-PV controllers: The timer executes once when the program reaches TMR
instruction. When TMR instruction is executed, the timer coil will be ON when the timing reaches its
preset value.
Timer T250 will begin timing when X0=ON. If T250 has not reached its preset value by the time
X0=OFF, then T0 will pause. When X0=ON, T250 will resume timing from where it was paused.

X0
TMR T250 K100

T250
Y0

T1 T2 T1+T2=10sec

X0
K100
present
T250 value

Timers for Subroutines and Interrupts

Timers for subroutines and interrupts count once when END instruction is met. The associated
output coils will be ON if the set value is achieved when End instruction executes. Timers
T192~T199 (ELC-PA/PV, ELC2-PV controllers), T184~T199 (ELCM-PH/PA, ELC2-PB/PH/PA/PE
controllers) are the only timers that can be used in a subroutine or interrupt. Generals timers used
in subroutines and interrupts will not work if the subroutines or interrupts are not executing.

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2 . P r o g r a m m i n g C o n c e p ts

2.15 C (Counter)
Counters will increment their present count value when the input signal transitions from OFFON.
Item 16 bits counters 32 bits counters
Type General General High speed
C235~C238, C241,
ELCB-PB C242, C244, C246,
C0~C127 - -
Counters C247, C249, C251,
C252, C254
C235~C242, C244,
ELC-PA
C0~C199 C200~C234 C246, C247, C249, -
Counters
C251~C254
ELC-PV, C235~C244,
ELC2-PV C0~C199 C200~C234 C246~C249, -
Counters C251~C254
ELCM-PH/PA C232~C242,
C0~C199 C200~C231 C243, C244
Counters C245~C254
ELC2-PB/
C233~C242
PH/PA C0~C199 C200~C232 C243, C244
C245~C254
Counters
C233~C242
ELC2-PE
C0~C199 C200~C231 C245~C248 C243, C244
Counters
C251~C254
Count
Count up Count up/down Count up
direction
Range 0~32,767 -2,147,483,648~+2,147,483,647 0~2,147,483,647
Constant K or
Preset value
data register D Constant K or data register D (Dword)
register
(Word)
Counter will keep
on counting when
Counter will keep on counting when preset value is
Counter will
preset value reached. The count value reached. The
Output stop when
will become count value will
operation preset value
-2,147,483,648 if one more count is become 0 if one
reached
added to +2,147,483,647 more count is
added to
+2,147,483,647
Output Coil Output coil is ON
Output coil is ON when counter
Output will be ON when counter
reaches or is above preset value.
contact when counter reaches or is
Output coil is OFF when counter is
function reaches above preset
below preset value.
preset value. value
Associated devices
are activated
High speed
- - immediately when
comparison
preset value is
reached
The present value will reset to 0 when RST instruction is executed, output coil
Reset action
will be OFF.
Update During every During every Immediate – update is independent of
method scan scan scan time.

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2 . P r o g r a m m i n g C o n c e p ts

Example:
LD X0
X0
RST C0 RST C0
LD X1 X1
CNT C0 K5
CNT C0 K5
C0
LD C0 Y0
OUT Y0

When X0=ON, RST instruction will X0

reset C0. When X1 transitions
OFFON, C0 will count up (add 1).
When C0 reaches the preset value X1
K5, C0 output coil Y0 will = ON and
C0 will stop counting and ignore the 5
4
X1 trigger signal. C0 3
settings
present 2
value 1
0 0

Contacts Y0, C0

M relays M1200 ~ M1255 are used to set the up/down count direction for C200 ~ C255 respectively.
Setting the corresponding M relay ON will set the counter to count down.
Example:
LD X10
X10
OUT M1200 M1200
LD X11 X11
RST C200 RST C200
X12
LD X12
DCNT C200 K-5
CNT C200 K-5
C200
LD C200 Y0
OUT Y0

1. X10 drives M1200 to determine counting direction (up / down) of C200

2. When X11 goes from OFF to ON, RST instruction will be executed and the present value in
C200 will be cleared and contact C200 is OFF.
3. When X12 goes from OFF to ON, present value of C200 will count up (plus 1) or count down
(minus 1).
4. When present value in C200 changes from K-6 to K-5, the contact C200 will be energized.
5. When present value in C200 changes from K-5 to K-6, the contact of C200 will be reset.
6. If the MOV instruction is applied through ELCSoft to designate a value bigger than the set
value to the present value register of C0, next time when X1 goes from OFF to ON, the contact
C0 will be ON and present value of C0 will equal setting value.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 86
2 . P r o g r a m m i n g C o n c e p ts

Accumulatively Accumulatively
X10 increasing Progressively increasing
decreasing
X11

X12
5
4 4
3 3
2 2
present value 1 1
in C200 0 0 0
-1
-2
-3 -3
-4 -4
-5 -5
When the output contact -6 -6
was On. -7 -7
Contacts -8
Y0, C0

2.16 High-speed Counters

ELC- PA, ELCB-PB:
ELC High-speed counters can be 1-phase or 2 phases and can count up to a frequency of 20KHz.
The table below displays the relation to inputs X0-X5, X10-X11, and counters C235-C255.
(ELCB-PB: X0-X3, ELC-PA: X0-X5, ELC-PH: X0-X5, X10, X11). ELC-PA: C253 (2 phase input)
High-speed counter can count up to a frequency of 20KHz.
1-phase input 1-phase 2 inputs 2-phase inputs
C235 C236 C237 C238 C239 C240 C241 C242 C243 C244 C245 C246 C247 C249 C250 C251 C252 C253 C254 C255
X0 U/D U/D U/D U U U A A B A
X1 U/D R R D D D B B A B
X2 U/D U/D R R R R
X3 U/D R S S S
X4 U/D
X5 U/D
X10 U/D U A
X11 U/D D B
Maximum Count Frequency for each counter (Unit: kHz)
PB 20 20 10 10 - - 20 10 - 20 - 20 20 20 - 5 5 - 5 -
PA 20 20 10 10 - - 20 10 - 20 - 20 20 20 - 5 5 20 5 -
U: Increasing A: A phase input S: Start input
D: Decreasing B: B phase input R: Clear input

Input X5 has two functions:

M1260=OFF C240 is general U/D high-speed counter.
M1260=ON It is Global reset for C235~C239.
Counting mode selection
The high-speed counter uses special D1022 in 2-phase inputs counting mode to select double
frequency mode. D1022 content will be loaded in at the first scan time when the ELC switches from
STOP to RUN.
D1022 Functions
D1022 Double frequency setting of counter counting method
D1022=K1 Normal frequency mode
D1022=K2 Double frequency mode (factory setting)
D1022=K4 Four times frequency mode

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 87
2 . P r o g r a m m i n g C o n c e p ts

Double frequency mode (↑,↓ means the action of counting)

Counting
Wave for counting mode
mode

A-phase

frequency)
1 (normal
B-phase counting down
counting up
2 (double frequency)

A-phase

2-phas B-phase
e
inputs
counting down
counting up
4 (four times frequency)

A-phase

B-phase

counting down
counting up

ELC-PV and ELC2-PV:

ELC-PV, ELC2-PV supports high speed counters. C235 ~ C240 are program-interruption 1-phase
high speed counter with a total bandwidth of 20kHz, can be used alone with a counting frequency of
up to 10kHz. C241 ~ C254 are hardware high speed counter (HHSC). There are four HHSC in
ELC-PV, HHSC0 ~ 3. The pulse input frequency of HHSC0 ~ 3 of the ELC-PV, ELC2-PV can reach
200kHz, among which:
 C241, C246 and C251 share HHSC0
 C242, C247 and C252 share HHSC1
 C243, C248 and C253 share HHSC2
 C244, C249 and C254 share HHSC3
1. Every HHSC can only be designated to one counter by DCNT instruction.
2. There are three counting modes in every HHSC (see the table below):
a) 1-phase 1 input refers to “pulse/direction” mode.
b) 1-phase 2 inputs refers to “clockwise/counterclockwise (CW/CCW)” mode.
c) 2-phase 2 inputs refers to “A-B phase” mode.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 88
2 . P r o g r a m m i n g C o n c e p ts

Counter Program-interruption
Hardware high speed counter
type high speed counter
1-phase 1 input 1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs
Type
C235 C236 C237 C238 C239 C240 C241 C242 C243 C244 C246 C247 C248 C249 C251 C252 C253 C254
X
X0 U/D U/D U A
X1 U/D D B
X2 U/D R R R
X3 U/D S S S
X4 U/D U/D U A
X5 U/D D B
X6 R R R
X7 S S S
X10 U/D U A
X11 D B
X12 R R R
X13 S S S
X14 U/D U A
X15 D B
X16 R R R
X17 S S S
Maximum Count Frequency for each counter (Unit: kHz)
PV 10 10 10 10 10 10 200 200 20 20 200 200 20 20 200 200 20 20
U: Progressively increasing A: A phase input S: Input started
input
B: Progressively decreasing B: B phase input R: Input cleared
input

3. System structure of the hardware high speed counters:

a) HHSC0 ~ 3 have reset signals and start signals from external inputs. Settings in M1272,
M1274, M1276 and M1278 are reset signals of HHSC0, HHSC1, HHSC2 and HHSC3.
Settings in M1273, M1275, M1277 and M1279 are start signals of HHSC0, HHSC1, HHSC2
and HHSC3.
b) If the external control signal inputs of R and S are not in use, you can set
M1264/M1266/M1268/M1270 and M1265/M1267/M1269/M1271 as True and disable the
input signals. The corresponding external inputs can be used again as general input points
(see the figure below).
c) When special M is used as a high speed counter, the inputs controlled by START and
RESET will be affected by the scan time.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 89
2 . P r o g r a m m i n g C o n c e p ts

HHSC 0 HHSC1 HHSC2 HHSC3 U/D Present value in counter Counting reaches set value
Counting pulses U HHSC0
X0 X4 X10 X14
A
HHSC1
HHSC 0 HHSC1 HHSC2 HHSC3 Comparator 8 set values
HHSC2
X5 Counting pulses D
X1 X11 X15
B HHSC3

DHSCS occupies 1 group of set values

HHSC 0 HHSC1 HHSC2 HHSC3 Output reaches DHSCR occupies 1 group of set values
Counting up/down comparative value DHSCZ occupies 2 groups of set values
D 1225 D 1226 D 1227 D 1228 Select counting m odes monitoring flag for outputs
Set values 1 ~ 4 indicate
Mode 1 ~ 4 (1 ~ 4 times frequency)

High-speed Output reaches

HHSC 0 HHSC1 HHSC2 HHSC3 U /D mode setup flag HHSC 0 M1246 M1251 comparative
instruction comparative value
C241 C 242 C 243 C 244 HHSC 1 M1247 M1252
M1241 M1242 M1243 M1244 DHSCS SET/RESET
HHSC 2 M1248 M1253 DHSCR I 010 ~ I 060 clear
the present value
HHSC 0 HHSC1 HHSC2 HHSC3 HHSC 3 M1249 M1254 DHSCZ
X2 X6 X12 X16
AND Reset signal R Interruption forbidden flag
M1264 M1266 M1268 M1270 OR
I 010 M1289
I 020 M1290
I 030 M1291
M1272 M1274 M1276 M1278
I 040 M1292
I 050 M1293
HHSC 0 HHSC1 HHSC2 HHSC3 I 060 M1294
X3 X7 X13 X17
AND Start signal S
M1265 M1267 M1269 M1271 OR

M1273 M1275 M1277 M1279

4. Counting modes:
The counting modes of the hardware high-speed counters in the ELC-PV, ELC2-PV can be set
in D1225 ~ D1228.
Counting modes Wave pattern
Set value in special
Type Counting up(+1) Counting down(-1)
D
1 U/D

1-phase (Normal frequency) U/D FLAG

1 input 2 U/D

(Double frequency) U/D FLAG

1 U

1-phase (Normal frequency) D

2 inputs 2 U

(Double frequency) D

1 A

2-phase (Normal frequency) B

2 inputs 2 A

(Double frequency) B

3 A

2-phase (Triple frequency) B

2 inputs 4 A

(4 times frequency) B

ELCM-PH/PA, ELC2-PB/PA/PH/PE:
There are two types of high speed counters provided by ELCM-PH/PA including Software High
Speed Counter (SHSC) and Hardware High Speed Counter (HHSC). The same Input point (X) can
be designated with only one high speed counter. Double designation on the same input or the same
counter will result in syntax error when executing DCNT instruction.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 90
2 . P r o g r a m m i n g C o n c e p ts

Applicable Software High Speed Counters:

1-phase input 2 phase 2 input
C *2
C235 C236 C237 C238 C239 C240 C241 C242 C232 C233 C234
X
X0 U/D A
X1 U/D
X2 U/D B
X3 U/D
X4 U/D A
X5 U/D B
X6 U/D A
X7 U/D B
R/F*3 M1270 M1271 M1272 M1273 M1274 M1275 M1276 M1277 - - -
*1
U/D M1235 M1236 M1237 M1238 M1239 M1240 M1241 M1242 - - -
Maximum Count Frequency for each counter (Unit: kHz)
ELCM 10 10 10 10 10 10 10 10 15 5 5
ELC2 10 10 10 10 10 10 10 10 15 5 5

U: Count up D: Count down A: Phase A input B: Phase B input

Note:
1. U/D (Count up/Count down) can be specified by special M. OFF = count up; ON = count down.
2. ELC2-PB/ PH/PE does not support a two-phase two-input counter (C232 with the input points
X0 and X2).
3. R/F (Rising edge trigger/ Falling edge trigger) can also be specified by special M. OFF =
Rising; ON = Falling.
4. SHSC supports max 10kHz input pulse on single point. Max. 8 counters are applicable in the
same time.
5. For 2-phase 2-input counting, (X4, X5) (C233) and (X6, X7) (C234), max 5kHz. (X0,X2) (C232),
max 15kHz.
6. 2-phase 2-input counting supports double and 4 times frequency, which is selected in D1022
as the table in next page.
Applicable Hardware High Speed Counters:
1-phase
1-phase 2-input 2-phase 2-input
C input
*2 *2
X C243 C244 C245 C246 C247 C248 C249 C250 C251 C252 C253 C254
X0 U U/D U/D U U A A
X1 R Dir Dir D D B B
X2 U U/D U/D A A
X3 R Dir Dir B B
X4 R R R
X5 R R
Maximum Count Frequency for each counter (Unit: kHz)
ELCM 100 100 100 100 10 10 100 100 5 5 5 5
ELC2-PB 20 20 20 20 10 10 20 20 5 5 5 5
ELC2-PA 100 100 100 100 10 10 100 100 5 5 5 5
ELC2-PC 100 100 100 100 100 100 100 100 50 50 5 5
ELC2-PE 100 100 100 100 100 100 -- -- 50 50 5 5
U: Count up A: Phase A input Dir: Direction signal input
D: Count down B: Phase B input R: Reset signal input

Note:
1. The max frequency of the 1-phase input counters X0 (C243) and X2 (C244) is 100kHz on
ELCM-PH/ PA, ELC2-PC/PA and 20kHz on ELC2-PB.
2. ELC2-PE does not support the counters C249 and C250.
3. 2-phase 2-input counting supports double and 4 times frequency, which is selected in D1022
as the table in next page. Please refer to the below table for detailed counting wave form.
D1022 Counting mode

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 91
2 . P r o g r a m m i n g C o n c e p ts

D1022 Counting mode

B
K2
(Double Frequency)
dow
nt n co
u unt
up co

B
K4 or other value
(4 times frequency)
(Default) do
wn
c ou
unt nt
co
up

4. ELCM-PH/PA, version 1.0 did not support the single frequency mode. The ELCM version 2.0
and other ELC2 series support the three modes.
5. C243 and C244 support count-up mode only and occupy the associate input points X1 and X3
as reset (“R”) function. If users do not need to apply reset function, set ON the associated
special M relays (M1243 and M1244) to disable the reset function.
6. “Dir” refers to direction control function. OFF indicates counting up; ON indicates counting
down.
7. When X1, X3, X4 and X5 is applied for reset function and associated external interrupts are
disabled, users can define the reset function as Rising/Falling-edge triggered by special M
relays
Reset Function X1 X3 X4 X5
R/F M1271 M1273 M1274 M1275
8. When X1, X3, X4 and X5 is applied for reset function and external interrupts are applied, the
interrupt instructions have the priority in using the input points. In addition, the ELC will move
the current data in the counters to the associated data registers below then reset the counters.
Special D D1241, D1240 D1243, D1242
Counter C243 C246 C248 C252 C244 C250 C254
External Interrupt X1 X4 X3 X5
Example:

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EI
M1000
DCNT C243 K100

FEND
M1000
I101 DMOV D1240 D0

IRET

END

When C243 is counting and external interrupt is triggered from X1(I101), counted value in C243 will
be move to (D1241, D1240) immediately then C243 is reset. After this interrupt I101 executes.

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1-phase inputs high-speed counter:

Example:
LD X20 X20
RST C241 RST C241

LD X21 X21
OUT M1241 M1241

LD X22 X22
DCNT C241 K5
DCNT C241 K5
C241
LD C241
Y0
OUT Y0

X21 drives M1241 to decide C241 is addition or subtraction.

When X20=ON and RST instruction is executed, clear C241 to 0 and reset output contact to off.
When X22=ON, C241 receives count signal from X0 and counter will count up (+1) or count down
(-1).
When counter C241 attains settings K5, C241 will be ON. If there is still signal input for X0, it will
keep on counting.
C241 in ELCB-PB and ELC-PA controllers has external input signals to reset X1.
C241 in ELC-PV, ELC2-PV controllers has external input signals to reset X2 and start X3.
The external input contact of reset signal of C241 (HHSC0) in ELC-PV, ELC2-PV controllers is
disabled by M1264. The external input contact of start signal is disabled by M1265.
The internal input contact of reset signal of C241 (HHSC0) in ELC-PV, ELC2-PV controllers is
disabled by M1272. The internal input contact of start signal is disabled by M1273.
The counting modes (normal frequency or double frequency) of C246 (HHSC0) in ELC-PV,
ELC2-PV controllers can be set up by D1225. The default setting is double frequency mode.
counting down
X21,M1241 contact counting up

X20

X22

C241
present 7
value 6 6
5 5
4 4
3 3
2
1
0

Y0, C241 contact

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1-phase 2 inputs high-speed counters:

Example:
LD X20 X20
RST C247 RST C247
LD X21 X21
DCNT C247 K5
DCNT C247 K5
C247
LD C247
Y0
OUT Y0

When X20=ON and RST instruction is executed, clear C247 to 0 and reset output contact to off.
When X21=ON, ELCB-PB and ELC-PA controllers C247 receives count signal from X0 input
terminal and counter will count up (+1) or receive count signal from X1 input terminal and counter
will count down (-1). ELC-PV, ELC2-PV controllers C247 receives count signal from X4 input
terminal and counter will count up (+1) or receive count signal from X5 input terminal and counter
will count down (-1).
When C247 attains settings K5, C247 will be on. After C247 is ON, if there is counter pulse input,
C247 will keep on counting.
C247 in ELCB-PB, ELC-PA controllers has external input signals to reset X2.
C247 in ELC-PV, ELC2-PV controllers has external input signals to reset X6 and start X7.
The counting modes (normal frequency or double frequency) of C247 (HHSC1) in ELC-PV,
ELC2-PV controllers can be set up by D1226. The default setting is double frequency mode.
The external input contact of reset signal of C247 (HHSC1) in PV controllers is disabled by M1266.
The external input contact of start signal is disabled by M1267.
The internal input contact of reset signal of C247 (HHSC1) in ELC-PV, ELC2-PV controllers is
disabled by M1274. The internal input contact of start signal is disabled by M1275.
X20

X21

X0(X4)
count up
X1(X5)
count down
C247
present 7
value 6 6
5 5
4 4
3 3
2
1
0
Y0, C247 contact

2-phase AB input high-speed counter:

Example:
LD X20 X20
RST C251 RST C251

LD X21 X21
DCNT C251 K5
DCNT C251 K5
C251
LD C251 Y0
OUT Y0

When X20=ON, RST instruction is executed and resets C251 to 0, output contact is reset to off.

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C251 receives A phase counting signal of X0 input terminal and B phase counting signal of X1 input
terminal to execute add 1 (count up) or subtract 1 (count down) when X21=on.
When counter C251 attains settings K5, C251 contact will be ON. After C251 is ON, if there is
counter pulse input, C251 will keep on counting.
In ELCB-PB and ELC-PA controllers frequency can be set to normal, double frequency or four times
frequency by D1022 (counting mode setting). Factory setting is double frequency.
C251 in ELC-PV, ELC2-PV controllers has external input signals to reset X2 and start X3.
The counting modes (normal frequency, double frequency, triple frequency or 4 times frequency) of
C251 (HHSC0) in ELC-PV, ELC2-PV controllers can be set up by D1225. The default setting is
double frequency mode.
The external input contact of reset signal of C246 (HHSC0) in ELC-PV, ELC2-PV controllers is
disabled by M1264. The external input contact of start signal is disabled by M1265.
The internal input contact of reset signal of C246 (HHSC0) in ELC-PV, ELC2-PV controllers is
disabled by M1272. The internal input contact of start signal is disabled by M1273.
ELC-PA, ELCB-PB controllers (Double frequency):
X20

X21

A-phase X0

B-phase X1
6
C251 present value 5 5
4 4
3 3 3
2 2
1 Counting up Counting down 1
0 0

Y0, C251 contact

ELC-PV, ELC2-PV controllers (Double frequency):

X20

X21

A-phase X0

B-phase X1
6
C251 present value 5 5
4 4
3 3
2 2 2
1 Counting up Counting down 1
0 0

Y0, C251 contact

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2.17 Special Data Register

The special registers (special D) are as shown in the following. Please notice that some equipments
with the same number will be different to the different model. In the following chart, the values in the
“Type” column are: “R”: can only read. “R/W”: can read/write. A “-“ means it can do nothing. “#”
means this is a system setting. You can read the detailed explanation of the setting in the manual.
ELCB-PB, ELC-PA, ELC-PV, and ELC2-PV:
OFF STOP RUN
ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
D1000 Watchdog timer (WDT) value (Unit: 1ms) Y Y Y Y 200 - - R/W NO 200
ELC program version (user can read the
ELC program version from this register.
D1001 Y Y Y Y - - - R NO #
For example, D1001 = H XX10 means
version 1.0)
Program capacity
D1002 # -> ELC-PV:15,872; ELC-PA: 7,920; Y Y Y Y # - - R NO #
ELCB-PB: 3,792; ELC2-PV: 30000
Sum of the ELC internal program
memory
D1003 Y Y Y Y - - - R YES #
# -> ELC-PV: -15,873; ELC-PA: -7,920;
ELCB-PB: -3,792; ELC2-PV: -30000
D1004 Grammar detective number Y Y Y Y 0 0 - R NO 0
D1008 STSC address when WDT timer is ON Y Y Y Y 0 - - R NO 0
Number of LV signal occurrence Y Y - - 0 - - R YES 0
D1009
Register for SRAM lost data error code - - Y Y
D1010 Present scan time (Unit: 0.1ms) Y Y Y Y 0 0 0 R NO 0
D1011 Minimum scan time (Unit: 0.1ms) Y Y Y Y 0 0 0 R NO 0
D1012 Maximum scan time (Unit: 0.1ms) Y Y Y Y 0 0 0 R NO 0
0~32,767(unit: 0.1ms) addition type of
D1015 - Y Y Y 0 - - R/W NO 0
high-speed connection timer
D1018 π PI (Low byte) Y Y Y Y 0FDB 0FDB 0FDB R/W NO 0FDB
D1019 π PI (High byte) Y Y Y Y 4049 4049 4049 R/W NO 4049
X0~X7 input filter (unit: ms); modulation
D1020 Y Y Y Y 10 - - R/W NO 10
range: 2~20ms
D1021 X10~X17 input filter (unit: ms) Y - - Y 0 - - R/W NO 0
Double frequency selection for AB
D1022 Y Y - - # - - R/W NO #
phase counter
Storing detected pulse width (unit:
D1023 Y Y - - 0 - - R/W NO 0
0.1ms)
D1025 Communication error code Y Y Y Y 0 - - R NO 0
Pulse number for masking Y0 when
D1026 - - Y Y 0 0 - R/W NO 0
M1156 = ON (Low word)
Pulse number for masking Y0 when
D1027 - - Y Y 0 0 - R/W NO 0
M1156 = ON (High word)
D1028 Index register E0 Y Y Y Y 0 - - R/W NO 0
D1029 Index register F0 Y Y Y Y 0 - - R/W NO 0
D1030 Output numbers of Y0 pulse (Low word) Y Y - - 0 - - R NO 0
D1031 Output numbers of Y0 pulse (High word) Y Y - - 0 - - R NO 0
D1032 Output numbers of Y1 pulse (Low word) Y Y - - 0 - - R NO 0
D1033 Output numbers of Y1 pulse (High word) Y Y - - 0 - - R NO 0
D1035 No. of input point X as RUN/STOP - - Y Y - - - R/W YES 0
COM1 (RS-232) Communications
D1036 Y Y Y Y 0086 - - R/W NO 0086
protocol
D1037 Repetition time of HKY key - - Y Y - - - R/W NO 0
Delay time of data response when ELC
MPU as slave in RS-485
communication, range: 0 ~ 10,000 (unit:
0.1ms)
D1038 Y Y Y Y - - - R/W YES 0
ELC-PA: delay time for sending the next
communication data in ELC LINK (unit
for ELC-PA: 1 scan cycle;
ELC-PV/ELC2-PV: 0.1ms)
D1039 Constant scan time (ms) Y Y Y Y 0 - - R/W NO 0
D1040 ON state number 1 of STEP point S - Y Y Y 0 - - R NO 0
D1041 ON state number 2 of STEP point S - Y Y Y 0 - - R NO 0
D1042 ON state number 3 of STEP point S - Y Y Y 0 - - R NO 0
D1043 ON state number 4 of STEP point S - Y Y Y 0 - - R NO 0

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2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
D1044 ON state number 5 of STEP point S - Y Y Y 0 - - R NO 0
D1045 ON state number 6 of STEP point S - Y Y Y 0 - - R NO 0
D1046 ON state number 7 of STEP point S - Y Y Y 0 - - R NO 0
D1047 ON state number 8 of STEP point S - Y Y Y 0 - - R NO 0
D1049 ON number of alarm point - Y Y Y 0 - - R NO 0
D1050
ELC will automatically convert the ASCII
↓ Y Y Y Y 0 - - R NO 0
data saved in D1070~D1085 to HEX.
D1055
Present value of PA controller analog
D1056 - Y - - 0 - - R NO 0
input channel 0 (CH0)
Present value of PA controller analog
D1057 - Y - - 0 - - R NO 0
input channel 1 (CH1)
Enabling X1 interrupt tp get the counting
D1058 - - - Y 0 0 R NO 0
value of C241 (M1056 is On)-Low word
Enabling X1 interrupt tp get the counting
D1059 - - - Y 0 0 R NO 0
value of C241 (M1056 is On)-High word
D1061 Error record of non-latched area Y - - - - - - R YES 0
D1062 Average times of AD (CH0, CH1): 2~4 - Y - - 2 - - R/W NO 2
ELC flash ROM access function for
program, password and data.
ELC reads flash: H55AA
D1064 - - Y Y 0 - - R/W NO 0
ELC writes flash: HAA55
H55A9/ H99AB/ HA955/ HAB55/ H8888
are added to ELC2-PV.
D1067 Algorithm error code Y Y Y Y 0 0 - R NO 0
D1068 Lock the algorithm error address Y Y Y Y 0 - - R NO 0
When the ELC’s built-in RS-485
communication instruction receives
D1070 feedback signals from receiver. The data
↓ will be saved in the registers Y Y Y Y 0 - - R NO 0
D1085 D1070~D1085. User can use the
contents saved in the registers to check
the feedback data.
ELC-ACPGMXFR
High word of password setting (Display
D1086 Y Y Y Y 0 - - R/W NO 0
by HEX value corresponding to ASCII
word)
ELC-ACPGMXFR
Low word of password setting (Display
D1087 Y Y Y Y 0 - - R/W NO 0
by HEX value corresponding to ASCII
word)
When the ELC built-in RS-485
communication instruction is executed,
D1089
the transmitting signals will be stored in
↓ Y Y Y Y 0 - - R NO 0
the registers D1089~D1099. User can
D1099 use the contents saved in registers to
check the feedback data.
Corresponding status after LV signal is
D1100 - - Y Y 0 - - R/W NO 0
enabled
D1101 Start address of file register - Y Y Y - - - R/W Yes 0
D1102 Copy numbers of file register - Y Y Y - - - R/W Yes 1600
Set start D number for file register to
D1103 store (the number should be large than - Y Y Y - - - R/W Yes 2000
2000)
Parameter index for Accel/Decel pulse
D1104 Y Y - - 0 0 - R/W NO 0
output Y0 (corresponds to device D)
COM3 (RS-485) Communication
D1109 - - Y Y 0086 - - R/W NO 0086
protocol
Average value of the analog input CH0
D1110 When the average time is set to 1, - Y - - 0 - - R NO 0
D1110 indicates the present value.
Average value of the analog input CH
D1111 When the average time is set to 1, - Y - - 0 - - R NO 0
D1111 indicates the present value.
D1116 Analog output channel 0 (CH 0) - Y - - 0 0 0 R/W NO 0
D1117 Analog output channel 1 (CH 1) - Y - - 0 0 0 R/W NO 0

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2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
Sampling time of analog/digital
conversion. Default: 5. Unit: 1ms.
D1118 - Y - - 5 - - R/W NO 5
Sampling time will be regarded as 5ms if
D1118≦5
COM2 (RS-485) communication
D1120 Y Y Y Y 0086 - - R/W NO 0086
protocol
ELC communication address (the
D1121 address that save the ELC Y Y Y Y - - - R/W Yes 1
communication address)
D1122 Residual words of transmitting data Y Y Y Y 0 0 - R NO 0
D1123 Residual words of receiving data Y Y Y Y 0 0 - R NO 0
D1124 Start character definition (STX) Y Y Y Y 003A - - R/W NO 003A
D1125 First ending character definition (ETX1) Y Y Y Y 000D - - R/W NO 000D
Second ending character definition
D1126 Y Y Y Y 000A - - R/W NO 000A
(ETX2)
RS instruction, interrupt request when
Y - - - 0 - - R/W NO 0
receiving specified data character (I150)
D1127
Number of pulses for ramp-up operation
- - Y Y 0 - - R NO 0
of positioning instruction (Low word)
Number of pulses for ramp-up operation
D1128 - - Y Y 0 - - R NO 0
of positioning instruction (High word)
D1129 RS-485 time-out setting (ms) Y Y Y Y 0 - - R/W NO 0
D1130 MODBUS return error code record Y Y Y Y 0 - - R NO 0
Low 16 bytes of high-speed counter
- Y - - 0 - - R NO 0
value extracted by interruption I501
D1131
Input/output percentage value of
- - Y Y 100 - - R/W NO 100
CH0(Y0,Y1) close loop control
High 16 bytes of high-speed counter
- Y - - 0 - - R NO 0
value extracted by interruption I501
D1132
Input/output percentage value of
- - Y 100 - - R/W NO 100
CH1(Y2,Y3) close loop control
Special high-speed pulse output Y0
- Y - - 0 - - R/W NO 0
(50KHz) register (D) index
D1133 Number of pulses for ramp-down
operation of positioning instruction (Low - - Y Y 0 - - R NO 0
word)
Number of pulses for ramp-down
D1134 operation of positioning instruction (High - - Y Y 0 - - R/W NO 0
word)
Pulse number for masking Y2 when
D1135 - - - Y 0 0 - R/W NO 0
M1158 = ON (Low word)
Pulse number for masking Y2 when
D1136 - - - Y 0 0 - R/W NO 0
M1158 = ON (High word)
D1137 Address of operator error occurs Y Y Y Y 0 0 - R NO 0
Special expansion module number,
D1140 Y Y Y Y 0 - - R NO 0
maximum is 8 modules
D1142 Input points (X) of expansion module Y Y Y Y 0 - - R NO 0
D1143 Output points (Y) of expansion module Y Y Y Y 0 - - R NO 0
The instruction DRVI calculates in
advance the value in the data register for - - V2.0 - 0 - - R/W NO 0
Y0.
D1144
Parameter index for Accel/Decel pulse
output Y0 of adjustable slope - Y - - 0 - - R/W NO 0
(corresponds to component D)
Number of left-side special expansion
D1145 - - Y - 0 - - R NO 0
modules (max. 8)
Table count register in multi-group
D1150 setting comparison mode of DHSZ - - Y Y 0 0 0 R NO 0
command
Table counting register for DHSZ
D1151 - - Y Y 0 0 0 R NO 0
multiple set values comparison mode
High word of changed D value for DHSZ
D1152 - - Y Y 0 0 0 R NO 0
instruction
Low word of changed D value for DHSZ
D1153 - - Y Y 0 0 0 R NO 0
instruction
Recommended Interval of accelerated
D1154 time (10~32767 ms) of Accel/Decel - Y - - 200 - - R/W NO 200
pulse output Y0 of adjustable slope

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OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
Pulse number for masking Y4 (Low
- - V2.0 Y 0 0 - R/W NO 0
word)
Recommended Interval of decelerated
time (-1~ -32700 ms) of Accel/Decel - Y - - -1000 - - R/W NO -1000
D1155 pulse output Y0 of adjustable slope
Pulse number for masking Y4 (High
- - V2.0 Y 0 0 - R/W NO 0
word)
Designated special D for RTMU, RTMD
D1156 - - Y Y 0 - - R/W NO 0
instructions (K0)
Designated special D for RTMU, RTMD
D1157 - - Y Y 0 - - R/W NO 0
instructions (K1)
Designated special D for RTMU, RTMD
D1158 - - Y Y 0 - - R/W NO 0
instructions (K2)
Designated special D for RTMU, RTMD
D1159 - - Y Y 0 - - R/W NO 0
instructions (K3)
Designated special D for RTMU, RTMD
- - Y Y 0 - - R/W NO 0
instructions (K4)
D1160
Present pulse output frequency of CH0
- - - V1.4 0 - - R/W NO 0
(Y0/Y1) (Low word)
Designated special D for RTMU, RTMD
- - Y Y 0 - - R/W NO 0
instructions (K5)
D1161
Present pulse output frequency of CH0
- - - V1.4 0 - - R/W NO 0
(Y0/Y1) (High word)
Designated special D for RTMU, RTMD
- - Y Y 0 - - R/W NO 0
instructions (K6)
D1162
Present pulse output frequency of CH1
- - - V1.4 0 - - R/W NO 0
(Y2/Y3) (Low word)
Designated special D for RTMU, RTMD
D1163 - - Y Y 0 - - R/W NO 0
instructions (K7)
Present pulse output frequency of CH1
D1163 - - - V1.4 0 - - R/W NO 0
(Y2/Y3) (High word)
Designated special D for RTMU, RTMD
- - Y Y 0 - - R/W NO 0
instructions (K8)
D1164
Present pulse output frequency of CH2
- - - V1.4 0 - - R/W NO 0
(Y4/Y5) (Low word)
Designated special D for RTMU, RTMD
- - Y Y 0 - - R/W NO 0
instructions (K9)
D1165
Present pulse output frequency of CH2
- - - V1.4 0 - - R/W NO 0
(Y4/Y5) (High word)
Exchange of X10 rising/falling-edge
- Y - - 0 - - R/W NO 0
count modes (for ELC-PH only)
D1166
Present pulse output frequency of CH3
- - - V1.4 0 - - R/W NO 0
(Y6/Y7) (Low word)
Present pulse output frequency of CH3
D1167 - - - V1.4 0 - - R/W NO 0
(Y6/Y7) (High word)
Interruption request (I150) for receiving
D1168 - Y Y Y 0 - - R/W NO 0
specific word in RS instruction (COM2)
Interruption request (I160) for receiving
D1169 - - Y Y 0 - - R/W NO 0
specific length in RS instruction (COM2)
D1170 PC value when executing single step - - Y Y 0 0 0 R NO 0
2-phase pulse output frequency
- Y - - 0 - - R/W NO 0
D1172 (12Hz~20KHz)
X4 speed detecting time setting - - Y Y 0 0 - R/W NO 0
2-phase pulse output mode selection
- Y - - 0 - - R/W NO 0
D1173 (K1and K2)
X4 speed detecting value - - Y Y 0 0 - R/W NO 0
Target number for 2-phase pulse outputs
- Y - Y 0 - - R/W NO 0
D1174 (low 16-bit)
X10 speed detecting time - - Y Y 0 0 - R/W NO 0
Target number for 2-phase pulse outputs
- Y - - 0 - - R/W NO 0
D1175 (high 16-bit)
X10 speed detecting value - - Y Y 0 0 - R/W NO 0
Present output number of 2-phase pulse
D1176 - Y - - 0 - - R/W NO 0
(low 16-bit)
D1176 X14 speed detecting time - - Y Y 0 0 - R/W NO 0
Present output number of 2-phase pulse
- Y - - 0 - - R/W NO 0
D1177 (high 16-bit)
X14 speed detecting value - - Y Y 0 0 - R/W NO 0

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OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
D1178 VR0 Variable resistor value - Y Y Y 0 - - R NO 0
D1179 VR1 Variable resistor value - Y Y Y 0 - - R NO 0
When X2 interruption (I201) occurs,
immediately extracting the low 16 bytes - V1.8 - - 0 0 - R/W NO 0
from X0 high-speed counting value.
D1180
Enabling X2 to get the counting value of
the high-speed counter C241 (M1057 is - - - Y 0 0 - R NO 0
On)(Low word)
When X2 interruption (I201) occurs,
immediately extracting the high 16 bytes - V1.8 - - 0 0 - R/W NO 0
from X0 high-speed counting value.
D1181
Enabling X2 to get the counting value of
the high-speed counter C241 (M1057 is - - - Y 0 0 - R NO 0
On)(High word)
D1182 Index register E1 - Y Y Y 0 - - R/W NO 0
D1183 Index register F1 - Y Y Y 0 - - R/W NO 0
D1184 Index register E2 - Y Y Y 0 - - R/W NO 0
D1185 Index register F2 - Y Y Y 0 - - R/W NO 0
D1186 Index register E3 - Y Y Y 0 - - R/W NO 0
D1187 Index register F3 - Y Y Y 0 - - R/W NO 0
D1188 Index register E4 - - Y Y 0 - - R/W NO 0
D1189 Index register F4 - - Y Y 0 - - R/W NO 0
D1190 Index register E5 - - Y Y 0 - - R/W NO 0
D1191 Index register F5 - - Y Y 0 - - R/W NO 0
D1192 Index register E6 - - Y Y 0 - - R/W NO 0
D1193 Index register F6 - - Y Y 0 - - R/W NO 0
D1194 Index register E7 - - Y Y 0 - - R/W NO 0
D1195 Index register F7 - - Y Y 0 - - R/W NO 0
D1196 Content in the display - Y - - 0 - - R/W NO 0
The refresh time for 7-segment displayer
D1197 - Y - - 5 - - R/W NO 5
(Unit: 100ms)
When X3 interruption (I301) occurs,
immediately extracting the low 16 byte - V1.8 - - 0 - - R NO 0
from X1 high-speed counting value.
D1198
Enabling X3 to get the counting value of
the high-speed counter C241 (M1058 is - - - Y 0 0 - R NO 0
On) (Low word)
When X3 interruption (I301) occurs,
immediately extracting the high 16 byte - V1.8 - - 0 - - R NO 0
from X1 high-speed counting value.
D1199
Enabling X3 to get the counting value of
the high-speed counter C241 (M1058 is - - - Y 0 0 - R NO 0
On) (High word)
Start address of M0~M999 auxiliary
D1200 - Y Y Y - - - R/W Yes 512
relay latched
End address of M0~M999 auxiliary relay
D1201 - Y Y Y - - - R/W Yes 999
latched
Start address of M2000~M4095 auxiliary
D1202 - Y Y Y - - - R/W Yes 2000
relay latched
End address of M2000~M4095 auxiliary
D1203 - Y Y Y - - - R/W Yes 4095
relay latched
Start latched address for 100ms timers
D1204 - - Y Y - - - R/W YES H'FFFF
T0 ~ T199
End latched address for 100ms timers
D1205 - - Y Y - - - R/W YES H'FFFF
T0 ~ T199
Start latched address for 10ms timers
D1206 - - Y Y - - - R/W YES H'FFFF
T200 ~ T239
End latched address for 10ms timers
D1207 - - Y Y - - - R/W YES H'FFFF
T200 ~ T239
Start latched address of 16-bit counter
D1208 - Y Y Y - - - R/W Yes 96
C0~C199
End latched address of 16-bit counter
D1209 - Y Y Y - - - R/W Yes 199
C0~C199
Start latched address of 32-bit counter
D1210 - Y Y Y - - - R/W Yes 216
C200~C234
End latched address of 32-bit counter
D1211 - Y Y Y - - - R/W Yes 234
C200~C234
D1212 Start latched address of 32-bit - Y Y Y - - - R/W Yes 235

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 101
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
high-speed counter C235~C255
End latched address of 32-bit
D1213 - Y Y Y - - - R/W Yes 255
high-speed counter C235~C255
Start latched address of step point
D1214 - Y Y Y - - - R/W Yes 512
S0~S1023
End latched address of step point
D1215 - Y Y Y - - - R/W Yes 895
S0~S1023
Start latched address of register
D1216 - Y Y Y - - - R/W Yes 200
D0~D999
End latched address of register
D1217 - Y Y Y - - - R/W Yes 999
D0~D999
Start latched address of register
D1218 - Y Y Y - - - R/W Yes 2000
D2000~D4999
End latched address of register
D1219 - Y Y Y - - - R/W Yes 4999
D2000~D4999
Phase of the 1st group pulse output CH0
D1220 - - Y Y 0 - - R/W NO 0
(Y0, Y1)
Phase of the 2nd group pulse output
D1221 - - Y Y 0 - - R/W NO 0
CH1 (Y2, Y3)
Time difference between direction signal
and pulse output for the 1st group pulse
D1222 - - Y Y 0 - - R/W NO 0
CH0 (Y0, Y1) in DRVI, DDRVI, DRVA,
DDRVA, PLSV, DPLSV
Time difference between direction signal
and pulse output for the 2nd group pulse
D1223 - - Y Y 0 - - R/W NO 0
CH1 (Y2, Y3) in DRVI, DDRVI, DRVA,
DDRVA, PLSV, DPLSV
D1225 Counting mode of the counter HHSC0 - - Y Y 2 - - R/W NO 2
D1226 Counting mode of the counter HHSC1 - - Y Y 2 - - R/W NO 2
D1227 Counting mode of the counter HHSC2 - - Y Y 2 - - R/W NO 2
D1228 Counting mode of the counter HHSC3 - - Y Y 2 - - R/W NO 2
Phase of the 3rd group pulse output
D1129 - - Y Y 0 - - R/W NO 0
CH2 (Y4, Y5)
Phase of the 4th group pulse output
D1130 - - Y Y 0 - - R/W NO 0
CH3 (Y6, Y7)
Output pulse number for ramp-down
D1232 stop when CH0 mark sensor receives - - Y Y 0 - - R/W NO 0
signals. (Low Word).
Output pulse number for ramp-down
D1233 stop when CH0 mark sensor receives - - Y Y 0 - - R/W NO 0
signals. (High Word).
Output pulse number for ramp-down
D1234 stop when CH1 mark sensor receives - - Y Y 0 - - R/W NO 0
signals (Low Word).
Output pulse number for ramp-down
D1235 stop when CH1 mark sensor receives - - Y Y 0 - - R/W NO 0
signals (High Word).
Output pulse number for ramp-down
D1236 stop when CH2 mark sensor receives - - Y Y 0 - - R/W NO 0
signals (Low Word)
Output pulse number for ramp-down
D1237 stop when CH2 mark sensor receives - - Y Y 0 - - R/W NO 0
signals (High Word)
Output pulse number for ramp-down
D1238 stop when CH3 mark sensor receives - - Y Y 0 - - R/W NO 0
signals (Low Word)
Output pulse number for ramp-down
D1239 stop when CH3 mark sensor receives - - Y Y 0 - - R/W NO 0
signals (High Word)
The low 16 bits of the end frequency of
D1240 CH0 (available when the acceleration - - Y Y 0 0 - R/W NO 0
and the deceleration are separate)
The high 16 bits of the end frequency of
D1241 CH0 (available when the acceleration - - Y Y 0 0 - R/W NO 0
and the deceleration are separate)
D1244 Number of idle speed output from CH0 - - Y Y 0 0 - R/W NO 0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 102
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
in the instruction DCLLM
Number of idle speed output from CH1
D1245 - - Y Y 0 0 - R/W NO 0
in the instruction DCLLM
Number of idle speed output from CH2
D1246 - - Y Y 0 0 - R/W NO 0
in the instruction DCLLM
Number of idle speed output from CH3
D1247 - - Y Y 0 0 - R/W NO 0
in the instruction DCLLM
Communication timeout of COM1
instruction (unit: 1ms; the maximum
value is 50ms; the value less than 50ms
D1249 - - - Y 0 - - R/W NO 0
is count as 50ms.) (Only the instruction
MODRW and RS are supported.) RS: 0
indicates that the timeout is not set.
COM1 (RS-232) communication error
D1250 code (only applicable for MODRW/RS - - - Y 0 - - R/W NO 0
instruction)
MODRW instruction of COM2 (RS-485)
D1256 is built-in. The characters sent during
↓ execution are saved in D1256~D1295. Y Y Y Y 0 - - R NO 0
D1295 User can check according to the content
of these registers.
MODRW instruction of COM2 (RS-485)
D1296
is built-in. The ELC system will convert
↓ Y Y Y Y 0 - - R NO 0
ASCII content of the register to HEX and
D1311 save it in D1296 – D1311.
Number of times the instruction ZRN
D1312 searches for Z phase and the number of - - - Y 0 0 - R/W NO 0
displacement
D1313 Perpetual calendar (RTC) second 00~59 - Y Y Y 0 - - R/W NO 0
D1314 Perpetual calendar (RTC) minute 00~59 - Y Y Y 0 - - R/W NO 0
D1315 Perpetual calendar (RTC) hour 00~23 - Y Y Y 0 - - R/W NO 0
D1316 Perpetual calendar (RTC) day 01~31 - Y Y Y 0 - - R/W NO 1
D1317 Perpetual calendar (RTC) month 01~12 - Y Y Y 0 - - R/W NO 1
D1318 Perpetual calendar (RTC) week 1~7 - Y Y Y 0 - - R/W NO 6
D1319 Perpetual calendar (RTC) year 00~99 - Y Y Y 0 - - R/W NO 0
ID of the 1st right-side expansion
D1320 - - - Y 0 - - R NO 0
module
ID of the 2nd right-side expansion
D1321 - - - Y 0 - - R NO 0
module
ID of the 3rd right-side expansion
D1322 - - - Y 0 - - R NO 0
module
ID of the 4th right-side expansion
D1323 - - - Y 0 - - R NO 0
module
ID of the 5th right-side expansion
D1324 - - - Y 0 - - R NO 0
module
ID of the 6th right-side expansion
D1325 - - - Y 0 - - R NO 0
module
ID of the 7th right-side expansion
D1326 - - - Y 0 - - R NO 0
module
ID of the 8th right-side expansion
D1327 - - - Y 0 - - R NO 0
module
Low word of offset pulse the 1st group
D1328 - - Y Y - - - R/W NO 0
pulses CH0 (Y0, Y1)
High word of offset pulse the 1st group
D1329 - - Y Y 0 - - R/W NO 0
pulses CH0 (Y0, Y1)
Low word of offset pulse the 2nd group
D1330 - - Y Y 0 - - R/W NO 0
pulses CH1 (Y2, Y3)
High word of offset pulse the 2nd group
D1331 - - Y Y 0 - - R/W NO 0
pulses CH1 (Y2, Y3)
Low word of the remaining number of
D1332 pulses of the 1st group pulses CH0 (Y0, - - Y Y 0 - - R NO 0
Y1)
High word of the remaining number of
D1333 pulses of the 1st group pulses CH0 (Y0, - - Y Y 0 - - R NO 0
Y1)
Low word of the remaining number of
D1334 pulses of the 2nd group pulses CH1 (Y2, - - Y Y 0 - - R NO 0
Y3)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 103
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
High word of the remaining number of
D1335 pulses of the 2nd group pulses CH1 (Y2, - - Y Y 0 - - R NO 0
Y3)
Low word of the present value of the 1st
D1336 - - Y Y - - - R YES 0
group pulses CH0 (Y0, Y1)
High word of the present value of the 1st
D1337 - - Y - - - R YES 0
group pulses CH0 (Y0, Y1)
Low word of the present value of the 2nd
D1338 - - Y Y - - - R YES 0
group pulses CH1 (Y2, Y3)
High word of the present value of the
D1339 - - Y Y - - - R YES 0
2nd group pulses CH1 (Y2, Y3)
start/end frequency of the 1st group
D1340 - - Y Y - - - R/W YES 200
pulse output CH0 (Y0, Y1)
D1341 Low word of max. output frequency - - Y Y - - - R YES H’04D0
D1342 High word of max. output frequency - - Y Y - - - R YES 3
Ramp up/down time of the 1st group
D1343 - - Y Y - - - R/W YES 100
pulse output CH0 (Y0, Y1):
Low word of the number of
D1344 compensation pulses of the 1st group - - Y Y - - - R/W YES 0
pulses CH0 (Y0, Y1)
High word of the number of
D1345 compensation pulses of the 1st group - - Y Y - - - R/W YES 0
pulses CH0 (Y0, Y1)
Low word of the number of
D1346 compensation pulses of the 2nd group - - Y Y - - - R/W YES 0
pulses CH1 (Y2, Y3)
High word of the number of
D1347 compensation pulses of the 2nd group - - Y Y - - - R/W YES 0
pulses CH1 (Y2, Y3)
CH0 pulse output. When M1534 = ON, it
D1348 - - Y Y - - - R/W YES 100
refers to the deceleration time
CH1 pulse output. When M1535 = ON, it
D1349 - - Y Y - - - R/W YES 100
refers to the deceleration time
CH2 pulse output. When M1536 = ON, it
D1350 - - Y Y - - - R/W YES 100
refers to the deceleration time
CH3 pulse output. When M1537 = ON, it
D1351 - - Y Y - - - R/W YES 100
refers to the deceleration time
Start/end frequency of the 2nd group
D1352 - - Y Y - - - R/W YES 200
pulse output CH1 (Y2, Y3)
Acceleration/deceleration time of the
D1353 - - Y Y - - - R/W YES 100
2nd group pulse output CH1 (Y2, Y3)
Scan cycle for the ELC link (unit: 1ms)
PS1: The maximum value is K32000
D1354 - - - Y 0 0 0 R NO 0
PS2: K0: The ELC link stops or the first
detection is complete.
Starting reference for Master to read
D1355 - Y Y Y - - - R/W NO 1064
from Slave ID#1
Starting reference for Master to read
D1356 - Y Y Y - - - R/W NO 1064
from Slave ID#2
Starting reference for Master to read
D1357 - Y Y Y - - - R/W NO 1064
from Slave ID#3
Starting reference for Master to read
D1358 - Y Y Y - - - R/W NO 1064
from Slave ID#4
Starting reference for Master to read
D1359 - Y Y Y - - - R/W NO 1064
from Slave ID#5
Starting reference for Master to read
D1360 - Y Y Y - - - R/W NO 1064
from Slave ID#6
Starting reference for Master to read
D1361 - Y Y Y - - - R/W NO 1064
from Slave ID#7
Starting reference for Master to read
D1362 - Y Y Y - - - R/W NO 1064
from Slave ID#8
Starting reference for Master to read
D1363 - Y Y Y - - - R/W NO 1064
from Slave ID#9
Starting reference for Master to read
D1364 - Y Y Y - - - R/W NO 1064
from Slave ID#10
Starting reference for Master to read
D1365 - Y Y Y - - - R/W NO 1064
from Slave ID#11

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 104
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
Starting reference for Master to read
D1366 - Y Y Y - - - R/W NO 1064
from Slave ID#12
Starting reference for Master to read
D1367 - Y Y Y - - - R/W NO 1064
from Slave ID#13
Starting reference for Master to read
D1368 - Y Y Y - - - R/W NO 1064
from Slave ID#14
Starting reference for Master to read
D1369 - Y Y Y - - - R/W NO 1064
from Slave ID#15
Starting reference for Master to read
D1370 - Y Y Y - - - R/W NO 1064
from Slave ID#16
Time unit of PWM Y0 pulse output when
D1371 - - Y Y 1 - - R/W NO 1
M1070=ON
Time unit of PWM Y2 pulse output when
D1372 - - Y Y 1 - - R/W NO 1
M1071=ON
Time unit of PWM Y4 pulse output when
D1373 - - Y Y 1 - - R/W NO 1
M1530=ON
Time unit of PWM Y6 pulse output when
D1374 - - Y Y 1 - - R/W NO 1
M1531=ON
Low word of the present value of the 3rd
D1375 - - Y Y - - - R/W YES 0
group pulses CH2 (Y4, Y5)
High word of the present value of the 3rd
D1376 - - Y Y - - - R/W YES 0
group pulses CH2 (Y4, Y5)
Low word of the present value of the 4th
D1377 - - Y Y - - - R/W YES 0
group pulses CH3 (Y6, Y7)
High word of the present value of the 4th
D1378 - - Y Y - - - R/W YES 0
group pulses CH3 (Y6, Y7)
Start frequency of the 1st section and
D1379 end frequency of the last section for the - - Y Y - - - R/W YES 200
3rd group pulse output CH2 (Y4, Y5)
Start frequency of the 1st section and
D1380 end frequency of the last section for the - - Y Y - - - R/W YES 200
4th group pulse output CH3 (Y6, Y7)
Acceleration/deceleration time for the
D1381 - - Y Y - - - R/W YES 100
3rd pulse output CH2 (Y4, Y5)
Acceleration/deceleration time for the
D1382 - - Y Y - - - R/W YES 100
4th pulse output CH3 (Y6, Y7)
Time difference between direction signal
and pulse output for the 3rd group pulse
D1383 - - Y Y 0 - - R/W NO 0
CH2 (Y4, Y5) in DRVI, DDRVI, DRVA,
DDRVA, PLSV, DPLSV (Unit: ms)
Time difference between direction signal
and pulse output for the 4th group pulse
D1384 - - Y Y 0 - - R/W NO 0
CH3 (Y6, Y7) in DRVI, DDRVI, DRVA,
DDRVA, PLSV, DPLSV (Unit: ms)
D1386 ID of the 1st left-side expansion module - - Y - 0 - - R NO 0
D1387 ID of the 2nd left-side expansion module - - Y - 0 - - R NO 0
D1388 ID of the 3rd left-side expansion module - - Y - 0 - - R NO 0
D1389 ID of the 4th left-side expansion module - - Y - 0 - - R NO 0
D1390 ID of the 5th left-side expansion module - - Y - 0 - - R NO 0
D1391 ID of the 6th left-side expansion module - - Y - 0 - - R NO 0
D1392 ID of the 7th left-side expansion module - - Y - 0 - - R NO 0
D1393 ID of the 8th left-side expansion module - - Y - 0 - - R NO 0
Assigning ID number of the starting
D1399 - Y Y Y 1 - - R/W YES 1
slave on ELC Link network
Starting reference for Master to write in
D1415 - Y Y Y - - - R/W NO 10C8
Slave ID#1
Starting reference for Master to write in
D1416 - Y Y Y - - - R/W NO 10C8
Slave ID#2
Starting reference for Master to write in
D1417 - Y Y Y - - - R/W NO 10C8
Slave ID#3
Starting reference for Master to write in
D1418 - Y Y Y - - - R/W NO 10C8
Slave ID#4
Starting reference for Master to write in
D1419 - Y Y Y - - - R/W NO 10C8
Slave ID#5
Starting reference for Master to write in
D1420 - Y Y Y - - - R/W NO 10C8
Slave ID#6
Starting reference for Master to write in
D1421 - Y Y Y - - - R/W NO 10C8
Slave ID#7

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 105
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
Starting reference for Master to write in
D1422 - Y Y Y - - - R/W NO 10C8
Slave ID#8
Starting reference for Master to write in
D1423 - Y Y Y - - - R/W NO 10C8
Slave ID#9
Starting reference for Master to write in
D1424 - Y Y Y - - - R/W NO 10C8
Slave ID#10
Starting reference for Master to write in
D1425 - Y Y Y - - - R/W NO 10C8
Slave ID#11
Starting reference for Master to write in
D1426 - Y Y Y - - - R/W NO 10C8
Slave ID#12
Starting reference for Master to write in
D1427 - Y Y Y - - - R/W NO 10C8
Slave ID#13
Starting reference for Master to write in
D1428 - Y Y Y - - - R/W NO 10C8
Slave ID#14
Starting reference for Master to write in
D1429 - Y Y Y - - - R/W NO 10C8
Slave ID#15
Starting reference for Master to write in
D1430 - Y Y Y - - - R/W NO 10C8
Slave ID#16
D1431 Setting of times of ELC Link polling cycle - Y Y Y 0 - - R/W NO 0
The current times of ELC Link polling
D1432 - Y Y Y 0 - - R/W NO 0
cycle
Number of slave modules linked on ELC
D1433 - Y Y Y 0 - - R/W NO 0
Link network
D1434 Data length to be read on Slave ID#1 - Y Y Y - - - R/W NO 16
D1435 Data length to be read on Slave ID#2 - Y Y Y - - - R/W NO 16
D1436 Data length to be read on Slave ID#3 - Y Y Y - - - R/W NO 16
D1437 Data length to be read on Slave ID#4 - Y Y Y - - - R/W NO 16
D1438 Data length to be read on Slave ID#5 - Y Y Y - - - R/W NO 16
D1439 Data length to be read on Slave ID#6 - Y Y Y - - - R/W NO 16
D1440 Data length to be read on Slave ID#7 - Y Y Y - - - R/W NO 16
D1441 Data length to be read on Slave ID#8 - Y Y Y - - - R/W NO 16
D1442 Data length to be read on Slave ID#9 - Y Y Y - - - R/W NO 16
D1443 Data length to be read on Slave ID#10 - Y Y Y - - - R/W NO 16
D1444 Data length to be read on Slave ID#11 - Y Y Y - - - R/W NO 16
D1445 Data length to be read on Slave ID#12 - Y Y Y - - - R/W NO 16
D1446 Data length to be read on Slave ID#13 - Y Y Y - - - R/W NO 16
D1447 Data length to be read on Slave ID#14 - Y Y Y - - - R/W NO 16
D1448 Data length to be read on Slave ID#15 - Y Y Y - - - R/W NO 16
D1449 Data length to be read on Slave ID#16 - Y Y Y - - - R/W NO 16
D1450 Data length to be written on Slave ID#1 - Y Y Y - - - R/W NO 16
D1451 Data length to be written on Slave ID#2 - Y Y Y - - - R/W NO 16
D1452 Data length to be written on Slave ID#3 - Y Y Y - - - R/W NO 16
D1453 Data length to be written on Slave ID#4 - Y Y Y - - - R/W NO 16
D1454 Data length to be written on Slave ID#5 - Y Y Y - - - R/W NO 16
D1455 Data length to be written on Slave ID#6 - Y Y Y - - - R/W NO 16
D1456 Data length to be written on Slave ID#7 - Y Y Y - - - R/W NO 16
D1457 Data length to be written on Slave ID#8 - Y Y Y - - - R/W NO 16
D1458 Data length to be written on Slave ID#9 - Y Y Y - - - R/W NO 16
D1459 Data length to be written on Slave ID#10 - Y Y Y - - - R/W NO 16
D1460 Data length to be written on Slave ID#11 - Y Y Y - - - R/W NO 16
D1461 Data length to be written on Slave ID#12 - Y Y Y - - - R/W NO 16
D1462 Data length to be written on Slave ID#13 - Y Y Y - - - R/W NO 16
D1463 Data length to be written on Slave ID#14 - Y Y Y - - - R/W NO 16
D1464 Data length to be written on Slave ID#15 - Y Y Y - - - R/W NO 16
D1465 Data length to be written on Slave ID#16 - Y Y Y - - - R/W NO 16
Number of pulses required per
D1466 - - Y Y - - - R YES 2,000
revolution of motor at CH0 (low word)
Number of pulses required per
D1467 - - Y Y - - - R YES 0
revolution of motor at CH0 (high word)
Number of pulses required per
D1468 - - Y Y - - - R YES 2,000
revolution of motor at CH1 (low word)
Number of pulses required per
D1469 - - Y Y - - - R YES 0
revolution of motor at CH1 (high word)
Distance created for 1 revolution of
D1470 - - Y Y - - - R YES 1,000
motor at CH0 (low word)
Distance created for 1 revolution of
D1471 - - Y Y - - - R YES 0
motor at CH0 (high word)
D1472 Distance created for 1 revolution of - - Y Y - - - R YES 1,000

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 106
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
motor at CH1 (low word)
Distance created for 1 revolution of
D1473 - - Y Y - - - R YES 0
motor at CH1 (high word)
Machine unit of CH0 movement (low
D1474 - - Y Y - - - R YES 0
word)
Machine unit of CH0 movement (high
D1475 - - Y Y - - - R YES 0
word)
Machine unit of CH1 movement (low
D1476 - - Y Y - - - R YES 0
word)
Machine unit of CH1 movement (high
D1477 - - Y Y - - - R YES 0
word)
Input / output percentage value of
D1478 - - Y Y 100 - - R/W NO 100
CH2(Y4, Y5) close loop control
Input / output percentage value of CH3
D1479 - - Y Y 100 - - R/W NO 100
CH3(Y6, Y7) close loop control
The data which is read from slave ID#1
in the ELC LINK at the time when M1353 - Y Y Y 0 - - R YES 0
D1480 is OFF.
↓ The initial data register where the
D1495 communication address read from slave
- - Y Y - - - R/W YES 0
ID#1~ID#16 in the ELC LINK is stored at
the time when M1353 is ON
The data which is written into slave ID#1
in the ELC LINK at the time when M1353 - Y Y Y 0 - - R YES 0
D1496 is OFF
↓ The initial data register where the
D1511 communication address written into
- - Y Y - - - R/W YES 0
slave ID#1~ID#16 in the ELC LINK is
stored at the time when M1353 is ON
The data which is read from slave ID#2
- Y Y Y 0 - - R YES 0
in the ELC LINK
D1512
↓ The initial data register where the
communication address read from slave
D1527 - - Y Y 0 - - R YES 0
ID#17~ID#32 in the ELC LINK is stored
at the time when M1353 is ON
The data which is written into slave ID#2
- Y Y Y 0 - - R YES 0
in the ELC LINK
D1528
↓ The initial data register where the
communication address written into
D1543 - - Y Y 0 - - R/W YES 0
slave ID#17~ID#32 in the ELC LINK is
stored at the time when M1353 is ON
The data which is read from slave ID#3
- Y Y Y 0 - - R YES 0
in the ELC LINK
D1544
↓ The initial data register where the
number of data that ID#17~ID#32 read
D1559 - - Y Y - - - R YES 0
in the ELC LINK is stored at the time
when M1353 is ON
The data which is written into slave ID#3
- Y Y Y 0 - - R YES 0
in the ELC LINK
D1560*
↓ The initial data register where the
number of data that ID#17~ID#32 write
D1575* - - Y Y - - - R/W YES 0
in the ELC LINK is stored at the time
when M1353 is ON
The data which is read from slave ID#4
- Y Y Y 0 - - R YES 0
D1576* in the ELC LINK
↓ The initial data register where the data
D1591* that ID#17~ID#32 read in the ELC LINK - - Y Y - - - R YES 0
is stored at the time when M1353 is ON
The data which is written into slave ID#4
- Y Y Y 0 - - R YES 0
D1592* in the ELC LINK
↓ The initial data register where the data
D1607* that ID#17~ID#32 write in the ELC LINK - - Y Y - - - R/W YES 0
is stored at the time when M1353 is ON
D1608
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#5.
D1623
Data buffer to store the data to be written
D1624 - Y Y Y - - - R/W YES 0
on Slave ID#5.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 107
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
↓
D1639
D1640
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#6.
D1655
D1656
Data buffer to store the data to be written
↓ - Y Y Y - - - R/W YES 0
on Slave ID#6.
D1671
D1672
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#7.
D1687
D1688
Data buffer to store the data to be written
↓ - Y Y Y - - - R/W YES 0
on Slave ID#7.
D1703
D1704
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#8.
D1719
D1720
Data buffer to store the data to be written
↓ - Y Y Y - - - R/W YES 0
on Slave ID#8.
D1735
D1736
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#9.
D1751
D1752
Data buffer to store the data to be written
↓ - Y Y Y - - - R/W YES 0
on Slave ID#9.
D1767
D1768
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#10.
D1783
D1784
Data buffer to store the data to be written
↓ - Y Y Y - - - R/W YES 0
on Slave ID#10.
D1799
D1800
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#11.
D1815
D1816
Data buffer to store the data to be written
↓ - Y Y Y - - - R/W YES 0
on Slave ID#11.
D1831
D1832
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#12.
D1847
D1848
Data buffer to store the data to be written
↓ - Y Y Y - - - R/W YES 0
on Slave ID#12.
D1863
D1864
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#13.
D1879
D1880
Data buffer to store the data to be written
↓ - Y Y Y - - - R/W YES 0
on Slave ID#13.
D1895
D1896
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#14.
D1911
When M1356 is ON, the values in these
registers are defined as the station
D1900
address (ID1~ID16). The default station
↓ - - - Y 1~16 - - R/W NO 1~16
address in D1399 is not used. Only
D1915
when M1356 is ON is rhe latched
function available.
When M1356 is ON, the values in these
registers are defined as the station
D1916
address (ID17~ID32). The default 17~3
↓ - - - Y - - R/W NO 17~32
station address in D1399 is not used. 2
D1931
Only when M1356 is ON is rhe latched
function available.
D1912 Data buffer to store the data to be written - Y Y Y - - - R/W YES 0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 108
2 . P r o g r a m m i n g C o n c e p ts

OFF STOP RUN

ELCB ELC ELC- ELC Factory
Special D Function    Type Latched
-PB -PA PV 2-PV setting
ON RUN STOP
↓ on Slave ID#14.
D1927
D1928
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#15.
D1943
D1944
Data buffer to store the data to be written
↓ - Y Y Y - - - R/W YES 0
on Slave ID#15.
D1959
D1960
Data buffer to store the data read from
↓ - Y Y Y - - - R YES 0
Slave ID#16.
D1975
D1976
Data buffer to store the data to be written
↓ - Y Y Y - - - R/W YES 0
on Slave ID#16.
D1991
Limit of ID setting times for
D1994 - Y Y Y 0 - - R/W NO 0
ELC-ACPGMXFR
Data length of ELC ID Setting for
D1995 - - Y Y 0 - - R/W NO 0
ELC-ACPGMXFR
1st Word of ELC ID Setting for
D1996 ELC-ACPGMXFR (Indicated by Hex - Y Y Y 0 - - R/W NO 0
format corresponding to ASCII codes)
2nd Word of ELC ID Setting for
D1997 ELC-ACPGMXFR (Indicated by Hex - Y Y Y 0 - - R/W NO 0
format corresponding to ASCII codes)
3rd Word of ELC ID Setting for
D1998 ELC-ACPGMXFR (Indicated by Hex - Y Y Y 0 - - R/W NO 0
format corresponding to ASCII codes)
4th word of ELC ID Setting for
D1999 ELC-ACPGMXFR (Indicated by Hex - Y Y Y 0 - - R/W NO 0
format corresponding to ASCII codes)
D9900
↓ For Analog I/O modules only. - - - Y 0 - - R/W NO 0
D9979

ELCM-PH/ELCM-PA, ELC2-PB, ELC2-PC/ELC2-PE, and ELC2-PA:

ELCM ELC2 OFF STOP RUN
ELC ELC2 Factory
Special D Function -PH -PC    Type Latched
2-PB -PA setting
-PA -PE ON RUN STOP
Watchdog timer (WDT) value (Unit:
D1000 Y Y Y Y 200 - - R/W NO 200
1ms)
ELC program version (user can
read the ELC program version from
D1001 Y Y Y Y - - - R NO #
this register. For example, D1001 =
H XX10 means version 1.0
Program capacity (ELCM-PH/PA,
D1002 ELC2-PC/PA/PE: 15872; ELC2-PB: Y Y Y Y # - - R NO #
7920)
Sum of the ELC internal program
memory (#:ELCM-PH/PA,
D1003 Y Y Y Y - - - R YES #
ELC2-PC/PA/PE: -15872;
ELC2-PB: -7920)
D1004 Grammar detective number Y Y Y Y 0 0 - R NO 0
STEP address when WDT timer is
D1008 Y Y Y Y 0 - - R NO 0
ON
D1009 Number of LV signal occurrence Y Y Y Y - - - R YES 0
D1010 Present scan time (Unit: 0.1ms) Y Y Y Y # # # R NO 0
D1011 Minimum scan time (Unit: 0.1ms) Y Y Y Y # # # R NO 0
D1012 Maximum scan time (Unit: 0.1ms) Y Y Y Y # # # R NO 0
0~32,767(unit: 0.1ms) addition type
D1015 Y Y Y Y 0 - - R/W NO 0
of high-speed connection timer
D1018 π PI (Low byte) Y Y Y Y 0FDB 0FDB 0FDB R/W NO 0FDB
D1019 π PI (High byte) Y Y Y Y 4049 4049 4049 R/W NO 4049
X0~X7 input filter (unit: ms)
D1020 Y Y Y Y 10 - - R/W NO 10
0~1,000ms adjustable
D1022 Double frequency selection for AB Y Y Y Y # - - R/W NO #

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2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2 OFF STOP RUN

ELC ELC2 Factory
Special D Function -PH -PC    Type Latched
2-PB -PA setting
-PA -PE ON RUN STOP
phase counter
Storing detected pulse width (unit:
D1023 Y Y Y Y 0 - - R/W NO 0
0.1ms)
D1025 Communication error code Y Y Y Y 0 - - R NO 0
Pulse number for masking Y0 when
D1026* Y Y Y Y 0 0 - R/W NO 0
M1156 = ON (Low word)
Pulse number for masking Y0 when
D1027 Y Y Y Y 0 0 - R/W NO 0
M1156 = ON (High word)
D1028 Index register E0 Y Y Y Y 0 - - R/W NO 0
D1029 Index register F0 Y Y Y Y 0 - - R/W NO 0
Output numbers of Y0 pulse (Low
D1030 Y Y Y Y - - - R NO 0
word)
Output numbers of Y0 pulse (High
D1031 Y Y Y Y - - - R NO 0
word)
Output numbers of Y1 pulse (Low
D1032 Y Y Y Y 0 - - R NO 0
word)
Output numbers of Y1 pulse (High
D1033 Y Y Y Y 0 - - R NO 0
word)
COM1 (RS-232) Communications
D1036 Y Y Y Y 0086 - - R/W NO 0086
protocol
Register for setting 8-sets SPD
D1037 function (has to be used with Y Y Y Y 0 - - R/W NO 0
M1037)
1. Delay time setting for data
response when ELC is SLAVE in
COM2 / COM3 RS-485
communication. Range: 0 ~ 10,000
(unit: 0.1ms).
D1038 Y Y Y Y - - - R/W NO 0
2. By using ELC LINK in COM2
(RS-485), D1038 can be set to
send next communication data with
delay. Range: 0 ~ 10,000 (Unit: one
scan cycle)
D1039 Constant scan time (ms) Y Y Y Y 0 - - R/W NO 0
D1040 ON state number 1 of STEP point S Y Y Y Y 0 - - R NO 0
D1041 ON state number 2 of STEP point S Y Y Y Y 0 - - R NO 0
D1042 ON state number 3 of STEP point S Y Y Y Y 0 - - R NO 0
D1043 ON state number 4 of STEP point S Y Y Y Y 0 - - R NO 0
D1044 ON state number 5 of STEP point S Y Y Y Y 0 - - R NO 0
D1045 ON state number 6 of STEP point S Y Y Y Y 0 - - R NO 0
D1046 ON state number 7 of STEP point S Y Y Y Y 0 - - R NO 0
D1047 ON state number 8 of STEP point S Y Y Y Y 0 - - R NO 0
D1049 ON number of alarm point Y Y Y Y 0 - - R NO 0
D1050 ELC will automatically convert the
↓ ASCII data saved in D1070~D1085 Y Y Y Y 0 - - R NO 0
D1055 to HEX.
Average number of times an analog
signal is input to the
ELCM-PA/ELC2-PA
D1062 Y - - Y 2 - - R/W YES 2
The default value is K10 for
ELCM-PA version 2.6 and version
2.8.
D1067 Algorithm error code Y Y Y Y 0 0 - R NO 0
D1068 Lock the algorithm error address Y Y Y Y 0 - - R NO 0
When the ELC’s built-in RS-485
communication instruction receives
D1070 feedback signals from receiver. The
↓ data will be saved in the registers Y Y Y Y 0 - - R NO 0
D1085 D1070~D1085. User can use the
contents saved in the registers to
check the feedback data.
ELC-ACPGMXFR
High word of password setting
D1086 Y Y Y Y 0 - - R/W NO 0
(Display by HEX value
corresponding to ASCII word)
ELC-ACPGMXFR
Low word of password setting
D1087 Y Y Y Y 0 - - R/W NO 0
(Display by HEX value
corresponding to ASCII word)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 11 0
2 . P r o g r a m m i n g C o n c e p ts

ELCM ELC2 OFF STOP RUN

ELC ELC2 Factory
Special D Function -PH -PC    Type Latched
2-PB -PA setting
-PA -PE ON RUN STOP
When the ELC built-in RS-485
communication instruction is
D1089 executed, the transmitting signals
↓ will be stored in the registers Y Y Y Y 0 - - R NO 0
D1099 D1089~D1099. User can use the
contents saved in registers to check
the feedback data.
COM3 (RS-485) Communication
D1109 Y - Y Y 0086 - - R/W NO 0086
protocol

2.18 E, F Index Registers

An Index register functions the same way as a general operand. It can be used to move, compare,
or be used as an index for byte device (KnX, KnY, KnM, KnS, T, C, D) and bit device (X, Y, M, S). It
cannot be used for constant (K, H). Only for ELC-PV and ELC2-PV controllers, it can be used for
constant (K, H).
Index register [E], [F]
Index registers are 16-bit registers. There are 2 points, E0 and F0, for ELCB-PB controllers. There
are 8 points, E0~E3 and F0~F3, for ELC-PA controllers. There are 16 points, E0~E7 and F0~F7, for
ELC-PV, ELCM-PH/PA, ELC2-PB/PH/PA/PE/PV controllers. If you want to use index register to be a
32-bit register, you should indicate E and at this moment F cannot be used.
Example: “MOV K10 D0F0”
Index registers E, and F are 16-bit data registers, similar to the general data register. They are
read/write.
They can be used as a 32-bit register.
16-bit 16-bit
F0 E0

32-bit
F0 E0
upper bit lower bit
It is recommended to use the instruction DMOVP K0 E to clear E and F to 0 at power on.
The combination of E and F when used as a 32-bit register are:
(E0, F0) , (E1, F1) (E2, F2) (E3, F3) (E4, F4) , (E5, F5) (E6, F6) (E7, F7)

When X0=ON, if E0=8, and F0=14,

D5E0=D(5+8)=D13,
D10F0 =D(10+14) = D24,
The contents of D13 will be moved to D24.
X0
MOV K8 E0

MOV K14 F0

MOV D5E0 D10F0

2.19 File Register

There is no device number (name) for file register; to execute read/writes of file register use
instruction MEMR or MEMW, peripheral device ELCSoft. The other controllers are not support.
The models have file registers:
ELC2-PC/PA
model ELC-PA ELC-PV ELC2-PV
ELCM-PH/PA
1,600 10,000 50,000 5,000
file registers
(K0~K1599) (K0~K9,999) (K0~K49,999) (K0~K4,999)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 111
2 . P r o g r a m m i n g C o n c e p ts

The ELC will check the following when the ELC is powered on(Only for ELC-PA/PV, ELC2-PV).
1. M1101 - starts file register function
2. D1101 - starting address of file register, for ELC-PA controllers: K0~K1599; for ELC-PV,
ELC2-PV controllers: K0~K9999.
3. D1102 - number of item to read/write, for ELC-PA controllers: K1~ K1600; for ELC-PV,
ELC2-PV controllers: K1~K8000.
4. D1103 - starting address of file register D register, ELC-PA: D2000 ~ D4999; ELC-PV: D2000
~ D9999; ELC2-PV: D2000~D11999;
Note:
1. Reading from file register to data register D will not be executed when D1101 is greater than
1600 in ELC-PA controllers, D1101 greater than 8000 and D1103 smaller than 2000 or greater
than 9999/11999 in ELC-PV/ELC2-PV controllers.
2. When starting the action to read data from the file register to the data register, the ELC will
stop executing once the address of file register or data register D exceeds the viable address
range.
3. There are 1600 file registers in ELC-PA controllers, 10000 in ELC-PV controllers, 50000 in
ELC2-PV controllers. The file register does not have an exact device number; therefore the
read/write function of file registers has to be executed by instruction API 148 MEMR, API 149
MEMW or through ELCSoft.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 11 2
2 . P r o g r a m m i n g C o n c e p ts

2.20 Nest Level Pointer[N], Pointer[P], Interrupt Pointer [I]

The control point of
N Master control nested N0~N7, 8 points master control
nested
ELCB-PB Controllers = P0~P63
64 points
ELC- PA/PV, ELC2-PV, The location point of
P For CJ, CALL instructions
ELCM-PH/PA, CJ, CALL
ELC2-PB/PH/PA/PE/SV
Controllers = P0~P255, 256 points
ELCB-PB Controllers = I001, I101,
I201, I301 4 points
ELC-PA controllers = I001, I101,
I201, I301, I401, I501, total is 6
points
ELC-PV controllers =
I000/I001(X0), I100/I101 (X1),
I200/I201 (X2), I300/I301 (X3),
I400/I401 (X4), I500/I501 (X5), 6
points (01, rising-edge trigger ,
00, falling-edge trigger )
ELC2-PV controllers =
I000/I001(X0), I100/I101 (X1),
I200/I201 (X2), I300/I301 (X3),
Insert external I400/I401 (X4), I500/I501 (X5), The location point of
interrupt I600/I601 (X6), I700/I701 (X7), interrupt subroutine.
I900/I901 (X10), I910/I911 (X11),
I920/I921 (X12), I930/I931 (X13),
I940/I941 (X14), I950/I951 (X15),
Pointer
I960/I961 (X16), I970/I971 (X17),
16 points (01, rising-edge trigger
, 00, falling-edge trigger )
For interrupt

ELCM-PH/PA,
I ELC2-PB/PH/PA/PE controllers =
I000/I001(X0), I100/I101(X1),
I200/I201(X2), I300/I301(X3),
I400/I401(X4), I500/I501(X5),
I600/I601(X6), I700/I701(X7), 8
points (01, rising-edge trigger ,
00, falling-edge trigger )
ELCB-PB Controllers = I610~I699,
( Timer resolution: 1ms), 1 point
ELC-PA Controllers = I601~I699,
I701~I799, ( Timer resolution:
1ms) , 2 points
ELC-PV controllers = I601~I699,
I701~I799, ( Timer resolution:
1ms); I801~I899, ( Timer
The location point of
Insert time interrupt resolution: 0.1ms) , 3 points
interrupt subroutine
ELC2-PV controllers = I602~I699,
I702~I799,(Timer resolution: 1ms);
I801~I899, (Timer resolution:
0.1ms), 3 points
ELCM-PH/PA,
ELC2-PB/PH/PA/PE controllers =
I602~I699, I702~I799, ( Timer
resolution: 1ms) , 2 points

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 11 3
2 . P r o g r a m m i n g C o n c e p ts

ELC-PA Controllers = I010, I020,

I030, I040, I050, I060, 6 points
ELC-PV Controllers = I010, I020,
I030, I040, I050, I060, 6 points
High-speed counter ELC2-PV Controllers = I010, I020,
interruption I030, I040, I050, I060, 6 points
ELCM-PH/PA,
ELC2-PB/PH/PA/PE Controllers =
I010, I020, I030, I040, I050, I060,
I070, I080, 8 points
For interrupt

ELC-PV, ELC2-PV Controllers =

Pulse interruption
Pointer I I110, I120, I130, I140, 4 points
ELCB-PB, ELC-PA Controllers=
I150, 1 point
ELC-PV, ELC2-PV Controllers =
I150, I160, I170, 3 points
ELCM-PH/PA, ELC2-PC/PA
Insert communication
Controllers = I140, I150, I160, 3
interrupt
points
ELC2-PB Controllers = I140, I150,
2 points
ELC2-PE Controllers = I150, I160,
2 points

Nest Level Pointer N: used with instruction MC and MCR. MC is master start instruction. When the
MC instruction is executed, the instructions between MC and MCR will be executed normally.
MC-MCR master instruction supports nested program structure and the maximum is 8 levels, which
is numbered from N0 to N7.

Pointer P: use with application instructions CJ, CALL, and SRET.

CJ condition jump:

When X0=ON, program will jump from 0 to N (designated label P1) and keep on executing without
executing the instructions between 0 and N.
When X0=OFF, program will execute from 0 and keep on executing the followings. CJ instruction
will not be executed at this time.
P**
X0
0 CJ P1

X1
Y1
X2
P1 N Y2

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 11 4
2 . P r o g r a m m i n g C o n c e p ts

CALL subroutine, SRET subroutine END:

When X0 is ON, it will jump to P2 to execute the designated subroutine as executing CALL
instruction. When executing SRET instruction, return to address 24 to go on executing.
P**
X0
20 CALL P2 Call subroutine P**
X1
24 Y1

FEND

P2 Y0
(subroutine
P2) subroutine
Y1

SRET subroutine return

Interrupt pointer I:
It is used with application instruction EI, DI, IRET. There are five functions below. Interrupt insert
should be used with EI, interrupt insert enable, interrupt insert disable and IRET interrupt insert
return, etc.
1. External interrupt
In ELC- PA, ELCB-PB, When input signal of input terminal X0~X5 is triggered on rising-edge, it will
interrupt the present program and jump to the designated interrupt subroutine pointer I001(X0),
I101(X1), I201(X2), I301(X3), I401(X4), I501(X5) to execute and return to the previous address to
execute when executing IRET instruction.
In ELC-PA V1.2 and above, when I401 (X4) works with X0 (C235, C251 or C253), the value of
(C243 or C255) will be stored in (D1180, D1181) and I501 (X5) works with X1 (C236), the value of
high-speed counter (C236) will be stored in (D1198, D1199).
In ELC-PV, ELC2-PV, when input signal of input terminal X0~X5 is triggered on rising-edge or
falling-edge, it will interrupt current program execution and jump to the designated interrupt
subroutine pointer I000/I001(X0), I100/I101(X1), I200/I201(X2), I300/I301(X3), I400/I401(X4),
I500/I501(X5),. When IRET instruction is executed, program execution returns to the address before
interrupt occurs.
In ELCM-PH/PA , ELC2-PB/PH/PA/PE when input signal of input terminal X0~X7 is triggered on
rising-edge or falling-edge, it will interrupt current program execution and jump to the designated
interrupt subroutine pointer I000/I001(X0), I100/I101(X1), I200/I201(X2), I300/I301(X3),
I400/I401(X4), I500/I501(X5), I600/I601(X6), I700/I701(X7). When IRET instruction is executed,
program execution returns to the address before interrupt occurs.
In ELCM-PH/PA, ELC2-PB/PH/PA/PE when X0 (C243) works with I100/I101 (X1), X0/X1 (C246,
C248, C252) works with I400/I401, the value of C243, C246, C248, C252 will be stored in (D1240,
D1241)
In ELCM-PH/PA, ELC2-PB/PH/PA/PE when X2 (C244) works with I300/I301 (X3), X2/X3 (C250,
C254) works with I500/I501, the value of C244, C250, C254 will be stored in (D1242, D1243).
2. Timer interrupt
ELC will stop the present program and jump to the designated interrupt subroutine. Then ELC will
execute automatically for every time period set by 1ms~99ms (0.1ms~9.9ms)
3. Pulse interruption
In ELC-PV, ELC2-PV series, the pulse output instruction API 57 PLSY can be set up so the interrupt
signal is sent out synchronously when the first pulse is sent out by enabling flags M1342 and M1343.
The corresponding interrupts are I130 and I140. You can also set up so the interrupt signal is sent
out after the last pulse is sent out, by enabling flags M1340 and M1341. The corresponding
interrupts are I110 and I120.
4. Counter attained interrupt
The comparison instruction DHSCS of the high-speed counter can be used to interrupt the present
program and jump to the designated interrupt insert subroutine to execute the interrupt pointer I010,
I020, I030, I040, I050, I060, I070, I080 when the comparison is attained.
5. Communication interrupt

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. ea t o n . c o m 11 5
2 . P r o g r a m m i n g C o n c e p ts

ELC-PB/PA/PV, ELCB-PB:
I150:
When using the communication instruction RS, it can be set to have an interrupt request when
receiving specific characters. Interrupt I150 and specific characters are set to the low byte of D1168
(ELC-PA), D1127 (ELCB-PB).
When the ELC connects to a communication device and the received data length is not the
expected length, the end character in D1168 (D1127) and the interrupt subroutine I150 is set. When
the ELC receives this end character, it will execute interrupt subroutine I150.
I160:
The RS instruction sends out an interrupt request when receiving a specific length of data. When the
data received equals the low byte of D1169, I160 will be triggered. When D1169 = 0, I160 will not be
triggered.
I170:
In Slave mode, interrupt I170 will be generated when the received data message is complete.
Normally when the communication terminal of the ELC is in Slave mode, the ELC will not
immediately process the communication data entered, but process it after the END is executed.
Therefore, when the scan time is very long and you need the communication data to be processed
immediately, you can use interruption I170 for this functionality.
ELCM-PH/PA, ELC2-PB/PH/PA/PE:
I140:
The communication instruction RS (COM1 RS-232) can be used to send an interrupt request when
specific characters are received. Interrupt I140 and the specific characters are set to low byte of
D1167.
This function can be used when the ELC receives data of a different length during communications.
Set up the specific end word in D1167 and write the interruption subroutine I140. When the ELC
receives the end word, the program will execute I140.
I150:
The communication instruction RS (COM2 RS-485) can be used to send an interrupt request when
specific characters are received. Interrupt I150 and the specific characters are set to low byte of
D1168.
This function can be used when the ELC receives data of a different length during the
communications. Set up the specific end word in D1168 and write the interruption subroutine I150.
When the ELC receives the end word, the program will execute I150.
I160:
The communication instruction RS (COM3 RS-485) can be used to send an interrupt request when
specific characters are received. Interrupt I160 and the specific characters are set to low byte of
D1169
This function can be used when the ELC receives data of a different length during the
communications. Set up the specific end word in D1169 and write the interruption subroutine I160.
When the ELC receives the end word, the program will execute I160

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2.21 Applications of Special M Relay and Special D Register

Function Group ELC Operation Flag
Number M1000~M1003

Contents:
These relays provide information about the ELC when switched to run mode.
M1000:
Always ON when in run mode.
M1000
Y0 ELC is running

M1000 is On contact
during operation always ON

M1001:
Always OFF when in run mode.
M1002:
ON for the first scan when the ELC starts then OFF the rest of the time during run mode. Use to
initialize registers, ouptuts, counters, etc. when first entering run mode.
M1003:
OFF for the first scan when the ELC starts, then ON the rest of the time during run mode. Use to
initialize registers, ouptuts, counters, etc when first entering run mode.
ELC RUN

M1000

M1001

M1002

M1003

scan time

Function Group Watchdog Timer (WDT)

Number D1000

Contents:
1. Monitor timer is used for monitoring the ELC scan time. When the scan time exceeds the set
value (SV) in the monitor timer, the ELC ERROR LED will be ON and all outputs will be “OFF”.
2. The default in the monitor timer is 200ms. If the program is long or the operation is too
complicated, MOV instruction can be used to modify SV. See the example below for SV =
300ms.
M1002
0 MOV K300 D1000
Primary pulse
3. The maximum SV in the monitor timer is 32,767ms. However, care should be taken when
adjusting SV. If SV in D1000 is too large, it will take much longer for operation errors to be
detected. Therefore, SV is recommended to be shorter than 200ms.
4. Scan time could be prolonged due to complicated instruction operations or by the use of many
I/O modules. Check D1010 ~ D1012 to see if the scan time exceeds the SV value in D1000.
Besides modifying the SV value in D1000, you can also apply the WDT instruction (API 07).
When program execution progresses to WDT instruction, the internal monitor timer will be
reset and therefore the scan time will not exceed the set value in the monitor timer.

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Function Group Program Capacity

Number D1002

Contents:
This register holds the program capacity of the ELC.
1. ELCB-PB controllers: 3,792 Steps (Word)
2. ELC-PA, ELC2-PB controllers: 7,920 Steps (Word)
3. ELC-PV, ELCM-PH/M-PA, ELC2-PC/PA/PE controllers: 15,872 Steps (Word)
4. ELC2-PV controllers: 30,000 Steps (Word)

Function Group Grammar

Number M1004, D1004, D1137

Contents:
1. When errors occur in the syntax check, the ERROR LED indicator will flash and special relay
M1004 = ON.
2. Timings for the ELC syntax check:
a) When the power goes from “OFF” to “ON”.
b) When ELCSoft writes the program into the ELC.
c) When on-line editing is being conducted between the ELCM-PH/PA and ELCSoft.
3. Errors might result from a parameter error or a program error. The error code of the error will
be placed in D1004. The address where the fault is located is saved in D1137. If the error
belongs to a loop error, it may not have an address associated with it. In this case the value in
D1137 is invalid.

Function Group Scan Time-out Timer

Number M1008, D1008

Contents:
1. When scan time-outs occur during program execution, the ELC ERROR LED will light and
M1008=ON.
2. D1008 saves which address the STEP timeout occurred on.

Function Group Checking Lost ELC SRAM Data

Number D1009, M1175, M1176

Contents:
1. bit0 ~ bit7 record the types of data lost. bit = 1 refers to losing data; bit = 0 refers to correct data.
2. What are lost
bit8 ~ 15 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
ELC D T C File
Reserved M relay S step password
program register register register register
3. After the ELC is powered, the data in SRAM will be verified. If the SRAM data are lost, the ELC
will record the error in D1009 and set on M1175 or M1176 according to the content of the data.

Function Group Scan Time Monitor

Number D1010~D1012

Contents:
The present value, minimum value and maximum value of scan time are saved in these registers.
D1010: present scan time value.
D1011: minimum scan time value.
D1012: maximum scan time value.

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Function Group Internal Clock Pulse

Number M1011~M1014

Contents:
The ELC provides four different clock pulses to aid the application. When the ELC is powered on,
these four clock pulse will start automatically. All are 50% duty cycle. The ELC starts the timing
when going to run mode. These clock pulses are not synchronized.
10 ms

M1011 (10 ms) 100 Hz

100 ms

M1012 (100 ms) 10 Hz

1 sec

M1013 (1 sec) 1 Hz
1 min

M1014 (60 sec)

Function Group High-speed Timer

Number M1015, D1015

Contents:
The steps for using special M and special D directly:
3. Only valid when the ELC is in RUN for ELC-PV, ELC2-PV, ELCM-PH/PA, but is valid when the
ELC is in RUN or STOP status for ELC-PA.
4. When M1015=ON, it will start high-speed timer D1015 once the ELC finish executing the END
instruction of that scan period. The minimum unit of D1015 is 100us.
5. The range of D1015 is 0~32,767. When it counts to 32,767, it will start from 0.
6. When M1015=OFF, D1015 will stop timing immediately.
7. ELC-PV, and ELC2-PV controllers offers high-speed timer instruction HST. See the API 196
HST for more details.
Example:
1. When X10 is ON, set M1015=ON to start high-speed timer and record in D1015.
2. When X10=OFF, set M1015=OFF to close high-speed timer.
X10
M1015

Function Group Perpetual Calendar Clock

Number M1016~M1017, M1076, D1313~D1319

Contents:
1. Special M and special D relevant to RTC
Name Function
OFF: show the 2 right most bits
M1016 Year Display
ON: show the (2 right most bits + 2000)
When OFF→ON, adjust is triggered
Make ±30
RTC = 0~29 seconds, second will be reset to 0 and minute
seconds
M1017 will not change.
adjustment to
RTC = 30~59 seconds, reset second to 0 and add 1 to
clock
minute.
ON when setting exceeds range or battery has run down.
M1076 RTC malfunction
RTC will reset to Jan. 1, 2000. 00:00

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Name Function
Flag change on
M1082 On: Modification on RTC
RTC
D1313 Second 0~59
D1314 Minute 0~59
D1315 Hour 0~23
D1316 Day 1~31
D1317 Month 1~12
D1318 Week 1~7
D1319 Year 0~99(2 right-most bit)
2. If the set value for the RTC is invalid: RTC will display the time as Second→0, Minute→0, Hour
→0, Day→1, Month→1, Week→1, Year→0.
3. Only when power is on can RTCs of ELC2-PB perform the fuction of timing. Memory of the
RTC is latched. The RTC will continue to time when power is down. For higher accuracy of
RTC, please verify RTC time when power resumes.
4. D1313 ~ D1319 will immediately update the RTC only when in TRD instruction or ECISoft
monitoring mode.
5. RTCs of ELC2-PC/PE/PA and ELCM-PH/PA version 2.0 (and above) can still operate for one
or two weeks after the power is off (they vary with the ambient temperature). Therefore, if the
machine has not operated since one or two weeks ago, please reset RTC.
6. RTCs of ELC-PV and ELC2-PV can still operate for 6 months after the power is off (they vary
with the ambient temperature). Therefore, if the machine has not operated since 6 months ago,
please reset RTC.
7. Adjust method of the perpetual clock:
a) You can use a specific command, TWR, to adjust for ELC-PA/PV,ELC2-PV/PA/PH/PE,
and ELCM-PH/PA version 2.0 controller’s built-in real time clock. Refer to the TWR
command for detail.
b) Using peripherial ELCSoft to set.

Function Group π (PI)

Number D1018~D1019

Contents:
1. D1018 and D1019 are combined as 32-bit data register containing floating point value of PI.
2. Floating point value = H 40490FDB

Function Group Input points time delay

Number D1020~D1021

Contents:
1. ELC-PA, ELCM-PH/PA controllers X0~X7: 10ms (factory default), 0~20ms adjustable. Refer
to the usage of special registers D1020.
2. D1020 can be used for setting up the response time of receiving pulses at X0 ~X7 for
ELC-PB/PA controllers. (Setup range: 0 ~ 20; Unit: ms)
3. D1021 can be used for setting up the response time of receiving pulses at X10 ~X17 for
ELC-PB controllers. (Setup range: 0 ~ 20; Unit: ms)
4. D1020 can be used for setting up the response time of receiving pulses at X0 ~X7 for
ELC-PV/ELC2-PV series MPU. (Setup range: 0 ~ 60; Unit: ms)
5. D1021 can be used for setting up the response time of receiving pulses at X10 ~X17 for
ELC-PV/ELC2-PV series MPU. (Setup range: 0 ~ 60; Unit: ms)
6. When power to the ELC goes from OFF→ON, the content of D1020 and D1021 will become to
10 (default) automatically.

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Terminal response time

0
X0 0ms
1
1ms
setting by D1020
(default is 10)
10 input reflash
X7 10ms
15
15ms state
memory
7. When setting the X0~X7 response time to 0ms to execute following program, the faster
response time input terminal will be 50μs due to input terminal connection to an RC filter circuit
in series.
M1000
MOV K0 D1020

normally ON contact
8. It is not necessary to adjust response time when using high-speed counter or an interrupt in
the program.
9. It is the same to use instruction REFF or change the content of D1020 and D1021.

Function Group Communication Error Code

Number M1025, D1025

Contents:
Slave mode error code when receiving incorrect communication request:
01: illegal instruction code
02: illegal device address.
03: requested data exceeds the range.
07: checksum error

Function Group Execution Completed Flag

Number M1029, M1030, M1036, M1037, M1102, M1103

Contents:
Execution Completed Flag:
MTR, HKY, DSW, SEGL, PR:
M1029=ON for a scan period once the instruction finishes executing.
PLSY, PLSR:
1. M1029 will be “ON” after Y0 pulse output of ELC-PA/PB, ELCB-PB is completed. M1030 will
be “ON” after Y1 pulse output is completed. M1102 will be ON after Y2 pulse output is
completed. When PLSY, PLSR instruction are OFF, M1029, M1030, M1102, M1103 will be
OFF as well. When pulse output instructions executes again, M1029, M1030, M1102, M1103
will be OFF and turn ON when execution completes. You have to reset M1029 and M1030
after the action is completed.
2. M1029 will be “ON” after Y0 and Y1 pulse output of ELC- PV, ELC2-PV is completed. M1030
will be “ON” after Y2 and Y3 pulse output is completed. M1036 will be “ON” after Y4 and Y5
pulse output of ELC-PV is completed. M1037 will be “ON” after Y6 and Y7 pulse output is
completed. When PLSY and PLSR instruction is “OFF”, M1029, M1030, M1036 and M1037
turn “OFF”. When the instruction is re-executed for the next time, M1029, M1030, M1036 and
M1037 will turn “OFF” and “ON” again when the execution is completed.
3. ELCM-PH/PA M1029 = ON when Y0 pulse output completes. M1030 = ON when Y1 pulse
output completes. M1102 = ON when Y2 pulse output completes. M1103 = ON when Y3
pulse output completes. When PLSY, PLSR instruction are OFF, M1029, M1030, M1102,

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M1103 will be OFF as well. When pulse output instructions executes again, M1029, M1030,
M1102, M1103 will be OFF and turn ON when execution completes.
4. User should clear M1029, M1030, M1036, M1037, M1102 and M1103 manually.
INCD:
M1029 will be ON for a scan period when the designated group finishes comparison.
RAMP, SORT:
1. M1029= ON after completing execution, M1029 must be cleared by user.
2. If this instruction is OFF, M1029 will be OFF.
DABSR:
1. M1029 = On when the 1st output group Y0 and Y1 of ELC-PV, ELC2-PV is completed. M1030
= On when the 2nd output group Y2 and Y3 is completed.
2. M1036 = On when the 3rd output group Y4 and Y5 of ELC-PV is completed. M1037 = On when
the 4th output group Y6 and Y7 is completed.
3. When the instruction is re-executed for the next time, M1029 or M1030 will turn “Off” and “On”
again when the execution is completed.
4. M1029=ON after completing execution.
5. M1029 will be OFF when execute this instruction the next time and it will be ON after
completing execution.
ZRN, DRVI, DRVA:
1. M1029 will be “ON” after Y0 and Y1 pulse output is completed. M1102 will be “ON” after Y2
and Y3 pulse output is compeleted.
2. When the instruction is re-executed for the next time, M1029 / M1102 will turn off first then ON
again when the instruction is completed.
3. For ELC-PV, ELC2-PV controllers, M1029 = ON when the first output group Y0 and Y1 is
completed. M1030 = ON when the second output group Y2 and Y3 is completed. M1036 = ON
when the third output group Y4 and Y5 is completed. M1037 = ON when the fourth output
group Y6 and Y7 is completed. When the instruction is re-executed for the next time, M1029 or
M1030 will turn “OFF” and “ON” again when the execution is completed.
4. For ELCM-PH/PA, ELC2-PB/PA/PH/PE controllers, M1029 will be “ON” after Y0 and Y1 pulse
output is completed. M1102 will be “ON” after Y2 and Y3 pulse output is completed. When the
instruction is re-executed for the next time, M1029 / M1102 will turn off first then ON again
when the instruction is completed.

Function Group Clear Command

Number M1031, M1032

Contents:
M1031 (clear unlatched area), M1032 (clear latched area)
The component that will be cleared
M1031 The contact state of Y, general M, general S
Clear unlatched area T contact for general and time coil
C contact for general, time coil reset coil
D present register for general
T present register for general
C present register for general
M1032 The contact state of M and S for latched
Clear latched area Accumulative timer T contact and time coil
Latched C and high-speed counter C contact, count coil
Present register D for latched
Present register of accumulative timer T
Latched C and present register of high-speed counter C

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Function Group M1033

Number Output Latched in STOP mode

Contents:
When M1003 = ON, the ELC outputs will be latched in their current state when the ELC is switched
from RUN to STOP.

Function Group Turn all outputs off

Number M1034

Contents:
When M1034 = ON, all outputs will turn off.

Function Group RUN/STOP Switch

Number M1035, D1035

Contents:
1. When M1035 = ON, ELCM-PH/PA, ELC2-PB/PH/PA/PE use input point X7, ELC-PA use input
point X3 . ELCB-PB does not support.
2. When M1035 = ON, ELC-PV, ELC2-PV controllers will determine the content (K0 ~ K15) in
D1035 to enable input points X0 ~ X17 as the RUN/STOP switch.

Function Group Enable SPD function

Number M1037, D1037

Contents:
1. M1037 and D1037 can be used to enable 8 sets of SPD instructions. When M1037 is ON, 8
sets of SPD instructions will be enabled. When M1037 is OFF, the function will be disabled.
2. The detected speed will be stored in the registers designated by D1037, e.g. if D1037 = K100,
the user has to set up the value in D100, indicating the interval for capturing the speed value
(unit: ms). In addition, the captured speed value will be stored in D101 ~ D108 in order.
※ When the function is enabled, C235~C242 will be occupied and unavailable in ELC
execution process program.
M1002
ZRST C235 C242

MOV K100 D1037

MOV K1000 D100

M1
M1037
M1000
PLSY K10000 K0 Y0
M1000
PLSY K9000 K0 Y1
M1000
PLSY K8000 K0 Y2
M1000
PLSY K7000 K0 Y3

END

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Function Group Communication Response Delay

Number D1038

Contents:
1. When ELC is used as slave station, in RS-485 communication interface, users can set up
communication response delay time ranging from 0 to 10,000 (0 ~ 1 second). If the time is
without the range, D1038 = O (time unit: 0.1ms). The set value of time must be less than that in
D1000(scan time-out timer WDT).
2. By using ELC-Link (Master), D1038 can be set to send next communication data with delay.
(Unit: 1 scan period for ELC-PA, ELCM-PH/PA, ELC2-PB/PH/PA/PE, 0.1ms for ELC-PV,
ELC2-PV)

Function Group Constant scan time

Number M1039, D1039

Contents:
1. When M1039 is ON, program scan time is determined by D1039 (if D1039 is greater than the
maximum scan time). When program finishes executing, it will execute the next scan after the
time set by D1039. If D1039 is less than program scan time, the program scan will complete,
and the scan time will be the normal program scan time.
M1000
M1039 Constant scan time

normally ON
contact MOV P K20 D1039

Scan time is fixed to 20ms

2. The relative instructions of scan time are RAMP, HKY, SEGL, ARWS and PR. They should be
used with “constant scan time” or “constant time insert interrupt”.
3. Especial for instruction HKY, scan time should be set to 20ms and above when it is used 4×4
matrix to be 16 keys to operate.
4. Scan time D1010~D1012 display also include constant scan time.

Function Group Analog Function

Number D1056~D1057, D1062, D1110~D1113, D1116~D1118

Contents:
1. ELC-PA, ELC2-PA, ELCM-PA Controllers only.
2. Resolution of analog input channel: 12 bits.
Voltage: -10V~10V  Value: -2000~2000.
Current: -20mA~20mA Value: -2000~2000.
Current: 4mA~20mA Value: 0~2000.
3. Resolution of analog output channel: 12 bits
Voltage: -10V~10V  Value: -2000~2000.
Current: 0~20mA  Value: 0~4000.
Current: 4mA ~20mA  Value: 0~4000.
4. ELCM-PA, default of analog input average times: (K2). If set value = K1, the ELC takes the
present value.
Function
D1056 Present value of analog input channel 0 (CH0), ELC-PA support.
D1057 Present value of analog input channel 1 (CH 1), ELC-PA support.
For ELC-PA controllers, average times of AD (CH0, CH1): 2~4, Default = K2
D1062 For ELCM-PA/ELC2-PA controllers, average times of AD (CH0~CH3): 1~20,
Default = K2
D1110 Average value of analog input channel 0 (AD 0)
D1111 Average value of analog input channel 1 (AD 1)
D1112 Average value of analog input channel 2 (AD 2), ELC-PA not support.
D1113 Average value of analog input channel 3 (AD 3), ELC-PA not support.

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Enable/disable ELCM-PA/ELC2-PA AD channels

D1114 (0: enable (default) / 1: disable)
bit0~bit3 sets AD0~AD3.
Analog mode selection (Voltage / Current) 0: voltage, 1: current (Default: voltage)
bit0~bit3 refer to AD0~AD3
bit4~bit5 refer to DA0, DA1
D1115
bit8~bit13: current mode selection
bit8~ bit11 refer to AD0~AD3, 0: -20mA~20mA, 1: 4~20mA
bit12, bit13 refer to DA0~DA1, 0: 0~20mA, 1: 4~20mA
D1116 Analog output channel 0 (DA 0).
D1117 Analog output channel 1 (DA 1).
Analog input filter setting (ms).
For ELC-PA controllers, sampling time of analog/digital conversion Sampling time
D1118 will be regarded as 5ms If D1118≦5.
For ELCM-PA/ELC2-PA controllers, sampling time of analog/digital conversion
Sampling time will be regarded as 2ms If D1118≦2.

Function Group Algorithm Error Flag

Number M1067~M1068, D1067~D1068

Contents:
Algorithm error flag:
Component Explanation Latched STOP→RUN RUN→STOP
M1067 Algorithm error flag None Clear Latched
M1068 Algorithm error lock flag None Unchanged Latched
D1067 Algorithm error code None Clear Latched
D1068 STEP value of algorithm error None Unchanged Latched
Error code explanation:
D1067
Function
error code
0E18 BCD conversion error
0E19 Divisor is 0
0E1A Usage exceeds limit (include E and F)
0E1B It is negative number after doing radical
0E1C FROM/TO communication error

Function Group ELC- PA, ELCB-PB series, X0 input point can detect pulse width
Number M1084、D1023

Contents:
X0 input point of ELCB-PB/ELC-PA controllers can detect pulse width. Whenever X0 turns from ON
to OFF, the value will be updated once and stored in D1023 (unit: 0.1ms). The minimum detectable
width is 0.1ms and maximum 10,000ms.

Function Group ELCM-PH/PA, ELC2-PB/PA/PH/PE series, X6 pulse width detecting function

Number M1083,M1084, D1023

Contents:
When M1084 = ON, X6 pulse width detecting function is enabled and the detected pulse width is
stored in D1023 (unit: 0.1ms)
M1083 ON：detecting width of negative half cycle (OFFON)
M1083 OFF：detecting width of positive half cycle (ONOFF)

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Function Group Pulse output Mark and Mask function

M1108, M1110, M1156, M1158, M1538, M1540, D1026, D1027, D1135, D1136,
Number
D1232, D1233, D1234, D1235, D1348, D1349
Contents:
Please refer to explanations of API 59 PLSR / API 158 DDRVI / API 197 DCLLM instructions.

Function Group Low Voltage, for ELC-PV, ELC2-PV series.

Number M1087, D1100

Contents:
1. When the ELC detects LV (Low Voltage) signal, it will check if M1087 is “ON” or not. If M1087
is “ON”, the content in D1100 will be stored in Y0 ~ Y17.
2. Bit0 (LSB) of D1100 corresponds to Y0, bit1 corresponds to Y1, bit8 corresponds to Y10 and
so on.

Function Group File Register

Number M1101, D1101~D1103

Contents:
1. Only support ELC-PA/PV, ELC2-PV.
2. When the ELC is powered on or from STOP to RUN, it will check start file register function
from M1101, the start number of file register from D1101, read item number of file register from
D1102, to determine if it should send file register data to the designated data register
automatically or not.
M1101: Whether to automatically downland data from file register
D1101: Start No. of file register K0 ~ K1,599 (for ELC-PA)
Start No. of file register K0 ~ K9,999 (for ELC-PV, ELC2-PV)
D1102: Number of data read from file register K0 ~ K1,600 (for ELC-PA)
Number of data read from file register K0 ~ K8,000 (for ELC-PV, ELC2-PV)
D1103: Location for storing data read from file register
Start No. of assigned data register D K2,000 ~ K4,999 (for ELC-PA)
Start No. of assigned data register D K2,000 ~ K9,999 (for ELC-PV)
Start No. of assigned data register D K2,000 ~ K9,999 (for ELC2-PV)
3. Please refer to instructions MEMR and MEMW explanation.

Function Group Pulse Output With Speed Acceleration/Deceleration

Number M1115 ~ M1119, D1104

Contents:
1. Special D and special M for acceleration/ deceleration of speed pulse output for
ELCB-PB/ELC-PA:
Device No. Function
M1115 Activation switch
M1116 “Accelerating” flag
M1117 “Target frequency reached” flag
M1118 “Decelerating” flag
M1119 “Function completed” flag
D1104 Start No. of control register (D)
2. Parameters for D1104 (frequency range: 25Hz ~ 10kHz)
Index Function
+0 Start frequency (SF)
+1 Gap frequency (GF)
+2 Target frequency (TF)
The lower 16 bits of the 32 bits for the total number of output
+3 (TP)
pulses

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Index Function
The higher 16 bits of the 32 bits for the total number of output
+4 (TP)
pulses
The lower 16 bits of the 32 bits for the total number of output
+5
pulses in accelerating/decelerating section
(AP)
The higher 16 bits of the 32 bits for the total number of output
+6
pulses in accelerating/decelerating section
3. No instruction is needed, users need only to fill out the parameter table and enable M1115 (in
RUN mode). This functio only supports Y0 output and the timing chart is as below.

Number of accel/decel sections = (TF-SF)/GF

GF
Number of output pulses in every section:
Frequency GP = AP/Number of accel/decel sections
GP

SF
Number of pulses
AP AP
AP = number of accel/decel pulses

4. Note: this function is applicable only when “all” the conditions below are met.
a) Start frequency < target frequency.
b) Gap frequency ≤ (target frequency – start frequency)
c) Total number of pulses > (accel/decel number of pulses × 2)
d) For start frequency and target frequency: Min. 25Hz; Max. 10kHz
e) Number of accel/decel pulses > number of accel/decel sections
When M1115 turns from “On” to “Off”, M1119 will be reset and M1116, M1117 and M1118 remain
unchanged. When ELC goes from “STOP” to “RUN”, M1115 ~ M1119 will be reset as “Off”. D1104
will only be cleared as “0” when it turns from “Off” to “On”.
Either accel/decel pulse output function or PLSY Y0 output can be executed at a time when ELC is
operating.
5. How to calculate the action time of each section
Assume the start frequency is set as 1kHz, gap frequency as 1kHz, target frequency as 5kHz,
total number of pulses as 100 and number of acceleration pulses as 40, the timing diagram of
the acceleration sections is as the figure below.
Frequency (Hz)

5,000
4,000
3,000
2,000
1,000
Time (sec)
t1 t2 t3 t 4

From the conditions above, we can obtain the number of acceleration/deceleration sections is
(5K – 1K)/1K = 4 and the number of output pulses in each section is 40/4 = 10. Therefore, in
the diagram, t1 = (1/1K) × 10 = 10ms, t2 = (1/2K) × 10 = 5ms, t3 = (1/3K) × 10 = 3.33ms, t4 =
(1/4K) × 10 = 2.5ms.
6. Program example: Forward/reverse acceleration/deceleration step motor control

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M1002
MOV K500 D1104 D500 ~ D506 as parameter addresses

MOV K1000 D500 Start frequency: 1KHz

MOV K100 D501 Interval frequency: 100Hz

MOV K10000 D502 Target frequency: 10KHz

DMOV K80000 D503 Number of output pulses: 80,000

DMOV K10000 D505 Number of pulses in accel/decel section: 10,000

SET M1115
a) When ELC is in RUN status, store all parameter settings into the registers designated in
D1104.
b) When M1115 = On, the acceleration/deceleration pulse output will start.
c) M1116 = On in the acceleration process. When the speed reaches its target, M1117 will be
On. M1118 = On in the deceleration process. When the speed reaches its target, M1119
will be On.
d) M1115 will not be reset automatically. You have to check the conditions during the process
and reset it.
e) Pulse output curves:
Frequency (Hz)

10K

1K Number
of pulses
10,000 70,000 80,000
Frequency (Hz)

10K

1K
Time (ms)
2,606 8,606 11,213

Function Group Enable 2-speed output function of DDRVI instruction

Number M1119

Contents:
ELCB-PB, ELC-PA did not support.
When M1119 is ON, 2-speed output function of DDRVI will be enabled.
Example: Assume that D0 (D1) is the first speed and D2(D3) is the second speed. D10(D11) is the
output pulse number of the first speed and D12(D13) is the output pulse number of the second
speed.

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2 . P r o g r a m m i n g C o n c e p ts

M0
DMOV K100000 D0
M1
DMOV K50000 D2
M2
DMOV K100000 D10
M3
DMOV K50000 D12

DMOV K0 D1030

DMOV K0 D1336
M0
SET M1119
M1

M0
DDRVI D10 D0 Y0 Y1
M1029
S0

M1
DDRVI D10 D0 Y2 Y3
M1102
S1

END

Vbase T1 T2+T3 P(1) V(1) P(2) V(2)

Position of Position of The
Initial Ramp-up Ramp-down The first
the first the second second
frequency time time speed
speed speed speed

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Function Group COM Port Function

Port COM1 COM2 COM3

Item
Number Communication format D1036 D1120 D1109
Communication setting holding M1138 M1120 M1136
ASCII/RTU mode M1139 M1143 M1320
Slave communication address D1121 D1255
Contents:
The communication interfaces which are supported are listed below. (All the ports can carry out
communication simultaneously.):
COM port COM1 COM2 COM3
ELC-PA/PV, ELCB-PB, ELC2-PB/PV RS-232 RS-485 -
ELCM-PH/PA, ELC2-PC RS-232 RS-485 RS-485
ELC2-PE USB RS-485 RS-485
ELC2-PA RS-232 RS-485 USB

Communication protocol of master/slave ELC:

COM port COM1 COM2 COM3
Configuration Register D1036 D1120 D1109
ELC-PA/PV, ELCB-PB Slave Slave/Master -
ELCM-PH/PA, ELC2-PC Slave/Master Slave/Master Slave/Master
ELC2-PB/PV Slave/Master Slave/Master -
ELC2-PE Slave Slave/Master Slave/Master
ELC2-PA Slave/Master Slave/Master Slave
You can use D1036/D1120/D1109 to set communication protocol of master/slave ELC. Both
support communication format of MODBUS ASCII/RTU, and you can use
M1139/M1143/M1320 to set ASCII/RTU.

Communication port summary:

COM
Parameter COM1 COM2 COM3)
ELCB-PB, ELC-PA/PV, ELC2-PV:110~115200 bps
Baud rate In ELCM-PH/PA, ELC2-PB/PH/PA/PE, COM1: 110~115200
bps, COM2/COM3: 110~921,000 bps.
Data length 7~8bits
Parity Even/Odd/None parity check
Stop bits length 1~2 bits
Configuration Register D1036 D1120 D1109
communication mode ASCII/RTU Mode
Data length for access 100 registers (Both of ASCII/RTU)

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For more information about setting configuration registers (D1036, D1120, D1109), please refer to
the table below.
Content
0: 7 data bits, 1: 8 data bits
b0 Data Length
(RTU supports 8 data bits only)
00: None
b1
Parity bit 01: Odd
b2
11: Even
b3 Stop bits 0: 1 bit, 1: 2bits
b4 0001(H1): 110
b5 0010(H2): 150
b6 0011(H3): 300
b7 0100(H4): 600
0101(H5): 1200
0110(H6): 2400
0111(H7): 4800
Baud rate 1000(H8): 9600
1001(H9): 19200
1010(HA): 38400
1011(HB): 57600
1100(HC): 115200
1101(HD): 500000 (COM2 / COM3)
1110(HE): 31250 (COM2 / COM3)
1111(HF): 921000 (COM2 / COM3)
b8 Select start bit 0: None 1: D1124 (COM2)
b9 Select the 1st end bit 0: None 1: D1125 (COM2)
b10 Select the 2nd end bit 0: None 1: D1126 (COM2)
b11~b15 Undefined
Example 1: Modifying COM1 communication format
1. Add the below instructions on top of the program to modify the communication format of COM1.
When the ELC switches from STOP to RUN, the program will detect whether M1138 is ON in
the first scan. If M1138 is ON, the program will modify the communication settings of COM1
according to the value set in D1036
2. Modify COM1 communication format to ASCII mode, 9600bps, 7 data bits, even parity, 1 stop
bits (9600, 7, E, 1).
M1002
MOV H86 D1036

SET M1138

Note:
1. After the communication format is modified, the format will stay intact when the ELC switches
from RUN to STOP.
2. Communication format will be reset to default setting after power is shut down.
Example 2: Modifying COM2 communication format
1. Add the below instructions on top of the program to modify the communication format of COM2.
When the ELC switches from STOP to RUN, the program will detect whether M1120 is ON in
the first scan. If M1120 is ON, the program will modify the communication settings of COM2
according to the value set in D1120
2. Modify COM2 communication format to ASCII mode, 9600bps, 7 data bits, even parity, 1 stop
bits (9600, 7, E, 1)
M1002
MOV H86 D1120

SET M1120

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Note:
1. Do NOT write any communication instruction in the program when COM2 is used as slave.
2. After the communication format is modified, the format will stay intact when the ELC switches
from RUN to STOP.
3. Communication format will be reset to default setting after power is shut down.
Example 3: Modifying COM3 communication format
1. Add the below instructions on top of the program to modify the communication format of COM3.
When the ELC switches from STOP to RUN, the program will detect whether M1136 is ON in
the first scan. If M1136 is ON, the program will modify the communication settings of COM3
according to the value set in D1109
2. Modify COM3 communication format to ASCII mode, 9600bps, 7 data bits, even parity, 1 stop
bits (9600, 7, E, 1).
M1002
MOV H86 D1109

SET M1136

Example 4: RTU mode setting of COM1、COM2、COM3

1. COM1, COM2 and COM3 support ASCII/RTU mode. COM1 is set by M1139, COM2 is set by
M1143 and COM3 is set by M1320. Set the flags ON enables RTU mode while OFF enables
ASCII mode.
2. Modify COM1/COM2/COM3 communication format to RTU mode, 9600bps, 8 data bits, even
parity, 1 stop bits (9600, 8, E, 1).
COM1:
M1002
MOV H87 D1036

SET M1138

SET M1139

COM2:
M1002
MOV H87 D1120

SET M1120

SET M1143

COM3:
M1002
MOV H87 D1109

SET M1136

SET M1320

Note:
1. The modified communication format will not be changed when the ELC state turns from RUN
to STOP.
2. If the ELC is powered OFF then ON again after communication format is modified,
COM1~COM3 will be reset to default communication format (9600, 7, E, 1).

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Example 5: RTU mode of setting COM2 with the generation of interruption I170.
1. Only ELC-PV/ELC2-PV support the generation of interruption I170 when the data receiving is
completed in Slave mode.
2. Normally when the communication terminal of the ELC is in Slave mode, ELC will not
immediately process the communication data entered but process it after the END is executed.
Therefore, when the scan time is very long and you need the communication data to be
processed immediately, you can use interruption I170 for this matter.
3. Example of interruption I170 (after the data receiving is completed in Slave mode)
EI
M1002
MOV H87 D1120

SET M1120

SET M1143

FE ND

I170 IRET

END

With I170 in the program, when COM2 is in Slave mode and there are communication data
coming in, ELC will process the data and respond immediately.
Notes:
1. DO NOT updat program on-line when using I170.
2. The scan time of ELC will be slightly longer.

Function Group Special High-speed pulse output (ELC-PA)

Number M1133~M1135, D1133~D1136

Contents:
ELC- PA controllers: Special High-speed pulse output
1. The definition of special D and special M for special high-speed pulse (50KHz) output function:
Function
M1133 Output switch (ON is start executing) for special high-speed pulse (50KHz)
M1134 ON is continuous output switch for special high-speed pulse Y0 (50KHz)
M1135 Output pulse number attained flag for special high-speed pulse Y0 (50KHz)
D1133 Start number of control register (D) for special high-speed pulse Y0 (50KHz)
2. Corresponding table for D1133 parameter
Index Function
+0 Special high-speed pulse output frequency (lower 16-bit of 32 bits)
+1 Special high-speed pulse output frequency (upper 16-bit of 32 bits)
+2 Special high-speed pulse output number (lower 16-bit of 32 bits)
+3 Special high-speed pulse output number (upper 16-bit of 32 bits)
+4 Display present special high-speed pulse output number (lower 16-bit of 32 bits)
+5 Display present special high-speed pulse output number (upper 16-bit of 32 bits)
Function explanation:
1. Output frequency and output numbers above can be modified when M1133=on and
M1135=OFF. It will not affect present output pulse once output

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2. Frequency or output target number is changed. Present output pulse number will be displayed
once a scan time update. It will be cleared to 0 when M1133 is from OFFON and it will keep
that last output number when M1133 is from ONOFF.
Note:
1. This special high-speed pulse output function can use special Y0 output point in RUN. It can
exist with PLSY Y0 at the same time and PLSY (Y1) will not be affected. If instruction PLSY
(Y0) is executed prior to this function, this function cannot be used and vice versa. When
executing this function, general Y0 output will be invalid and outputs point of Y1~Y7 can be
used.
2. The difference between this function and instruction PLSY is higher than output frequency.
The maximum output can up to 50KHz.

Function Group Expansion Connected Detection

Number D1140, D1142, D1143, D1145

Contents:
D1140: Number of right-side modules (AIO, PT, TC, etc.), max. 8 modules can be connected.
D1142: Digital expansion input X point number.
D1143: Digital expansion input Y point number.
D1145: Number of special left-side expansion modules (Analog in, Analog out, PT, TC, etc.); Max. 8
(available in ELC-PV, ELC2-PC/PA/PE/PV only)

Function Group Adjustable Acceleration/Deceleration Pulse Output Function Explanation

Number M1144~M1149, M1154, D1030, D1031, D1144, D1154, D1155

Contents:
1. For the ELC-PA Controllers, the definition of special D and special M of adjustable accel/decel
pulse output function:
Function
M1144 Start switch of accel/decel pulse output
M1145 Flag that is used in acceleration
M1146 Target frequency attained flag
M1147 Flag that is used in deceleration
M1148 Completed function flag
M1149 stop counting temporarily flag
M1154 Start designated deceleration gap time flag and frequency flag
D1030 Lower 16-bit of 32-bit of Y0 pulse accumulative output numbers
D1031 Upper 16-bit of 32-bit of Y0 pulse accumulative output numbers
D1144 Using parameter index (correspond to D component)
D1154 Recommended value of designated deceleration gap time (10~32767 ms)
D1155 Recommended value of designated acceleration gap frequency (-1~ - 32700 Hz)
2. Corresponding table of parameter D1144
Index Function
+0 Total segment number (n) (the maximum number is 10)
+1 Present execution segment (read only)
+2 Start frequency of first segment (SF1)
+3 Interval time of first segment (GT1)
+4 Interval frequency of first segment (GF1)
+5 Target frequency of first segment (TF1)
+6 Lower 16-bit of 32-bit of target number of first segment output pulse
+7 Upper 16-bit of 32-bit of target number of first segment output pulse
+8 Start frequency of second segment (SF2)
+9 Interval time of second segment (GT2)
+10 Interval frequency of second segment (GF2)
+11 Target frequency of second segment (TF2)

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Index Function
+12 Lower 16-bit of 32-bit of target number of second segment output pulse
+13 Upper 16-bit of 32-bit of target number of second segment output pulse
: :
+n*6+2 Start frequency of nth segment (SFn)
+n*6+3 Interval time of nth segment (GTn)
+n*6+4 Interval frequency of nth segment (GFn)
+n*6+5 Target frequency of nth segment (TFn)
+n*6+6 Lower 16-bit of 32-bit of target number of nth segment output pulse
+n*6+7 Upper 16-bit of 32-bit of target number of nth segment output pulse
Function Explanation:
This function can only be used for Y0 output point and the timing will be as follows. After filling
parameter table, set M1144 to start (it should be used in RUN mode)

GF
Frequency(Hz)
GT
TF2
GT
SF3
SF2 TF3
TF1 SF4
TF4

SF1
Time(ms)

1st section 3rd section

pulse number 2nd section pulse number 4th section
(SE1) pulse number (SE3) pulse number
(SE2) (SE4)

Usage rule and restriction:

1. The minimum frequency of start frequency and target frequency should be equal to or greater
than 200Hz. If it is less than 200Hz, it means finish executing or not to execute.
2. The maximum frequency of start frequency of target frequency is 32,700Hz. It will execute in
32,700Hz as it is greater than 32,700Hz.
3. The interval time range is 1~32,767ms and its unit is ms.
4. The interval frequency range in acceleration segment is 1Hz~32,700Hz and in deceleration
segment is -1~-32,700Hz. If it is set to 0Hz, the executed segment cannot be up to target
frequency, but it will transfer to execute next segment after reaching target number.
5. Target number of segment pulse output should be greater than ((GF*GT/1000)* ((TF-SF)/GF).
Refer to example 1 for detail. Once Target number of segment pulse output isn’t greater than
((GF*GT/1000)* ((TF-SF)/GF), this function cannot be used. The improve method is to add
interval time or add target number of pulse output.
6. If there is Y0 output designated by high-speed instruction in RUN mode, Y0 output
7. Instruction will be started as high priority.
8. After starting to execute M1144, if M1148 outputs without attaining completed function flag and
M1144 is closed, this function will start deceleration function. If designated acceleration
function flag M1154 is OFF, it will reduce 200Hz per 200ms and stop output pulse till output
frequency is less than 200Hz and set M1147 to deceleration flag. But if designated
deceleration flag M1154 is ON, it will be executed by interval time and frequency that defined
by user. And interval time cannot be less than or equal to 0 (if it is less than or equal to 0,
factory setting will be set to 200ms). Interval frequency cannot be greater than or equal to 0

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(factory setting will be set to -1KHz when it is equal to 0 and factory setting will be added
negative sign automatically when it is greater than 0.)
9. When M1148 attains completed function flag and M1144 is closed, this function will not start
deceleration function and it will clear M1148 flag. Once M1144 is closed, it will clear M1149
flag.
10. The execution segment of this function will execute by total segment number. The maximum
segment is 10 segments.
11. The acceleration/deceleration of this function will execute by start frequency of the next
segment, i.e. when target frequency of execution segment is less than start frequency of the
next segment, the next segment is acceleration and the target frequency of the next segment
must be greater than start frequency of the next segment. When target frequency of execution
segment is greater than the next segment frequency, the next segment is deceleration;
therefore, target frequency of the next segment must be less than start frequency of the next
segment. If user cannot set it by this way, we cannot ensure that you can get correct output
pulse.
12. When STOPRUN, M1144~M1149 will be cleared to OFF. When RUNSTOP, M1144 will
be cleared and M1145~M1149 will not be cleared. D1144 will be cleared to 0 when it is from
OFFON and unchanged in other case.
13. The valid parameter range is D0~D999 and D2000~D4999. the ELC will not execute this
instruction, and close M1144 if the parameter is out of range (includes all segment
parameters).
Example 1:
To calculate output number of acceleration/deceleration of each segment and target frequency
If setting start frequency of segment to 200Hz, segment interval time to 100ms, segment gap
frequency to 100Hz, segment target frequency to 500Hz and target number of segment pulse is
1000 pulses. The calculation will be in the following:
1. Output pulse number at start acceleration/deceleration is 200*100/1000 = 20 pulses
2. Output pulse number of the first acceleration interval is 300*100/1000 = 30 pulses
3. Output pulse number of the second acceleration interval is 400*100/1000 = 40 pulses
4. Output pulse number of target frequency is 1000  (40+30+20) = 910 pulses
(NOTE: it is recommended to set this number to be greater than 10)
5. Output time of target frequency is 1 / 500 * 910 = 1820 ms
6. Total time of this segment is 1820 + 3*100 = 2120 ms

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2 . P r o g r a m m i n g C o n c e p ts

Example 2:
Simple acceleration/deceleration pulse output program of a segment acceleration and a segment
deceleration
M1002
MOV K200 D1144

MOV K2 D200

MOV K250 D202

MOV K500 D203

MOV K250 D204

MOV K1000 D205

DMOV K2000 D206

MOV K750 D208

MOV K500 D209

MOV K-250 D210

MOV K250 D211

DMOV K200 D212

M0
M1144

END

Example 3:
Pulse output program of a segment acceleration/deceleration with direction
Y7=OFF
TF1
SF2

TF2
SF1
X0=ON

Position

Zero point SF1

TF2

SF2 TF1
Y7=On
Explanation:
1. Acceleration/deceleration setting is as example 2.
2. Figure above is the example of position movement. When X0 contact is ON, it will start to
move and it will stop when X0 contact is OFF. (Y7 is for direction setting)
3. Program is shown in the following.

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2 . P r o g r a m m i n g C o n c e p ts

M1002
RST M0

RST M1
X0
SET M0
X0 M0
ALT M1
M1
Y7
M1
SET M0
M1

M1148
RST M0
M0
M1144
X0
RST M0

END

Example 4: apply acceleration and deceleration of a segment to zero point return program.
1. Relative flag timing chart is shown in the following.
Acceleration for Deceleration for
returning to zero point returning to zero point

Stop returning to zero point

M1144

M1148

Stop pulse output

M1149
2. The relation between frequency and position are shown in the following.
Frequency(Hz)

zero point

Position

Acceleration for Deceleration for

returning to zero point returning to zero point
3. Number setting of acceleration/deceleration, frequency and pulse are shown in the following.
(correspond to component D)
Index Settings
+0 2
+2 250(Hz)

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Index Settings
+3 100(ms)
+4 500(Hz)
+5 10000(Hz)
+6, +7 10(pulse)
+8 9750(Hz)
+9 50(ms)
+10 -500(Hz)
+11 250(Hz)
+12, +13 30000(pulse)
4. Program is shown in the following: (it assumes contact X7 to be start reset trigger switch)
X7
SET M1144

SET M1149
X0
RST M1149
X0
SET M1148

RST M1144

END

5. Explanation:
a) After contact X7 is triggered, M1144 will set to start acceleration and set M1149 not to count
pulse number. And it will send 10 pulses once deceleration switch X0 is triggered and then
enter deceleration segment.
b) To set M1148 to end pulse output by manual and close this function once X0 is closed.
c) Note: This example is just an application method that user should adjust parameters settings
used in acceleration/deceleration segment according to actual machine characteristics and
limitation.

Function Group Single Step Execution

Number M1170, M1171, D1170

Contents:
1. Special D and special M for single step execution for the ELC-PV, ELC2-PV:
Function
M1170 Start flag
M1171 Action flag
D1170 STEP No. of the currently executed instruction
2. The function:
a. Execution timing: The flag is valid only when the ELC is in RUN status.
b. Action steps:
i) When M1170 is enabled, the ELC enters the single step execution mode. the ELC stays
at a specific instruction, stores the location of STEP in D1170 and executes the instruction
once.
ii) When M1171 is forced “ON”, the ELC executes the next instruction and stops. At the
same time, the ELC auto-force “OFF” M1171 and stops at the next instruction. D1170
stores the present STEP value.
iii) When Y output is in single step execution mode, Y outputs immediately without having to
wait until END instruction is being executed.
3. Note:
a) Instruction that will be affected by scan time will be executed incorrectly due to the single
step execution. For example, when HKY instruction is executed, it takes 8 scan times to

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obtain a valid input value from a key. Therefore, the single step execution will result in
incorrect actions.
b) High-speed pulse input/output and high-speed counter comparison instructions are
executed by hardware; therefore, they will not be affected by the single step execution.

Function Group 2-phase Pulse Output Function

Number M1172~M1174, D1172~D1177

Contents:
For the ELC-PA Controllers, the definition of special D and special M of 2-phase output function:
Function Explanation
M1172 2-phase pulse output switch
M1173 ON is continuous output switch
M1174 Output pulse number attained flag
D1172 2-phase output frequency (12Hz~20KHz)
D1173 2-phase output mode selection (k1and k2)
D1174 Lower bit of 32-bit of 2-phase output pulse target number
D1175 Upper bit of 32-bit of 2-phase output pulse target number
D1176 Lower bit of 32-bit of 2-phase present output pulse number
D1177 Upper bit of 32-bit of 2-phase present output pulse number
Function Explanation:
1. Output frequency = 1/T as shown in the figure below. There are two output modes, k1 and k2,
k1 means A phase gets ahead of B phase and k2 means B phase gets ahead of A phase.
Output number calculation adds 1 once there is a phase difference, such as figure below,
there are 8 output pulses. When output numbers attains, M1174 will be ON and if you want to
clear M1174, you should close M1172.
T

Y0(A)

Y1(B)

1 2 7 8
2. Output frequency, output target number and mode selection can be modified when
M1172=ON and M1174=OFF. The modification of output frequency and output target number
will not affect present output pulse number but mode selection modification will clear present
output pulse number to 0. Present output pulse number will be updated once scan time
updates and it will clear to 0 when M1172 is from StopRun, and keep that last output number
when M1172 is from RunStop.
Note:
This function just can be used at RUN mode and can exist in program with PLSY instruction. But if
instruction PLSY is executed first, this function cannot be used, and vice versa.

Function Group VR Volume

Number M1178~M1179, D1178~D1179

Contents:
For the ELC-PV/ELC2-PV/PH/PE/PA controllers, the definition of special D and special M of built-in
2 points VR Variable resistor function:
Function
M1178 Start VR0
M1179 Start VR1
D1178 VR0 value

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Function
D1179 VR1 value
Function explanation:
1. This function only can be used at RUN mode. When M1178=ON, the variable value of VR 0
will be converted to digit 0~255 and saved in D1178. When M1179=ON, the variable value of
VR 1 will be converted to digit 0~255 and saved in D1179.
2. Refer to instruction VRRD for detail.

Function Group Interrupt instruction for reading pulse number

Number D1180~D1181, D1198~D1199

Contents:
3. In ELC-PA controllers, it is possible to use Interrupt instruction to read the value of high-speed
counter and store in D1180~D1181, D1198~D1199.
4. Function:
a) In ELC-PA V1.2 and above, X0 (counter input) and X4 (external Interrupt) will correspondingly
work together with C235, C251, C253, and I401. Use D1180 and D1181 those are total 32 bit
to set X0 and X4. X1 (counter input) and X5 (external Interrupt) will correspondingly work
together with C236 and I501. Use D1198 and D1199 those are total 32 bit to set X1 and X5.

Function Group Power Loss Latched Range Setting

Number D1200~D1219

Contents:
For ELC-PA/PV, ELC2-PV Controllers, to set latched range. The latched range will be from start
address number to end address number.

Function Group Reverse Interrupt Trigger Pulse Direction

Number M1280, M1284, M1286

Contents:
1. The flags should be used with EI instruction and should be inserted before EI instruction
2. The default setting of interrupt I101 (X0) is rising-edge triggered. If M1280 is ON and EI
instruction is executed, the ELC will reverse the trigger direction as falling-edge triggered. The
trigger pulse direction of X1 will be set as rising-edge again by resetting M1280.
3. When M0 = OFF, M1280 = OFF. X0 external interrupt will be triggered by rising-edge pulse.

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2 . P r o g r a m m i n g C o n c e p ts

4. When M0 = ON, M1280 = ON. X0 external interrupt will be triggered by falling-edge pulse.
Users do not have to change I101 to I000.
M0
OUT M1280

FEND
M1000
I001 INC D0

IRET

END

Function Group Stores Value of High-speed Counter when Interrupt Occurs

Number D1240~D1241, D1242~D1243

Contents:
1. If external interrupts are applied on input points for Reset, the interrupt instructions have the
priority in using the input points. In addition, the ELC will move the current data in the counters
to the associated data registers below then reset the counters.
Special D D1241, D1240 D1243, D1242
Counter C243 C246 C248 C252 C244 C250 C254
Interrupt signal X1 X4 X3 X5
2. Function:
a) When X0 (counter input) and X1 (external Interrupt) correspondingly work together with C243,
and I100/I101, the ELC will move the count value to D1241 and D1240.
b) When X0 (counter input) and X4 (external Interrupt) correspondingly work together with C246,
C248, C252 and I400/I401, the ELC will move the count value to D1241 and D1240
c) When X2 (counter input) and X3 (external Interrupt) correspondingly work together with C244,
and I300/I301, the ELC will move the count value to D1243 and D1242.
d) When X2 (counter input) and X5 (external Interrupt) correspondingly work together with C250,
C254 and I500/I501, the ELC will move the count value to D1243 and D1242.
Example:

EI
M1000
DCNT C243 K100

FEND
M1000
I101 DMOV D1240 D0

IRET

END

When external interrupt (X1, I101) occurs during counting process of C243, the count value in C243
will be stored in (D1241, D1240) and C243 is reset. After this, the interrupt subroutine I101 will be
executed

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2 . P r o g r a m m i n g C o n c e p ts

Function Group Input Point X can force to be ON/OFF

Number M1304

Contents:
1. For ELCB-PB, when M1304 = On, the X input points (X0 ~ X17) on MPU can be set On/Off by
peripheral devices. However, the LED indicators will not respond to the setup.
2. For ELC-PA, when M1304 = On, peripheral devices can set On/Off of X0 ~ X17 on the MPU,
but the LED indicators will not respond to it.
3. For ELC-PV/ELC2-PV, when M1304 = On, peripheral devices can set On/Off of X input points
on the MPU, but the LED indicators will not respond to it.
4. For ELCM-PH/PA, ELC2-PB/PH/PA/PE when M1304 = ON, input point X of the ELC can be
forced to be ON-OFF by using peripheral ELCSoft, but the associated hardware LED will not
respond to it.

Function Group Output specified pulses or seek Z phase signal when zero point is achieved.
Number M1308, D1312

Contents:
When zero point is achieved, ELC can output specified pulses or seek Z phase signal by this
function. Input terminals X2, X3 are the Z-phase signal input point of CH1, CH2. When M1308= ON,
D1312 is the setting register to specify the additional pulses within the range -30,000~30,000.
Specified value exceeds the range will be changed as the max/min value automatically. When
D1312 is set to 0, the additional pulses output function will be disabled.
Functions of other input terminals:
X4 → CH1 DOG signal input X6 → CH2 DOG signal input
X5 → CH1 LSN signal input X7 → CH2 LSN signal input

Function Group Right-Side Special Expansion Module ID

Number D1320 ~ D1327

Contents:
1. The ID of right-side special extension module, if any, connected to ELC-PV, ELC2-PV are
stored in D1320 ~ D1327 in sequence.
2. ID of each AIO module for ELC and ELC2 series:
Module Name Module ID (hex) Module Name Module ID (hex)
ELC-AN04ANNN H’0088 ELC-AN06AANN H’00CC
ELC-AN02NANN H’0049 ELC-PT04ANNN H’008A
ELC-AN04NANN H’0089 ELC-TC04ANNN H’008B
3. The ID of special expansion module, if any, connected to ELCM-PH/PA are stored in D1320 ~
D1327 in sequence.
4. ID of each AIO module for ELCM-PH/PA:
Module Name Module ID (hex) Module Name Module ID (hex)
ELCM-AN04ANNN H’0080 ELCM-AN06AANN H’00C4
ELCM-AN02NANN H’0041 ELCM-PT04ANNN H’0082
ELCM-AN04NANN H’0081 ELCM-TC04ANNN H’0083

Function Group Left-Side High-Speed Special Expansion Module ID

Number D1386 ~ D1393

Contents:
1. The ID of left-side special extension module, if any, connected to
ELC-PV/ELC2-PV/PA/PH/PE are stored in D1386 ~ D1393 in sequence.
2. Left-side special expansion module ID for ELC and ELC2 series.
Name ID (HEX)
ELC-CODNETM H’4131
ELC-COENETM H’4050

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Name ID (HEX)
ELC-COCANOM H’4133

Function Group Mapping function for right-side high-speed special modules

Number M1183, D9900~ D9979, D4900~D4979

Contents:
The default value of M1183 in ELCM-PH/ PA is Off. When M1183 is Off, the mapping function is
enabled.
The default value of M1183 in ELC2-PB/PH/PA/PE/PV is On. When M1183 is On, the mapping
function is disabled.
ELC2-PV/ELCM-PH/ELCM-PA/
Model name ELC2-PB
ELC2-PC/ELC2-PA/ELC2-PE
Mapping range D9900~D9979 D4900~D4979
Example:
If the modules connected to ELCM-PH from left to right are ELCM-AN04NANN and
ELCM-AN04ANNN, and M1183 is Off, D9900~D9903 will be assigned to the first
ELCM-AN04NANN, and D9910~D9913 will be assigned to the second ELCM-AN04NANN.
Model name ELCM-PH ELCM-AN04NANN ELCM-AN04ANNN
Channel 1 (Ch1) D9900 D9910
Channel 2 (Ch2) D9901 D9911
Channel 3 (Ch3) D9902 D9912
Channel 4 (Ch4) D9903 D9913

If the modules connected to ELC2-PB from left to right are ELCM-AN04NANN and
ELCM-AN04ANNN, and M1183 is Off, D4900~D4903 will be assigned to the first
ELCM-AN04NANN, and D4910~D4913 will be assigned to the second ELCM-AN04NANN.
Model name ELC2-PB ELCM-AN04NANN ELCM-AN04ANNN
Channel 1 (Ch1) D4900 D4910
Channel 2 (Ch2) D4901 D4911
Channel 3 (Ch3) D4902 D4912
Channel 4 (Ch4) D4903 D4913

Function Group Output clear signals when ZRN is completed

Number M1346

Contents:
When M1346 = ON, ELC will output clear signals when ZRN is completed. The clear signals to Y0,
Y1 will be sent by Y4 for 20ms, and the clear signals to Y2, Y3 will be sent by Y5 for 20ms.

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2 . P r o g r a m m i n g C o n c e p ts

Function Group ELC Link

M1350-M1356, M1360-M1519, D1355-D1370, D1399, D1415-D1465,
Number
D1480-D1991
Contents:
Explanation of Special D and special M explanation of ELC LINK ID1–ID8 for ELC-PA/PV,
ELC2- PB/PA/PH/PE/PV, ELCM-PH/PA:
MASTER ELC
SLAVE ID 1 SLAVE ID 2 SLAVE ID 3 SLAVE ID 4 SLAVE ID 5 SLAVE ID 6 SLAVE ID 7 SLAVE ID 8
Read Write Read Write Read Write Read Write Read Write Read Write Read Write Read Write
out in out in out in out in out in out in out in out in

D1480 D1496 D1512 D1528 D1544 D1560 D1576 D1592 D1608 D1624 D1640 D1656 D1672 D1688 D1704 D1720
| | | | | | | | | | | | | | | |
D1495 D1511 D1527 D1543 D1559 D1575 D1591 D1607 D1623 D1639 D1655 D1671 D1687 D1703 D1719 D1735

Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item
num num num num num num num num num num num num num num num num

D1434 D1450 D1435 D1451 D1436 D1452 D1437 D1453 D1438 D1454 D1439 D1455 D1440 D1456 D1441 D1457

Slave Device Internal Address to Read/Write

D1355 D1415 D1356 D1416 D1357 D1417 D1358 D1418 D1359 D1419 D1360 D1420 D1361 D1421 D1362 D1422

M1355 = ON, Slave status is user-defined. Set the linking status of Slave manually by M1360~M1375.
M1355 = OFF, Slave status is auto-detected. Linking status of Slave can be monitored by M1360~M1375

M1360 M1361 M1362 M1363 M1364 M1365 M1366 M1367

Action indication flag for master ELC do to slave ELC

M1376 M1377 M1378 M1379 M1380 M1381 M1382 M1383

Read/write error flag

M1392 M1393 M1394 M1395 M1396 M1397 M1398 M1399

Read completed flag (Whenever finishing a ELC read/write, this flag will be set to OFF automatically)

M1408 M1409 M1410 M1411 M1412 M1413 M1414 M1415

Write completed flag (whenever finishing a ELC read/write, this flag will be OFF automatically)

M1424 M1425 M1426 M1427 M1428 M1429 M1430 M1431

       
SLAVE ID 1 SLAVE ID 2 SLAVE ID 3 SLAVE ID 4 SLAVE ID 5 SLAVE ID 6 SLAVE ID 7 SLAVE ID 8
Read Write Read Write Read Write Reado Write Read Write Read Write Read Write Read Write
out in out in out in ut in out in out in out in out in

D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200
| | | | | | | | | | | | | | | |
D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215

Factory setting of starting communication address to read is H1064 (D100).

Factory setting of starting communication address to write is H10C8 (D200).

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Explanation of Special D and special M explanation of ELC LINK ID9–ID16 for ELC-PA/PV,
ELC2-PB/PA/PH/PE/PV, ELCM-PH/PA:
MASTER ELC

SLAVE ID 9 SLAVE ID 10 SLAVE ID 11 SLAVE ID 12 SLAVE ID 13 SLAVE ID 14 SLAVE ID 15 SLAVE ID 16

Read Write Read Write Read Write Reado Write Read Write Read Write Read Write Read Write
out in out in out in ut in out in out in out in out in
D1736 D1752 D1768 D1784 D1800 D1816 D1832 D1848 D1864 D1880 D1896 D1912 D1928 D1944 D1960 D1976
| | | | | | | | | | | | | | | |
D1751 D1767 D1783 D1799 D1815 D1831 D1847 D1863 D1879 D1895 D1911 D1927 D1943 D1959 D1975 D1991

Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item
num num num num num num num num num num num num num num num num

D1442 D1458 D1443 D1459 D1444 D1460 D1445 D1461 D1446 D1462 D1447 D1463 D1448 D1464 D1449 D1465

Slave Device Internal Address to Read/Write

D1363 D1423 D1364 D1424 D1365 D1425 D1366 D1426 D1367 D1427 D1368 D1428 D1369 D1429 D1370 D1430

M1355 = ON, Slave status is user-defined. Set the linking status of Slave manually by M1360~M1375.
M1355 = OFF, Slave status is auto-detected. Linking status of Slave can be monitored by M1360~M1375
M1368 M1369 M1370 M1371 M1372 M1373 M1374 M1375

Action indication flag for master ELC do to slave ELC

M1384 M1385 M1386 M1387 M1388 M1389 M1390 M1391

Read/write error flag

M1400 M1401 M1402 M1403 M1404 M1405 M1406 M1407

Read completed flag (Whenever finishing a ELC read/write, this flag will be set to OFF automatically)

M1416 M1417 M1418 M1419 M1420 M1421 M1422 M1423

Write completed flag (whenever finishing a ELC read/write, this flag will be set to OFF automatically)

M1432 M1433 M1434 M1435 M1436 M1437 M1438 M1439

       

SLAVE ID 9 SLAVE ID 10 SLAVE ID 11 SLAVE ID 12 SLAVE ID 13 SLAVE ID 14 SLAVE ID 15 SLAVE ID 16

Read Write Read Write Read Write Reado Write Read Write Read Write Read Write Read Write
out in out in out in ut in out in out in out in out in
D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200
| | | | | | | | | | | | | | | |
D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215
Factory setting of Communication address for reading is H1064 (D100).
Factory setting of Communication address for writing is H10C8 (D200).

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Special D and special M for ID1 ~ ID8 of the 32 stations in ELC LINK (M1353 = ON) for ELC-PV,
ELC2-PV:
MASTER ELC
SLAVE ID 1 SLAVE ID 2 SLAVE ID 3 SLAVE ID 4 SLAVE ID 5 SLAVE ID 6 SLAVE ID 7 SLAVE ID 8
Read Write Read Write Read Write Read Write Read Write Read Write Read Write Read Write
out in out in out in out in out in out in out in out in

M1353 = ON: Enable 32 stations in the Link and the function of reading/writing more than 16 data (SET M1353); the No. of
D registers for storing the read/written data.

D1480 D1496 D1481 D1497 D1482 D1498 D1483 D1499 D1484 D1500 D1485 D1501 D1486 D1502 D1487 D1503

Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item
num num num num num num num num num num num num num num num num

D1434 D1450 D1435 D1451 D1436 D1452 D1437 D1453 D1438 D1454 D1439 D1455 D1440 D1456 D1441 D1457

Slave Device Internal Address to Read/Write

D1355 D1415 D1356 D1416 D1357 D1417 D1358 D1418 D1359 D1419 D1360 D1420 D1361 D1421 D1362 D1422

Action indication flag for master ELC do to slave ELC

M1376 M1377 M1378 M1379 M1380 M1381 M1382 M1383

Read/write error flag

M1392 M1393 M1394 M1395 M1396 M1397 M1398 M1399

Read completed flag (Whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1408 M1409 M1410 M1411 M1412 M1413 M1414 M1415

Write completed flag (whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1424 M1425 M1426 M1427 M1428 M1429 M1430 M1431

SLAVE ID 1 SLAVE ID 2 SLAVE ID 3 SLAVE ID 4 SLAVE ID 5 SLAVE ID 6 SLAVE ID 7 SLAVE ID 8

Read Write Read Write Read Write Read Write Read Write Read Write Read Write Read Write
out in out in out in out in out in out in out in out in

D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200
| | | | | | | | | | | | | | | |
D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215
Default start communication address D1355 ~ D1362 to be read = H1064 (D100)
Default start communication address D1415 ~ D1422 to be written = H10C8 (D200)

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Special D and special M for ID9 ~ ID16 of the 32 stations in ELC LINK (M1353 = ON) for
ELC-PV, ELC2-PV:
MASTER ELC
SLAVE ID 9 SLAVE ID 10 SLAVE ID 11 SLAVE ID 12 SLAVE ID 13 SLAVE ID 14 SLAVE ID 15 SLAVE ID 16
Read Write Read Write Read Write Read Write Read Write Read Write Read Write Read Write
out in out in out in out in out in Out in out in out in

M1353 = ON: Enable 32 stations in the Link and the function of reading/writing more than 16 data (SET M1353); the No. of
D registers for storing the read/written data.

D1488 D1504 D1489 D1505 D1490 D1506 D1491 D1507 D1492 D1508 D1493 D1509 D1494 D1510 D1495 D1511

Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item
num num num num num num num num num num num num num num num num

D1442 D1458 D1443 D1459 D1444 D1460 D1445 D1461 D1446 D1462 D1447 D1463 D1448 D1464 D1449 D1465

Slave Device Internal Address to Read/Write

D1363 D1423 D1364 D1424 D1365 D1425 D1366 D1426 D1367 D1427 D1368 D1428 D1369 D1429 D1370 D1430

Action indication flag for master ELC do to slave ELC

M1384 M1385 M1386 M1387 M1388 M1389 M1390 M1391

Read/write error flag

M1400 M1401 M1402 M1403 M1404 M1405 M1406 M1407

Read completed flag (Whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1416 M1417 M1418 M1419 M1420 M1421 M1422 M1423

Write completed flag (whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1432 M1433 M1434 M1435 M1436 M1437 M1438 M1439

SLAVE ID 9 SLAVE ID 10 SLAVE ID 11 SLAVE ID 12 SLAVE ID 13 SLAVE ID 14 SLAVE ID 15 SLAVE ID 16

Read Write Read Write Read Write Read Write Read Write Read Write Read Write Read Write
out in out in out in out in out in out in out in out in

D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200
| | | | | | | | | | | | | | | |
D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215

Default start communication address D1363 ~ D1370 to be read = H1064 (D100)

Default start communication address D1423 ~ D1430 to be written = H10C8 (D200)

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Special D and special M for ID17 ~ ID24 of the 32 stations in ELC LINK (M1353 = ON) for
ELC-PV, ELC2-PV:
MASTER ELC
SLAVE ID 17 SLAVE ID 18 SLAVE ID 19 SLAVE ID 20 SLAVE ID 21 SLAVE ID 22 SLAVE ID 23 SLAVE ID 24
Read Write Read Write Read Write Read Write Read Write Read Write Read Write Read Write
out in out in out in out in out in out in out in out in

M1353 = ON: Enable 32 stations in the Link and the function of reading/writing more than 16 data (SET M1353); the No. of
D registers for storing the read/written data.

D1576 D1592 D1577 D1593 D1578 D1594 D1579 D1595 D1580 D1596 D1581 D1597 D1582 D1598 D1583 D1599

Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item
num num num num num num num num num num num num num num num num

D1544 D1560 D1545 D1561 D1546 D1562 D1547 D1563 D1548 D1564 D1549 D1565 D1550 D1566 D1551 D1567

Slave Device Internal Address to Read/Write

D1512 D1528 D1513 D1529 D1514 D1530 D1515 D1531 D1516 D1532 D1517 D1533 D1518 D1534 D1519 D1535

Action indication flag for master ELC do to slave ELC

M1456 M1457 M1458 M1459 M1460 M1461 M1462 M1463

Read/write error flag

M1472 M1473 M1474 M1475 M1476 M1477 M1478 M1479

Read completed flag (Whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1488 M1489 M1490 M1491 M1492 M1493 M1494 M1495

Write completed flag (whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1504 M1505 M1506 M1507 M1508 M1509 M1510 M1511

SLAVE ID 17 SLAVE ID 18 SLAVE ID 29 SLAVE ID 20 SLAVE ID 21 SLAVE ID 22 SLAVE ID 23 SLAVE ID 24

Read Write Read Write Read Write Read Write Read Write Read Write Read Write Read Write
out in out in out in out in out in out in out in out in

D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200
| | | | | | | | | | | | | | | |
D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215
Default start communication address D1512 ~ D1519 to be read = H1064 (D100)
Default start communication address D1528 ~ D1535 to be written = H10C8 (D200)

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Special D and special M for ID25 ~ ID32 of the 32 stations in ELC LINK (M1353 = ON) for
ELC-PV, ELC2-PV:
MASTER ELC
SLAVE ID 25 SLAVE ID 26 SLAVE ID 27 SLAVE ID 28 SLAVE ID 29 SLAVE ID 30 SLAVE ID 31 SLAVE ID 32
Read Write Read Write Read Write Read Write Read Write Read Write Read Write Read Write
out in out in out in out in out in out in out in out in

M1353 = ON: Enable 32 stations in the Link and the function of reading/writing more than 16 data (SET M1353); the No. of
D registers for storing the read/written data.
D1584 D1600 D1585 D1601 D1586 D1602 D1587 D1603 D1588 D1604 D1589 D1605 D1590 D1606 D1591 D1607
Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item Item
num num num num num num num num num num num num num num num num

D1552 D1568 D1553 D1569 D1554 D1570 D1555 D1571 D1556 D1572 D1557 D1573 D1558 D1574 D1559 D1575

Slave Device Internal Address to Read/Write

D1520 D1536 D1521 D1537 D1522 D1538 D1523 D1539 D1524 D1540 D1525 D1541 D1526 D1542 D1527 D1543

Action indication flag for master ELC do to slave ELC

M1464 M1465 M1466 M1467 M1468 M1469 M1470 M1471

Read/write error flag

M1480 M1481 M1482 M1483 M1484 M1485 M1486 M1487

Read completed flag (Whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1496 M1497 M1498 M1499 M1500 M1501 M1502 M1503

Write completed flag (whenever finishing a ELC read/write, this flag will be set to OFF automatically)
M1512 M1513 M1514 M1515 M1516 M1517 M1518 M1519

SLAVE ID 25 SLAVE ID 26 SLAVE ID 27 SLAVE ID 28 SLAVE ID 29 SLAVE ID 30 SLAVE ID 31 SLAVE ID 32

Read Write Read Write Read Write Read Write Read Write Read Write Read Write Read Write
out in out in out in out in out in out in out in out in

D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200 D100 D200
| | | | | | | | | | | | | | | |
D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215 D115 D215
Default start communication address D1520 ~ D1527 to be read = H1064 (D100)
Default start communication address D1536 ~ D1543 to be written = H10C8 (D200)

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2 . P r o g r a m m i n g C o n c e p ts

Explanation:
1. The basic communication protocol for ELC LINK is MODBUS
2. ELC-PV/ELC2-PV supports 32 stations in the LINK and reading/writing of more than 16 data
(SET1353) (M1353 = On). ELC-PA, ELCM-PH/PA, ELC2-PB/PA/PH/PE supports 16 devices
in the LINK and reading/writing of more than 16 data.
3. ELC-PV/ELC2-PV: When a MASTER ELC and a Slave ELC is connected, they are able to
read/write maximum 100 WORD data (M1353 = On). ELC2-PB/PA/PH/PE: When a MASTER
ELC and a Slave ELC is connected, they are able to read/write maximum 50 WORD data
(M1353 = On). ELC-PA: Does not support M1353. When a Master ELC and a Slave ELC is
connected, they are able to read/write maximum 16 WORD data.
4. When the Master ELC is connected through COM2 (RS-485), baud rates and communication
formats of all Slave ELCs must be the same (set in D1120). When ELC-PA/PV, ELC2-PV as
Master, it supports ASCII and RTU format.
5. When Slave ELC is connected through COM2 (RS-485), baud rate and communication format
of all Slaves must be the same (set in D1120). ELC supports both ASCII and RTU mode.
When ELC-PA/PV, ELC2 series as Slave, it supports ASCII and RTU format.
6. When Slave ELC is connected through COM3 (RS-485), baud rate and communication format
of all Slaves must be the same (set in D1109). When ELC-PA/ PV, ELC2-PV as Slave, it only
supports ASCII format (Max. baud rate = 38,400bps).
7. For one-to-many LINK: Connected through RS-485. ELC COM2, COM3 support many
communication formats.
8. When M1356 = OFF(Default), the station number of the starting Slave (ID1) can be designated
by D1399 of Master ELC through ELC LINK, and ELC will automatically assign ID2~ID16 with
consecutive station numbers according to the station number of ID1. For example, if D1399 =
K3, Master ELC will send out communication commands to ID1~ID16 which carry station
number K3~K18. In addition, care should be taken when setting the station number of Slaves.
All station numbers of slaves should not be the same as the station number of the Master ELC,
which is set up in D1121/D1255.
9. When both M1353 and M1356 are ON, the station number of ID1~ID16 can be specified by the
user in D1900~D1915 of Master ELC. For example, when D1900~D1903 = K3, K3, K5, K5,
Master ELC will access the Slave with station number K3 for 2 times, then the slave with
station number K5 for 2 times as well. Note that all station numbers of slaves should not be the
same as the station number of the Master ELC, and M1353 must be set ON for this function.
10. The ID number of the starting slave can be designated by D1399 and should be limited to the
range K1~K214. Slave ID cannot be repeated or the same as Master ID (set in
D1121/D1255)
11. Station number selection function (M1356 = ON) is supported by ELCM-PH/PA and
ELC2-PB/PA/PH/PE/PV.
Operation:
1. Set up the baud rates and communication formats of Master ELC and all connected Slave
ELCs and make them the same. COM2_RS-485: D1120; COM3_RS-485: D1109.
2. Set up Master ELC ID by D1121 and the starting slave ID by D1399. Then, set slave ID of
each slave ELC. The ID of master ELC and slave ELC cannot be the same.
3. Set up the number of connected Slave stations and the number of data to be read in/written to
Slave stations. For ELC-PV/ELC2-PV/PB/PA/PH/PE ELCM-PH/PA (M1353 = On): Enable the
function of the 32(or 16) conncected Slaves and reading/writing of more than 16 data (Max.
100 data). Next, set up the No. of D registers for storing the read data (D1480 ~ D1495, D1576
~ D1591) and written data (D1496 ~ D1511, D1592 ~ D1607) (See the explanations above on
special D). ELC-PA, only supports reading/writing of 16 data. (If data length is not specified,
ELC will take default setting or the previous value as the set value. For details of data length
registers, please refer to the tables above)
4. Set device communication address to read/write to slave. (Refer to Special D explanation
above for special D setting. Factory setting of communication address for reading is H1064
(D100) and writing is H10C8 (D200).
5. Steps to start ELC LINK:
 Enable the function of more than 32 stations connected to ELC LINK and reading/writing
of 16 data (Max. 100 data) (M1353).
 Set ON M1354 to enable simultaneous data read/write in a polling of ELC LINK.

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2 . P r o g r a m m i n g C o n c e p ts

 When M1355 = On, M1360 ~ M1375 (M1440 ~ M1455) will be the flags for the ELC
designated to be connected to. When M1355 = Off, there will be detection on the slaves
connected, and M1360 ~ M1375 (M1440 ~ M1455) will become the flags for the
existence of connected ELC.
 Select auto mode on ELC LINK by M1351 or manual mode by M1352. (Note that the 2
flags should not be set ON at the same time.)Then, set up the times of polling cycle by
D1431.
 Start MASTER ELC LINK (M1350)
Master ELC action explanation:
1. M1353=ON, Enable the function of more than 32 stations connected to ELC LINK.
2. M1355 = ON, Slave status is user-defined. Set the linking status of Slave manually by
M1360~M1375 (M1440 ~ M1455).
 Select auto mode on ELC LINK by M1351 or manual mode by M1352. Auto mode and
manual mode should not be enabled at the same time.
 Enable ELC LINK (M1350). The linking status is specified by M1360~M1375 (M1440 ~
M1455), therefore Master ELC will access the designated Slaves according to
M1352~M1375 (M1440 ~ M1455) continuously no matter how many Slave ELC are
physically connected.
3. M1355 = OFF, Slave status is auto-detected. Linking status of Slave can be monitored by
M1360~M1375, M1440 ~ M1455.
 Select auto mode on ELC LINK by M1351 or manual mode by M1352. Auto mode and
manual mode should not be enabled at the same time.
 Enable ELC LINK (M1350). Master ELC will detect the connected Slaves and store the
number of connected ELCs in D1433. The time for detection differs by number of
connected Slaves and time-out setting in D1129.
 M1360~M1375 (M1440 ~ M1455) indicate the linking status of Slave ID 1~16 (ID 17~31)
 If no slave is detected, M1350 will be OFF and ELC Link will be stopped.
 ELC will only detect the number of slaves at the first time when M1350 turns ON.
 After auto-detection is completed, master ELC starts to access each connected slave.
Once slave ELC is added after auto-detection, master ELC cannot access it unless
auto-detection is conducted again.
4. Synchronous read/write function (M1354) has to be set up before enabling ELC LINK. Setting
up this flag during ELC LINK execution will not take effect.
5. When M1354=ON, it will use Modbus Function H17 (synchronous read/write function) for ELC
LINK communication function. If item number for writing is set to 0, the ELC will use Modbus
Function H03 (read multiple WORDs) for ELC LINK communication function. In the same way,
if item number for reading is set to 0, the ELC will use Modbus Function H06 (write one WORD)
or Modbus Function H10 (write multiple WORDs) for ELC LINK communication function.
6. When M1353 = OFF, ELC LINK accesses the Slave with max 16 words, and the data is
automatically stored in the corresponding registers. When M1353 = ON, up to 50 words are
accessible and the user can specify the starting register for storing the read/written data.
For example, if the register for storing the read/written data on Slave ID1 is specified as D1480
= K500, D1496 = K800, access data length D1434 = K50, D1450 = K50, registers of Master
ELC D500~D549 will store the data read from Slave ID1, and the data stored in D800~D849
will be written into Slave ID1.
7. Master ELC conducts reading before writing. Both reading and writing is executed according to
the range specified by user.
8. Master ELC will read/write to slave ELC in order, i.e. it will read/write to the next slave after
finishing a slave.
Automatic / Manual mode explanation:
1. Auto mode (M1351): when M1351 = ON, Master ELC will access slave ELCs as the operation
described above, and stop the polling till M1350 or M1351 is OFF.
2. Manual mode (M1352): When manual mode is selected, times of polling cycle in D1431 has to
be set up. A full polling cycle refers to the completion of accessing all Slaves. When ELC LINK
is enabled, D1432 starts to store the times of polling. When D1431 = D1432, ELC LINK stops
and M1352 is reset. When M1352 is set ON again, the ELC will start the polling according to
times set in D1431 automatically.

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2 . P r o g r a m m i n g C o n c e p ts

Note:
1. Auto mode M1351 and manual mode M1352 cannot be enabled at the same time. If M1351 is
enabled after M1352 is ON, ELC LINK will stop and M1350 will be reset.
2. Communication timeout setting can be modified by D1129 with available range 200 ≦D1129
≦ 3000. The ELC will take the upper / lower bound value as the set value if the specified
value is out of the available range. D1129 has to be set up before M1350 = ON.
3. ELC LINK function is only valid when baud rate is higher than 1200 bps. When baud rate is
less than 9600 bps, please set communication time-out to more than 1 second.
4. The communication is invalid when data length to be accessed is set to 0.
5. Access on 32-bit high speed counters (C200~C255) is not supported.
6. Available range for D1399: 1 ~ 230. The ELC will take the upper / lower bound value as the set
value if the specified value exceeds the available range.
7. D1399 has to be set up before enabling ELC LINK. Setting up this register during ELC LINK
execution will not take effect.
8. Advantage of using D1399 (Designating the ID of starting Slave): In old version of ELC LINK,
the ELC detects slaves from ID1 to ID16. Therefore, when ELC LINK is applied in multi-layer
nd rd
networks, e.g. 3 layers of networks, the Slave ID of 2 and 3 layer will be repeated. When
Slave ID is repeated, i.e. the same as Master ID, the Slave will be passed. In this case, only 15
Slaves can be connected in 3rd layer. To solve this problem, D1399 can be applied for
increasing the connectable Slaves in multi-layer network structure.

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2 . P r o g r a m m i n g C o n c e p ts

Operation flow chart:

Set starting reference for reading from slave ELC
Set data length to be read on Slave ELC
Set starting reference for writing in Slave ELC
Set data length to be written on Slave ELC
(ELC will take default or previous setting as the set value
if these registers are not specified)

Enable Disable
M1355

M1355 = ON, auto-detection disabled. M1350=OFF, Slave ID

Set the Slave to be linked by M1360~ auto-detection enabled
M1375 manually

Enable Communication by Disable

Modbus 0X17 function

SET M1354 RST M1354

Enable auto mode Enable manual mode

Manual / Auto mode
EASY PLC LINK

SET M1351 SET M1352

Set times of polling
cycle (D1431)

SET M1350
Start to execute ELC LINK

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2 . P r o g r a m m i n g C o n c e p ts

Example 1: ELC LINK uses with M1354

M1002
MOV K17 D1121

MOV H86 D1120

SET M1120

MOV K300 D1129

SET M1354
X1
M1350

M1351

END

Example 2: Connection of 1 Master and 2 Slaves by RS-485 and exchange of 16 data between
Master and Slaves through ELC LINK (M1353 = OFF, linkage of 16 stations, 16 data read/write
mode)
1. Write the ladder diagram program into Master ELC (ID#17)
M1002
MOV K17 D1121 Master ID#

MOV H86 D1120 COM2 communication protocol

SET M1120 Retain communication protocol

MOV K16 D1434 Number of data read from Slave ID#1

MOV K16 D1450 Number of data written into Slave ID#1

MOV K16 D1435 Number of data read from Slave ID#2

MOV K16 D1451 Number of data written into Slave ID#2

X1
M1351 Auto mode

M1350 Enable ELC LINK

END

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2 . P r o g r a m m i n g C o n c e p ts

2. When X1 = ON, the data exchange between Master and the two Slaves will be automatically
done in ELC LINK, i.e. the data in D100 ~ D115 in the two Slaves will be read into D1480 ~
D1495 and D1512 ~ D1527 of the Master, and the data in D1496 ~ D1511 and D1528 ~
D1543 will be written into D200 ~ D215 of the two Slaves.
Master ELC *1 Slave ELC*2
Read
D1480 ~ D1495 D100 ~ D115 of Slave ID#1

D1496 ~ D1511 Write D200 ~ D215 of Slave ID#1

D1512 ~ D1527 Read D100 ~ D115 of Slave ID#2

Write
D1528 ~ D1543 D200 ~ D215 of Slave ID#2
3. Assume the data in D for data exchange between Master and Slave before ELC LINK is
enabled (M1350 = OFF) are as the follow:
Master ELC Preset value Slave ELC Preset value
D1480 ~ D1495 K0 D100 ~ D115 of Slave ID#1 K5,000
D1496 ~ D1511 K1,000 D200 ~ D215 of Slave ID#1 K0
D1512 ~ D1527 K0 D100 ~ D115 of Slave ID#2 K6,000
D1528 ~ D1543 K2,000 D200 ~ D215 of Slave ID#2 K0

After ELC LINK is enabled (M1350 = ON), the data in D for data exchange will become:
Master ELC Preset value Slave ELC Preset value
D1480 ~ D1495 K5,000 D100 ~ D115 of Slave ID#1 K5,000
D1496 ~ D1511 K1,000 D200 ~ D215 of Slave ID#1 K1,000
D1512 ~ D1527 K6,000 D100 ~ D115 of Slave ID#2 K6,000
D1528 ~ D1543 K2,000 D200 ~ D215 of Slave ID#2 K2,000
4. The Master ELC has to be ELC-PA/PV, ELC2-PB/PH/PA/PE/PV, ELCM-PH/PA controllers,
and the Slave ELC can be any ELC controller.
5. There can be maximum 16 Slave ELCs in ELC LINK. See the special Ds in the Master ELC
corresponding to D100 ~ D115 and D200 ~ D215 in every Slave ELC in the tables of special M
and special D.
6. D1354 is ELC link scan cycle with unit is 1ms and max. display value is K32000. D1354 = K0
when ELC Link stops or when the first scan is completed.

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 Internal Device Communication Address
ELC communication Modbus communication
Device Range Type
address (Hex) address (Dec)
S 000~255 bit 0000~00FF 000001~000256
S 246~511 bit 0100~01FF 000247~000512
S 512~767 bit 0200~02FF 000513~000768
S 768~1023 bit 0300~03FF 000769~001024
X 000~377 (Octal) bit 0400~04FF 101025~101280
Y 000~377 (Octal) bit 0500~05FF 001281~001536
bit 0600~06FF 001537~001792
T 000~255
word 0600~06FF 401537~401792
M 000~255 bit 0800~08FF 002049~002304
M 256~511 bit 0900~09FF 002305~002560
M 512~767 bit 0A00~0AFF 002561~002816
M 768~1023 bit 0B00~0BFF 002817~003072
M 1024~1279 bit 0C00~0CFF 003073~003328
M 1280~1535 bit 0D00~0DFF 003329~003584
M 1536~1791 bit B000~B0FF 045057~045312
M 1792~2047 bit B100~B1FF 045313~045568
M 2048~2303 bit B200~B2FF 045569~045824
M 2304~2559 bit B300~B3FF 045825~046080
M 2560~2815 bit B400~B4FF 046081~046336
M 2816~3071 bit B500~B5FF 046337~046592
M 3072~3327 bit B600~B6FF 046593~046848
M 3328~3583 bit B700~B7FF 046849~047104
M 3584~3839 bit B800~B8FF 047105~047360
M 3840~4095 bit B900~B9FF 047361~047616
bit 0E00~0EC7 003585~003784
0~199 16-bit
word 0E00~0EC7 403585~403784
C
bit 0EC8~0EFF 003785~003840
200~255 32-bit
Dword 0EC8~0EFF 403785~403840
D 000~256 word 1000~10FF 404097~404352
D 256~511 word 1100~11FF 404353~404608
D 512~767 word 1200~12FF 404609~404864
D 768~1023 word 1300~13FF 404865~405120
D 1024~1279 word 1400~14FF 405121~405376
D 1280~1535 word 1500~15FF 405377~405632

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ELC communication Modbus communication
Device Range Type
address (Hex) address (Dec)
D 1536~1791 word 1600~16FF 405633~405888
D 1792~2047 word 1700~17FF 405889~406144
D 2048~2303 word 1800~18FF 406145~406400
D 2304~2559 word 1900~19FF 406401~406656
D 2560~2815 word 1A00~1AFF 406657~406912
D 2816~3071 word 1B00~1BFF 406913~407168
D 3072~3327 word 1C00~1CFF 407169~407424
D 3328~3583 word 1D00~1DFF 407425~407680
D 3584~3839 word 1E00~1EFF 407681~407936
D 3840~4095 word 1F00~1FFF 407937~408192
D 4096~4351 word 9000~90FF 436865~437120
D 4352~4607 word 9100~91FF 437121~437376
D 4608~4863 word 9200~92FF 437377~437632
D 4864~5119 word 9300~93FF 437633~437888
D 5120~5375 word 9400~94FF 437889~438144
D 5376~5631 word 9500~95FF 438145~438400
D 5632~5887 word 9600~96FF 438401~438656
D 5888~6143 word 9700~97FF 438657~438912
D 6144~6399 word 9800~98FF 438913~439168
D 6400~6655 word 9900~99FF 439169~439424
D 6656~6911 word 9A00~9AFF 439425~439680
D 6912~7167 word 9B00~9BFF 439681~439936
D 7168~7423 word 9C00~9CFF 439937~440192
D 7424~7679 word 9D00~9DFF 440193~440448
D 7680~7935 word 9E00~9EFF 440449~440704
D 7936~8191 word 9F00~9FFF 440705~440960
D 8192~8447 word A000~A0FF 440961~441216
D 8448~8703 word A100~A1FF 441217~441472
D 8704~8959 word A200~A2FF 441473~441728
D 8960~9215 word A300~A3FF 441729~441984
D 9216~9471 word A400~A4FF 441985~442240
D 9472~9727 word A500~A5FF 442241~442496
D 9728~9983 word A600~A6FF 442497~442752
D 9984~10239 word A700~A7FF 442753~443008
D 10234~10495 word A800~A8FF 443009~443246

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ELC communication Modbus communication
Device Range Type
address (Hex) address (Dec)
D 10496~10751 word A900~A9FF 443247~443502
D 10752~11007 word AA00~AAFF 443503~443758
D 11008~11263 word AB00~ABFF 443759~444014
D 11264~11519 word AC00~ACFF 444015~444270
D 11520~11775 word AD00~ADFF 444271~444526
D 11776~11999 word AE00~AEDF 444527~444750

 Devices which are supported are listed below.

Device
X Y M S T C D
Model
C0~C127, D0~D599,
ELCB-PB X0~X177 Y0~Y177 M0~M1535 S0~S127 T0~T127
C232~C255 D1000~D1311
ELC-PA X0~X177 Y0~Y177 M0~M4095 S0~S1023 T0~T255 C0~C255 D0~D4999

ELC-PV X0~X377 Y0~X377 M0~M4095 S0~S1023 T0~T255 C0~C255 D0~D9999

ELCM-PH
ELCM-PA
X0~X377 Y0~X377 M0~M4095 S0~S1023 T0~T255 C0~C255 D0~D9999
ELC2-PC
ELC2-PA
ELC2-PB X0~X377 Y0~X377 M0~M4095 S0~S1023 T0~T255 C0~C255 D0~D4999
ELC2-PV
X0~X377 Y0~X377 M0~M4095 S0~S1023 T0~T255 C0~C255 D0~D11999
ELC2-PE

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MEMO

Instruction Set

This chapter contains all of the instructions that are used with the ELC controllers as well as detailed
information concerning the usage of the instructions.

This Chapter Contains

3.1 Basic Instructions (without API numbers) ...................................................................... 161

3.2 Basic Instruction Explanations ........................................................................................ 162

3.3 Pointers.............................................................................................................................. 173

3.4 Interrupt Pointers .............................................................................................................. 174

3.5 Application Programming Instructions ........................................................................... 176

3.6 Numerical List of Instructions .......................................................................................... 187

3.7 Detailed Instruction Explanation ...................................................................................... 200

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3. Instruction Set

3 Instruction Set
3.1 Basic Instructions (without API numbers)

Execution speed (us)

ELCM-PH
Code Function ELCM-PA
ELCB-PB ELC-PV STEPS
ELC2-PB ELC2-PE
ELC-PA ELC2-PV
ELC2-PC
ELC2-PA
LD Load contact A 3.8 0.76 0.64 0.24(0.56) 1~3
LDI Load contact B 3.88 0.78 0.68 0.24(0.56) 1~3

AND Series connection with A contact 2.32 0.54 0.58 0.24(0.56) 1~3

ANI Series connection with B contact 2.4 0.56 0.62 0.24(0.56) 1~3

OR Parallel connection with A contact 2.32 0.54 0.62 0.24(0.56) 1~3

ORI Parallel connection with B contact 2.4 0.56 0.64 0.24(0.56) 1~3

ANB Series connects the circuit block 1.76 0.68 0.68 0.24 1~3

ORB Parallel connects the circuit block 1.76 0.76 0.76 0.24 1~3

MPS Save the operation result 1.68 0.74 0.68 0.24 1~3
Read the operation result (the
MRD 1.6 0.64 0.54 0.24 1
pointer not moving)
MPP Read the result 1.6 0.64 0.54 0.24 1
OUT Drive coil 5.04 0.88 0.68 0.24(0.56) 1~3
SET Action latched (ON) 3.8 0.76 0.68 0.24(0.56) 1~3
RST Clear the contacts or the registers 7.8 2.2 1.04 0.24(0.56) 3
Connect the common series
MC 5.6 1 0.8 5.6 3
connection contacts
Disconnect the common series
MCR 5.7 1 0.8 5.7 3
connection contacts
END Program end 5 1 0.8 0.24 1
NOP No function 0.88 0.4 0.5 0.16 1
Step transition ladder start
STL 11.6 2.2 2 0.56 1
command
Step transition ladder return
RET 7.04 1.6 1.4 0.24 1
command
Note: For ELC-PV/ELC2-PV, the execution speed in the brackets ( ) refers to the execution speed of
designated operand M1536 ~ M4095.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 161
3. Instruction Set

3.2 Basic Instruction Explanations

Mnemonic Operands Function Program steps

LD X, Y, M, S, T, C Load A contact 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
The LD instruction is used on the A contact that has its start from the left BUS or the A contact that is
the start of a new block of program when using the ORB and ANB instructions (see later sections).
ELC2-PB/PH/PA/PE/PV V1.0 and ELCM-PH/PA V2.0 support the operands X, Y, M, S. These
operands can be qualified by E or F. Users have to use ELCSoft version 2.02 (or above).

Program Example:

X0 X1 Instruction: Operation:
Y1
; Load contact A of X0
LD X0
AND X1 ; Connect to contact A of X1 in series
OUT Y1 ; Drive Y1 coil

X1 Instruction: Operation:
LD X5E2 Y1
; Load contact A of X3 (E2=K-2)
LD X5E2
AND X1 ; Connect to contact A of X1 in series
OUT Y1 ; Drive Y1 coil

Mnemonic Operands Function Program steps

LDI X, Y, M, S, T, C Load B contact 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
The LDI instruction is used on the B contact that has its start from the left BUS or the B contact that
is the start of a new block of program when using the ORB and ANB instructions (see later sections).
ELC2-PB/PH/PA/PE/PV V1.0 and ELCM-PH/PA V2.0 support the operands X, Y, M, S. These
operands can be qualified by E or F. Users have to use ELCSoft version 2.02 (or above).

Program Example:

X0 X1 Instruction: Operation:
Y1
LDI X0 ; Load contact B of X0
AND X1 ; Connect to contact A of X1 in series
OUT Y1 ; Drive Y1 coil

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 162
3. Instruction Set

X1 Instruction: Operation:
LDI X7F5 Y1
LDI X7F5 ;Load contact B of X10 ( F5=K3)
AND X1 ; Connect to contact A of X1 in series
OUT Y1 ; Drive Y1 coil

Mnemonic Operands Function Program steps

AND X, Y, M, S, T, C Series connection- A contact 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
The AND command is used in the series connection of an A contact.
ELC2-PB/PH/PA/PE/PV V1.0 and ELCM-PH/PA V2.0 support the operands X, Y, M, S. These
operands can be qualified by E or F. Users have to use ELCSoft version 2.02 (or above).

Program Example:

X1 X0 Instruction: Operation:
Y1
LDI X1 ; Load contact B of X1
AND X0 ; Connect to contact A of X0 in series
OUT Y1 ; Drive Y1 coil

X1 Instruction: Operation:
LD X10E2 Y1
LDI X1 ;Load contact B of X1
AND X10E2 ;Connect to contact A of X20(E2 = K8) in
series
OUT Y1 ;Drive Y1 coil

Mnemonic Operands Function Program steps

ANI X, Y, M, S, T, C Series connection- B contact 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Descriptions:
The ANI command is used in the series connection of a B contact.
ELC2-PB/PH/PA/PE/PV V1.0 and ELCM-PH/PA V2.0 support the operands X, Y, M, S. These
operands can be qualified by E or F. Users have to use ELCSoft version 2.02 (or above).

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3. Instruction Set

Program Example:

X1 X0 Instruction: Operation:
Y1
LD X1 ; Load contact A of X1
ANI X0 ; Connect to contact B of X0 in series
OUT Y1 ; Drive Y1 coil

X1 Instruction: Operation:
LDI X15F4 Y1
LD X1 ; Load contact A of X1
ANI X15F4 ; Connect to contact B of X11(F4=K-4)
in series
OUT Y1 ; Drive Y1 coil

Mnemonic Operands Function Program steps

OR X, Y, M, S, T, C Parallel connection- A contact 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
The OR command is used in the parallel connection of an A contact.
ELC2-PB/PH/PA/PE/PV V1.0 and ELCM-PH/PA V2.0 support the operands X, Y, M, S. These
operands can be qualified by E or F. Users have to use ELCSoft version 2.02 (or above).

Program Example:
X0 Instruction: Operation:
Y1
X1 LD X0 ; Load contact A of X0
X1 ; Connect to contact A of X1 in parallel
OR
OUT Y1 ; Drive Y1 coil

X0
Instruction: Operation:
Y1
LD X0 ; Load contact A of X0
LD X0F1
X0F1 ; Connect to contact A of X5(F1=K5) in
OR
parallel
OUT Y1 ; Drive Y1 coil

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 164
3. Instruction Set

Mnemonic Operands Function Program steps

ORI X, Y, M, S, T, C Parallel connection- B contact 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
The ORI command is used in the parallel connection of a B contact.
ELC2-PB/PH/PA/PE/PV V1.0 and ELCM-PH/PA V2.0 support the operands X, Y, M, S. These
operands can be qualified by E or F. Users have to use ELCSoft version 2.02 (or above).

Program Example:
X0 Instruction: Operation:
Y1
X1 LD X0 ; Load contact A of X0
ORI X1 ; Connect to contact B of X1 in parallel
OUT Y1 ; Drive Y1 coil

X0
Instruction: Operation:
Y1
LD X0 ; Load contact A of X0
LDI X7E6
ORI X7E6 ; Connect to contact B of X4(E6=K-3) in
parallel
OUT Y1 Drive Y1 coil

Mnemonic Operands Function Program steps

ANB X, Y, M, S, T, C Series connection (Multiple Circuits) 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
The “AND” operation between the previous logic and the contents of the accumulative register.
ELC2-PB/PH/PA/PE/PV V1.0 and ELCM-PH/PA V2.0 support the operands X, Y, M, S. These
operands can be qualified by E or F. Users have to use ELCSoft version 2.02 (or above).

Program Example:
X0 ANB X1 Instruction: Operation:
Y1
LD X0 ; Load contact A of X0
X2 X3
ORI X2 ; Connect to contact B of X2 in parallel
Block A Block B LDI X1 ; Load contact B of X1
OR X3 ; Connect to contact A of X3 in parallel
ANB ; Connect circuit block in series
OUT Y1 ; Drive Y1 coil

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3. Instruction Set

Mnemonic Operands Function Program steps

ORB X, Y, M, S, T, C Parallel connection (Multiple circuits) 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
The “OR” operation between the previous logic and the contents of the accumulative register.

Program Example:

X0 X1 Block A Instruction: Operation:

Y1 LD X0 ; Load contact A of X0
X2 X3
ORB ANI X1 ; Connect to contact B of X1 in series
Block B LDI X2 ; Load contact B of X2
AND X3 ; Connect to contact A of X3 in series
ORB ; Connect circuit block in parallel
OUT Y1 ; Drive Y1 coil

Mnemonic Operands Function Program steps

Store the current result of the internal ELC
MPS X, Y, M, S, T, C 1
operations
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
MPS stores the connection point of the ladder circuit so that further coil branches can recall the
value later.

Mnemonic Operands Function Program steps

Reads the current result of the internal ELC
MRD X, Y, M, S, T, C 1
operations
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:

MRD recalls or reads the previously stored connection point data and forces the next contact to
connect to it.

Mnemonic Operands Function Program steps

Pops (recalls and removes) the currently
MPP X, Y, M, S, T, C 1
stored result
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:

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3. Instruction Set

MPP pops (recalls and removes) the stored connection point. First, it connects the next contact,
then it removes the point from the temporary storage area.

Basic points to remember:

7. Use these instructions to connect output coils to the left hand side of a contact. Without these
instructions connections can only be made to the right hand side of the last contact.
8. For every MPS instruction there MUST be a corresponding MPP instruction.
9. The last contact or coil circuit must connect to an MPP instruction.
10. At any programming step, the number of active MPS-MPP pairs must be no greater than 8.

Program Example:
MPS Instruction: Operation:
X0 X1
Y1 LD X0 ; Load contact A of X0
X2
MPS ; Save to stack
MRD M0
AND X1 ; Connect to contact A of X1 in series
Y2
MPP
OUT Y1 ; Drive Y1 coil
END
MRD ; Read from stack
AND X2 ; Connect to contact A of X2 in series
OUT M0 ; Drive M0 coil
MPP ; Read from stack and pop pointer
OUT Y2 ; Drive Y2 coil
END ; Program end

MPS, MRD and MPP usage:

1. When writing a program in ladder format, programming tools automatically add all MPS, MRD
and MPP instructions at the program conversion stage. If the generated instruction program
is viewed, the MPS, MRD and MPP instructions are present.
2. When writing a program in instruction format, it is entirely up to the user to enter all relevant
MPS, MRD and MPP instructions as required.

Mnemonic Operands Function Program steps

OUT X, Y, M, S, T, C Output coil 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA
Use the OUT Instruction to turn a bit on when the conditions preceding it are evaluated as true.
ELC2-PB/PH/PA/PE/PV V1.0 and ELCM-PH/PA V2.0 support the operands X, Y, M, S. These
operands can be qualified by E or F. Users have to use ELCSoft version 2.02 (or above).

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3. Instruction Set

Program Example:
X0 X1 Instruction: Operation:
Y1
LDI X0 ; Load contact B of X0
AND X1 ; Connect to contact A of X1 in series
OUT Y1 ; Drive Y1 coil

X0 X1 Instruction: Operation:
OUT Y10F0
LDI X0 ; Load contact B of X0
AND X1 ; Connect to contact A of X1 in series
OUT Y10F0 ; Drive Y5 (F0=K-3) coil

Mnemonic Operands Function Program steps

SET X, Y, M, S, T, C Latch（ON） 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
When the SET command is energized, the addressed bit is turned on. This instruction can only turn
on a bit. To turn a bit off, use the RST command.
ELC2-PB/PH/PA/PE/PV V1.0 and ELCM-PH/PA V2.0 support the operands X, Y, M, S. These
operands can be qualified by E or F. Users have to use ELCSoft version 2.02 (or above).

Program Example:
X0 Y0 Instruction: Operation:
SET Y1
LD X0 ; Load contact A of X0
ANI Y0 ; Connect to contact B of Y0 in series
SET Y1 ;Deive Y1 latch (ON)

X0 Y0 Instruction: Operation:
SET Y15E5
LD X0 ; Load contact A of X0
ANI Y0 ; Connect to contact B of Y0 in series
SET Y15E5 ;Deive Y20(E5=K3) latch (ON)

Mnemonic Operands Function Program steps

RST Y, M, S, T, C, D, E, F Clear the contact or the register 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
When the RST command is energized, the action taken depends on the data type as follows:

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3. Instruction Set

Device Status
S, Y, M Coil and contact will be set to “OFF”.
T, C Present values and contacts of the timer or counter will be cleared.
D, E, F The content value will be set to 0.

ELC2-PB/PH/PA/PE/PV V1.0 and ELCM-PH/PA V2.0 support the operands Y, M, S. These

operands can be qualified by E or F. Users have to use ELCSoft version 2.02 (or above).

Program Example:
X0 Instruction: Operation:
RST Y5
LD X0 ; Load contact A of X0
RST Y5 ; Clear contact Y5

X0 Instruction: Operation:
RST Y5E0
LD X0 ; Load contact A of X0
RST Y5E0 ; Clear contact Y5(E0=K0)

Mnemonic Operands Function Program steps

MC/MCR N0~N7 Master control Start/Reset 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
MC is the main-control start command. When the MC command is evaluated as true, the execution
of the instructions between MC and MCR will not be interrupted. When MC is false, the instructions
between MC and MCR are described as follows:

The timer value is set back to zero, the coil and the contact are
General Timer
both turned OFF
Timers for Subroutines The timer value is set back to zero, the coil and the contact are
and Interrupts both turned OFF
Accumulative timer The timer value and the contact stay at their present condition
Counter The counting value and the contact stay at their present condition
OUT All turned OFF
SET/RST Stay at present condition
Application instructions Remain unchanged
11. MCR is the main-control command that is placed at the end of the main-control program.

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3. Instruction Set

12. The MC and MCR instructions support nesting up to 8 levels. When using MC/MCR
instructions you must use the numbers associated with them in numerical order beginning with
N0 as shown in the example below. Valid numbers for MC/MCR pairs are N0-N7.

Program Example:
X0 Instruction: Operation:
MC N0
X1
LD X0 ; The control loop N0 is active when X0
Y0 MC N0 is ON
X2
MC N1
LD X1 ; Load A contact of X1
X3 OUT Y0 ; Energize Y0
Y1
:

MCR N1 LD X2 ; The control loop N1is active when X2

MC N1 is ON
MCR N0
LD X3 ; Load A contact of X3
X20
MC N0 OUT Y1 ; Energize Y1
X21
:
Y20
MCR N1 ; The control loop N1 terminates
MCR N0
:
MCR N0 ; The control loop N0 terminates
:
LD X20 ; The control loop N0 is active when X20
MC N0 is ON
LD X21 ; Load A contact of X21
OUT Y20 ; Energize Y20
:
MCR N0 ; The control loop N0 terminates

Mnemonic Function Program steps

END Program End 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
An END statement must be placed at the end of an ELC program. An ELC controller will scan from
program line 0 to the END statement, then return to line 0 again. .

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3. Instruction Set

Mnemonic Function Program steps

NOP No operation 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
This is a no-operation command and has no effect on the operation of the line of code it’s in. NOP is
used to delete a command without changing the number of steps. (Overwrite with NOP)

Program Example:

Command NOP will be omitted Instruction: Operation:

when ladder diagram displays.
LD X0 ; Load A contact of X0
X0 NOP ; No operation
NOP Y1
OUT Y1 ; Drive Y1 coil

Mnemonic Function Program steps

NP Negative contact to Positive contact 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
When the conditions preceding NP command change from false to true, NP command (works as
contact A) will be ON for a scan cycle. In the next scan cycle it turns OFF.
ELC-PV only support V1.6(above) version.

Program Example:
Instruction: Operation:
LD M0 ; Load A contact of M0
AND M1 ; And A contact of M1

; Negative contact to Positive contact

NP
OUT Y0 ; Drive Y0 coil

Timing Diagram:

M1
A scan cycle A scan cycle
Y0

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3. Instruction Set

Mnemonic Function Program steps

PN Positive contact to Negative contact 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
When the conditions preceding PN command change from true to false, PN command (works as
contact A) will be ON for a scan cycle. In the next scan cycle it turns OFF.
ELC-PV only support ECL-PVV1.6(above) .

Program Example:
Instruction: Operation:
LD M0 ; Load A contact of M0
AND M1 ; And A contact of M1

; Positive contact to Negative contact

PN
OUT Y0 ; Drive Y0 coil

Timing Diagram:

M1
A scan cycle A scan cycle
Y0

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3. Instruction Set

3.3 Pointers

Mnemonic Function Program steps

P Pointer (P0~P255) 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
Pointers are used with the jump instructions (CJ, CALL) to jump to another area of logic or to call a
subroutine. Pointer numbers can only be used once.

Program Example 1:

X0 Instruction: Operation:
CJ P10
LD X0 ; Load A contact of X0
X1 CJ P10 ; Jump from CJ to P10
P10 Y1
:
P10 ; Pointer P10
LD X1 ; Load A contact of X1
OUT Y1 ; Drive Y1 coil

Program Example 2:
X0 Instruction: Operation:
CALL P9
LD X0 ; Call the Subroutine P9 when X0 is ON

FEND CALL P9 ; Jump from CALL to P9

M1013 :
P9 Y20 FEND ; Program end
P9 ; Pointer P9
SRET
LD M1013 ; Load A contact of M1013
OUT Y20 ; Drive Y20 coil
:
SRET ; Subroutine return

Available devices:
13. ELCB-PB have 64 pointers; available from the range of P0 to P63.
14. ELC-PA/PV, ELC2-PB/PH/PA/PE/PV and ELCM-PH/PA have 256 pointers; available from the
range of P0~P255.

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3. Instruction Set

3.4 Interrupt Pointers

Mnemonic Function Program steps

I Interrupt program marker 1
ELCB ELC ELC2 ELCM
PB PA PV PB PA/PH/PE PV PH/PA

Description:
Interrupt programs begin with an interrupt pointer（I□□□）and end with the application command
to terminate the interrupt and return (IRET). A special numbering system is used based on the
interrupt type and input trigger method used.

Additional application instructions:

Interrupts must be used with application commands API 03 IRET, API 04 EI, API 05 DI.

Program Example:

Instruction: Operation:
EI
X1
Range for inserting EI ; Interrupt Enable
program interrupt
Y1 LD X1 ; Load A contact of X1
Interrupt
Service DI OUT Y1 ; Energize Y1
program
pointer :
FEND
DI ; Interrupt Disable
X2
I 001 Y2 :
Program interrupt insert
into subroutine FEND ; Program end
IRET
I001 ; Insert interrupt point
LD X2 ; Load A contact of X2
OUT Y2 ; Energize Y2
:
IRET ; Interrupt return

Input Interrupts:
15. ELCB-PB have 4 input interrupts: (I001, X0), (I101, X1), (I201, X2) and (I301, X3).
16. ELC-PA have 6 input interrupts: (I001, X0), (I101, X1), (I201, X2), (I301, X3), (I401, X4) and
(I501, X5).
17. In ELC-PA V1.2 and above, when I401 (X4) works with X0 (C235, C251 or C253), the value of
(C243 or C255) will be stored in (D1180, D1181) and I501 (X5) works with X1 (C236), the
value of high-speed counter (C236) will be stored in (D1198, D1199)
18. ELC-PV has 6 input interrupts: I000/I001(X0), I100/I101 (X1), I200/I201 (X2), I300/I301 (X3),
I400/I401 (X4), I500/I501 (X5), 6 points (01, rising-edge trigger , 00, falling-edge trigger
)

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3. Instruction Set

19. ELC-PV2 has 16 input interrupts: I000/I001(X0), I100/I101 (X1), I200/I201 (X2), I300/I301 (X3),
I400/I401 (X4), I500/I501 (X5), I700/I701(X6), I900/I901 (X10), I910/I911 (X11), I920/I921
(X12), I930/I931 (X13), I940/I941 (X14), I950/I951 (X15), I960/I961 (X16), I970/I971 (X17),
16 points (01, rising-edge trigger , 00, falling-edge trigger )
20. ELCM-PH/PA, ELC2-PB/PH/PA/PE have 8 input interrupts: I000/I001 (X0), I100/I101 (X1),
I200/I201 (X2), I300/I301 (X3), I400/I401 (X4), I500/I501 (X5), I600/I601 (X6), I700/I701
(X7), 8 points (01, rising-edge trigger , 00, falling-edge trigger )

Timer Interrupts:
21. ELCB-PB have 1 timer interrupt point: I610~I699, ( Timer resolution: 1ms)
22. ELC-PA have 2 timer interrupts: I601~I699, I701~I799, ( Timer resolution: 1ms)
23. ELC-PV, ELC-PV2 has 3 timer interrupts: I601~I699, I701~I799, ( Timer resolution: 1ms);
I801~I899, ( Timer resolution: 0.1ms)
24. ELCM-PH/PA, ELC2-PB/PH/PA/PE have 2 timer interrupts:I602~I699, I702~I799, ( Timer
resolution: 1ms)

Communication Interrupts:
25. ELCB-PB have 1 communication interrupt: I150
26. ELC-PV, ELC-PV2 has 3 communication interrupt: I150, I160, I170
27. ELCM-PH/PA, ELC2-PB/PH/PA/PE have 3 communication interrupt: I140, I150, I160

Counter Interrupts:
28. ELC-PA have 6 high-speed counter attained interrupt points:
I010 (use with C235, C241, C244, C246, C247, C249, C251, C252, C254)
I020 (use with C236, C243, C246, C247, C249, C251, C252, C254)
I030 (use with C237, C242)
I040 (use with C238, C245)
I050 (use with C239)
I060 (use with C240, C250)
29. ELC-PV, ELC-PV2 has 6 high-speed counter attained interrupt points: I010, I020, I030, I040,
I050, I060.
30. ELCM-PH/PA, ELC2-PB/PH/PA/PE have 8 high-speed counter attained interrupt points: I010,
I020, I030, I040, I050, I060, I070 and I080

Pulse interruption
ELC-PV, ELC-PV2 has four pulse interrupt points: I110, I120, I130, and I140.
Please see the following pages for more details on the interrupt functions.
Input interrupts – see page 3-46
Timer interrupts – see page 3-46
Communication interrupt – see page 3-46

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3. Instruction Set

Counter interrupts – see page 3-46

Pulse interruption – see page 3-46
Enabling interrupts, API 04 EI, Disabling interrupts, API 05 DI, Interrupt return, API 03 IRET – see
page 3-45

3.5 Application Programming Instructions

1. ELC instructions each have a unique mnemonic. Most instructions are also given a number so
the ELC knows how to execute the instruction. In the example below the numerical value
given to the instruction is 00, also called the API (Application Programming Instruction)
number. The mnemonic name is CJ and the function is Conditional Jump.
API Mnemonic Operands Function
00 CJ P S Conditional Jump

OP Range Program Steps

S P0~P255 CJ, CJP: 3 steps
2. The table will be found at the beginning of each new instruction description. The area
identified as ‘Operands’ will list the various operands that can be used with the instruction.
Various identification letters will be used to associate each operand with its function, i.e.
D-destination, S-source, n, m-number of elements. Additional numeric suffixes will be
attached if there are more than one operand with the same function.
3. When using ELCSoft to create the application it is not necessary to remember the API number
of an instruction since ELCSoft uses a drop down list to select an instruction or there is a
button on the toolbar for the instruction.
4. Not all instructions and conditions apply to all ELC’s models. Applicable controllers are
identified by the boxes at the bottom right hand corner of the table. For more detailed
information on each instruction, a second indicator box is used to identify the availability of
pulse (P), single word (16) and double word (32) format.
ELCB ELC ELC2 ELCM
PA PV PB PA/PH/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P
5. No modification of the instruction mnemonic is required for 16 bit operation. However, pulse
operation requires a ‘P’ to be added directly after the mnemonic while 32 bit operations require
a ‘D’ to be added before the mnemonic. This means that if an instruction is being used with
both pulse and 32 bit operation it would look line…D***P where *** was the basic mnemonic.

Instruction Composition
Instructions consist of either just the instruction or the instruction followed by operand parameters

X0 S D
MOV K10 D10

command operand

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3. Instruction Set

Command : Indicates the instruction type

Operand : Indicates additional parameters needed

S Source operand: if there is more than 1 source operand, then S1, S2… is used to describe
them.
D Destination operand
If an operand is only represented as a constant (K, H) then m, m1, m2, n, n1, n2 is used to
describe them.

The Length of Operand (16-bit or 32-bit instruction)

The length of an operand can be divided into two groups: 16-bit and 32-bit. A”D” before an
instruction means it’s a 32-bit instruction.
16-bit MOV instruction
X0
MOV K10 D10 When X0=ON, K10 is moved into D10.

32-bit DMOV instruction

X1 When X1=ON, the 32-bit contents of D11, D10 is
DMOV D10 D20
moved to D21, D20.

Description of the format for the application programming instructions

1 2 3 4

API Mn emo nic Operan ds F uncti on

10 D CMP P S1 S2 D Comp are

Typ e Bi t Devic es Word De vices Prog ram Ste ps

OP X Y M S K H Kn X Kn Y Kn M Kn S T C D E F CMP, CMPP: 7 st eps

5
{ S1
S2
D * * *
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
*
* DCMP, DCMP P : 13 step s
* 6

E LCB E LC E LC2 E LCM

7 PB P
PA PV PB PA / PH/ P E PV P H/P A
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

API number for the instruction

The core mnemonic code of the instruction
A “D” in this box means the instruction is a 32 bit instruction if a “D” is added as a prefix
A “P“ in this box indicates the instruction can be used as a pulse instruction
The operand format of the instruction
The description of the instruction
The symbol “*” means this instruction supports the associated data type
The number of program steps for the instruction
The ELC models that support the following for each instruction:
A “16” represents 16-bit instruction format
A “32” represents 32-bit instruction format

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3. Instruction Set

A “P” represents pulse instruction format

Note: If the cells adjacent to the operands are grayed, this means they support index registers E
and F for those cells in the table above. For example, device D of operand S1 supports index
registers E and F.

Continuous execution vs. Pulse execution

1. The execution type for instructions can be divided into two types: continuous execution
instructions and pulse execution instructions. The execution time is shorter when instructions
are not executed. Using the pulse option for an instruction will reduce the scan time of the
program.
2. The ‘pulse’ function allows the associated instruction to be activated on the rising edge of the
control input. The output instructions are true for one program scan.
3. Thereafter, while the control input remains ON, the associated instruction is false. To
re-execute the instruction the control input must be turned OFF then ON again.

Pulse execution instruction When X0 goes from OFFON, the MOVP

instruction will be executed one time and
X0
MOVP D10 D12 instruction cannot be re-executed again in the
same program scan. This is a pulse execution
instruction.
Continuous execution instruction When X1=ON, the MOV instruction will execute
every program scan This is called continuous
X1
MOV D10 D12 execution instruction.

The above figures show that when X0, X1=OFF, the instruction will not be executed and the
contents of the destination operand “D12” will remain unchanged.

Operands
31. Bit addresses such as X, Y, M, S can be used in numerical order to define a WORD or a
portion of a word. Successive bits can be written to a word address and a word address can be
broken into bits. This is accomplished using the MOV instruction and a special designator in
front of the bit address, such as: KnX, KnY, KnM, KnS. The n represents 4 bits, 8 bits, 12 bits
or 16 bits to be moved into a word address or moved from a word address. n=1 represents 4
bits, n=2 represents 8 bits, n=3 represents 12 bits and n=4 represents 16 bits.
32. Data register D, Timer T, Counter C and Index Register E, F can all be assigned as operands.
33. A D register is a 16-bit register. It can also be assigning as a 32-bit register which consumes
two consecutive D registers.
34. If the operand of a 32-bit instruction is assigned to D0, D1 is also used to comprise a 32-bit
value. The upper 16-bits is D1 and D0 is the lower 16-bits.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 178
3. Instruction Set

35. If the 32-bit counters (C200~C255) are used as Data registers, each counter is a 32-bit
counter. Only instructions using 32-bit operands can be assigned.

Operand Data format

36. X, Y, M, S are bit addresses and are either ON/OFF.
37. 16-bit (or 32-bit) addresses T, C, D, E, F are data registers and are defined as word or double
word addresses.
38. If a Kn is placed in front of X, Y, M and S it will be defined as a word device, where n=1 means
4-bits. So 16-bits are defined from K1 to K4, and 32-bits are defined from K1 to K8. For
example, K2M0 represents 8-bits from M0 to M7.

X0 When X0=ON, move the contents of M0 to M7

MOV K2M0 D10
to D10 bits 0 to 7, and bits 8 to 15 are set to 0.

Kn values

16-bit instruction 32-bit instruction

Specified Number of Digits (16-bit instruction): Specified Number of Digits (32-bit instruction):
K-32,768~K+32,767 K-2,147,483,648~K+2,147,483,647
16-bit instruction: (K1~K4) 32-bit instruction: (K1~K8)
K1 (4 points) 0~15 K1 (4 points) 0~15
K2 (8 points) 0~255 K2 (8 points) 0~255
K3 (12 points) 0~4,095 K3 (12 points) 0~4,095
K4 (16 points) -32,768~+32,767 K4 (16 points) 0~65,535
K5 (20 points) 0~1,048,575
K6 (24 points) 0~167,772,165
K7 (28 points) 0~268,435,455
K8 (32 points) -2,147,483,648~+2,147,483,647

Flags
1. General Flags
The following flags are available for the ELC:
M1020: Zero flag
M1021: Borrow flag
M1022: Carry flag
M1029: Instruction execution completed flag
When executing an instruction, all flags will be turned to ON or OFF according to the operation
result of the instruction. However, if the instruction is not executed, the ON/OFF state of the
flags will remain unchanged.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 179
3. Instruction Set

X0 When X0=ON, the DSW

SET M0
instruction is energized.
M0
DSW X20 D0 Y20 K1 When X0=OFF, M0 is not
M1029 reset until the instruction
RST M0
execution is complete

2. Error Operation Flags

If the instruction or the assigned operands result in an error, the error flags and associated
error codes in the following table will be displayed during the execution of the application
instructions.
M1067 When error operations occur, M1067=ON, D1067 will show the error code
D1067 and D1069 will show the error address.
D1069 If other errors occur, the contents of D1067 and D1069 will be refreshed.
(when the error is reset, M1067=OFF)
M1068 When error operations occur, M1068=ON, D1068 will show the error
D1068 address.
If other errors occur, the contents of D1068 will not be refreshed. M1068
must be reset to OFF, otherwise the error will remain.
3. Flags to Extend Functions
Some instructions can extend their function by using some special flags.
Example: The RS instruction can be either an 8-bit or a 16-bit instruction depending on the
state of M1161.

Limited Use Instructions

Some instructions can be used unlimited times in the program, others can be used only a particular
number of times in a program.
1. These instructions can only be used once in a program:
PWM ELCB-PB Model
IST ELC-PA/PV, ELCB-PB, ELCM-PH/PA, ELC2-PB/PH/PA/PE/PV Models
SEGL ELCB-PB Model
DABSR ELC- PV, ELCM-PH/PA, ELC2-PB/PH/PA/PE/PV Models
2. These instructions can only be used twice in a program:
PLSY ELCB-PB Models
PLSR ELCB-PB Models
PR ELC-PA/PV, ELCM-PH/PA, ELC2-PB/PH/PA/PE/PV Models
SEGL ELC-PV, ELC2-PV Models
3. These instructions can only be used four times in a program:
HOUR ELC-PA Models

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3. Instruction Set

4. These instructions can only be used eight times in a program:

TTMR ELC-PA, ELCM-PH/PA, ELC2-PB/PH/PA/PE/PV Models
5. The DHSCS and DHSCR instructions can only be executed simultaneously a maximum of 4
times in the program for ELCB-PB models.
6. The DHSCS, DHSCR and DHSZ instructions can only be executed simultaneously a
maximum of five times in the program for ELC-PA models.
7. For counters C232~C242, the maximum number of times DHSCS, DHSCR and DHSZ
instructions can be used in a program is 6. DHSZ can only be used a maximum of 6 times in a
program for ELCM-PH/PA, ELC2-PB/PH/PA/PE models.
8. For counters C243, C245~C248, C251, C252, the maximum number of DHSCS, DHSCR and
DHSZ instructions can be used in a program is 4. DHSZ takes up 2 times of the total available
number of times this instruction can be used in a program for ELCM-PH/PA,
ELC2-PB/PH/PA/PE models.
9. For counters C244, C249, C250, C253, C254, the maximum number of times DHSCS,
DHSCR and DHSZ instructions can be used in a program is 4. DHSZ takes up 2 times of the
total available number of times this instruction can be used in a program for ELCM-PH/PA ,
ELC2-PB/PH/PA/PE models.

Limitations on executing the same instruction multiple times

There is no limitation on the number of times an instructions listed below may be used in a program.
But there are limitations on how many occurances of the same instruction that can be
simultaneously executed. in the program.

1. Instructions which can be executed only once:

ELCB-PB, ELC-PA/PV, ELC2-PV2: API 56 SPD, API 75 ARWS, API 80 RS, API 100 MODRD, API
101 MODWR, API 150 MODRW.

ELC-PA/PV, ELC2-PV2: API 52 MTR, API 69 SORT, API 70 TKY, API 71 HKY, API 151 PWD.

ELC-PA: API 72 DSW, API 74 SEGL.

2. Instructions which can be executed only twice: API 58 PWM (ELC-PV, ELC2-PV), API 59
PLSR (ELC-PV, ELC2-PV).

3. Instructions which can be executed only 4 times: API 57 PLSY (ELC-PV, ELC2-PV), API
58 PWM (ELC-PV, ELC2-PV).

4. Instructions which can be executed only 8 times: API 64 TTMR(ELC-PV, ELC2-PV)

5. In ELC-PA, there is on limitation on the times of using the high-speed output instructions
PLSY, PWM and PLSR, bit only one high-speed output instruction will be enabled in every
scan.

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3. Instruction Set

6. In ELC-PV, ELC2-PV, there is no limitation on the times of using hardware high-speed

counter instructions DHSCS, DHSCR and DHSZ, but when the three instructions are
enabled at the same time, DHSCS will occupy 1 memory unit, DHSCR 1 memory unit,
and DHSZ 2 memory units. The total memeory units occupied by the three instructions
cannot be more than 8 units. If there are more than 8 memory units occupied, the ELC
system will execute the instruction that is scanned first and ignore the rest.

7. In ELCM-PH/PA, ELC2-PB/PH/PA/PE only 1 instruction can be executed at the same

scan cycle: API 52 MTR, API 69 SORT, API 70 TKY, API 71 HKY, API 72 DSW, API 74
SEGL, API 75 ARWS.

8. In ELCM-PH/PA, ELC2-PB/PH/PA/PE, only 4 instruction can be executed at the same

scan cycle: API 56 SPD, API 169 HOUR.

9. In ELCM-PH/PA, ELC2-PB/PH/PA/PE, there is no limitation on the times of using the

high-speed output instructions API 57 PLSY, API 58 PWM, API 59 PLSR, API 156DZRN,
API 158 DDRVI, API 159 DDRVA and API 195 DPTPO, but only one high-speed output
instruction will be executed in the same scan time.

10. In ELCM-PH/PA, ELC2-PB/PH/PA/PE, there is no limitation on the times of using the

communication instructions API 80 RS, API 100 MODRD, API 101 MODWR, API 150
MODRW, but only one communication instruction will be executed on single COM port
during the same scan cycle.

Numeric Values
1. Devices such as X, Y, M, S are bit addresses and there are only two states, ON and OFF.
However, T, C, D, E, F are data registers or word addresses. Although a bit device can only be
a single point ON/OFF, they can also be used as numeric values in the operands of
instructions if the Kn designation is used in front of the bit address.. The designation Kn placed
in front of a bit address indicates that the bit address is a starting address and the n
determines how many bits follow, where “n” is in the range of 1 to 8. Each n number represents
4 bits. For example, K1M0 represents M0-M3.
2. 16-bits can be represented with K1 to K4, and 32-bits can be represented with K1 to K8. For
example, K2M0 means there are 8-bits from M0 to M7. For the example below, MOV K2M0
D1:

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3. Instruction Set

Valid data

M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0

0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Low byte
Transmit
Clear to 0

D1 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0

Equal to
Low byte
D1 0 0 0 0 0 0 0 0 0 1 0 1 0 1 0 1

3. Moving K1M0, K2M0, K3M0 to a 16-bit register clears the upper unused bits in the destination
word. It’s the same as for K1M0, K2M0, K3M0, K4M0, K5M0, K6M0, K7M0 to 32-bit registers.
The upper bits not included in the move are cleared in the 32-bit destination value.
4. The unused upper bits will be 0 if K1 to K3 is used in a 16-bit operation or K1 to K7 is used in a
32-bit operation. Therefore, the operation result is a positive decimal value
M0 The state of input bits X0-X7 will be assigned to
MOV K2X0 D0
the lower 8 bits of D0. Each of the upper 8 bits
of D0 will contain 0

Assign Continuous Bit Numbers

As already explained, bit devices can be grouped into 4 bit units. The “n” in KnM0 defines the
number of groups of 4 bits that are used for this data operation. For data register D, consecutive D
registers refers to D0, D1, D2, D3, D4…; For bit devices with Kn, consecutive numbers refers to:
K1X0 K1X4 K1X10 K1X14…
K2Y0 K2Y10 K2Y20 Y2X30…
K3M0 K3M12 K3M24 K3M36…
K4S0 K4S16 K4S32 K4S48…

Note: When moving bits to a word or a double word, realize that the upper bits of the destination
that are not included in the source, i.e. n=1, 2 or 3, will be filled with 0s. For example, if K4M0 is
moved to a double word using a DMOV instruction, the upper word will contain all 0s after the
DMOV is executed.

Floating Point Operation

When performing integer math, the decimal point from a division operation for example will be
discarded. In other words, 40 ÷ 3 = 13, remainder is 1 and the decimal point will be discarded. But
using floating point math, the decimal point is used.

The application instructions related to floating point operation are shown in the following table.

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3. Instruction Set

FLT DECMP DEZCP DMOVR DRAD

DDEG DEBCD DEBIN DEADD DESUB

DEMUL DEDIV DEXP DLN DLOG

DESQR DPOW INT DSIN DCOS

DTAN DASIN DACOS DATAN DSINH

DCOSH DTANH DADDR DSUBR DMULR

DDIVR FLD※ FAND※ FOR※

Binary Floating Point

The ELC controllers use the IEEE754 method to represent floating point numbers with 32-bits:
8-bit 23-bit
S exponent mantissa
b31 b0

Sign bit
0: positive
1: negative
-126 +128 -38
The range of a 32-bit floating point value is from ±2 to ±2 , i.e. from ±1.1755×10 to
+38
±3.4028×10 .

Example 1: using 32-bit floating point to represent decimal number 23

Step 1: convert 23 to binary number: 23.0=10111
Step 2: Normalizing the binary: 10111=1.0111 × 24, 0111 is mantissa and 4 is an exponent.
Step 3: get exponent: ∵E-B=4 E-127=4 ∴E=131=100000112
Step 4: We can now combine the sign, exponent, and normalized mantissa into the binary IEEE
short real representation.
0 10000011 011100000000000000000002=41B8000016

Example 2: using 32-bit floating point to represent decimal number –23

The conversion steps are the same as decimal number 23. Only need to modify sign bit from 0 to 1
to get value.
1 10000011 011100000000000000000002=C1B8000016

ELC also uses two registers with continuous number to store binary floating point. The following is
the example that uses register (D1, D0) to store binary floating point.

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3. Instruction Set

D1(b15~b0) D0(b15~b0)
7 6 5 1 0 -1 -2 -3 -17 -18 -19 -20 -21 -22 -23
2 2 2 2 2 2 2 2 2 2 2 2 2 2 2
S E7 E6 E5 E1 E0 A22 A21 A20 A6 A5 A4 A3 A2 A1 A0
b31 b30 b29 b28 b24 b23 b22 b21 b20 b6 b5 b4 b3 b2 b1 b0

8 bits of exponent 23 bits of constant

E0~E7=0 or 1 A0~A22=0 or 1

sign bit (0: positive 1:negative)

When b0~b31 is 0, the content is 0.

Decimal Floating Point

1. Binary floating point is not practical for most applications, therefore, binary floating point
format can be converted to decimal floating point format for performing floating point math..
2. Decimal floating point values are stored in two consecutive registers. The least significant
register is where the constant value (mantissa) is stored and the upper register is where the
exponent is stored.

For example, using registers (D1, D0) to store a decimal floating point value.
Decimal floating point = [constant D0] X 10 [exponent D1 ]
constant D0 = ±1,000~±9,999, exponent D1 = - 41~+35
the most significant bit of (D1, D0) is the sign bit.
-41 +35
The range of decimal numbers is from ±1175×10 to ±3402×10 .
3. Decimal floating point can be used in the following instructions.
The conversion instruction for Binary floating point  Decimal floating point (DEBCD)
The conversion instruction for Decimal floating point  Binary floating point (DEBIN)
4. Zero flag (M1020), Borrow flag (M1021) and carry flag (M1022). The flags that correspond to
the floating point instructions are:
1. Zero flag: when the result is 0, M1020=ON.
2. Borrow flag: when a borrow is generated, M1021=ON
3. Carry flag: when the absolute value of result exceeds usage range, M1022=ON

Index register E, F
The index registers are 16-bit registers. There are 2 index registers for ELC-PB, ELCB-PB models
(E and F), 8 for ELC-PC/PA/PH models (E0~E3, F0~F3), and 16 for ELCM-PH/PA, ELC-PV models
(E0 ~ E7 and F0 ~ F7).
E and F are also 16-bit registers just the same as D-registers. 16-bit 16-bit

They are read /write registers. F0 E0

When using a 32-bit index register, the combination of E, F 32-bit

are as follows. (E0, F0), (E1, F1), (E2, F2), (E3, F3), (E4, F4), F0 E0
(E5, F5), (E6, F6), (E7, F7). Upper word Lower word

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3. Instruction Set

If using a 32-bit register, you must specify an E index register. In this case, the specified E register is
used and its corresponding F register is also used (When the ELC starts-up, it is recommended to
use the MOVP instruction to clear the contents of F and reset it to 0)
As the right figure shows, the addresses will change
M1000
based the contents of E, F. This is called “Index”
MOV D20E0 D10F0
addressing.
E0=8 F0=14
For example, if E0=8 then D20E0 represents
20+8=28 10+14=24
address D (20+8). When F0=14, the destination D28 D24
address becomes D24.
Data types supported in ELC-PB, ELCB-PB series: P, X, Y, M, S, KnX, KnY, KnM, KnS, T, C, D.
Data types supported in ELC-PC/PA/PH, ELCM-PH/PA series: P, X, Y, M, S, KnX, KnY, KnM, KnS, T,
C, D.
Data types supported in ELC-PV series: P, I, X, Y, M, S, K, H, KnX, KnY, KnM, KnS, T, C, D.
If E and F are used with a constant value, use @ between the K or H value and the E or F index
register. For example: "MOV K10@E0 D0F0”

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3. Instruction Set

3.6 Numerical List of Instructions

Loop Control
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
00 CJ -  Conditional Jump     3 -
01 CALL -  Call Subroutine     3 -
02 SRET - - Subroutine Return     1 -
03 IRET - - Interrupt Return     1 -
04 EI - - Enable Interrupt     1 -
05 DI - - Disable Interrupt     1 -
Terminate the main routine
06 FEND - -     1 -
program
07 WDT -  Reset the Watchdog Timer     1 -
08 FOR - - Loop Begin     3 -
09 NEXT - - Loop End     1 -

Transmission Comparison
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
10 CMP DCMP  Compare     7 13
11 ZCP DZCP  Zone Compare     9 17
12 MOV DMOV  Move     5 9
13 SMOV -  Shift Move -    11 -
14 CML DCML  Compliment and Move     5 9
15 BMOV -  Block Move     7 -
16 FMOV DFMOV  Fill and Move     7 13
17 XCH DXCH  Data Exchange     5 9
18 BCD DBCD  Convert BIN to BCD     5 9
19 BIN DBIN  Convert BCD to BIN     5 9

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3. Instruction Set

Four Fundamental Operations Arithmetic

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
20 ADD DADD  Addition     7 13
21 SUB DSUB  Subtraction     7 13
22 MUL DMUL  Multiplication     7 13
23 DIV DDIV  Division     7 13
24 INC DINC  Increment     3 5
25 DEC DDEC  Decrement     3 5
26 WAND DAND  Logical AND     7 13
27 WOR DOR  Logical OR     7 13
28 WXOR DXOR  Exclusive XOR     7 13
29 NEG DNEG  Negative (2’s Compliment)     3 5

Rotation and Displacement

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
30 ROR DROR  Rotate Right     5 9
31 ROL DROL  Rotate Left     5 9
32 RCR DRCR  Rotate Right with Carry     5 9
33 RCL DRCL  Rotate Left with Carry     5 9
34 SFTR -  Bit Shift Right     9 -
35 SFTL -  Bit Shift Left     9 -
36 WSFR -  Word Shift Right -    9 -
37 WSFL -  Word Shift Left -    9 -
38 SFWR -  Shift Register Write -    7 -
39 SFRD -  Shift Register Read -    7 -

Data Operation
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
40 ZRST -  Zone Reset     5 -

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 188
3. Instruction Set

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
41 DECO -  Decode     7 -
42 ENCO -  Encode     7 -
43 SUM DSUM  Sum of ON bits     5 9
44 BON DBON  Bit ON Test     7 13
45 MEAN DMEAN  Mean Value     7 13
46 ANS - - Alarm Set -    7 -
47 ANR -  Alarm Reset -    1 -
48 SQR DSQR  Square Root     5 9
49 FLT DFLT  Floating Point     5 9

High Speed Processing

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
50 REF -  Refresh I/O Immediately     5 -
51 REFF -  Refresh and Filter Adjust -    3 -
52 MTR - - Input Matrix -    9 -
53 - DHSCS - High Speed Counter Set     - 13
54 - DHSCR - High Speed Counter Reset     - 13
55 - DHSZ - HSC Zone Compare -    - 17
56 SPD - - Speed Detection     7 -
57 PLSY DPLSY - Pulse Output     7 13
58 PWM - - Pulse Width Modulation     7 -
59 PLSR DPLSR - Pulse Ramp     9 17

Convenience Instruction
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
60 IST - - Manual/Auto Control     7 -
61 SER DSER  Search a Data Stack -    9 17
62 ABSD DABSD - Absolute Drum Sequencer -    9 17

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 189
3. Instruction Set

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
63 INCD - - Incremental drum sequencer -    9 -
64 TTMR - - Alternate timer -    5 -
65 STMR - - Special timer -    7 -
66 ALT -  ON/OFF alternate instruction     3 -
67 RAMP DRAMP - Ramp signal - *   9 17
68 DTM -  Data transform and move - -  * 9 -
69 SORT DSORT - Data sort - *   11 21
*:API 67 DRAMP, API69 DSORT don’t support ELC-PA; API 68 DTM don’t support ELC-PV.

External I/O Display

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
70 TKY DTKY - 10-key keypad input -    7 13
71 HKY DHKY - 16-key keypad input -    9 17
72 DSW - - Digital Switch input -    9 -
Decode the 7-step display
73 SEGD -      5 -
panel
74 SEGL - - 7-step display scan output     7 -
75 ARWS - - Arrow keypad input -    9 -
76 ASC - - ASCII code conversion -    11 -
77 PR - - Output ASCII code -    5 -

Serial I/O
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
78 FROM DFROM  Read special module CR data     9 17
79 TO DTO  Special module CR data write in     9 17
80 RS - - Serial data communication     9 -
Octal number system
81 PRUN DPRUN  -    5 9
transmission
82 ASCII -  Convert HEX to ASCII     7 -

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 190
3. Instruction Set

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
83 HEX -  Convert ASCII to HEX     7 -
84 CCD -  Check sum -    7 -
85 VRRD -  Volume read - - -  5 -
86 VRSC -  Volume scale - - -  5 -
87 ABS DABS  Absolute value     3 5
88 PID DPID - PID calculation     9 17

Basic Instruction
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
89 PLS - - Rising-edge output     3 -
90 LDP - - Rising-edge pulse     3 -
91 LDF - - Falling-edge pulse     3 -
Serial connection of rising-edge
92 ANDP - -     3 -
pulse
Serial connection falling-edge
93 ANDF - -     3 -
pulse
Parallel connection of
94 ORP - -     3 -
rising-edge pulse
Parallel connection of
95 ORF - -     3 -
falling-edge pulse
96 TMR - - Timer     4 -
97 CNT DCNT - Counter     4 6
98 INV - - Inverting operation     1 -
99 PLF - - Falling-edge output     3 -
255 ATMR - - Contact type timer - -  * 5 -
*:API 255 ATMR does not support ELC-PV

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 191
3. Instruction Set

Communication Instruction
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
100 MODRD - - MODBUS data Read     7 -
101 MODWR - - MODBUS data write in     7 -
107 LRC -  LRC check sum     7 -
108 CRC -  CRC check sum     7 -
150 MODRW - - MODBUS data read/write in     11 -
113 ETHRW - - Ethernet communication - - * * 9 -
*:API 113 ETHRW does not support ELC-PV,ELC2-PB,ELCM-PH/PA

Floating Operation
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
110 - DECMP  Floating point compare     - 13
111 - DEZCP  Floating point zone compare     - 17
112 DMOVR  Floating point data Move     9
116 - DRAD  Degree  Radian -    - 9
117 - DDEG  Radian  Degree -    - 9
118 - DEBCD  Float to scientific conversion     - 9
119 - DEBIN  Scientific to float conversion     - 9
120 - DEADD  Floating point addition     - 13
121 - DESUB  Floating point subtraction     - 13
122 - DEMUL  Floating point multiplication     - 13
123 - DEDIV  Floating point division     - 13
Floating point exponent
124 - DEXP      - 9
operation
Floating natural logarithm
125 - DLN      - 9
operation
Floating point logarithm
126 - DLOG      - 13
operation
Square root of binary floating
127 - DESQR      - 9
point

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 192
3. Instruction Set

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
128 - DPOW  Floating point power operation     - 13
129 INT DINT  Floating point to integer     5 9
130 - DSIN  Floating point Sine operation     - 9
131 - DCOS  Floating point Cosine operation     - 9
Floating point Tangent
132 - DTAN      - 9
operation
133 - DASIN  Floating point Arcsine operation -    - 9
Floating point Arccosine
134 - DACOS  -    - 9
operation
Floating point Arctangent
135 - DATAN  -    - 9
operation
136 - DSINH  Hyperbolic Sine - - -  - 9
137 - DCOSH  Hyperbolic Cosine - - -  - 9
138 - DTANH  Hyperbolic Tangent - - -  - 9
172 - DADDR  Floating Point Number Addition     - 13
Floating Point Number
173 - DSUBR      - 13
Subtraction
Floating Point Number
174 - DMULR      - 13
Multiplication
175 - DDIVR  Floating Point Number Division     - 13

Additional Instruction
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
143 DELAY -  Delay instruction -    3 -
144 GPWM - - General pulse width modulation -    7 -
145 FTC - - Fuzzy temperature control -    9 -
146 CVM - - Valve Control - - -  7 -
147 SWAP DSWAP  Swap high/low byte     3 5
148 MEMR DMEMR  MEMORY read -  *  7 13
149 MEMW DMEMW  MEMORY write in -  *  7 13
151 PWD - - Detection of Input Pulse Width - - -  5 -

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 193
3. Instruction Set

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
Start of the Measurement of
152 RTMU - - - - -  5 -
Execution Time of I Interruption
End of the Measurement of the
153 RTMD - - - - -  3 -
Execution Time of I Interruption
154 RAND DRAND  Random value -    7 13
168 MVM DMVM  Masked Move - -   7 13
176 MMOV -  16-bit→32-bit Conversion -    5 -
177 GPS - - GPS data receiving - - * * 5 -
178 - DSPA - Solar cell positioning - - * * - 9
179 WSUM DWSUM  Sum of multiple devices - -   7 13
196 HST -  High Speed Timer - - -  3 -
Calculation of Proportional
202 SCAL -      9 -
Value
Calculation of Parameter
203 SCLP DSCLP      7 13
Proportional Value
205 CMPT DCMPT  Compare table - -  * 9 17
Catch speed and proportional
207 CSFO - - - - * * 7 -
output
*: ELC2-PB/PE does not support API148 DMEMR/API149 DMEMW.
*: ELC-PV does not support API205 DCMPT.
*: ELC-PV and ELC2-PE do not support API177 GPS and API178 DSPA and API207 CSFO.

Positioning Control
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
155 - DABSR - ABS current value read -    - 13
156 ZRN DZRN - Zero point return - - *  9 17
157 PLSV DPLSV - Adjustable Speed Pulse Output - -   7 13
158 DRVI DDRVI - Relative positioning - - *  9 17
159 DRVA DDRVA - Absolute positioning - - *  9 17
2-Axis Relative Point to Point
191 - DPPMR - - - *  - 17
Motion

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 194
3. Instruction Set

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
- 2-Axis Absolute Point to Point
192 - DPPMA - - *  - 17
Motion
2-Axis Relative Position Arc
193 - DCIMR - - - *  - 17
Interpolation
2-Axis Absolute Position Arc
194 - DCIMA - - - *  - 17
Interpolation
195 - DPTPO - Single-Axis pulse output by table - -   - 13
197 - DCLLM - Close loop position control - -   - 17
198 - DVSPO - Variable speed pulse output - -  * - 17
199 - DICF  Immediately change frequency - -  * - 13
*:16-bits API156 ZRN,API 158 DRVI, API159 DRVA don’t support ELCM-PH/PA,
ELC2-PB/PH/PA/PE.
.*: API191 DPPMR, API192 DPPMA, API193 DCIMR, API194 DCIMA don’t support ELC2-PB.
*: API198 DVSPO and API199 DICF don’t support ELC-PV.

Perpetual Calendar
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
160 TCMP -  Calendar data comparison -    11 -
161 TZCP -  Calendar data zone comparison -    9 -
162 TADD -  Calendar data addition -    7 -
163 TSUB -  Calendar data subtraction -    7 -
166 TRD -  Calendar data read -    3 -
167 TWR -  Calendar data write in -    3 -
169 HOUR DHOUR - Hour meter -    7 13

Gray Code
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
170 GRY DGRY  Convert BIN to Gray code -    5 9
171 GBIN DGBIN  Convert Gray code to BIN -    5 9

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 195
3. Instruction Set

Matrix Handling
Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
180 MAND -  Matrix AND -    9 -
181 MOR -  Matrix OR -    9 -
182 MXOR -  Matrix XOR -    9 -
183 MXNR -  Matrix XNR -    9 -
184 MINV -  Matrix inverse -    7 -
185 MCMP -  Matrix compare -    9 -
186 MBRD -  Matrix bit read -    7 -
187 MBWR -  Matrix bit write -    7 -
188 MBS -  Matrix bit shift -    7 -
189 MBR -  Matrix bit rotate -    7 -
190 MBC -  Matrix bit state count -    7 -

Contact Type Logic Operation

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
215 LD& DLD& - S1 & S2 -    5 9
216 LD| DLD| - S1 | S 2 -    5 9
217 LD^ DLD^ - S1 ^ S2 -    5 9
218 AND& DAND& - S1 & S2 -    5 9
219 AND| DAND| - S 1 | S2 -    5 9
220 AND^ DAND^ - S1 ^ S2 -    5 9
221 OR& DOR& - S1 & S 2 -    5 9
222 OR| DOR| - S1 | S2 -    5 9
223 OR^ DOR^ - S1 ^ S 2 -    5 9

Contact Type Compare Instruction

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
224 LD= DLD= - S1 = S2     5 9

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 196
3. Instruction Set

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
225 LD> DLD> - S1 > S2     5 9
226 LD< DLD< - S1 < S2     5 9
228 LD<> DLD<> - S1 ≠ S2     5 9
229 LD<= DLD<= - S1 ≦ S2     5 9
230 LD>= DLD>= - S1 ≧ S2     5 9
232 AND= DAND= - S1 = S2     5 9
233 AND> DAND> - S1 > S2     5 9
234 AND< DAND< - S1 < S2     5 9
236 AND<> DAND<> - S1 ≠ S2     5 9
237 AND<= DAND<= - S1 ≦ S2     5 9
238 AND>= DAND>= - S1 ≧ S2     5 9
240 OR= DOR= - S1 = S2     5 9
241 OR> DOR> - S1 > S2     5 9
242 OR< DOR< - S1 < S2     5 9
244 OR<> DOR<> - S1 ≠ S2     7 13
245 OR<= DOR<= - S1 ≦ S2     7 -
246 OR>= DOR>= - S1 ≧ S2     1 -
296 LDZ> DLDZ> - | S 1 - S 2 | > | S3 | - -  * 7 13
297 LDZ>= DLDZ>= - | S1 - S2 | ≧ | S3 | - -  * 7 13
298 LDZ< DLDZ< - | S 1 - S 2 | < | S3 | - -  * 7 13
299 LDZ<= DLDZ<= - | S1 - S2 | ≦ | S3 | - -  * 7 13
300 LDZ= DLDZ= - | S 1 - S 2 | = | S3 | - -  * 7 13
301 LDZ<> DLDZ<> - | S1 - S2 | ≠ | S3 | - -  * 7 13
302 ANDZ> DANDZ> - | S1 - S2 | > | S3 | - -  * 7 13
303 ANDZ>= DANDZ>= - | S1 - S2 | ≧ | S3 | - -  * 7 13
304 ANDZ< DANDZ< - | S1 - S2 | < | S3 | - -  * 7 13
305 ANDZ<= DANDZ<= - | S1 - S2 | ≦ | S3 | - -  * 7 13
306 ANDZ= DANDZ= - | S1 - S2 | = | S3 | - -  * 7 13
307 ANDZ<> DANDZ<> - | S1 - S2 | ≠ | S3 | - -  * 7 13
308 ORZ> DORZ> - | S 1 - S 2 | > | S3 | - -  * 7 13
309 ORZ>= DORZ>= - | S1 - S2 | ≧ | S3 | - -  * 7 13
310 ORZ< DORZ< - | S 1 - S 2 | < | S3 | - -  * 7 13
311 ORZ<= DORZ<= - | S1 - S2 | ≦ | S3 | - -  * 7 13

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 197
3. Instruction Set

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
312 ORZ= DORZ= - | S 1 - S 2 | = | S3 | - -  * 7 13
313 ORZ<> DORZ<> - | S1 - S2 | ≠ | S3 | - -  * 7 13
*:ELC-PV does not support API296~API313

Specified Bit Instruction

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
266 BOUT DBOUT - Output Specified Bit of a Word - -   5 9
267 BSET DBSET - Set ON Specified Bit of a Word - -   5 9
268 BRST DBRST - Reset Specified Bit of a Word - -   5 9
Load NO Contact by Specified 
269 BLD DBLD - - -  5 9
Bit
Load NC Contact by Specified 
270 BLDI DBLDI - - -  5 9
Bit
Connect NO Contact in Series 
271 BAND DBAND - - -  5 9
by Specified Bit
Connect NC Contact in Series 
272 BANI DBANI - - -  5 9
by Specified Bit
Connect NO Contact in Parallel 
273 BOR DBOR - - -  5 9
by Specified Bit
Connect NC Contact in Parallel 
274 BORI DBORI - - -  5 9
by Specified Bit

Floating-Point Contact Type Comparison

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
275 - FLD= - S1 = S2 - -   - 9
276 - FLD> - S1 > S2   - 9
277 - FLD< - S1 < S2   - 9
278 - FLD<> - S1 ≠ S2   - 9
279 - FLD<= - S1 ≦ S2   - 9

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 198
3. Instruction Set

Mnemonic Availability STEPS

ELC
API P Function ELCM-PH/PA
ELCB ELC -PV
16 bits 32 bits ELC2-PB/PH 16 32
-PB -PA ELC2
ELC2-PA/PE
-PV
280 - FLD>= - S1 ≧ S2   - 9
280 - FAND= - S1 = S2   - 9
282 - FAND> - S1 > S2   - 9
283 - FAND< - S1 < S2   - 9
284 - FAND<> - S1 ≠ S2   - 9
285 - FAND<= - S1 ≦ S2   - 9
286 - FAND>= - S1 ≧ S2   - 9
287 - FOR= - S1 = S2   - 9
288 - FOR> - S1 > S2   - 9
289 - FOR< - S1 < S2   - 9
290 - FOR<> - S1 ≠ S2   - 9
291 - FOR<= - S1 ≦ S2   - 9
292 - FOR>= - S1 ≧ S2   - 9
Note: ELCB-PB does not support pulse execution type instructions (P instruction).

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 199
3. Instruction Set

3.7 Detailed Instruction Explanation

API Mnemonic Operands Function

00 CJ P S Conditional Jump

OP Range Program Steps

S P0~P255 CJ, CJP: 3 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: The destination pointer of the conditional jump, P can be modified by Index register E, F
39. ELCB-PB have 64 pointers; available from the range of P0 to P63.
40. ELC-PA/PV, ELC2-PB/PH/PA/PE/PV and ELCM-PH/PA have 256 pointers; available from the
range of P0~P255.

Description:
41. When the CJ instruction is true it forces the program to jump to the specified program marker.
While the jump takes place the intervening program steps are skipped. This means they are
not processed in any way. The resulting effect is to speed up the program scan time.
42. When the destination of the pointer P is before the CJ instruction, note that this is a program
loop and there must be a way out of the loop. If it continually jumps backwards, the Watchdog
timer will eventually time out faulting the processor. Loops are generally not recommended in
PLC programming. It’s always better to allow the program scan to run. The I/O is updated once
per scan and if the program is caught in a loop, the I/O is not being scanned and updated.
43. What happens to each data type when the CJ instruction jumps over them :
1. Y, M, S remains its previous state before the condition jump occurs.
2. General timers, accumulative timers and general counters will freeze their current values if
they are skipped by a CJ instruction.
3. Timers for Subroutines and Interrupts are an exception to this as they are processed
independently of the main program.
4. High speed counters are also an exception to this as they are processed independently of the
main program.
5. The ordinary counters stop executing.
6. If the “reset instruction” of a timer is executed before the conditional jump, the device will still
be in the reset status while jump is being executed.
7. Application instructions are also skipped if they are programmed between the CJ instruction
and the destination pointer. However, the DHSCS, DHSCR, DHSZ, SPD, PLSY, PWM, PLSR,
PLSV, DDRVI and DDRVA instructions will operate continuously if they were active before the
CJ instruction was executed, otherwise they will not be processed. .

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 200
3. Instruction Set

Program Example 1:
When X0=ON the program will skip from address 0 to N (label P1) automatically and continue
executing. Logic between 0 and N will be skipped and will not be executed.
When X0=OFF, all lines of code will be executed.
(CJ command)
P***
X0
0 CJ P1

X1
Y1
X2
P1 N Y2

Program Example 2:
There are five conditions where the CJ instruction can be used between the MC and MCR
instructions.
1. Outside of an MC~MCR.
2. Valid in the Loop P1 shown below
3. In the same level N, inside of MC~MCR.
4. Inside of MC, out of MCR.
5. Jump from one MC~MCR to another MC~MCR.
X0
MC N0
X2
CJ P0
X3
CJ P1
X1
MC N1
M1000
P1 Y1

MCR N1
M1000
P0 Y0

MCR N0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 201
3. Instruction Set

API Mnemonic Operands Function

01 CALL P S Call Subroutine

OP Range Program Steps

S P0~P255 CALL, CALLP: 3 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: The destination pointer of the call subroutine. P can be modified by Index registers E, F.
44. ELCB-PB have 64 pointers; available from the range of P0 to P63.
45. ELC-PA/PV, ELC2-PB/PH/PA/PE/PV and ELCM-PH/PA have 256 pointers; available from the
range of P0~P255.

Description:
46. When the CALL instruction is active it forces the program to run the subroutine associated with
the called pointer.
47. A CALL instruction must be used in conjunction with FEND (API 06) and SRET (API 02)
instructions.
48. The program jumps to the subroutine pointer (located after the FEND instruction) and
processes the contents until an SRET instruction is encountered. This forces the program flow
back to the line of ladder immediately following the original CALL instruction.

Points to note:
49. Subroutines must be placed after the FEND instruction.
50. Subroutines must end with the SRET instruction.
51. CALL and CJ instruction pointers are not allowed to use the same pointer number.
52. CALL instructions can call any subroutine any number of times.
53. Subroutines can be nested 5 levels deep including the initial CALL instruction.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 202
3. Instruction Set

API Mnemonic Function

02 SRET Subroutine Return

OP Range Program Steps

Automatically returns to the step immediately following the CALL SRET: 1 steps
N/A
instruction which activated the subroutine
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Description:
Indicates the end of a subroutine program. The subroutine will return to the main program and
begin execution with the instruction after the CALL instruction.

Program Example 1:
When X0 = ON, the CALL instruction will jump to P2 and run the subroutine. With the execution of
the SRET instruction, it will jump back to step 24 and continue execution.

X0
20 CALL P2 Call subroutine P2
X1
24
Y0

FEND
M1
P2 Y1

Subroutine
M2
Y2

SRET Subroutine return

Program Example 2:
54. When the rising-edge of X20 is triggered, the CALL P10 instruction will transfer execution to
subroutine P10.
55. When X21 is ON, execute CALL P11, jump to and run subroutine P11.
56. When X22 is ON, execute CALL P12, jump to and run subroutine P12.
57. When X23 is ON, execute CALL P13, jump to and run subroutine P13.
58. When X24 is ON, execute CALL P14, jump to and run subroutine P14. When the SRET
instruction is reached, jump back to the last P*** subroutine and keep executing until the last
SRET instruction is reached which will return execution back to the main program.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 203
3. Instruction Set

X0 X2
INC D0 P12 INC D30

Y0 Y20
X20 X23
CALL P10 CALL P13
Main Subroutine
X0 Program X2
INC D1 INC D31

Y1 Y21

FEND SRET
X2 X2
P10 INC D10 P13 INC D40

Y2 Y22
X21 X24
CALL P11 CALL P14
Subroutine Subroutine
X2 X2
INC D11 INC D41

Y3 Y23

SRET SRET
X2 X2
P11 INC D20 P14 INC D50

Y4 Y24
X22 Subroutine
CALL P12 SRET
Subroutine
X2
INC D21 END

SRET

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 204
3. Instruction Set

API Mnemonic Function

03 IRET Interrupt Return

OP Range Program Steps

IRET ends the processing of an interrupt subroutine and returns IRET: 1 step
N/A
execution back to the main program
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

API Mnemonic Function

04 EI Enable All Interrupts

OP Range Program Steps

Enables Interrupts. This instruction is used with the DI (disable EI: 1 step
interrupts) instruction. See the DI instruction for more
N/A information.
If users want to enable a certain interrupt, they can set the
corresponding special M.
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

API Mnemonic Function

05 DI Disable All Interrupts

OP Range Program Steps

DI instruction disables the ELC to accept all interrupts; like Time DI: 1 step
interrupts or High-speed counter interrupts or External
N/A interrupts.
If users want to disable a certain interrupt, they can set the
corresponding special M.
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Description:
59. Interrupt subroutines must be placed after the FEND instruction.
60. Other interrupts are not allowed during execution of a current interrupt routine.
61. Priority is given to the interrupt occurring first. If interrupts occur simultaneously, the interrupt
with the lower pointer number will be given the higher priority.
62. Any interrupt request occurring between DI and EI instructions will not be executed
immediately. The interrupt will be saved and executed when the next EI instruction occurs.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 205
3. Instruction Set

63. Care should be used when using external interrupts and using the same inputs for high speed
counter inputs.
64. During the execution of an interrupt routine, an immediate I/O instruction can be performed by
using the REF instruction.

Points to note:
65. ELCB-PB models interrupt pointers (I):
1. External interrupts: (I001, X0), (I101, X1), (I201, X2), (I301, X3) 4 points.
2. Time interrupts: I6□□, 1 point (□□＝10~99, time base=1ms)
3. Communication interrupt for specific characters received (I150)
4. Flags:
Flag Function
M1050 External interrupt, I 001 masked
M1051 External interrupt, I 101 masked
M1052 External interrupt, I 201 masked
M1053 External interrupt, I 301 masked
M1056 Disable time interrupt I6□□
66. FOR ELC-PA models Interrupt pointers (I):
1. External interrupts: (I001, X0), (I101, X1), (I201, X2), (I301, X3), (I401, X4), (I501, X5) 6 points.
2. Time interrupts: I6□□, I7□□ 2 points. (□□＝1~99ms, time base=1ms)
3. High-speed counter interrupts: I010, I020, I030, I040, I050, I060 6 points. (used with DHSCS
instruction)
4. Communication interrupt for specific characters received (I150)
5. The priority of interrupt pointer I: high-speed counter interrupt, external interrupt, time interrupt
and communication interrupt for specific characters received
6. Among the following 6 interrupts, (I001, I010), (I101, I020), (I201, I030), (I301, I040), (I401,
I050), (I501, I060), the program allows the user to use only one of the two numbers in a pair. If
the user uses the two numbers in the pair, syntax check errors may occur when the program is
written to the ELC controller.
7. Flags:
Flag Function
M1050 External interrupt, I 001 masked
M1051 External interrupt, I 101 masked
M1052 External interrupt, I 201 masked
M1053 External interrupt, I 301 masked
M1054 External interrupt, I 401 masked
M1055 External interrupt, I 501 masked

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 206
3. Instruction Set

Flag Function
M1056 Timer interrupt, I6□□ masked
M1057 Timer interrupt, I7□□ masked
M1059 High-speed counter interrupt, I010~I060 masked
M1299 Communication interrupt, I150 masked
67. FOR ELC-PV, ELC-PV2 models Interrupt pointers (I):
a) External interrupts: (I00□, X0), (I10□, X1), (I20□, X2), (I30□, X3), (I40□, X4), (I50□, X5) 6
points. (□ = 0 designates interrupt on falling-edge, □ = 1 designates interrupt on
rising-edge)
b) Time interrupts: I601~I699, I701~I799, 2 points. (Timer resolution: 1ms), I801~I899 1 point.
( Timer resolution: 0.1ms)
c) High-speed counter interrupts: I010, I020, I030, I040, 1050, 1060 6 points. (used with API 53
DHSCS instruction to generate interrupt signals)
d) When pulse output interrupts I110, I120 (triggered when pulse output is finished), I130, I140
(triggered when the first pulse output starts) are executed, the currently executed program is
interrupted and jumps to the designated interrupt subroutine.
e) Communication interrupt: I150, I160, I170
f) The order for execution of interrupt pointer I: external interrupt, time interrupt, high-speed
counter interrupt, pulse interrupt, communication interrupt.
g) External interruptions only for ELC2-PV: (I90□, X10), (I91□, X11), (I92□, X12), (I93□, X13),
(I94□, X14), (I95□, X15), (I96□, X16), (I97□, X17) 8 points. (□ = 0 designates interruption
in falling-edge, □ = 1 designates interruption in rising-edge
h) Flags:
Flag Function
M1280 Disable external interrupt I00□
M1281 Disable external interrupt I10□
M1282 Disable external interrupt I20□
M1283 Disable external interrupt I30□
M1284 Disable external interrupt I40□
M1285 Disable external interrupt I50□
M1286 Disable time interrupt I6□□
M1287 Disable time interrupt I7□□
M1288 Disable time interrupt I8□□
M1289 Disable high-speed counter interrupt I010
M1290 Disable high-speed counter interrupt I020
M1291 Disable high-speed counter interrupt I030
M1292 Disable high-speed counter interrupt I040

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 207
3. Instruction Set

Flag Function
M1293 Disable high-speed counter interrupt I050
M1294 Disable high-speed counter interrupt I060
M1295 Disable pulse output interrupt I110
M1296 Disable pulse output interrupt I120
M1297 Disable pulse output interrupt I130
M1298 Disable pulse output interrupt I140
M1299 Disable communication interrupt I150
M1300 Disable communication interrupt I160
M1301 Disable communication interrupt I170
M1340 Generate interrupt I110 after CH0 pulse is sent
M1341 Generate interrupt I120 after CH1 pulse is sent
M1342 Generate interrupt I130 when CH0 pulse is being sent
M1343 Generate interrupt I140 when CH1 pulse is being sent
M1560
~ Disable external interrupt I90□ ~ I97□, only for ELC2-PV
M1567
68. FOR ELCM-PH/PA, ELC2-PB/PH/PA/PE models Interrupt pointers (I):
a) External interrupts: (I00□, X0), (I10□, X1), (I20□, X2), (I30□, X3), (I40□, X4), (I50□, X5),
(I60□, X6), (I70□, X7) 8 points. (□ = 0 designates interrupt on falling-edge, □ = 1
designates interrupt on rising-edge)
b) Time interrupts: I602~I699, I702~I799, 2 points. ( Timer resolution: 1ms)
c) High-speed counter interrupts: I010, I020, I030, I040, 1050, 1060, 1070, 1080 8 points. (used
with API 53 DHSCS instruction to generate interrupt signals)
d) Communication interrupt: I140, I150, I160
e) The order for execution of interrupt pointer I: external interrupt, time interrupt, high-speed
counter interrupt, communication interrupt.
f) Flags:
Flag Function
M1050 Disable external interrupt I000 / I001
M1051 Disable external interrupt I100 / I101
M1052 Disable external interrupt I200 / I201
M1053 Disable external interrupt I300 / I301
M1054 Disable external interrupt I400 / I401
M1055 Disable external interrupt I500 / I501, I600 / I601, I700 / I701
M1056 Disable timer interrupts I602~I699

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 208
3. Instruction Set

Flag Function
M1057 Disable timer interrupts I702~I799
M1059 Disable high-speed counter interrupts I010~I080
M1280 I000/I001 Reverse interrupt trigger pulse direction (Rising/Falling)
M1284 I400/I401 Reverse interrupt trigger pulse direction (Rising/Falling)
M1286 I600/I601 Reverse interrupt trigger pulse direction (Rising/Falling)
Note: The default setting of I000 is falling-edge triggered. When M1280 = ON and EI
instruction is enabled, ELC will reverse the interrupt at X0 as rising-edge triggered. If the
interrupt needs to trigger on falling-edge, M1280 must be reset (OFF) first and then the DI
instruction must be enabled. Then the interrupt will be reset on the falling-edge when EI is
executed again.

Program Example:
During the ELC operation, the program scans the instructions between EI and DI, if X1 or X2 are ON,
subroutine A or B will be executed. When IRET is reached, the main program will resume.

X1
Y0 Enabled interrupt

Disabled interrupt

EI
Enabled interrupt
FEND
M0
I 101 Y1
Interrupt subroutine A

IRET
M1
I 201 Y2
Interrupt subroutine B

IRET

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 209
3. Instruction Set

API Mnemonic Function

06 FEND Terminate the Main Routine Program

OP Range Program Steps

N/A Instruction driven by contact is not necessary. FEND: 1 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Description:
69. Use the FEND instruction when the application uses either standard subroutines or interrupt
routines. If subroutines are not used then use the END instruction to end the main program.
70. This instruction denotes the end of the main program when subroutines are used. It has the
same function as the END instruction during ELC operation.
71. Subroutines must be placed after the FEND instruction. Each subroutine must end with the
SRET instruction.
72. Interrupt subroutines must be placed after the FEND instruction. Each interrupt subroutine
must end with the IRET instruction.
73. When using the FEND instruction, an END instruction is still required, but should be placed as
the last instruction after the main program and all subroutines.
74. If using several FEND instructions, place the subroutines between the FEND and END
instructions.
75. During execution of a subroutine, if a FEND instruction is scanned before the SRET instruction,
an error will occur.
76. During execution of a FOR instruction, if a FEND instruction is scanned before the NEXT
instruction, an error will occur.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 210
3. Instruction Set

CJ Command Program Flow

The program flow The program flow when X0=On

0 EI
when X0=off, program jumps to P0
X1=off
Main program
X0
CJ P0
X1
CALL P63

Main program

FEND

P0 Main program

FEND

P63 Command CALL subroutine

SRET

I301 Interrupt subroutine

IRET

END

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 2 11
3. Instruction Set

CALL Command Program Flow

The program flow

0 EI
when X0=off, The program flow
X1=off when X0=Off,
Main program X1=On.
X0
CJ P0
X1
CALL P63

Main program

FEND

P0 Main program

FEND

P63 Command CALL subroutine

SRET

I301 Interrupt subroutine

IRET

END

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 212
3. Instruction Set

API Mnemonic Function

07 WDT P Reset the Watchdog Timer

OP Range Program Steps

N/A WDT, WDTP: 1 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Description:
1. The WDT instruction can be used to reset the Watch Dog Timer. If the ELC scan time (from
step 0 to END or FEND instruction) is more than 200ms, the ERROR LED will flash. The user
will have to turn the ELC OFF and then back ON to clear the fault. The ELC will determine the
status of RUN/STOP according to RUN/STOP switch when power is restored.
2. When to use WDT:
1. When an error occurs in the ELC.
2. When the scan time of the program exceeds the WDT value in D1000. It can be modified by
using the following two methods.
i. Use WDT instruction (see the program example below for more information)
STEP0 END(FEND)
WDT

T1 T2

ii. Use D1000 (default is 200ms) to change the watchdog time.

Points to note:
77. When the WDT instruction is used it will operate on every program scan so long as its input
conditions are true. To force the WDT instruction to operate for only ONE scan, use the suffix
P with the WDT instruction (WDTP).
78. The watchdog timer has a default setting of 200ms for ELC controllers. This time limit may be
modified by moving another value into the contents of data register D1000, the wathdog timer
register.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 213
3. Instruction Set

Program Example:
If the program scan time is over 300ms, users can divide the program into 2 parts. Insert the WDT
instruction in the middle of the program, so both halves of the program’s scan time will be less than
200ms.

300ms program

END
Dividing the program to two parts
so that both parts scan time are
less than 200ms.
150ms program

X0
WDT Watchdog timer reset

150ms program

END

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 214
3. Instruction Set

API Mnemonic Operands Function

08 FOR S Loop Begin
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F FOR: 3 steps
S * * * * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: The number of times the loop will be executed

API Mnemonic Function

09 NEXT Loop End

OP Range Program Steps

N/A NEXT: 1 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Description:
1. The FOR and NEXT instructions are used when FOR/NEXT loops are needed.
2. “N” (the number of times the loop is executed – this is the operand S for the FOR instruction)
must be within the range of K1 to K32767. If the range N≦K1, N will always be K1.
3. An error will occur in the following conditions:
 The NEXT instruction is before the FOR instruction.
 A FOR instruction doesn’t have a NEXT instruction.
 There is a NEXT instruction after the FEND or END instruction.
 A different number of FOR and NEXT instructions.
4. The FOR to NEXT loop can be nested to five levels. If the execution time of the loops is too
long, the ELC scan time will increase and it may cause the watchdog timer to be activated and
result in an error. The WDT instruction can be used to prevent watchdog faults..

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 215
3. Instruction Set

Program Example 1:
After loop A operates 3 times, the program after the
FOR K3
last NEXT instruction will be scanned. For every
FOR K4
complete cycle of loop A, loop B will execute 4
B A
times. Therefore, the total number of times that NEXT
loop B operates will be 3 × 4＝12 times.
NEXT

Program Example 2:
When X7 = Off, the ELC will execute the program between the FOR ~ NEXT loop. When X7 = On,
the CJ instruction jumps to P6 and does not execute the logic between the CJ and P6, which
includes the FOR/NEXT loop.

X7
CJ P6
M0
MOV K0 D0

FOR K3
M0
MOV D0 D1

INC D0

NEXT
X10
P6 Y10

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 216
3. Instruction Set

Program Example 3:
When the FOR / NEXT instructions are not to be executed, a CJ instruction can be used to jump
around the loop. When X1=ON, the CJ instruction will jump to P0 and not execute the inner most
FOR / NEXT loop.

X0
TMR T0 K10

FOR K4X100
X0
INC D0

FOR K2
X0
INC D1

FOR K3
X0
INC D2

FOR K4
X0
WDT

INC D3
X1
CJ P0

FOR K5
X0
INC D4

P0 NEXT

END

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 217
3. Instruction Set

API Mnemonic Operands Function

10 D CMP P S 1 , S2 , D Compare
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F CMP, CMPP: 7 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DCMP, DCMPP: 13 steps
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: First comparison value S2: Second comparison value D: Comparison result (starting bit
address – uses 3 consecutive bit addresses)

Description:
79. The contents of S1 and S2 are compared and D denotes the compare result.
80. Operand D occupies 3 continuous bits (Y, M or S).
81. The values are binary values. If bit 15=1 in 16-bit instruction or bit 31=1 in 32-bit instruction,
the comparison will regard the value as a negative binary value.
82. D, D +1, D +2 hold the comparison results,
D = ON if S1 > S2,
D +1 = ON if S1 = S2
D +2 = ON if S1 < S2
83. If operand S1, S2 use index register F, only a 16 bit compare is available.

Program Example:
84. If D is set to Y0, then Y0, Y1, Y2 will display the results of the compare as shown below.
85. When X20=ON, the CMP instruction is executed and one of Y0, Y1, Y2 will be ON. When
X20=OFF, the CMP instruction is not executed and Y0, Y1, Y2 remain in their previous states.

X20
CMP K10 D10 Y0
Y0
If K10>D10, Y0 = On
Y1
If K10=D10, Y1 = On

Y2
If K10<D10, Y2= On

86. Use RST or ZRST instructions to reset the comparison result.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 218
3. Instruction Set

API Mnemonic Operands Function

11 D ZCP P S1, S2, S, D Zone Compare
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F ZCP, ZCPP: 9 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DZCP, DZCPP: 17 steps
S * * * * * * * * * * *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: First comparison value (Minimum) S2: Second comparison value (Maximum)
S: Comparison value D: Comparison result result (starting bit address – uses 3 consecutive bit
addresses)

Description:
87. S is compared with the lower limit, S1 and the upper limit S2 and D contains the compare result.
88. The values are binary values. If bit 15=1 in 16-bit instruction or bit 31=1 in 32-bit instruction,
the comparison will regard the value as a negative binary value.
89. If operand S1, S2 , S use index register F, only a 16 bit compare is available.
90. Operand S1 should be less than Operand S2,
Operand D occupies 3 continuous addresses.

Program Example:
91. If D is set to M0, then M0, M1, M2 will display the result of the ZCP as shown below.
92. When X0=ON, ZCP instruction is evaluated and one of M0, M1 or M2 will be ON. When
X0=OFF, ZCP instruction is not evaluated and M0, M1, M2 remain in the previous status.
X0
ZCP K10 K100 C10 M0
M0
If C10 < K10, M0 = On
M1
If K10 <
= C10 <
= K100, M1 = On
M2
If C10 > K100, M2 = On

93. Use RST or ZRST instructions to reset the comparison result.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 219
3. Instruction Set

API Mnemonic Operands Function

12 D MOV P S, D Move
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MOV, MOVP: 5 steps
S * * * * * * * * * * *
D * * * * * * * * DMOV, DMOVP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Data source D: Data destination

Description:

When the MOV instruction is executed, the data in S is moved to D without any change to S. If the
MOV instruction is not executed, the content of D will remain unchanged.

Program Example:
94. MOV will move a 16-bit value from the source location to the destination.
95. When X0=OFF, the content of D0 remains unchanged. If X0=ON, the data K10 is moved to
D0.
96. When X1=OFF, the content of D10 remain unchanged. If X1=ON, the data of T0 is moved to
the D10 data register. In a word instruction, T0 is the accumulated value of timer T0.
97. DMOV will move a 32-bit value from the source location to the destination.
98. When X2=OFF, the content of (D31, D30) and (D41, D40) remain unchanged. If X2=ON, the
data of (D21, D20) is moved to (D31, D30) data register. Meanwhile, the data of C235 is
moved to (D41, D40) data register.

X0
MOV K10 D0

X1
MOV T0 D10

X2
DMOV D20 D30

DMOV C235 D40

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 220
3. Instruction Set

API Mnemonic Operands Function

13 SMOV P S, m1, m2, S2, D, n Shift Move
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F SMOV, SMOVP: 11 steps
S * * * * * * * * *
m1 * *
m2 * *
D * * * * * * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Data source m1: Source position (nibble) of the first digit to be moved m2: Number of source
digits (nibbles) to be moved D: Destination n: Destination position for the first digit (nibble)

Description:
99. BCD mode (M1168=OFF):
This mode of the SMOV operation allows BCD numbers to be manipulated in exactly the same
way as the ‘normal’ SMOV manipulates decimal numbers, i.e. this instruction copies a
specified number of digits from a 4 digit BCD source(S) and places them at a specified location
within a destination (D) address (also a 4 digit BCD number).
100. BIN mode (M1168=ON):
This instruction copies a specified number of digits from a 4 digit decimal source (S) and
places them at a specified location within a destination (D) address (also a 4 digit decimal).
The existing data in the destination is overwritten.

Points to note:
101. The range of m1: 1 ~ 4
102. The range of m2: 1 ~ m1 (cannot be great than m1)
103. The range of n: m2 ~ 4 (cannot be less than m2)

Program Example 1:
104. When M1168=OFF and X0=ON, the two upper digits of D10 are moved to the two middle digits
of D20. The contents of the high and low digits of D20 remain unchanged after SMOV is
executed.
105. If the source is not a valid BCD number an operation error will occur in ELC. The instruction
will not be executed and M1067 and M1068 = ON, D1067 = error code H0E18.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 221
3. Instruction Set

M1001
M1168
X0
SMOV D10 K4 K2 D20 K3

D10(BIN 16bit)
Auto conversion
3 2 1 0
10 10 10 10 D10(BCD 4 digits)
Shift move
No variation No variation
2
10
3
10 10
1
10
0
D20(BCD 4 digits)
Auto conversion
D20(BIN 16bit)

106. If D10=H1234, D20=H5678 before execution, D10 remains unchanged and D20=H5128 after
execution.

Program Example 2:
When M1168=ON and X0=ON, SMOV is executed, the two high digits of D10 will be moved to the
middle two digits of D20 in hex format.
M1000
M1168
X0
SMOV D10 K4 K2 D20 K3

Digit 4 Digit 3 Digit 2 Digit 1

D10(BIN 16bit)

Shift move

D20(BIN 16bit)
Digit 4 Digit 3 Digit 2 Digit 1
No variation No variation

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 222
3. Instruction Set

Program Example 3:
Move the first digit of D1 to the third digit of D2 after the low byte of D2 is populated with X20-X27
and the low byte of D1 is populated with X30-X37.
Use SMOV to move the first digit of D1 to the third digit of D2 and combining these two digit
switches into one word (D2).
2 1 0
10 10 10

6 4 2

8 8 8

X33~X30 X27~X20

ELC
M1001
M1168
M1000
BIN K2X20 D2 (X20~X27)BCD, 2 digits D2(BIN)

BIN K1X30 D1 (X30~X33)BCD, 1 digit D1(BIN)

SMOV D1 K1 K1 D2 K3

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 223
3. Instruction Set

API Mnemonic Operands Function

14 D CML P S, D Compliment and Move
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F CML, CMLP: 5 steps
S * * * * * * * * * * *
D * * * * * * * * DCML, DCMLP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Data source D: Destination

Description:
107. Take the data in the source S, compliment (01, 10) it and move to the assigned
destination D.
108. If operand S and D use index register F, only a 16 bit value is available

Program Example:
When X20=ON, the contents of D1, b0~b3, will be complimented and moved to Y0 – Y3.
X20
CML D1 K1Y0

b15 b3 b2 b1 b0

D1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
Symbol bit ( 0=positive, 1=negative)

0 1 0 1

No variation Transfer data

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 224
3. Instruction Set

API Mnemonic Operands Function

15 BMOV P S, D, n Block Move
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BMOV, BMOVP: 7 steps
S * * * * * * *
D * * * * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source D: Destination n: Number of data registers to move

Description:
109. This instruction is used to move an assigned block of data to a new destination. Move the
contents of S through S + n to D through D + n registers. If the number of registers n exceeds
the valid range shown below, only the values that are within the valid range will be moved.
110. The range of n=1 – 512.
111. ELCB-PB models do not support KnX, KnY, KnM, KnS addresses.

Program Example 1:
When X20=ON, move the contents of the four registers D0~D3 to their corresponding registers
D20~D23.
X20
BMOV D0 D20 K4 D0 D20
D1 D21
n=4
D2 D22
D3 D23

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 225
3. Instruction Set

Program Example 2:

If BMOV is used to move bits, KnX, KnY, KnM, KnS, the digit numbers of S and D should be of the
same data type.
M1000
BMOV K1M0 K1Y0 K3 M0 Y0
M1 Y1
M2 Y2
M3 Y3

M4 Y4
M5 Y5
n=3
M6 Y6
M7 Y7

M8 Y10
M9 Y11
M10 Y12
M11 Y13

Program Example 3:
The BMOV instruction will operate differently, depending on the addresses assigned to S and D as
follows.
112. When S > D, the BMOV instruction is processed in the order .
X20 1
BMOV D20 D19 K3 D20 D19
2
D21 D20
3
D22 D21

113. In ELC-PV, when S < D, the instruction is processed following the order →→

X11 3
BMOV D10 D11 K3 D10 D11
2
D11
1
D12 D13

114. In ELC-PB/PC/PA/PH and ELCM-PH/PA, when S < D, the BMOV instruction is processed in
the order , then D11~D13 all equal to D10.
X21
BMOV D10 D11 K3 3
D10 D11
2
D11
1
D12 D13

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 226
3. Instruction Set

API Mnemonic Operands Function

16 D FMOV P S, D, n Fill and Move

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F FMOV, FMOVP: 7 steps
S * * * * * * * * * * *
DFMOV, DFMOVP: 13
D * * * * * *
n * * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source D: Destination n: Number of data registers to move

Description:
115. This instruction is used to move a value to a block of values. . Move the contents of S to each
D through D + n registers. If the number of registers n exceeds the valid range shown below,
only the values that are within the valid range will be moved. For example, this instruction can
be used to clear a file or assign a single value to a file of registers.
116. ELCB-PB models do not support KnX, KnY, KnM, and KnS devices.
117. If operand S uses index register F, only 16 bit values are available
118. The range of n: 1~ 512(16-bit instruction), 1~ 256 (32-bit instruction)

Program Example:
When X20=ON, move constant K10 to the consecutive five registers (D10~D14) starting from D10.
X20
FMOV K10 D10 K5

K10 K10 D10

K10 D11

K10 D12 n=5

K10 D13

K10 D14

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 227
3. Instruction Set

API Mnemonic Operands Function

17 D XCH P D1, D2 Data Exchange
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F XCH, XCHP: 5 steps
D1 * * * * * * * *
D2 * * * * * * * * DXCH, DXCHP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D1: First exchange device D2: Second exchange device

Description:
119. Exchange the contents of D1 and D2.
120. This instruction is best used as a pulse execution (XCHP) to avoid assigning the same values
back and forth.
121. If operand D1 and D2 use index register F, only a 16-bit value is available.

Program Example:
When X0=OFFON, the contents of D20 and D40 are exchanged.
X0
XCHP D20 D40

Before After
execution execution
D20 120 40 D20

D40 40 120 D40

Points to note:
122. When D1 and D2 are the same, and M1303=ON, the upper and lower 16-bits will be exchanged.
ELCB-PB does not support this.
123. When X0=ON and M1303=ON, the upper and lower 16-bit contents of D100, D101 will
exchange.

Before After
X0 execution execution
M1303
D100L 9 8 D100L

DXCHP D100 D100 D100H 20 40 D100H

D101L 8 9 D101L

D101H 40 20 D101H

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 228
3. Instruction Set

API Mnemonic Operands Function

18 D BCD P S, D Convert BIN to BCD
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BCD, BCDP: 5 steps
S * * * * * * * * *
D * * * * * * * * DBCD, DBCDP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source D: Converted result

Description:
124. Convert BIN data (0 to 9999) of S into BCD and transfer the result to D.
125. If the BCD conversion result is outside the valid range of 0 to 9999 (16-bit) or 0 to 99,999,999
(32-bit), an operation error occurs, the error flag M1067 and M1068 =ON, and D1067 will hold
error code H0E18.
126. If operand S and D use index register F, only 16-bit values are available.
127. Flags: M1067 (operation error), M1068 (operation error), D1067 (error code)

Program Example:
128. When X0=ON, the binary data D10 is converted into BCD number, and stored at K1Y0
(Y0~Y3).
X0
BCD D10 K1Y0

129. When D10=001E (Hex) =0030(decimal), the result will be Y0~Y3=0000(BIN).

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 229
3. Instruction Set

API Mnemonic Operands Function

19 D BIN P S, D Convert BCD to BIN
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BIN, BINP: 5 steps
S * * * * * * * * *
D * * * * * * * * DBIN, DBINP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source D: Converted result

Description:
130. Converts BCD data (0 to 9,999) of S into BIN and transfer the result to D.
131. The valid range of source S: BCD (0 to 9,999), DBCD (0 to 99,999,999)
132. If the content of S is not a valid BCD value, an operation error will occur, error flags M1067 and
M1068 =ON, and D1067 holds error code H0E18.
133. If operand S and D use index register F, only a 16-bit compare is available.
134. Flags: M1067 (operation error), M1068 (operation error), D1067 (error code)

Program Example:
When X0=ON, the BCD data K1X20 is converted to BIN data, and result stored at D10.
X0
BIN K1X20 D10

135. The BIN instruction is used to covert the source data into BIN data. An example could be when
the ELC reads a BCD value from a thumbwheel switch and this BCD value needs to be
converted to BIN.
136. When X0=ON, convert K4X20 (BCD data) into BIN data and move it to D100. Then, convert
BIN data of D100 into BCD data and move it to K4Y20.

X0
BIN K4X20 D100

BCD D100 K4Y20

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-230
3. Instruction Set

3 2 1 0
10 10 10 10

4 digit BCD format switch

6 6 4 2

8 1 8 1 8 1 8 1

X37 X20
4 digit BCD value

Use the BIN command to

store BIN value into D100

Use the BCD command to

convert the BIN value in D100

Convert to be 4 digit BCD value

Y37 Y20

4 digit BCD format

7-segment display

API Mnemonic Operands Function

20 D ADD P S1, S2, D Addition
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F ADD, ADDP: 7 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DADD, DADDP: 13 steps
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Augend S2: Addend D: Addition result

Description:
1. The data contained within the source devices (S1, S2) are added together and the result is
stored at the specified destination device (D).
2. The most significant bit is the sign bit. 0 indicates positive and 1 indicates negative. All
calculation are algebraically processed, i.e. 3  (-9)  -6.
3. If operands S1, S2, D use index register F, then only 16-bit instruction is available.
4. Flags: M1020 (Zero flag), M1021 (Borrow flag), M1022 (Carry flag)

Program Example 1:
16-bit instruction:
When X0 = ON, the data in D0 and data in D10 are added together and the result stored in D20. D0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-231
3. Instruction Set

and D10 are unchanged.

X0
ADD D0 D10 D20

(D0)  (D10)  (D20)

Program Example 2:
32-bit instruction:
When X0 = ON, the data in (D31, D30) and data in (D41, D40) are added together and the result
stored in (D51, D50). (D31, D30) and (D41, D40) are unchanged. (D30, D40, D50 is the lower
16-bit data, while D31, D41, D51 is the higher 16-bit data)
X0
DADD D30 D40 D50

(D31, D30)  (D41, D40)  (D51, D50)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-232
3. Instruction Set

Flag operations:
16-bit instruction:
137. If the operation result is “0”, then the Zero flag, M1020 is set to ON.
138. If the operation result is less than -32,768, the borrow flag, M1021 is set to ON.
139. If the operation result exceeds 32,767, the carry flag, M1022 is set to ON.
32-bit instruction:
140. If the operation result is “0”, then the Zero flag, M1020 is set to ON.
141. If the operation result is less than -2,147,483,648, the borrow flag, M1021 is set to ON.
142. If the operation result exceeds 2,147,483,647, the carry flag, M1022 is set to ON
16-bit command: Zero flag Zero flag Zero flag

-2、 -1、 0、-32,768 -1、 0、 1 32,767、0、1、2

the most significant bit the most significant bit

Borrow flag Carry flag
becomes 1 (negative) becomes 0 (positive)

32-bit command: Zero flag Zero flag Zero flag

-2、 -1、 0、 -2,147,483,648 -1、 0、 1 2,147,483,647、 0、 1、 2

the most significant bit the most significant bit

Borrow flag Carry flag
becomes 1 (negative) becomes 0 (positive)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-233
3. Instruction Set

API Mnemonic Operands Function

21 D SUB P S 1 , S2 , D Subtraction
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F SUB, SUBP: 7 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DSUB, DSUBP: 13 steps
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Minuend S2: Subtrahend D: Subtraction result

Description:
143. The data contained within the source device, S2 is subtracted from the contents of source
device S1. The result of this calculation is stored in the destination device D.
144. The most significant bit is the sign. 0 indicates positive and 1 indicates negative. All
calculation is algebraically processed.
145. If operand S1, S2, D use index register F, then only 16-bit instruction is available.
146. Flags: M1020 (Zero flag), M1021 (Borrow flag), M1022 (Carry flag).

Program Example 1:
16-bit instruction:
When X0 = ON, the data in D10 is subtracted from the data in D0 and the result is placed in D20.
X0
SUB D0 D10 D20

(D0)  (D10)  (D20)

Program Example 2:
32-bit instruction:
When X20 = ON, the data in (D41, D40) is subtracted from the data in (D31, D30) and the result is
placed in (D51, D50). (D30, D40, D50 is the lower 16-bit data, and D31, D41, D51 is the higher
16-bit data)
X20
DSUB D30 D40 D50

(D31, D30)  (D41, D40)  (D51, D50)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-234
3. Instruction Set

API Mnemonic Operands Function

22 D MUL P S 1 , S2 , D Multiplication
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MUL, DMULP: 7 steps
S1 * * * * * * * * * *
S2 * * * * * * * * * * DMUL, DMULP: 13 steps
D * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Multiplicand S2: Multiplier D: Multiplication result

Description:
147. The contents of the two source devices (S1, S2) are multiplied together and the result is
stored at the destination device (D).
148. MSB = 0, positive; MSB = 1, negative.
149. If operands S1, S2 use index register F, then only 16-bit instruction is available.
150. If operand D uses index register E, then the 32-bit instruction must be used.
151. 16-bit instruction

b15................ b00 b15................ b00 b31............ b16 b15............. b00

X =
b15 is a symbol bit b15 is a symbol bit b31 is a symbol bit(b15 of D+1)

b15=0,S1 is a positive value b15=0,S2 is a positive value b31=0,D(D+1) is a positive value

b15=1,S1 is a negative value b15=1,S2 is a negative value b31=1, D(D+1) is a negative value

If D is specified with a bit address, it must use K1 ~ K4 to store a 16-bit result. The result of
the MUL instruction is always a 32-bit value. So, the D-register address used for the
destination (D) for this instruction always uses 2 consecutive D registers. .
152. 32-bit instruction
+1 +1 +3 +2 +1

b31.. b16 b15.. b00 b31.. b16 b15.. b00 b63. b48 b47. b32 b31. b16 b15. b00
X =
b31 is a symbol bit b31 is a symbol bit b63 is a symbol bit(b15 of D+3)

b31=0,S1(S1+1) are positive value b31=0,S2(S2+1) are positive value b63=0, D~(D+3) are positive value
b31=1,S1(S1+1) are negative value b31=1,S2(S2+1) are negative value b63=1, D~(D+3) are negative value

If D is specified with a bit address, it must utilize K1~K8 to store a 32-bit result. If D is
specified with a word address and the controller is a ELCB-PB, it will only store the low 32-bit
data. The ELC-PA/PV, ELCM-PH/PA, ELC2-PB/PH/PA/PE/PV will store 64-bit data. 4
consecutive 16-bit registers will be used to store 64-bit data.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-235
3. Instruction Set

Program Example:
The value in D10 is multiplied by the value in D0 and the total is a 32-bit result stored in (D21, D20).
The upper 16-bit data is stored in D21 and the lower one is stored in D20. The polarity of the result
is indicated by the OFF/ON of the most significant bit. OFF indicates the value of positive (0) and
ON indicates the value of negative (1).
X0
MUL D0 D10 D20

(D0)  (D10)  (D21, D20)

16-bit  16-bit  32-bit

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-236
3. Instruction Set

API Mnemonic Operands Function

23 D DIV P S 1 , S2 , D Division
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DIV, DIVP: 7 steps
S1 * * * * * * * * * *
S2 * * * * * * * * * * DDIV, DDIVP: 13 steps
D * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: dividend S2: divisor D: Quotient and Remainder

Description:
1. The primary source (S1) is divided by the secondary source (S2). The result is stored in the
destination (D).
2. This instruction is not executed when the divisor is “0”. Then, the flag M1067, M1068 = ON
and D1067 holds error code H0E19.
3. If operands S1, S2, D use index F, then only the 16-bit instruction is available.
4. 16-bit instruction:
Quotient Remainder
S1 S2 D D +1

b15.............b00 b15.............b00 b15.............b00 b15.............b00

/ =

If D is specified with a bit address, it must utilize K1 ~ K4 to store a 16-bit result. 2 consecutive
16-bit registers will be used to store the 32-bit data consisting of the quotient and remainder.
5. 32-bit instruction:
Quotient Remainder

S 1 +1 S1 S 2 +1 S2 D +1 D D +3 D +2
b15..b00 b15..b00 b15..b00 b15..b00 b31..b16 b15..b00 b31..b16 b15..b00
/ =

If D is specified with a bit address, it must utilize K1 ~ K8 to store a 32-bit result for ELCB-PB
controllers. 4 consecutive 16-bit registers are used to store the quotient and remainder for
ELC-PA/PV, ELCM-PH/PA, ELC2-PB/PH/PA/PE/PV controllers.

Program Example:
When X0 = ON, the value in D0 (dividend) is divided by the value in D10 (divisor). The quotient is
stored in D20 and the remainder is stored in D21. The polarity of the result is indicated by the
OFF/ON of the most significant bit. OFF indicates the value of positive and ON indicates the value
of negative.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-237
3. Instruction Set

X0
DIV D0 D10 D20

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-238
3. Instruction Set

API Mnemonic Operands Function

24 D INC P D Increment

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F INC, INCP: 3 steps
D * * * * * * * * DINC, DINCP: 5 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Destination

Description:
153. If the instruction is not in pulse mode, “1” is added to the value of the destination D every
execution of the instruction, which could be every scan.
154. This instruction works best using pulse mode (INCP, DINCP).
155. In the 16-bit instruction, when +32,767 is reached, “1” is added and it will write a value
of –32,768 to the destination. In 32-bit instruction, when +2,147,483,647 is reached, “1” is
added and it will write a value of -2,147,483,648 to the destination.
156. Flags M1020~M1022 won’t be affected by the operation result of this instruction.
157. If operand D uses index register F, then only 16-bit instruction is available.

Program Example:
When X0 = OFF  ON, the content of D0 will be incremented by 1.
X0
INCP D0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-239
3. Instruction Set

API Mnemonic Operands Function

25 D DEC P D Decrement

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F DEC, DECP: 3 steps
D * * * * * * * * DDEC, DDECP: 5 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Destination

Description:
158. If the instruction is not in pulse mode, “1” is subtracted from the value of destination D on
every execution of the instruction, which could be every scan.
159. This instruction typically works best using pulse mode (DECP, DDECP).
160. In 16-bit instruction, when –32,768 is reached, “1” is subtracted and it will write a value of
+32,767 to the destination. In 32-bit instruction, when -2,147,483,648 is reached, “1” is
subtracted and it will write a value of +2,147,483,647 to the destination.
161. Flags M1020~M1022 won’t be affected by the operation result of this instruction.
162. If operand D uses index register F, then only 16-bit instruction is available.

Program Example:
When X0 = OFF  ON, the value in D0 will be decremented by 1.
X0
DECP D0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-240
3. Instruction Set

API Mnemonic Operands Function

26 WAND P S 1 , S2 , D Logical AND 16-bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F WAND, WANDP: 7 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * *
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: First data source S2: Second data source D: Operation result

Description:
1. A logical AND operation is performed on the bit patterns of the contents of the two source
addresses (S2 and S1). The result of the logical AND is stored in the destination address (D).
2. For 32-bit operation please refer to the DAND instruction.

Program Example:
When X0 = ON, the 16-bit sources D0 and D2 are analyzed and the result of the logical WAND
(Word AND) is stored in D4.
X0
WAND D0 D2 D4

b15 b00
D0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1
Before
WAND
execution
D2 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0

After
execution D4 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-241
3. Instruction Set

API Mnemonic Operands Function

26 DAND P S 1 , S2 , D Logical AND 32-bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DAND, DANDP: 13 steps
S1 * * * * * * * * * *
S2 * * * * * * * * * *
D * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: First data source S2: Second data source D: Operation result

Description:
163. Logical Double word AND operation.
164. A logical AND operation is performed on the bit patterns of the contents of the two source
addresses (S2 and S1). The result of the logical AND is stored in the destination device (D).
165. For 16-bit operation please refer to the WAND instruction.

Program Example:
When X1 = ON, the 32-bit source (D11, D10) and (D21, D20) are analyzed and the result of the
logical DAND (Double word AND) is stored in (D41, D40).
X1
DAND D10 D20 D40

b31 b15 b0
1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1
Before D11 D10 DAND
execution
0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
D21 D20
After
execution 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0
D41 D40

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-242
3. Instruction Set

API Mnemonic Operands Function

27 WOR P S 1 , S2 , D Logical OR 16-bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F WOR, WORP: 7 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * *
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: First data source S2: Second data source D: Operation result

Description:
1. A logical OR operation is performed on the bit patterns of the contents of the two source
addresses (S2 and S1). The result of the logical OR is stored in the destination device (D).
2. For 32-bit operation please refer to the DOR instruction.

Program Example:
When X0 = ON, the 16-bit data source D0 and D2 are analyzed and the result of the logical WOR
is stored in D4.
X0
WOR D0 D2 D4

b15 b00
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Before
WOR
execution
D2 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1

After
execution D4 0 1 0 1 1 1 1 1 1 1 1 1 0 1 0 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-243
3. Instruction Set

API Mnemonic Operands Function

27 DOR P S 1 , S2 , D Logical OR 32-bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DOR, DORP: 13 steps
S1 * * * * * * * * * *
S2 * * * * * * * * * *
D * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: First data source S2: Second data source D: Operation result

Description:
166. Logical Double word OR operation.
167. A logical OR operation is performed on the bit patterns of the contents of the two source
addresses (S2 and S1). The result of the logical OR analysis is stored in the destination
device (D)
168. For 16-bit operation please refer to the WOR instruction.

Program Example:
When X1 is ON, the 32-bit data source (D11, D10) and (D21, D20) are analyzed and the operation
result of the logical DOR is stored in (D41, D40).
X1
DOR D10 D20 D40

b31
b b15 b0
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Before
D11 D10 DOR
execution
0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1
D21 D20
After
execution 0 1 0 1 1 1 1 1 1 1 1 1 0 1 0 1 0 1 0 1 1 1 1 1 1 1 1 1 0 1 0 1
D41 D40

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-244
3. Instruction Set

API Mnemonic Operands Function

28 WXOR P S 1 , S2 , D Exclusive XOR 16-bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F WXOR, WXORP: 7 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * *
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: First data source S2: Second data source D: Operation result

Description:
169. A logical XOR operation is performed on the bit patterns of the contents of the two source
addresses (S2 and S1). The result of the logical XOR is stored in the destination device (D)
170. For 32-bit operation please refer to the DXOR instruction.

Program Example:
When X0 = ON, the 16-bit data source D0 and D2 are analyzed and the operation result of the
logical WXOR is stored in D4.
X0
WXOR D0 D2 D4

b15 b00
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Before
WOR
execution
D2 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1

After
execution D4 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-245
3. Instruction Set

API Mnemonic Operands Function

28 DXOR P S 1 , S2 , D Exclusive XOR 32-bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DXOR, DXORP: 13
S1 * * * * * * * * * *
S2 * * * * * * * * * * steps
D * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: First data source S2: Second data source D: Operation result

Description:
171. Logical Double word XOR operation.
172. A logical XOR operation is performed on the bit patterns of the contents of the two source
addresses (S2 and S1). The result of the logical DXOR is stored in the destination device (D)
173. If operands S1, S2, D use index F, only a 16-bit instruction is available.
174. For 16-bit operation please refer to the WXOR instruction.

Program Example:
When X1 = ON, the 32-bit data source = (D11, D10) and (D21, D20) are analyzed and the
operation result of the logical DXOR = is stored in (D41, D40).
X1
DXOR D10 D20 D40

b31
b b15 b0
1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1
Before
D11 D10 DXOR
execution
0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
D21 D20
After
execution 1 1 1 0 1 1 0 1 0 0 1 1 1 0 1 1 1 1 1 0 1 1 0 1 0 0 1 1 1 0 1 1
D41 D40

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-246
3. Instruction Set

API Mnemonic Operands Function

29 D NEG P D Negative (2’s Compliment)

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F NEG, NEGP: 3 steps
D * * * * * * * * DNEG, DNEGP: 5 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Store the result of the 2’s Compliment operation

Description:
1. The bit pattern of the selected device is inverted. This means any occurrence of a ‘1’ becomes
a ‘0’ and any occurrence of a ‘0’ will be as a ‘1’. When this is complete, a binary 1 is added to
the bit pattern. The result is the logical sign change of the value, e.g. a positive number will
become a negative number or a negative number will become a positive.
2. This instruction works best using pulse instruction (NEGP, DNEGP).
3. If operand D uses index F, then only 16-bit instruction is available.

Program Example 1:
When X0 goes from OFF  ON, all bits in D10 will be inverted (01, 10) and then 1 will be
added and saved in the original register, D10.
X0
NEGP D10

Program Example 2:
Obtaining the absolute value of a negative value:
175. When the 15th bit of D0 is “1”, M0 = ON. (D0 is a negative value).
176. When M0 = ON, the absolute value of D0 can be obtained using the NEG instruction.

M1000
BON D0 M0 K15
M0
NEGP D0

Program Example 3:
Obtain the absolute value of the remainder of the subtraction. When X0 = ON,
a) If D0 > D2, M0 = ON.
b) If D0 = D2, M1 = ON.
c) If D0 < D2, M2 = ON.
d) D4 will always be a positive value.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-247
3. Instruction Set

X0
CMP D0 D2 M0
M0
SUB D0 D2 D4
M1

M2
SUB D2 D0 D4

Indication of the negative value and absolute value

177. The content of the most significant bit of the register indicates whether the value is positive or
negative. It is a positive value when the most significant bit (MSB) = “0” and it is a negative
value when the MSB = “1”.
178. If it is a negative value, the absolute value can be obtained by using the NEG instruction.
(D0=2)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0

(D0=1)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1

(D0=0)
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

(D0=-1) (D0)+1=1
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1

(D0=-2) (D0)+1=2
1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0

(D0=-3) (D0)+1=3
1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1

(D0=-4) (D0)+1=4
1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0

(D0=-5) (D0)+1=5
1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1

(D0=-32,765) (D0)+1=32,765
1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1

(D0=-32,766) (D0)+1=32,766
1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0

(D0=-32,767) (D0)+1=32,767
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

(D0=-32,768) (D0)+1=-32,768
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Max. absolute value is 32,767

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-248
3. Instruction Set

API Mnemonic Operands Function

30 D ROR P D, n Rotate Right

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F ROR, RORP: 5 steps
D * * * * * * * * DROR, DRORP: 9 steps
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Address to be rotated n: Number of bits to be rotated in 1 rotation

Description:
179. All the bits of D are rotated n bit places to the right on every operation of the instruction,
which could be every scan.
180. The state of the last bit rotated is copied to the carry flag M1022 (Carry flag)
181. This instruction works best using pulse instruction (RORP, DRORP).
182. If operand D uses index F, then only 16-bit instruction is available.
183. If operand D is specified as KnY, KnM, KnS, only K4 (16-bit) and K8 (32-bit) is valid.
184. Valid range of operand n: 1≤ n ≤16 (16-bit), 1≤ n ≤32 (32-bit)

Program Example:
When X0 goes from OFF  ON, the 16 bit data of D10 will rotate 4 bits to the right, as shown in
the diagram, bit b3 (prior to rotation) will be moved to the carry flag (CY) M1022.
X0
RORP D10 K4

Rotate to the right

Upper bit Lower bit
D10 0 1 1 1 1 0 1 1 0 1 0 0 0 1 0 1 M1022 Carry
flag
16 bits
After one rotation
to the right
Upper bit lower bit
M1022
D10 0 1 0 1 0 1 1 1 1 0 1 1 0 1 0 0 0 Carry
* flag

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-249
3. Instruction Set

API Mnemonic Operands Function

31 D ROL P D, n Rotate Left

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F ROL, ROLP: 5 steps
D * * * * * * * * DROL, DROLP: 9 steps
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Address to be rotated n: Number of bits to be rotated in 1 rotation

Description:
185. All the bits of D are rotated n bit places to the left on every operation of the instruction, which
could be every scan.
186. The status of the last bit rotated is copied to the carry flag M1022.
187. This instruction works best using pulse instruction (ROLP, DROLP).
188. If operand D uses index F, then only 16-bit instruction is available.
189. If operand D is specified as KnY, KnM, KnS, only K4 (16-bit) and K8 (32-bit) are valid.
190. Valid range of operand n: 1≤ n ≤16 (16-bit), 1≤ n ≤32 (32-bit)

Program Example:
When X0 goes from OFF  ON, all 16 bits of D10 will rotate 4 bits to the left, as shown in the
diagram, and b12 (prior to rotation) will be moved to the carry flag (CY) M1022.
X0
ROLP D10 K4

Rotate to the left

Upper bit Lower bit
M1022 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D10
Carry
flag 16 bits
After one rotation
to the left
Upper bit Lower bit
M1022 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 D10
Carry
flag

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-250
3. Instruction Set

API Mnemonic Operands Function

32 D RCR P D, n Rotate Right with Carry

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F RCR, RCRP: 5 steps
D * * * * * * * * DRCR, DRCRP: 9 steps
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Address to be rotated n: Number of bits to be rotated in 1 rotation

Description:
191. All the bits of D are rotated n bit places to the right including the carry flag on every operation
of the instruction, which could be every scan.
192. The status of the last bit rotated is moved into the carry flag M1022. On the following
operation of the instruction M1022 is the first bit to be moved back into the destination
device.
193. This instruction works best with the pulse instruction (RCRP, DRCRP).
194. If operand D uses index F, then only 16-bit instruction is available.
195. If operand D is specified as KnY, KnM, KnS, only K4 (16-bit) and K8 (32-bit) are valid.
196. Valid range of operand n: 1≤ n ≤16 (16-bit), 1≤ n ≤32 (32-bit)

Program Example:
When X0 goes from OFF ON, the 16 bit value in D10, including the carry flag (M1022) will rotate
4 bits to the right, as shown in the diagram. b3 (prior to rotation) will be moved to the carry flag
M1022, and the original contents of the carry flag M1022 will be moved to bit b12.
X0
RCRP D10 K4

Rotate to the right

Upper bit Lower bit
D10 0 0 0 0 1 1 1 1 0 0 0 0 0 1 1 0 1 M1022
Carry
flag
16 bits
After one rotation
Upper bit to the right Lower bit
D10 1 1 0 1 0 0 0 0 1 1 1 1 0 0 0 0 0 M1022
Carry
flag

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-251
3. Instruction Set

API Mnemonic Operands Function

33 D RCL P D, n Rotate Left with Carry

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F RCL, RCLP: 5 steps
D * * * * * * * * DRCL, DRCLP: 9 steps
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Address to be rotated n: Number of bits to be rotated in 1 rotation

Description:
197. All the bits of D are rotated n bit places to the left including the carry flag on every operation
of the instruction, which could be every scan.
198. The status of the last bit rotated is moved into the carry flag M1022. On the following
operation of the instruction M1022 is the first bit to be moved back into the destination
device.
199. This instruction works best with the pulse instruction (RCLP, DRCLP).
200. If operand D uses index F, then only 16-bit instruction is available.
201. If operand D is specified as KnY, KnM, KnS, only K4 (16-bit) and K8 (32-bit) is valid.
202. Valid range of operand n: 1≤ n ≤16 (16-bit), 1≤ n ≤32 (32-bit)

Program Example:
When X0 goes from OFF ON, the 16 bit value in D10, including the carry flag (M1022) will rotate
4 bits to the left, as shown in the diagram. b12 (prior to rotation) will be moved to the carry flag
M1022, and the original contents of the carry flag M1022 will be moved to bit b3.
X0
RCLP D10 K4

Rotate to the left

Upper bit Lower bit
M1022 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 D10
Carry
flag
16 bits
After one rotation
to the left
Upper bit Lower bit
M1022 1 1 1 1 0 0 0 0 0 0 0 0 0 1 1 1 D10
Carry
flag

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-252
3. Instruction Set

API Mnemonic Operands Function

34 SFTR P S, D, n1, n2 Bit Shift Right

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F SFTR, SFTRP: 9 steps
S * * * *
D * * *
n1 * *
n2 * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting address of the source device D: Starting address of the destination device
n1: Length of data to be shifted n2: Number of bits to be shifted as a group

Description:
203. Shift n1 bits of S to the right by n2 bits. Shift n2 bits of D to the most significant bits of S.
204. This instruction works best with the pulse instruction (SFTRP).
205. Valid range of operand n1, n2 : 1≤ n2 ≤ n1 ≤1024, ELCB-PB models: 1≦ n2 ≦ n1 ≦512

Program Example:
206. When X0 OFF ON, the 16 bits M0~M15 will shift 4 bits to the right, and 4 bits from X0-X3
into M12-M15..
207. Please refer to the following ~ steps to perform SFTR instruction during a single scan.
 M3~M0  Carry
 M7~M4  M3~M0
 M11~M8  M7~M4
 M15~M12  M11~M8
 X3~X0  M15~M12 complete
X0
SFTR X0 M0 K16 K4

4 bits in a group shift to the right

X3 X2 X1 X0
5
M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0 Carry

4 3 2 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-253
3. Instruction Set

API Mnemonic Operands Function

35 SFTL P S, D, n1, n2 Bit Shift Left

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F SFTL, SFTLP: 9 steps
S * * * *
D * * *
n1 * *
n2 * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting source address D: Starting destination address n1: Number of bits to be shifted
n2: Number of bit positions to shift the data bits as a group

Description:
208. Shift n1 bits of S to the left by n2 bit positions. Shift n2 bits of D to the least significant bits of
S.
209. This instruction works best with the pulse instruction (SFTLP).
210. Valid range of operand n1, n2 : 1≤ n2 ≤ n1 ≤1024, In ELCB-PB models: 1≦ n2 ≦ n1 ≦
512

Program Example:
211. When X0 OFF ON, the 16 bit data of M0~M15 will shift 4 bits to the left. And 4 bits from X0
into the low order bits of M0.
212. Please refer to the following ~ steps to perform SFTR instruction during a single scan.
 M15~M12  Carry
 M11~M8  M15~M12
 M7~M4  M11~M8
 M3~M0  M7~M4
 X3~X0  M3~M0 complete
X0
SFTR X0 M0 K16 K4

4 bits in a group shift to the left

X3 X2 X1 X0
5
Carry M15 M14 M13 M12 M11 M10 M9 M8 M7 M6 M5 M4 M3 M2 M1 M0

1 2 3 4

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-254
3. Instruction Set

API Mnemonic Operands Function

36 WSFR P S, D, n1, n2 Word Shift Right

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F WSFR, WSFRP: 9 steps
S * * * * * * *
D * * * * * *
n1 * *
n2 * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting source address D: Starting destination address n1: Length of data to be shifted
n2: Number of registers to be shifted as a group

Description:
213. Shift n1 registers of S to the right by n2 registers. Shift n2 registers of D to the most significant
registers of S.
214. This instruction works best with the pulse instruction (WSFRP).
215. When using operand S and D for bit data types, the data types must be equal. For example,
if one of these bit or word types is used for S, it must also be used for D: KnX, KnY, KnM,
KnS and the other kind is T, C, D.
216. When using operand S and D bit data types, the Kn value must be equal.
217. Valid range of operand n1, n2 : 1≤ n2 ≤ n1 ≤512

Program Example 1:
218. When X0 OFF ON, the registers starting at D20~D35 will shift 4 registers to the right. And
4 registers from D10 will shift into the upper registers of the destination.
219. Refer to the following ~ steps to perform WSFR instruction during a single scan.
 D23~D20  Carry
 D27~D24  D23~D20
 D31~D28  D27~D24
 D35~D32  D31~D28
 D13 ~D10  D35~D32 complete
X0
WSFRP D10 D20 K16 K4

D13 D12 D11 D10 4 registers in one group shift to the right
5
D35 D34 D33 D32 D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20 Carry

4 3 2 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-255
3. Instruction Set

Program Example 2:
220. When X0 OFF ON, the bit registers of Y20~Y37 are shifted 2 digits to the right.
221. Please refer to the following ~ steps to perform WSFR instruction of one time shift.
 Y27~Y20  carry
 Y37~Y30  Y27~Y20
 X27~X20  Y37~Y30 complete

When using Kn device, the specified value must be equal

X0
WSFRP K1X20 K1Y20 K4 K2

X27 X26 X25 X24 X23 X22 X21 X20 2 digits shift to the right
3
Y37 Y36 Y35 Y34 Y33 Y32 Y31 Y30 Y27 Y26 Y25 Y24 Y23 Y22 Y21 Y20 Carry

2 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-256
3. Instruction Set

API Mnemonic Operands Function

37 WSFL P S, D, n1, n2 Word Shift Left

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F WSFL, WSFLP: 9 steps
S * * * * * * *
D * * * * * *
n1 * *
n2 * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting source address D: Starting destination address n1: Length of data to be shifted
n2: Number of registers to be shifted as a group

Description:
222. Shift n1 registers of D to the left by n2 registers. Shift n2 registers of S to the least significant
registers of D. The high n2 registers of D are moved to the Carry.
223. This instruction works best with the pulse instruction (WSFLP).
224. When using operand S and D for bit data types, the data types must be equal. For example,
if one of these bit or word types is used for S, it must also be used for D: KnX, KnY, KnM,
KnS and the other kind is T, C, D.
225. When using operand S and D bit data types, the Kn value must be equal.
226. Valid range of operand n1, n2 : 1≤ n2 ≤ n1 ≤512

Program Example:
227. When X0 OFF ON, the registers starting at D20~D35 will shift 4 registers to the left. And 4
registers from D10 will shift into the lower registers of the destination.
228. Please refer to the following ~ steps to perform WSFL instruction during a single scan.
 D35~D32  Carry
 D31~D28  D35~D32
 D27~D24  D31~D28
 D23~D20  D27~D24
 D13~D10  D23~D20 complete
X0
WSFLP D10 D20 K16 K4

4 registers in one group shift to the left D13 D12 D11 D10
5
Carry D35 D34 D33 D32 D31 D30 D29 D28 D27 D26 D25 D24 D23 D22 D21 D20

1 2 3 4

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-257
3. Instruction Set

API Mnemonic Operands Function

38 SFWR P S, D, n Shift Register Write

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F SFWR, SFWRP: 7 steps
S * * * * * * * * * * *
D * * * * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source address D: Starting address of data stack n: Length of data stack

Description:
229. This instruction defines the data stack of n words starting with D. This first address of the
data stack is the pointer into the remainder of the data stack. When D=1, the value of S is
moved into position 1 of the data stack (when the instruction is executed the first time). D is
incremented with each execution of the instruction and should be reset when it reaches the
last element of the data stack. When the contents of the pointer (D) exceeds n-1, the
instruction stops and carry flag M1022= ON.
230. This instruction works best with the pulse instruction (SFWRP).
231. Valid range of operand n: 2≤ n ≤512

Program Example:
232. First, X20=ON resets the contents of D0 to 0. When X0 goes from OFF to ON, the contents
of D0 becomes 1 and the contents of D20 is moved into D1. After changing the content of
D20, X0 goes from OFF to ON again, then the contents of D0 becomes 2 and the contents of
D20 is moved into D2.
233. Please refer to the following ~steps to perform SFWR instruction.
 The content of D20 is created and built in D1.
 The content of D0 becomes 1.
X20
RST D0 Reset the content of D0 to 0 (zero) previously

X0
SFWRP D20 D0 K10

n = 10 points
D20 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Pointer

D0 = 3 2 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-258
3. Instruction Set

Point to note:
The API 38 SFWR instruction can be used with the API 39 SFRD instruction create a first-in,
first-out (FIFO) application.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-259
3. Instruction Set

API Mnemonic Operands Function

39 SFRD P S, D, n Shift Register Read

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F SFRD, SFRDP: 7 steps
S * * * * * *
D * * * * * * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting address of data stack D: Destination address n: Length of data stack

Description:
234. This instruction defines the data stack of n words starting from S as a FIFO data stack and
specifies the first device as the pointer (S). The contents of the pointer indicates the current
position in the stack. When SFRDP is executed, the first data register (S+1) will be moved to
D and all data in the stack moves up one register. The contents of the pointer is decremented
by 1. When the content in pointer = 0, the instruction stops and carry flag M1022= ON
235. This instruction works best with the pulse instruction (SFRDP).
236. Valid range of operand n: 2≤ n ≤512

Program Example:
237. When X0 goes from OFF to ON, D9~D2 are all shifted one register to the right and the
pointer content of D0 is decremented by 1 and the content of D1 is moved to D21.
238. Please refer to the following ~ steps to perform SFRD instruction.
 The content of D1 is moved to D21.
 D9~D2 are all shifted one register to the right.
 The content of D0 is decremented by 1.

X0
SFRDP D0 D21 K10

n = 10 points
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 D21
Pointer

Data read

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-260
3. Instruction Set

API Mnemonic Operands Function

40 ZRST P D1, D2 Zone Reset

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F ZRST, ZRSTP: 5 steps
D1 * * * * * *
D2 * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D1: Starting destination address D2: Ending destination address

Description:
239. When the instruction is executed, range D1 to D2 will be reset.
240. When D1 > D2, then only device D2 is reset.
241. Operand D1 and D2 must be the same data type, Valid range: D1 ≦ D2.
242. ELCB-PB models, standard and High speed counters cannot be mixed.
243. This instruction works best with the pulse instruction (ZRSTP).

Program Example:
244. When X0 = ON, M300 to M399 will be reset to OFF.
245. When X1 = ON, C0 to C127 will all be reset. Their present value =0, coil output will be reset
to OFF.
246. When X20 = ON, T0 to T127 will all be reset. Their present value =0, coil output will be reset
to OFF.
247. When X2 = ON, the status of S0 to S127 will be reset to OFF.
248. When X3 = ON, the data of D0 to D100 will be reset to 0.
249. When X4 = ON, C235 to C254 will all be reset. Their present value =0, coil output will be
reset to OFF.
X0
ZRST M300 M399
X1
ZRST C0 C127
X20
ZRST T0 T127
X2
ZRST S0 S127
X3
ZRST D0 D100
X4
ZRST C235 C254

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-261
3. Instruction Set

Points to note:
1. Bit addresses Y, M, S and word addresses T, C, D, can be reset individually with the RST
instruction.
2. For clearing multiple devices, API 16 FMOV instruction can be used to send K0 to word
addresses T, C, D or bit addresses KnY, KnM, KnS.
X0
RST M0

RST T0

RST Y0

FMOV K0 D10 K5

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-262
3. Instruction Set

API Mnemonic Operands Function

41 DECO P S, D, n Decode

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F DECO, DECOP: 7 steps
S * * * * * * * * * * *
D * * * * * * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source to decode D: Destination n: Number of bits to decode

Description:
1. Decodes the lower “n” bits of source S and stores the result of “2n” bit in D.
2. This instruction works best with the pulse instruction (DECOP).
3. When operand D is a bit device, n=1~8, when operand D is a word device, n=1~4

Program Example 1:
1. n valid range: 0< n ≦8. But if n=0 or n>8, an error will occur.
2. If n = 8, the decoded data is 28= 256 bits of data.
3. When X20 goes from OFF  ON, the data of X0~X2 will be decoded to M100~M107.
4. If the source data is 3, M103 (third bit from M100) = ON.
5. After the execution is completed, X20 is changed to OFF. The result in M103 remains.
X20
DECOP X0 M100 K3

X2 X1 X0
0 1 1

4 2 1

3
7 6 5 4 3 2 1 0
0 0 0 0 1 0 0 0
M107 M106 M105 M104 M103 M102 M101 M100

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-263
3. Instruction Set

Program Example 2:
250. D valid range: 0< n ≦4, if n=0 or n>4, an error will occur.
251. When n=4, the maximum decoded data is 24 = 16 points.
252. When X20 goes from OFF  ON, the data in D10 (b2 to b0) will be decoded and stored in
D20 (b7 to b0). The unused bits in D20 (b15 to b8) will be all set to 0.
253. This example decodes the three lower bits in D10 and sets the appropriate bit in D20. The bit
number in D20 is determined by the value of the 3 low bits in D10. The content of the eight
upper bits of D20 are all set to 0.
254. After the execution is completed, X20 is changed to OFF. The result in D20 remains.
X20
DECOP D10 D20 K3

D10
b15 b0
0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 When 3 is specified
at b2 to b0 of D10
4 2 1
All be 0 (zero)
7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 Result after decoding
b15 D20 b0

When 3 is specified as effective

b3 at the third position from bits, 8 points are occupied.
b0 turns ON and is set to 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-264
3. Instruction Set

API Mnemonic Operands Function

42 ENCO P S, D, n Encode

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F DECO, DECOP: 7 steps
S * * * * * * * * *
D * * * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source to encode D: Destination for storing encoded data n: Number of bits to encode

Description:
255. Encodes the lower “2n” bits of source S and stores the result in D.
256. If the source device S has multiple bits set to a 1, processing is performed on the highest bit
position. The bit number set in S is encoded to the low bits of D.
257. This instruction works best with the pulse instruction (ENCOP).
258. When operand S is a bit device, n=1~8, when operand S is a word device, n=1~4
259. If no bits in S is active (1), M1067, M1068 = ON and D1067 records the error code H0E1A.

Program Example 1:
260. S valid range: 0< n ≦8. If n=0 or n>8, an error will occur.
8
261. When n=8, the maximum decoded data is 2 = 256 points.
262. When X0 goes from OFF  ON, the data in (M0 to M7) will be encoded and stored in the low
3 bits of D0 (b2 to b0). The unused bits in D0 (b15 to b3) will be all set to 0.
263. After the execution is completed, X0 is changed to OFF and the data in D remain unchanged.
X0
ENCOP M0 D0 K3

When 3 is specified as effective bits, 8 points are occupied.

M07 M06 M05 M04 M03 M02 M01 M00

0 0 0 0 1 0 0 0
7 6 5 4 3 2 1 0

All be 0 (zero)
4 2 1
0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 Result after encoding
b15 b0
D0

Which point, counting from M0, is ON and stored in BIN.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-265
3. Instruction Set

Program Example 2:
264. S Valid rang: 0< n ≦4. If n=0 or n>4, an error will occur.
265. When n=4, the maximum decoded data is 24 = 16 points.
266. When X0 goes from OFF  ON, the data in D10 will be encoded and stored in the three low
bits of D20 (b2 to b0). The unused bits in D20 (b15 to b3) will be all set to 0.
267. After the execution is completed, X0 is changed to OFF and the data in D remains
unchanged.
X0
ENCOP D10 D20 K3

Data inactivated
b0
0 1 0 1 0 1 0 1 0 0 0 0 1 0 0 0
b15 D10 6 5 4 3 2 1 0
7
All be 0 (zero)

0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 Result after encoding

b15 b0
D20

When 3 is specified as effective bits, 8 points are occupied.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-266
3. Instruction Set

API Mnemonic Operands Function

43 D SUM P S, D Sum of ON bits

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F SUM, DSUMP: 5 steps
S * * * * * * * * * * * DSUM, DSUMP: 9 steps
D * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source address D: Destination address stores number of ON bits

Description:
268. If the contents of the16 bit source are all “0”, the “Zero” flag, M1020=ON.
269. D will occupy two registers when using as a 32-bit instruction.
270. If operands S, D use index register F, it is only available as a 16-bit instruction.
271. If no bits are ON then the zero flag, M1020 is set.

Program Example:
When X20 =ON, all the bits that = “1” in D0 will be counted and the number stored in D2.
X20
SUM D0 D2

0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 3
D0 D2

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-267
3. Instruction Set

API Mnemonic Operands Function

44 D BON P S, D, n Bit ON Test

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F BON, BONP: 7 steps
S * * * * * * * * * * * DBON, DBONP: 13
D * * *
steps
n * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source address D: Destination address for storing the result n: Bit number to test

Description:
272. The instruction checks the status of a designated bit (specified by n) in S and stores the
result in D
273. If operands S, n use index F, then only 16-bit instruction is available.
274. Valid range of operand n : n=0~15 (16-bit), n=0~31 (32-bit)

Program Example:
275. When X0 = ON, and if the 15th bit of D0 = “1”, M0 is ON. But if the 15th bit of D0 is “0”, M0 is
OFF.
276. Once X0 is switched to OFF, M0 will stay at its previous state.

X0
BON D0 M0 K15

b15 b0
0 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 M0=Off
D0
b15 b0
1 0 0 1 0 0 1 0 0 0 0 0 0 1 0 0 M0=On
D0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-268
3. Instruction Set

API Mnemonic Operands Function

45 D MEAN P S, D, n Mean Value

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F MEAN, MEANP: 7 steps
S * * * * * * * DMEAN, DMEANP: 13
D * * * * * * * *
steps
n * * * * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting source address D: Destination address for the result n: Length of the S file

Description:
277. The instruction obtains the mean value from n consecutive registers from S and stores the
value in D.
278. Remainders in the operation will be ignored.
279. If n is out of the valid range (1~64), an error will be generated.
280. If operands D, n use index F, then only 16-bit instruction is available.
281. Valid range of operand n : n=1~64

Program Example:
When X20 = ON, add up the contents of the three registers starting from D0, and divide the sum
by three to get the mean value. Store this mean value in D10 and ignore the remainder.
X20
MEAN D0 D10 K3

(D0+D1+D2)/K3 D10

D0 K100

D1 K113 K112 D10

Reminder = 3, be ignored
D2 K125

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-269
3. Instruction Set

API Mnemonic Operands Function

46 ANS S, m, D Alarm Set

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F ANS: 7 steps
S *
m *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Alarm timer m: Time setting prior to alarm D: Alarm

Description:
282. ANS instruction is used to drive the output alarm device.
283. ELC-PA: Operand S valid range: T0~T191
ELC-PV, ELC2-PV: Operand S valid range: T0~T199
ELCM-PH/PA, ELC2-PB/PH/PA/PE: Operand S valid range: T0~T183
Operand m valid range: K1~K32,767 in units of 100 ms
ELC-PA: Operand D valid range: S896~S1023
ELC-PV, ELC2-PV: Operand D valid range: S900~S1023
ELCM-PH/PA, ELC2-PB/PH/PA/PE: Operand D valid range: S912~S1023
284. See ANR for more information
285. Flag: M1048 (ON = Alarm Active), M1049 (ON = Enable Alarms)

Program Example:
If alarm device S999=ON and X3 = ON for more than 5 seconds, S999 will stay ON after X3=OFF.
T10 will be reset to OFF, present value=0)
X3
ANS T10 K50 S999

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-270
3. Instruction Set

API Mnemonic Function

47 ANR P Alarm Reset

OP Range Program Steps

N/A Instruction driven by contact is necessary. ANR, ANRP: 1 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Description:
286. ANR instruction is used to reset an alarm.
287. When several alarm devices are ON, the lowest alarm number will be reset.
288. This instruction works best with the pulse instruction (ANRP).

Program Example:
289. When X20 and X21 are simultaneously ON more than 2 seconds, the alarm S910 = ON. If
X20 or X21 change to OFF, alarm S910 will remain ON. T10 will reset to OFF, present value
is 0.
290. When X20 and X21 are simultaneously ON less than 2 seconds, the present value of T10 is
reset to 0.
291. When X3 goes from OFF  ON, activated alarms S896~S1023 (ELC-PA) or S900~S1023
(ELC-PV, ELC2-PV) or S912~S1023 (ELCM-PH/PA, ELC2-PB/PH/PA/PE) will be reset.
292. When X3 goes from OFF  ON again, the second lowest alarm number will be reset.
X20 X21
ANS T10 K20 S910

X3
ANRP

Points to note:

Flags:
293. M1048: When M1049 = ON, any alarm S896~S1023 (ELC-PA) =ON or S900~S1023
(ELC-PV, ELC2-PV) =ON or S912~S1023 (ELCM-PH/PA, ELC2-PB/PH/PA/PE) =ON will
turn M1048 ON. If M1049=OFF, M1048 will not be affected if alarms occur.
294. M1049: When M1049 = ON, D1049 will automatically hold the lowest alarm number during
the execution of this instruction.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-271
3. Instruction Set

Application example for Alarms:

X0=forward switch X1=backward switch
X2=front location switch X3=back location switch
X4=alarm device reset button
Y0=forward Y1=forward
Y2=alarm indicator
S910=forward alarm device S920=backward alarm

M1000
M1049
Y0 X2
ANS T0 K100 S910
Y1 X3
ANS T1 K200 S920
X0 X2
Y0
Y0

X1 X3
Y1
Y1

M1048
Y2
X4
ANRP

295. When M1049=ON, Alarms are enabled. If M1048=ON, an alarm has occurred,
D1049=lowest alarm number.
296. If Y0=ON > 10 seconds and has not reached the front location X2, S910=ON.
297. If Y1=ON > 20 seconds and not reached the back location X3, S920=ON.
298. When X1=ON, and Y1=ON, and X3=ON, Y1 = OFF.
299. If an alarm occurs, alarm indicator Y2=ON.
300. Each alarm that is activated will be reset one by one, each time the reset button X4 = ON
during the execution of this instruction. The lowest numbered alarm is reset every execution
of this instruction.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-272
3. Instruction Set

API Mnemonic Operands Function

48 D SQR P S, D Square Root
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F SQR, SQRP: 5 steps
S * * *
D * DSQR, DSQRP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source D: Destination to store result

Description:
301. Perform a square root on source S and store the result in D.
302. S can only be a positive value. Performing a square root operation on a negative value will
result in an error and the instruction will not be executed. The error flag M1067 and M1068 =
ON and D1067 records error code H0E1B.
303. SQR result D is calculated as an integer only, fractional values are ignored. If the result of the
SQR is not a whole number, the Borrow flag M1021=ON.
304. When SQR result D = 0, the Zero flag M1020=ON.
305. Performing any square root operation (even on a calculator) on a negative number will result
in an error. This will result in M1067, the Program Execution Error bit being set.

Program Example:
When X20=ON, SQR of D0 will be stored in D12.
X20
SQR D0 D12

D0 D12

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-273
3. Instruction Set

API Mnemonic Operands Function

49 D FLT P S, D Floating Point
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F FLT, FLTP: 5 steps
S * * *
D * * * DFLT, DFLTP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source D: Destination

Description:
1. When M1081 = OFF, the source is converted from integer to floating point. S source = 16-bit
and D = 32 bits.
a) If the absolute value of the conversion result is larger than the maximum floating point value,
the carry flag M1022=ON.
b) If the absolute value of the conversion result is less than the minimum floating point value,
the borrow flag M1021=ON.
c) If conversion result is 0, zero flag M1020=ON.
2. When M1081 is ON, the source is converted from floating point to integer (ignore decimal
points). S source = 32-bit and D Destination occupies 16-bit. If conversion result exceeds the
integer range of D (16-bit, -32,768~32,767 and 32-bit, -2,147,483,648~2,147,483,647), D will
hold either max or min value, and the carry flag will be set M1022=ON.
a) If the decimal point was ignored, the borrow flag M1021=ON.
b) If the conversion result = 0, zero flag M1020=ON.
3. ELCB-PB/ELC-PA/ELC-PVV1.2 don’t support T,C registers.

Program Example 1:
306. When M1081 = OFF, the source data is converted from integer to floating point.
307. When X20 = ON, D0 (16-bit integer) is converted to D13, D12 (floating point).
308. When X21 = ON, D1, D0 (32-bit integer) is converted to D21, D20 (floating point).
309. If D0=K10 and X20=ON, the 32-bit floating point result will be H41200000 and it will be saved
in the 32-bit register D13,D12
If the 32-bit register D1, D0=K100,000 and X21 = ON, The 32-bit of floating point result will be
H47C35000 and it will be saved in the 32-bit register D21,D20.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-274
3. Instruction Set

M1002
RST M1081
X20
FLT D0 D12

X21
DFLT D0 D20

Program Example 2:
310. When M1081 = ON, the source data is converted from floating point to integer. (ignore the
decimal point)
311. When X20 = ON, D1, D0 (floating point value) is converted to D12 (16-bit integer). If D1 (D0)
=H47C35000, the floating point result is 100,000. The result will be D12=K32,767,
M1022=ON, since the value exceeds the max value of the 16-bit register D12.
312. When X21 = ON, D1, D0 (floating point value) is converted to D21, D20 (32-bit integer). If D1,
D0=H47C35000, the floating point result is 100,000. The result will be saved in 32-bit register
D21, D20.
M1002
SET M1081
X20
FLT D0 D12

X21
DFLT D0 D20

Program Example 3:

(D10) (X7~X0) K61.5 (D21,D20)

Binary floating point
16 bit BIN 2 bit BCD 6

7
1 2 5 4 (D31,D30)
Decimal floating point (for monitor)
(D101,D100) (D200) BIN (D301,D300) 8
(D41,D40)
Binary floating point Binary floating point
3 32 bit integer

(D203,D202)
Binary floating point
(D401,D400)
Binary floating point

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-275
3. Instruction Set

M1000
FLT D10 D100
1
BIN K2X0 D200
2
FLT D200 D202
3
DEDIV K615 K10 D300
4
DEDIV D100 D202 D400
5
DEMUL D400 D300 D20
6
DEBCD D20 D30
7
DINT D20 D40
8

313. Covert D10 (16-bit integer) to D101, D100 (floating point).

314. Covert the value of X7~X0 (BCD value) to D200 (16-bit integer value).
315. Covert D200 (16-bit integer) to D203, D202 (floating point).
316. Save the result of K615  K10 to D301, D300 (floating point).
317. Divide the floating point:
Save the result of (D101, D100)  (D203, D202) to D401, D400 (floating point).
318. Multiply floating point:
Save the result of (D401, D400) × (D301, D300) to D21, D20 (floating point).
319. Covert floating point (D21, D20) to decimal floating point (D31, D30).
320. Covert floating point (D21, D20) to 32-bit integer (D41, D40).

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-276
3. Instruction Set

API Mnemonic Operands Function

50 REF P D, n Refresh I/O Immediately
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F REF, REFP: 5 steps
D * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Starting source of I/O n: Number of I/O to refresh

Description:
1. The Input image is updated at the end of each program scan. The output image is also sent
to the outputs at the end of each program scan. If particular I/O points need to be updated
during the program scan, the REF instruction can be used for this purpose.
2. D must always be a multiples of 10 (Y0, X10, Y20). n must always be a multiples of 8.
3. Range of n: 8 ~ 256 in multiples of 8. An error will be generated if n is out of range.
4. For ELC-PA, the input and output points processed by this instruction are the I/O points:
X0~X7, Y0~Y7 and n=K8.
5. For ELCM-PH/PA, ELC2-PA/PB/PH/PE, Only the I/O points on the controller can be
specified for operand D for I/O refresh.
 When D specifies X0 and n ≦ 8, only X0~X7 will be refreshed. If n > 8, all I/O points on
MPU will be refreshed.
 When D specifies Y0 and n = 4, only Y0~X3 will be refreshed. If n > 4, all I/O points on
the controller will be refreshed.
 When D specifies X10 or Y10 I/O points on the controller starting from X10 or Y4 will all
be refreshed regardless of n value.
6. For ELCM-PH/PA, Range for n: 4 ~ total I/O points on the controller. n should always be a
multiple of 4.
7. For ELCM-PA and ELC2-PA MPU only: If M1180 = ON and REF instruction executes, the
ELC will read the A/D value and update the read value to D1110~D1113. If M1181 = ON and
REF instruction executes, the ELC will output the D/A value to D1116 and D1117
immediately. When A/D or D/A values are refreshed, the ELC will reset M1180 or M1181
automatically.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-277
3. Instruction Set

Program Example 1:
When X0 = ON, ELC will read the state of X0~X7 input points immediately. No input delay occurs.
X0
REF X0 K8

Program Example 2:
When X0 = ON, the output signal Y0~Y7 (8 points) are sent to the output terminals immediately.
X0
REF Y0 K8

Program Example 3:
For ELCM-PA, ELC2-PA only: When X0 = ON and M1180 = ON, analog input values will be
immediately read and placed into D1110~D1113. This is independent of the settings of operands D
and n
X0
SET M1180

REF X0 K8

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-278
3. Instruction Set

API Mnemonic Operands Function

51 REFF P n Refresh and Filter Adjust
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F REFF, REFFP: 3 steps
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
n: Response time setting, in ms

Description:
321. The ELC provides an input filter to prevent noise or interference from creating a false reading.
Inputs X0~X17 are digitally filtered. REFF can adjust the response time of the input filters.
D1020 (adjusts the filter time of X0~X7) and D1021 (adjusts the filter time of X10~X17).
322. When the ELC turns OFF  ON or the END instruction is reached, the response time is
dictated by the values in D1020 and D1021.
323. During program execution, the values in D1020 and D1021 may be modified using the MOV
instruction.
324. The response time can also be changed by using the REFF instruction in the program. When
executed, the response time specified in the REFF instruction will be moved to both D1020
and D1021 and will take effect the next program scan.
325. Range of n: for ELC-PA, n = K0 ~ K20; for ELC-PV and ELC-PV2, n = K0 ~ K60, for
ELCM-PH/PA and ELC2-PB/PH/PA/PE, n = K2 ~ K20.

Program Example:
326. When power to the ELC turns from OFF ON, the filter
X20
time of X0~X7 inputs is dictated by the value in D1020 REFF K5
and D1021. X0
Y1
327. When X20=ON, REFF K5 instruction is executed, the
X20
response time will change to 5 ms and will take affect the REFF K20
next program scan. X1
Y2
328. When X20=OFF, the filter time will change to 20ms and
will take affect the next program scan.
END

Points to note:
The response time is ignored (no delay set) If any external interrupts, high-speed counters or SPD
instructions are used in the program, the filter times for the I/O associated with these instructions
will be ignored.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-279
3. Instruction Set

API Mnemonic Operands Function

52 MTR S, D1, D2, n Input Matrix
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MTR: 9 steps
S *
D1 *
D2 * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting address of input matrix D1: Starting address of output matrix D2: Corresponding
starting address of matrix scan n: Number of banks for the matrix

Description:
329. S is the starting address that specifies all inputs of the matrix. Once the input is specified, a
selection of 8 continuous input addresses is called the “input matrix”. D1 is the starting
address of the transistor outputs.
330. This instruction allows a selection of 8 continuous inputs to be used multiple (n) times. Each
input has more than one input device wired to it. . Each set of 8 input signals are grouped into
“rows” and there are n number of rows. Each row is selected by turning a different output on.
The quantity of outputs from D1 is equal to the number of rows n. The results are stored in a
matrix-table with a starting address specified by D2.
331. The maximum number of inputs supported by this instruction is 64 (8 inputs x 8 rows).
332. When this instruction is used in an interrupt routine, each row of inputs will be processed
every 25msec. This results in a matrix of 8 rows, i.e. 64 inputs (8 inputs x 8 rows) being read
in 200msec. Hence, this instruction is not available for the input signal with an ON/OFF rate
is more than 200ms.
333. It is recommended to condition a MTR rung with M1000 (normally open contact).
334. When the MTR instruction execution is complete, the instruction execution completed flag
M1029 is turned ON. This flag is automatically reset when the MTR instruction is turned OFF.
335. This instruction can only be used ONCE in the program.
336. Flag: M1029, execution completed flag.

Program Example:
When the ELC is in the run mode, the MTR instruction starts to execute. The external 2 rows, total
16 devices are read in order and the results are stored in the internal addresses M10~M17,
M20~M27.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-280
3. Instruction Set

M1000
MTR X40 Y40 M10 K2

The figure below is an example wiring diagram for the operation of the MTR instruction. The
external 2 rows consist of 2 sets of inputs wired to X40~47 and Y40~41. A total of 16 addresses
are used to store the states of the two rows of inputs: M10~M17, M20~M27. For a general
precaution to aid in successful operation, diodes should be placed after each input devices. These
diodes should have a rating of 0.1A, 50V.

Diode
0.1A/50V
M20 M21 M22 M23 M24 M25 M26 M27

Input devices X41 X42 X43 X44 X45 X46 X47

M10 M11 M12 M13 M14 M15 M16 M17

24G +24V S/S X40 X41 X42 X43 X44 X45 X46 X47

C Y40 Y41 Y42 Y43 Y44 Y45 Y46 Y47

When output Y40 is ON, only those inputs in the first row are read. These results are stored in
addresses M10~M17. The second step involves Y40 going OFF and Y41 coming ON. Then only
inputs in the second row are read. These results are stored in M20~M27.
Read input signal in the first row

Y40 1 3
Read input signal in the second row

Y41 2 4
25ms
Processing time of each row is about 25ms

Points to note:
1. Operand S must be a multiple of 10, i.e. X0, X10, X20… etc. and occupies 8 continuous input
addresses.
2. Operand D1 must be a multiple of 10, i.e. Y0, Y10, Y20… etc. and occupies n continuous
output addresses.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-281
3. Instruction Set

3. Operand D2 should be a multiple of 10, i.e. Y0, M10, S20… etc.

4. Valid range: n=2~8
API Mnemonic Operands Function
53 D HSCS S 1 , S2 , D High Speed Counter Set
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DHSCS: 13 steps
S1 * * * * * * * * * *
S2 *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Compare value S2: High-speed counter number D: Compare result

Description:
337. All high-speed counters use an interrupt process; therefore all compare results D are
updated immediately.
338. DHSCS instruction compares the current value of the selected high-speed counter S2
against a selected compare value S1. When the counters current value equals S1, then D =
ON. Once set to ON if values S1 and S2 are not longer equal, D will still be ON.
339. If for example D is specified as Y0~Y7 and, when S1 and S2 are equal, the compare result
will immediately energize output Y0~Y7... If M and S addresses are used, they are also
immediately updated independent of the program scan. Interrupt pointers can also be used
for D, to execute an interrupt subroutine when S1 and S2 are equal.
340. The D does not support E, F index registers.
341. Operand limitation:
Operand S2 must be high speed counter. For example: C235~C255.
Interrupt pointers I010 to I080 can be used for D, but ELCB-PB models do not support these
interrupts.
342. Flags: M1289 ~ M1294 are used to inhibit interrupts for the high speed counters. See
Program Example 3 for more details.

Program Example 1:
If M0=ON, the DHSCS instruction starts to operate. Y0 is turned ON immediately when C235’s
present value goes from 99100 or from 101100, and will remain on.
M1000
DCNT C235 K1000
M0
DHSCS K100 C235 Y0 On immediately

Program Example 2:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-282
3. Instruction Set

Difference between a Y output for DHSCS instructions and general Y output:

When C249’s value changes from 99100 or 101100, Y0 output of DHSCS immediately
energizes the output Y0 using the interrupt process which is independent of the scan time.
However, there will still be a delay due to the output module: relay output delay: 10ms. Transistor
output delay: 10us.
When the present value of high-speed counter C249 changes from 99 to 100, C249 will be
activated, and Y7 will be ON, but the actual output Y7 will not be energized until after the program
scan is complete. The same output delays for relay and transistor outputs apply as well.
M1000
DCNT C249 K100

DHSCS K100 C249 Y0 ON immediately

C249
SET Y7

Program Example 3:
High-speed counter interrupt:
343. ELC-PA models support the high-speed counter interrupt
344. When using the DHSCS instruction to execute an interrupt routine when S1 and S2 are equal,
the specified high-speed counter can not be use in other DHSCS, DHSCR or DHSZ
instructions. If it is used in any of these instructions, it will result in an error.
345. The interrupt pointers I010 to I060 can be used as the D operand for DHSCS instructions and
this enables the interrupt routine to be executed when the value of the specified high-speed
counter reaches the value in the DHSCS instruction.
346. For ELC-PA model, there are six high-speed counter interrupts: I010, I020, I030, I040, I050,
I060 (6 points) that can be used. I010 is used with C235, C241, C244, C246, C247, C249,
C251, C252, and C254. I020 is used with C236, C243; I030 is used with C237, C242; I040 is
used with C245, C238; I050 is used with C239 and I060 is used with C240, C250 and C255.
347. When the present value of C251 changes from 99100 or 101100, the program will jump
to the interrupt pointer I010 to execute the interrupt routine.
M1000
DCNT C251 K1000

DHSCS K100 C251 I010

FEND
M1000
I010 Y1

IRET

END

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-283
3. Instruction Set

348. ELC-PA, ELCM-PH/PA, ELC2-PA/PB/PH/PE models, M1059 is the high-speed counter

interrupt disable flag
349. ELC-PV, ELC2-PV models, M1289 ~ M1294 are the disable flags for high speed counter
interrupts for I010 ~ I060, i.e. when M1294 = On, I060 interrupt will be disabled per the table
below.

Interruption pointer I Interruption pointer I

Interrupt disable flag Interrupt disable flag
No. No.

I010 M1289 I040 M1292

I020 M1290 I050 M1293

I030 M1291 I060 M1294

Notes for using the DHSCS Instruction with ELCM-PH/PA, ELC2-PA/PB/PH/PE controllers:
1. If D is specified as Y0~Y3, when the instruction is executed and the count value equals S1,
the compare result will immediately energize Y0~Y3. All other outputs will be updated
normally. Also, M and S devices, not affected by the program scan time, will be
immediately updated.
2. Operand D can use the following interrupts: I0□0, □=1~8
3. High speed counters include software high speed counters and hardware high speed
counters. In addtiion, there are also two types of comparators including software
comparators and hardware comparators.
4. Software comparators:
a) There are 6 software comparators available that are associated with high speed counter
interrupts.
b) When programming the DHSCS and DHSCR instructions, the total of Set/Reset
comparisons for both instructions can not be more than 6, otherwise a syntax check error will
occur.
c) Table of software counters and software comparators:
Counter C232 C233 C234 C235 C236 C237
DHSCS Hi-speed interrupt I010 I050 I070 I010 I020 I030
Hi-speed compare Set/Reset C232~C242 share 6 software comparators

Counter C238 C239 C240 C241 C242

DHSCS Hi-speed interrupt I040 I050 I060 I070 I080

Hi-speed compare Set/Reset C232~C242 share 6 software comparators

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-284
3. Instruction Set

d) Block diagram of software counters and comparators:

Softwar e
comparator x 6
Softwar e
Counter 1 Set / reset 1

Set / reset 2
Softwar e
Count value
counter 2

Set / reset 6
Softwar e
counter 8

5. Hardware comparators:
a) There are 2 groups of hardware comparators provided respectively for 2 groups of hardware
counters (A group and B group). Each group shares 4 comparators with individual Compare
Set/Reset functions.
b) When programming the DHSCS and DHSCR instructions, the total of Set/Reset
comparisons for both instructions can not be more than 4, otherwise a syntax check error will
occur.
c) Each high-speed counter interrupt occupies an associated hardware comparator;
consequently the interrupt number can not be repeated. Also, I010~I040 can only be applied
for group A comparators and I050~I080 for group B.
d) If DCNT instruction enables C243 as high speed counter (group A) and DHSC/DHSC
instruction uses C245 as high speed counter (group A) at the same time, the ELC takes
C243 as the source counter automatically and no syntax check error will occur.
e) Table of settings for hardware counters and comparators:
A group B group
Hardware counter
A1 A2 A3 A4 B1 B2 B3 B4
Counter No. C243, C245~C248, C244, C249, C250, C253,
C251,C252 C254
High-speed counter interrupt I010 I020 I030 I040 I050 I060 I070 I080
Hi-speed compare Set/Reset Share 4 hardware Share 4 hardware
comparators for group A comparators for group B

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-285
3. Instruction Set

f) Block diagram of hardware counters and comparators:

Hardware
comparator A x 4 Set /res et A1
I010 A1

Hardware Count
counter A value A
Set /res et A4
I040 A4
Hardware
comparator B x 4 Set /res et B1

I050 B1

Hardware Count
counter B value B
Set /res et B4

I080 B4

6. Differences between software and hardware comparators:

a) 6 comparators are available for software counters while 8 comparators are available for 2
groups of hardware counters ( 4 comparators for each group)
b) Output timing of software comparator  count value equals the compare value in both count
up and down modes.
c) Output timing of hardware comparator  count value equals the compare value+1 in
count-up mode; count value equals the compare value -1 in count-down mode.

Program Example 4:
1. Set/reset M0 by utilizing the software comparator

M1000
DCNT C235 K100

DHSCS K100 C235 M0

DHSCR K100 C235 M0

2. When the accumulated value in C235 increments from 99 to100, the DHSCS instruction sets
M0 ON. (M1235 = OFF, C235 counts up)
3. When the accumulated value in C235 decrements from 101 to100, the DHSCR instruction
resets M0. (M1235 = ON, C235 counts down)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-286
3. Instruction Set

4. Timing diagram for the comparison:

2 1

M0
Counting
No.
101 101
100 100
99 99
98 98
Count up Count down
Time

Program Example 5: for ELCM-PH/PA version 1.00

1. Set/reset M0 by utilizing the hardware comparator

M1000
DCNT C251 K100

DHSCS K100 C251 M0

DHSCR K100 C251 M0

2. When the accumulated value in C251 increments from 100 to101, the DHSCS instruction
sets M0 ON.
3. When the accumulated value in C251 decrements from 100 to 99, DHSCR instruction resets
M0.
4. Timing diagram for the comparison:
1 2

Counting
No.
101 101
100 100
99 99
98 98
Count up Count down
Time

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-287
3. Instruction Set

Program Example 6:
1. Executing an interrupt subroutine with a software comparator.
2. When the accumulative value in C235 increments from 99 to100, the interrupt subroutine
I010 executes immediately to set Y0 ON.

EI
M1000
DCNT C235 K100

DHSCS K100 C235 I010

FEND
M1000
I010 OUT Y10

IRET

END

Points to note:
1. The output contact of a high-speed counter and the compare outputs of the DHSCS
instruction, the DHSCR instruction and the DHSZ instruction will all operate normally when
there are counted inputs. If instructions such as, DADD, DMOV…etc. are used to change the
present value of a high-speed counter to equal the preset or compare value, the output will
not energize because there are no counted inputs.
2. High-speed counters for ELCB-PB series models:
ELCB-PB models: total counting frequency (X0~X3) is 20 KHz.
Type 1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs

Input C235 C236 C237 C238 C241 C242 C244 C246 C247 C249 C251 C252 C254
X0 U/D U/D U/D U U U A A A
X1 U/D R R D D D B B B
X2 U/D U/D R R R R
X3 U/D R S S S
U: Increasing input A: A phase input S: Start input
D: Decreasing input B: B phase input R: Reset input
Input points X0 and X1 can be used as high speed counter inputs for 1-phase 1 input up to
20KHz. Input point X2 and X3 can be used as high speed counter inputs for 1-phase 1 input
up to 10KHz. But total counting frequency of these input points should be less than or equal
to total frequency 20KHz. If the input is 2-phase 2 inputs signal, the frequency will be four
times the counting frequency. Therefore, the counting frequency of 2-phase 2 inputs is 4KHz.
In ELCB-PB models, DHSCS and DHSCR instruction cannot be used more than 4 times.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-288
3. Instruction Set

3. High-speed counter provided in ELC-PA series models:

ELC-PA models: total counting frequency is 30 KHz
Type 1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs

Input C235 C236 C237 C238 C239 C240 C241 C242 C244 C246 C247 C249 C251 C252 C253 C254
X0 U/D U/D U/D U U U A A B A
X1 U/D R R D D D B B A B
X2 U/D U/D R R R R
X3 U/D R S S S
X4 U/D
X5 U/D
U: Increasing input A: A phase input S: Start input
D: Decreasing input B: B phase input R: Reset input
Input points X0 and X1 can be high speed counter inputs for 1-phase 1 input up to 30KHz.
Input points X2 ~ X5 can be high speed counter inputs for 1-phase 1 input up to 10KHz. But
the total counting frequency of these input points should be less than or equal to the total
frequency 30KHz. If the input is 2-phase 2 inputs signal, the frequency will be four times the
counting frequency. Therefore, the counting frequency of 2-phase 2 inputs (C251, C252,
C254) is 4KHz and the counting frequency of 2-phase 2 inputs (C253) is 25KHz.
In ELC-PA series models, DHSCS, DHSCR and DHSZ instruction cannot be used more than
6 times.
4. High-speed counter provided in ELC-PV, ELC2-PV series Models:

ELC-PV, ELC2-PV series supports high speed counters. C235 ~ C240 are program-interrupt
1-phase high speed counters with a total bandwidth of 20KHz. They can be used alone with a
counting frequency of up to 10KHz. C241 ~ C254 are hardware high speed counters (HHSC).
There are four HHSC in ELC-PV series, HHSC0 ~ 3. The pulse input frequency of HHSC0 and
HHSC1 can be a maximum of 200KHz and that of HHSC2 and HHSC3 a maximum of 20KHz (1
phase or A-B phase). The pulse input frequency of HHSC0 ~ 3 can reach 200KHz, among which:

C241, C246 and C251 share HHSC0

C242, C247 and C252 share HHSC1

C243, C248 and C253 share HHSC2

C244, C249 and C254 share HHSC3

a) Every HHSC can only be assigned to one counter with the DCNT instruction.

b) There are three counting modes in every HHSC (see the table below):

i) 1-phase 1 input refers to “pulse/direction” mode.

ii) 1-phase 2 inputs refers to “clockwise/counterclockwise (CW/CCW)” mode.

iii) 2-phase 2 inputs refers to “A-B phase” mode.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-289
3. Instruction Set

Counter Program-interruption
Hardware high speed counter
type high speed counter
Type 1-phase 1 input 1-phase 1 input 1-phase 2 inputs 2-phase 2 inputs
Input C235 C236 C237 C238 C239 C240 C241 C242 C243 C244 C246 C247 C248 C249 C251 C252 C253 C254
X0 U/D U/D U A
X1 U/D D B
X2 U/D R R R
X3 U/D S S S
X4 U/D U/D U A
X5 U/D D B
X6 R R R
X7 S S S
X10 U/D U A
X11 D B
X12 R R R
X13 S S S
X14 U/D U A
X15 D B
X16 R R R
X17 S S S

U: Progressively increasing A: A phase input S: Input started

input

B: Progressively decreasing B: B phase input R: Input cleared

input

c) In the ELC-PV, ELC2-PV series, there is no limit on the number of times the hardware high
speed counter related instructions, DHSCS, DHSCR and DHSZ can be used. However,
when these instructions are enabled at the same time, there will be some limitations.
DHSCS instruction will occupy 1 group of settings, DHSCR 1 group of settings and DHSZ 2
groups of settings. These three instructions cannot occupy 8 groups of settings in total;
otherwise the system will ignore the instructions which are not the first scanned and
enabled.

d) System structure of the hardware high speed counters:

i) HHSC0 ~ 3 have reset signals and start signals from external inputs. M1272, M1274,
M1276 and M1278 are reset signals for HHSC0, HHSC1, HHSC2 and HHSC3.
M1273, M1275, M1277 and M1279 are start signals for HHSC0, HHSC1, HHSC2
and HHSC3.

ii) If the external control signal inputs of R and S are not in use, you can set
M1264/M1266/M1268/M1270 and M1265/M1267/M1269/M1271 as True and
disable the input signals. The corresponding external inputs can be used again as
general input points (see the figure below).

iii) When special M is used as a high speed counter, the inputs controlled by START

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-290
3. Instruction Set

and RESET will be affected by the scan time.

HHSC0 HHSC1 HHSC2 HHSC3 U/D Present value in counter Counting reaches set value
C ounting pulses U HHSC0
X0 X4 X10 X14
A
HHSC1
HHSC0 HHSC1 HHSC2 HHSC3 Comparator 8 set values
HHSC2
X5 C ounting pulses D
X1 X11 X15
B HHSC3

DHSCS occupies 1 group of set values

HHSC0 HHSC1 HHSC2 HHSC3 Output reaches DHSCR occupies 1 group of set values
Counting up/dow n comparative value DHSCZ occupies 2 groups of set values
D1225 D1226 D1227 D1228 Select counting m odes monitoring flag for outputs
Set values 1 ~ 4 indicate
Mode 1 ~ 4 (1 ~ 4 times frequency)

High-speed Output reaches

HHSC0 HHSC1 HHSC2 HHSC3 U/D mode setup flag HHSC 0 M1246 M1251 comparative
instruction comparative value
C241 C242 C243 C244 HHSC 1 M1247 M1252
M1241 M1242 M1243 M1244 DHSCS SET/RESET
HHSC 2 M1248 M1253 DHSCR I 010 ~ I 060 clear
the present value
HHSC0 HHSC1 HHSC2 HHSC3 HHSC 3 M1249 M1254 DHSCZ
X2 X6 X12 X16
AND Reset signal R Interruption forbidden flag
M1264 M1266 M1268 M1270 OR
I 010 M1289
I 020 M1290
I 030 M1291
M1272 M1274 M1276 M1278
I 040 M1292
I 050 M1293
HHSC0 HHSC1 HHSC2 HHSC3 I 060 M1294
X3 X7 X13 X17
AND Start signal S
M1265 M1267 M1269 M1271 OR

M1273 M1275 M1277 M1279

e) Counting modes:

Special registers D1225 ~ D1228 are for setting up different counting modes for the hardware high
speed counters (HHSC0 ~ 3) in ELC-PV, ELC2-PV series. These are normally 4 times the
frequency for counting, with a default setting that is double the frequency.

Counting modes Wave pattern

Set value in
Type Counting up(+1) Counting down(-1)
special D

1
U/D
(Normal
U/D FLAG
1-phase frequency)

1 input 2
U/D
(Double
U/D FLAG
frequency)

1
1-phase U
(Normal
2 inputs D
frequency)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-291
3. Instruction Set

Counting modes Wave pattern

Set value in
Type Counting up(+1) Counting down(-1)
special D

2
U
(Double
D
frequency)

1
A
(Normal
B
frequency)

2
2-phase A
(Double
2 inputs B
frequency)

3
A
(Triple
B
frequency)

4
2-phase A
(4 times
2 inputs B
frequency)
5. High-speed counter provided in ELCM-PH/PA, ELC2-PA/PB/PH/PE series Models:

There are two types of high speed counters provided by ELCM and ELC2 including Software High
Speed Counter (SHSC) and Hardware High Speed Counter (HHSC). The same Input point (X) can
be used with only one high speed counter. Using the same input with 2 high speed counters will
result in a syntax error when executing DCNT instruction.

Applicable Software High Speed Counters:

C 1-phase input 2 phase 2 input

X C235 C236 C237 C238 C239 C240 C241 C242 C232 C233 C234
X0 U/D A
X1 U/D
X2 U/D B
X3 U/D
X4 U/D A
X5 U/D B
X6 U/D A
X7 U/D B

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3. Instruction Set

R/F M1270 M1271 M1272 M1273 M1274 M1275 M1276 M1277 - - -

U/D M1235 M1236 M1237 M1238 M1239 M1240 M1241 M1242 - - -

U: Count up D: Count down A: Phase A input B: Phase B input

Note:

a) U/D (Count up/Count down) can be specified by special M bit. OFF = count up; ON = count
down.

b) R/F (Rising edge trigger/ Falling edge trigger) can also be specified by special M bit. OFF =
Rising; ON = Falling.

c) SHSC supports max 10kHz input pulse on single input point. Max. 8 counters are allowed
at the same time.

d) For 2-phase 2-input counting, (X4, X5) (C233) and (X6, X7) (C234), max 5kHz. (X0,X2)
(C232), max 15kHz.

e) 2-phase 2-input counting supports double and 4 times frequency, which is selected in
D1022 as follows:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-293
3. Instruction Set

Applicable Hardware High Speed Counters:

C 1-phase
1-phase 2-input 2-phase 2-input
input

X C243 C244 C245 C246 C247 C248 C249 C250 C251 C252 C253 C254

X0 U U/D U/D U U A A
X1 R Dir Dir D D B B
X2 U U/D U/D A A
X3 R Dir Dir B B
X4 R R R
X5 R R
U: Count up A: Phase A input Dir: Direction signal input
D: Count down B: Phase B input R: Reset signal input
Note:

a) The max. frequency of the 1-phase input X0 (C243, C245, C246) and X2(C242) is 100kHz.

b) The max. frequency of the 1-phase 2-input (X0, X1) (C245, C246) and (X2, X3) (C249,
C250) is 100kHz.

c) The max. frequency of the 1-phase 2-input (X0, X1) (C247, C248) is 10kHz.

d) The max. frequency of the 2-phase 2-input (X0, X1) (C251, C252) and (X2, X3) (C253,
C254) is 5kHz.

e) 2-phase 2-input counting supports double and 4 times frequency, which is selected in
D1022 as the table in next page. Please refer to the below table for detailed counting
wave form.

D1022 Counting mode

B
K2
(Double Frequency)
dow
nt n co
u unt
up co

B
K4 or other value
(4 times frequency)
do
wn
(Default) unt
c ou
co nt
up

f) C243 and C244 support count-up mode only and occupy input points X1 and X3 as reset

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-294
3. Instruction Set

(“R”) functions. If the reset function is not needed, set the special M relays ON (M1243 and
M1244) to disable the reset function.

g) “Dir” refers to direction control function. OFF indicates counting up; ON indicates counting
down.

h) When X1, X3, X4 and X5 are applied for the reset function and the external interrupts are
disabled, users can define the reset function as Rising/Falling-edge triggered by special M
bits.
Reset Function X1 X3 X4 X5
R/F M1271 M1273 M1274 M1275

i) When X1, X3, X4 and X5 are applied for the reset function and external interrupts are
disabled, users can define the reset function as Rising/Falling-edge triggered by special M
bits specified in the table: Applicable Software High Speed Counters. However, if external
interrupts are applied, the interrupt instructions have the priority in using the input points. In
addition, the ELC will move the current data in the counters to the data registers below then
reset the counters.
Special D D1241, D1240 D1243, D1242
Counter C243 C246 C248 C252 C244 C250 C254
External Interrupt X1 X4 X3 X5

 When X0 (counter input) and X1 (external Interrupt I100/I101) work with C243, the
count value will be moved to D1240 and D1241 when the interrupt occurs. Then the
counter will be reset.

 When X2 (counter input) and X3 (external Interrupt I300/I301) work with C244, the
count value will be moved to D1242 and D1243 when the interrupt occurs. Then the
counter will be reset.

 When X0 (counter input) and X4 (external Interrupt I400/I401) work with C246, C248,
C252, the count value will be moved to D1240 and D1241 when the interrupt occurs,
Then the counter will be reset.

 When X2 (counter input) and X5 (external Interrupt I500/I501) work with C244, C250,
C254, the count value will be moved to D1242 and D1243 when the interrupt occurs.
Then the counter will be reset.

 Example: When C243 is counting and an external interrupt is triggered from X1(I101),
the count value in C243 will be moved to D0 immediately then C243 is reset. Then,
interrupt I101 executes.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-295
3. Instruction Set

EI
M1000
DCNT C243 K100

FEND
M1000
I101 DMOV D1240 D0

IRET

END

6. Special registers for relevant flags and settings of high speed counters:

Flag Function

M1059 Disable high-speed counter interruptions I010~I080

M1150 DHSZ instruction in multiple set values comparison mode

M1151 The execution of DHSZ multiple set values comparison mode is completed.

M1152 Set DHSZ instruction as frequency control mode

M1153 DHSZ frequency control mode has been executed.

Designating the counting direction of high speed counters C232 ~ C245

M1232 ~
When M12□□ = Off, C2□□ will count up.
M1245
When M12□□ = On, C2□□ will count down.

Monitor the count direction of high speed counters C246 ~ C255

M1246 ~
When M12□□ = Off, C2□□ will count up.
M1255
When M12□□ = On, C2□□ will count down.

ELC-PA: X5 is the reset input signal of the global reset of C235~C239

M1260 ELCM-PH/PA, ELC2-PA/PB/PH/PE: Let X7 be the reset input signal of
high-speed counters C235~C241

M1261 High-speed comparison flag for DHSCR instruction

M1264 Disable the external control signal input point of HHSC0 reset signal point (R)

M1265 Disable the external control signal input point of HHSC0 start signal point (S)

M1266 Disable the external control signal input point of HHSC1 reset signal point (R)

M1267 Disable the external control signal input point of HHSC1 start signal point (S)

M1268 Disable the external control signal input point of HHSC2 reset signal point (R)

M1269 Disable the external control signal input point of HHSC2 start signal point (S)

ELC-PV, ELC2-PV: Disable the external control signal input point of HHSC3
M1270
reset signal point (R)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-296
3. Instruction Set

Flag Function

ELCM-PH/PA, ELC2-PA/PB/PH/PE: C235 counting mode setting (ON:

falling-edge count)

ELC-PV, ELC2-PV: Disable the external control signal input point of HHSC3
start signal point (S)
M1271
ELCM-PH/PA, ELC2-PA/PB/PH/PE: C236 counting mode setting (ON:
falling-edge count)

ELC-PV, ELC2-PV: Internal control signal input point of HHSC0 reset signal
point (R)
M1272
ELCM-PH/PA, ELC2-PA/PB/PH/PE: C237 counting mode setting (ON:
falling-edge count)

ELC-PV, ELC2-PV: Internal control signal input point of HHSC0 start signal
point (S)
M1273
ELCM-PH/PA, ELC2-PA/PB/PH/PE: C238 counting mode setting (ON:
falling-edge count)

ELC-PV, ELC2-PV: Internal control signal input point of HHSC1 reset signal
point (R)
M1274
ELCM-PH/PA, ELC2-PA/PB/PH/PE: C239 counting mode setting (ON:
falling-edge count)

ELC-PV, ELC2-PV: Internal control signal input point of HHSC1 start signal
point (S)
M1275
ELCM-PH/PA, ELC2-PA/PB/PH/PE: C240 counting mode setting (ON:
falling-edge count)

ELC-PV, ELC2-PV: Internal control signal input point of HHSC2 reset signal
point (R)
M1276
ELCM-PH/PA, ELC2-PA/PB/PH/PE: C241 counting mode setting (ON:
falling-edge count)

ELC-PV, ELC2-PV: Internal control signal input point of HHSC2 start signal
point (S)
M1277
ELCM-PH/PA, ELC2-PA/PB/PH/PE: C242 counting mode setting (ON:
falling-edge count)

M1278 Internal control signal input point of HHSC3 reset signal point (R)

M1279 Internal control signal input point of HHSC3 start signal point (S)

M1289 High speed counter I010 interruption forbidden

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3. Instruction Set

Flag Function

M1290 High speed counter I020 interruption forbidden

M1291 High speed counter I030 interruption forbidden

M1292 High speed counter I040 interruption forbidden

M1293 High speed counter I050 interruption forbidden

M1294 High speed counter I060 interruption forbidden

M1312 C235 Start input point control

M1313 C236 Start input point control

M1314 C237 Start input point control

M1315 C238 Start input point control

M1316 C239 Start input point control

M1317 C240 Start input point control

M1320 C235 Reset input point control

M1321 C236 Reset input point control

M1322 C237 Reset input point control

M1323 C238 Reset input point control

M1324 C239 Reset input point control

M1325 C240 Reset input point control

M1328 Enable Start/Reset of C235

M1329 Enable Start/Reset of C236

M1330 Enable Start/Reset of C237

M1331 Enable Start/Reset of C238

M1332 Enable Start/Reset of C239

M1333 Enable Start/Reset of C240

Special D Function

Multiplied frequency of A-B phase counters for ELC-PA, ELCB-PB,

D1022
ELCM-PH/PA, ELC2-PA/PB/PH/PE series

D1180 (LW) ELC-PA：When interrupt X2 / I201 occurs, D1180 will store the low word of
D1181 high speed counting value at X0, D1181 will store the high word of high speed
(HW) counting value at X0.

D1198 (LW) ELC-PA：When interrupt X3 / I301 occurs, D1198 will store the low word of

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3. Instruction Set

D1199 high speed counting value at X0, D1199 will store the high word of high speed

(HW) counting value at X0.

D1225 The counting mode of the 1st group counters (C241, C246, C251)

D1226 The counting mode of the 2nd group counters (C242, C247, C252)

D1227 The counting mode of the 3rd group counters (C243, C248, C253)

D1228 The counting mode of the 4th group counters (C244, C249, C254)

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3. Instruction Set

Special D Function

Counting modes of HHSC0 ~ HHSC3 in ELC-PV, ELC2-PV series (default =

D1225 ~ 1: Normal frequency counting mode

D1228 2: Double frequency counting mode

3: Triple frequency counting mode

4: 4 times frequency counting mode

When interrupt I400/I401/I100/I101 occurs, D1240 stores the low Word of the
D1240
high-speed counter.

When interrupt I400/I401/I100/I101 occurs, D1241 stores the high Word of

D1241
the high-speed counter.

When interrupt I500/I501/I300/I301 occurs, D1242 stores the low Word of the
D1242
high-speed counter.

When interrupt I500/I501/I300/I301 occurs, D1243 stores the high Word of

D1243
the high-speed counter.

API Mnemonic Operands Function

54 D HSCR S1, S2, D High Speed Counter Reset
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DHSCR: 13 steps
S1 * * * * * * * * * *
S2 *
D * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Compare value S2: High-speed counter number D: Compare result

Description:
350. DHSCR compares the current value of the counter S2 against a compare value S1. When the
counters current value changes to a value equal to S1, address D is reset to OFF. Once reset,
even if the compare result is no longer equal, D will remain OFF.
351. If D is specified as Y0~Y7 (ELCM-PH/PA: Y0~Y3), when the compare value and the present
value of the high-speed counter are equal, the compare result will immediately de-energize the
external output Y0~Y7 (ELCM-PH/PA: Y0~Y3). . M and S addresses are also allowed for D.
352. Operand S2 must be high speed counter. For example: C235~C255.
353. Operand D of ELC-PA, ELCB-PB cannot use the counter addresses.

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3. Instruction Set

354. Operand D of other series can use same with Operand S2.

Program Example 1:

When M0=ON and C251’s present value goes from 99→100 or 101→100, Y0 will be reset to OFF.

When C251’s present value changes from 199 to 200, the contact C251 will be ON and Y20=ON.
M1000
DCNT C251 K200
M0
DHSCR K100 C251 Y0
C251
SET Y20

 Program Example 2:

When DHSCR instruction uses the same high speed counter number as a DCNT instruction, and
when the present value in the high speed counter C251 changes from 999 to 1,000 or 1,001 to 1,000,
C251 will be reset.
M1000
DCNT C251 K200

DHSCR K1000 C251 C251


1,000

200

Not affected by scan time

C251 output contact

Affected by scan time

Remarks:

1. All ELC series controllers support high speed counters. For the limitatios on the use of the
high speed counter instructions, see the remarks for API 53 DHSCS for more details.

2. M1261 of ELC-PV, ELC2-PV series designates the external reset modes of the high speed
counter. Some high speed counters have input points for external reset; therefore, when the
input point is On, the present value in the corresponding high speed counter will be cleared to
0 and the output contact will be Off. If the reset needs to be executed immediately by the
external input, you must set M1261 ON.

3. M1261 can only be used in the hardware high speed counters C241 ~ C255.

4. Example:

a) X2 is the input for the external reset of C251.

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3. Instruction Set

b) Assume Y10 = On.

c) When M1261 = Off and X2 = On, the present value in C251 will be cleared to 0 and the contact
of C251 will be Off. When the DHSCR instruction is executed, there will be no counting input
pulses and the comparison result will not reset Y10. The external output will not execute the
reset; so Y10 = On will remain unchanged.

d) When M1261 = On and X2 = On, the present value in C251 will be cleared to 0 and the contact
of C251 will be Off. When DHSCR instruction is executed, there will be no counting the input
pulses but the comparison result will occur. Therefore, Y10 will be reset.
M1000
DCNT C251 K1000

DHSCR K0 C251 Y10

X10
M1261



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3. Instruction Set

API Mnemonic Operands Function

55 D HSZ S1, S2, S, D HSC Zone Compare

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F DHSZ: 17 steps
S1 * * * * * * * * * *
S2 * * * * * * * * * *
S *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Low-limit value of zone comparison S2: High-limit value of zone comparison S: high-speed
counter number D: compared result (occupies 3 continuous bit addresses)

Description: (ELC-PA/PV, ELC2-PV)

355. S1 should be equal to or less than S2 (S1 ≦ S2).
356. If D is specified as Y0~Y7, when S1 and S2 are equal, the compare result will immediately
energize the external output Y0~Y7. M and S devices are immediately set, not being affected
by the scan cycle.
357. All outputs with the zone comparison use interrupts.
358. Operand S should be high speed counter. For example: C235~C255.
359. Flags: M1059~M1260 (Refer to the DHSCS instruction for more details)

Description: (ELCM-PH/PA, ELC2-PA/PB/PH/PE)

360. If D is specified as Y0~Y3 in this instruction, the compare result will immediately energize the
external outputs Y0~Y3. M and S devices, not affected by the program scan cycle, will be
updated immediately.
361. High speed counters include software high speed counters and hardware high speed counters.
In addtiion, there are also two types of comparators including software comparators and
hardware comparators.
362. Explanations on software comparators for DHSZ instruction

a) Corresponding table for software counters and comparators:

Counter C232 C233 C234 C235 C236 C237 C238 C239 C240 C241 C242
Hi-speed compare
Share 6 software comparators
Set/Reset

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3. Instruction Set

b) Block diagram of software counters and comparators:

Softwar e
comparator x 6
Softwar e
C ounter 1 Set / reset 1

Set / reset 2
Softwar e
Count value
counter 2

Set / reset 6
Softwar e
counter 8

c) There are 6 software zone comparators available exclusively for zone compare
operations. The limit of 6 comparisons for zone compares does not include the
comparisons of DHSCS and DHSCR.
363. Descriptions of hardware comparators for the HSZ instruction:

a) Corresponding table for hardware counters and comparators

A group B group
Hardware counter
A1 A2 A3 A4 B1 B2 B3 B4
Counter No. C243, C245~C248, C251,C252 C244, C249, C250, C253, C254
Hi-speed compare Shares 4 hardware Shares 4 hardware
Set/Reset comparators for group A comparators for group B

b) Block diagram of hardware counters and comparators:

Hardware
comparator A x 4 Set /res et A1
I010 A1

Hardware Count
counter A value A
Set /res et A4
I040 A4

H ardw are
comparator B x 4 Set /res et B1

I050 B1

Hardware Count
counter B value B
Set /res et B4

I080 B4

c) The two groups can only be used once for each group, occupying 2 comparators. For
example, when DHSZ instruction uses A3 and A4 of group A comparators, only the other
2 comparators (A1, A2) are available for DHSCS and DHSCR instructions.

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3. Instruction Set

d) When DHSCS uses I030 or I040, comparators A3 and A4 are no longer available for
DHSZ instruction. Also, when DHSCS uses I070 or I080, comparators B3 and B4 are no
longer available for DHSZ instruction. If comparators are used repeatedly, the syntax
error will be detected on the previous instruction..

Program Example 1:
364. When D is specified as Y0, then Y0~Y2 will also be used..
365. When the DHSZ instruction is executed and the high-speed counter C246 is counting, if the
high or low limit value is reached, one of Y0~Y2 will be ON.
M1000
DCNT C246 K20000

DHSZ K1500 K2000 C246 Y0

Y0
When current value of C246 < K1500, Y0=On
Y1
When K1500 < current value of C246 < K2000, Y1=On
Y2
When current value of C246 > K2000, Y2=On

Program Example 2:
366. When using the DHSZ instruction to control stop, high, or low speed, C251 is set as an AB
phase high-speed counter.
367. When X30=ON, DHSZ will turn Y0=ON when the current value ≦ K2,000. In order to improve
this, use the DZCPP instruction to compare C251 against K2,000 during the first program scan
after going to RUN. When counting the current value ≦ K2,000, Y0=ON and the DZCPP
instruction is Pulsed. Instruction DZCPP can only be executed ONCE in a program. Y0 will
continue to be ON.
368. When X20=OFF, Y0~Y2 will be reset to OFF.
X20
RST C251

ZRST Y0 Y2
M1000
DCNT C251 K10000
X30
DZCPP K2000 K2400 C251 Y0

DHSZ K2000 K2400 C251 Y0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-305
3. Instruction Set

TIMING DIAGRAM
Speed of variable
speed rotational
equipment
0

X30

High speed
forward Y0
Low speed
forward Y1

Stop Y2

2400
Current value of 2000
C251 counter

 Program Example 3:
369. Program Example 3 is only applicable to ELC-PV, ELC2-PV series.
370. The multiple set values comparison mode: If D of DHSZ instruction designates a special
auxiliary relay M1150, the instruction will be able to compare the present value in the high
speed counter with many values in a table.
371. In this mode,

- S1: starting value in the comparison table. S1 can only use the D data registers and can
also utilize the index registers E and F. Once this mode is enabled, S1 cannot be
changed even if the index registers E and F are changed.

- S2: the amount of data in the group to be compared. S2 can only be a constant value K1
~ K255 or H1 ~ HFF and does not support the index registers E and F. Once this mode is
enabled, S2 cannot be changed. If S2 is not within its range, error code 01EA (hex) will be
displayed and the instruction will not be executed.

- S: high speed counter number (C241 ~ C254).

- D: Designated mode (determined by M1150)

372. The number of start registers designated in S1 and the number of rows (groups) designated in
S2 construct a comparison table. Enter the values in every register in the table before
executing the instruction.
373. When the present value of the counter C251 (S) equals the values in D1 and D0, the Y output
designated by D2 will be reset to Off (D3 = K0) or On (D3 = K1) and be maintained. Output Y
will be processed as an interrupt. The number of Y output points are in decimal (range: 0 ~

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3. Instruction Set

255). If the number falls outside of the range, SET/RESET will not be enabled when the
comparison reaches its target.
374. When this mode is enabled, the ELC will first acquire the values in D0 and D1 as the target
values for the first comparison section. At the same time, the index value displayed in D1150
will be 0, indicating that ELC performed the comparison based on the group 0 data.
375. When the group 0 data in the table has been compared, the ELC will first execute the Y output
set in the group 0 data and determine if the comparison reaches the target number of groups.
If the comparison reaches the target, M1151 will be On; if the comparison has not reached the
final group, one will be added to the contents of D1150 and continue the comparison for the
next group.
376. M1151 is the flag for the completion of one execution of the table. It can be turned Off by the
user, or when the next comparison cycle takes place and the group 0 data has been compared,
the ELC will automatically reset the flag.
377. When X10 is turned Off, the execution of the instruction will be interrupted and the content in
D1150 will be reset to 0. However, the On/Off status of all outputs will be maintained.
378. When the instruction is being executed, all values in the comparison table will be regarded as
valid values only when the program scan reaches the END statement for the first time.
379. This mode can only be used once in the program.
380. This mode can only be used on the hardware high speed counters C241 ~ C254.
381. When in this mode, the frequency of the input pulses cannot exceed 50KHz or the neighboring
two groups of compare values cannot differ by 1; otherwise there will not be enough time for
the ELC to react and the result will be an error.
X10
DHSZ D0 K4 C251 M1150



 The comparison table:

32-bit data for comparison Table counting

No. of Y output On/Off indication
High word Low word register D1150

D1 (K0) D0 (K100) D2 (K10) D3 (K1) 0

D5 (K0) D4 (K200) D6 (K11) D7 (K1) 1

D9 (K0) D8 (K300) D10 (K10) D11 (K0) 2

D13 (K0) D12 (K400) D14 (K11) D15 (K0) 3

K10: Y10 K0: Off 0→1→2→3→0

K11: Y11 K1: On Cyclic scan

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-307
3. Instruction Set

Present value
in C251
400

300

200

100

Y10
Y11
M1151
3
2
1
 D1150 0 0

382. Special registers for flags and relevant settings:

 Flag  Function

 M1150  DHSZ instruction in multiple set values comparison

mode

 M1151  The execution of DHSZ multiple set values

comparison mode is completed.

 Special D  Function

 D1150  Table counting register for DHSZ multiple set values

comparison mode

 Program Example 4:

1. Program Example 4 is only applicable to ELC-PV, ELC2-PV series.

2. DHSZ and DPLSY instructions are combined for frequency control. If D of the DHSZ
instruction is a special auxiliary relay M1152, the present value in the counter will be able to
control the pulse output frequency of DPLSY instruction.

3. In this mode,

- S1: starting address in the comparison table. S1 can only use D registers which can
utilize the index registers E and F. Once this mode is enabled, S1 will not be
allowed to change even if E and F change.

- S2: the amount of data in the group to be compared. S2 can only be a constant
value K1 ~ K255 or H1 ~ HFF and does not support the index registers E and F.
Once this mode is enabled, S2 cannot be changed. If S2 is not within its range, error
code 01EA (hex) will display and the instruction will not be executed.

- S: high speed counter number (designated as C241 ~ C254).

- D: Designated mode (determined by M1152)

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3. Instruction Set

4. This mode can only be used once. For PV series, this mode can only be used with the
hardware high speed counters C241 ~ C254. Enter the values in every register in the table
before executing the instruction.

5. When this mode is enabled, the ELC will first acquire the values in D0 and D1 as the target
values for the first comparison section. At the same time, the index value displayed in D1152
will be 0, indicating that ELC performs the comparison based on the group 0 data.

6. When the group 0 data in the table has been compared, the ELC will first execute at the
frequency set in group 0 data (D2, D3) and copy the data to D1152 and D1153, determining
if the comparison reaches the target number of groups. If the comparison reaches the target,
M1153 will be On; if the comparison has not reached the final group, the content in D1151
will add 1 and continue the comprison for the next group.

7. M1153 is the flag for the completion of one execution of the table. It can be turned Off by the
user. Or when the next comparion cycle takes place and the group 0 data has been
compared, the ELC will automatically reset the flag.

8. If you wish to use this mode with the PLSY instruction, preset the value in D1152.

9. If you wish to stop the execution at the last row, set the value in the last row to K0.

10. When X10 turns Off, the execution of the instruction will be interrupted and the content in
D1151 will be reset to 0.

11. When in this mode, the frequency of the input pulses cannot exceed 50KHz or the
neighboring two groups of comparative values cannot differ by 1; otherwise there will not be
enough time for the ELC to react and result in errors.
X10
DHSZ D0 K5 C251 M1152

PLS M0
M0
DPLSY D1152 K0 Y0



 The comparison table:

32-bit data for comparison Pulse output frequency Table counting

High word Low word 0 ~ 200KHz register D1151

D1 (K0) D0 (K0) D3, D2 (K5,000) 0

D5 (K0) D4 (K100) D7, D6 (K10,000) 1

D9 (K0) D8 (K200) D11, D10 (K15,000) 2

D13 (K0) D12 (K300) D15, D14 (K6,000) 3

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3. Instruction Set

D17 (K0) D16 (K400) D19, D18 (K0) 4

0→1→2→3→4

Cyclic scan

Present value 500

in C251
400

300

200

100
0
(Hz)
15,000

10,000

5,000
0
M1153
4
3
2
1
 D1151 0 0

12. Special registers for flags and relevant settings:

 Flag  Function

 M1152  DHSZ instruction in frequency control mode

 M1153  The execution of DHSZ frequency control mode is

complete.

 Special D  Function

 D1151  Table counting register for DHSZ multiple set values

comparison mode

 D1152 (low  In frequency control mode, DHSZ reads the upper

word) and lower limits in the table counting register D1153

 D1153 (high and D1152.

word)

 D1336 (low  Current number of pulses sent out by DPLSY

word) instruction


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3. Instruction Set

13. The complete program:

X10
DMOVP K5000 D2

DMOVP K10000 D6

DMOVP K15000 D10

DMOVP K6000 D14

DMOVP K0 D18

DMOVP K0 D0

DMOVP K100 D4

DMOVP K200 D8

DMOVP K300 D12

DMOVP K400 D16

DHSZ D0 K5 C251 M1152

PLS M0

M0
DPLSY D1152 K0 Y0

Frequency Number Output

of point
 pulses

14. During the execution of DHSZ instruction, do not modify the values set in the comparison
table.

15. The designated data will be arranged into the the above program when the program reaches
the END statement. Therefore, the PLSY instruction has to be executed after DHSZ
instruction has been executed once.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3 - 3 11
3. Instruction Set

API Mnemonic Operands Function

56 SPD S 1 , S2 , D Speed Detection
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F SPD: 7 steps
S1 *
S2 * * * * * * * * * * *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: External pulse input S2: Pulse time (ms) D: Result (occupies 5 continuous addresses)

Description: ELC-PA/PV, ELCB-PB

383. This instruction counts the number of pulses received at input terminal S1 during the time S2
(ms) and stores the result in the register D.
384. External pulse input terminals designated in S1 for all ELC controllers:
ELC-PA
ELC
ELCB-PB (new input X0 is added ELC-PV
Input
for V1.2 and above)
Available input points X1, X2 X0, X1, X2 X0 ~ X3

385. ELC-PA models, if X0, X1 or X2 are used with a SPD instruction, then the related high-speed
counters or external interrupts I001, I101, I201 can not be used.
386. Count the number of pulses received at the inputs specified by S1 during the time specified by
S2 (ms) and store the result in the register specified by D.
387. D occupies 5 registers, D+1, D stores the result of the previous SPD operation, D+3, D+2
indicate the present accumulated count value of pulses and D+4 indicates the remaining time,
the max. is 32767ms. Both are 32-bit integer values.
388. ELCB-PB models: Maximum frequency: X1=20KHz, X2=10KHz, Total frequency must be less
than 20KHz.
389. ELC-PA models: Maximum frequency: X1=30KHz, X2=10KHz, Total frequency must be less
than 30KHz. If X0 is used in a SPD instruction, X0 and X1 will be the inputs of A, B phase
signals to detect the speed of A, B phase. The maximum input frequency is 4KHz. Use D1022
to set time frequency.
390. ELC-PV models: Maximum frequency: X0 and X1 = 100KHz, X2 and X3 = 10KHz, Total
frequency must be less than 100KHz. If X0 is used in a SPD instruction, X0 and X1 will be the
inputs of A, B phase signals to detect the speed of A, B phase.
391. This instruction is mainly used to obtain a proportional value of rotation speed. The result D
and rotation speed are in proportion. The following equation can be used to obtain the rotation
speed of motor.

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3. Instruction Set

N: Rotation speed
60D 0 
N=  10 3 rpm  n: The number of pulses per rotation of the motor
nt
t: Detection time specified by S2 (ms)
392. ELC-PV models: When the SPD instruction is enabled and M1100 = On, the SPD instruction
will perform a sampling at the moment when M1100 goes from Off to On, then stop the
sampling. If you wish to resume the sampling, you must turn Off M1100 and re-enable the SPD
instruction.

Description: (ELCM-PH/PA, ELC2-PA/PB/PH/PE)

393. External pulse input terminals designated in S1 for ELCM and ELC2 series ELC controllers:
X1(X0/X1), X3(X2/X3),
Available input points X0, X2 X6, X7
X5(X4/X5), X7(X6/X7)
1-phase input AB-phase input 1-phase input
Input mode (Supports single (Supports 4 tmes (Supports single
frequency ) frequency) frequency)
Maximum frequency 100KHz 5KHz 10KHz
394. D occupies 5 consecutive registers, D + 1 and D store the results of previous pulse detection;
D +3 and D + 2 store the current accumulated number of pulses; D + 4 stores the current time
remaining (max. 32,767ms).
395. If X0 ~ X7 are used in a SPD instruction, their associated high-speed counters and external
interrupts I000/I001, I100/I101, I200/I201, I300/I301, I400/I401, I500/I501, I600/I601 or
I700/I701 cannot be used.
396. When X0, X2, X6 and X7 are used, they will be detected as 1-phase inputs. When X1, X3, X5,
X7, is used, X0, X2, X4, X6 (A) and X1, X3, X5, X7 (B) will be detected as AB-phase input.
397. This instruction is mainly used to obtain the value of rotation speed and the results in D are in
proportion to the rotation speed. Rotation speed N can be calculated by the following equation
N: Rotation speed
60D 0 
N=  10 3 rpm  n: The number of pulses produced per rotation
nt
t: Detecting time specified by S2 (ms)

Program Example:
398. When X7=ON, D2 will count the high-speed pulses from X1. After 1,000ms, it will stop
counting automatically and store the result in D0.
399. After 1000ms of counting has completed, the content of D2 will be reset to 0. When X7 turns
ON again, D2 will begin counting again.
X7
SPD X1 K1000 D0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-313
3. Instruction Set

D2: current
D0: detection
value
value

D2: content
value

1000ms 1000ms

1000

D4: content D4:remaining time (ms)

value

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3. Instruction Set

API Mnemonic Operands Function

57 D PLSY S 1 , S2 , D Pulse Output
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F PLSY: 7 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DPLSY: 13 steps
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Pulse output frequency S2: Number of output pulses D: External output (only Y0 and Y1
can be specified)

Description: ELC-PA/PV, ELCB-PB, ELC2-PV Controllers

400. When the PLSY instruction is executed, the specified quantity of pulses S2 will be sent out the
output terminal specified by D at the specified pulse output frequency S1.
401. S1 - the pulse output frequency
Output frequency range of each series models
Models ELCB-PB ELC-/PA ELC-PV, ELC2-PV
Y0: 0~200,000Hz
Y0：1~10,000Hz Y0：1~30,000Hz Y2: 0~200,000Hz
Output frequency range
Y1：1~10,000Hz Y1：1~30,000Hz Y4: 0~200,000Hz
Y6: 0~200,000Hz
M1190=ON - - Y0: 0.01~100Hz
M1191=ON - - Y2: 0.01~100Hz
M1192=ON - - Y4: 0.01~100Hz
M1193=ON - - Y6: 0.01~100Hz
402. S2 - Number of output pulses.
16-bit instruction: 1~32,767. 32-bit instruction: 1~2,147,483,647.
M1010（Y0） ON, pulse output is continuous
M1023（Y1） ON pulse output is continuous
Continuous pulses
In ELC-PV, set S2 (the number of output pulses for Y0, Y2, Y4 and
Y6) to K0
403. For ELC-PV series, when the number of output pulses is set to 0, there will be continuous
pulse output with no limit on the number of pulses. For ELC-PB/PC/PA/PH, ELCB-PB series,
you must to turn M1010 (Y0) or M1023 (Y1) On to allow a continuous pulse output with no limit
on the number of pulses.
404. For the pulse output terminal specified in D, the ELC-PV, ELC2-PV series can use Y0, Y2, Y4
and Y6, The ELC-PA, ELCB-PB series can use Y0 and Y1.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-315
3. Instruction Set

405. The ELC-PV, ELC2-PV series has four groups of A-B phase pulse outputs from CH0 (Y0, Y1),
CH1 (Y2, Y3), CH2 (Y4, Y5) and CH3 (Y6, Y7). See the remarks in section 2.3 concerning how
to set this up. .
406. When the PLSY instruction has been executed, the specified quantity of pulses S2 will be sent
out the output terminal specified by D at the specified pulse output frequency S1.
407. When the PLSY instruction is used in a program, the outputs used in the PLSY instruction
cannot be used in the PWM instruction or PLSR instruction.
408. Pulse output complete flags for each controller type:
ELC-PA
ELC ELC-PV, ELC2-PV
ELCB-PB

Output device Y0 Y1 Y0 Y2 Y4 Y6

Flag M1029 M1030 M1029 M1030 M1036 M1037

a) For ELC-PA, ELCB-PB series, after the Y0 pulse output is complete, M1029 = ON; after
the Y1 pulse output is complete, M1030 = ON. When the PLSY instruction is OFF, M1029
and M1030 will be OFF.
b) The execution complete flags M1029, M1030 should be cleared by the user after the
execution of the instruction has been completed.
c) For ELC-PV, ELC2-PV series, M1029 is set to ON after Y0 finishes sending the specified
number of pulses , M1030 is set to ON after Y2 finishes sending the specified number of
pulses, M1036 is set to ON after Y4 finishes sending the specified number of pulses, and
M1037 is set to ON after Y6 finishes sending the specified number of pulses. When the
PLSY instruction is OFF, M1029, M1030, M1036, and M1037 will not be turned OFF
automatically. The user program will need to reset them.
409. For the ELC-PA, ELCB-PB series controllers, when the PLSY and DPLSY instructions are
disabled, the pulse output completed flags will all be turned Off automatically.
410. For the ELC-PV, ELC2-PV series, when the PLSY and DPLSY instructions are disabled, the
user will have to reset the pulse output complete flags. They are not reset automatically like
with the other ELC controllers.
411. While the PLSY instruction is being executed, the output will not be affected if S2 is changed.
To change the number of output pulses, the PLSY instruction must be disabled, then change
the number the number of pulses.
412. S1 the pulse output frequency can be changed while the PLSY instruction is being executed.
413. The pulses sent out by the PLSY instruction are sent at a 50% duty cycle. For example, if each
pulse is sent at 1000Hz, it will be On for .5ms and Off for .5ms.
414. If operands S1, S2 use index register F, then only the 16-bit instruction is available (PLSY).
415. For ELCB-PB series, the PLSY instruction can only be used twice in the program.

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3. Instruction Set

416. For ELC-PA/PV, ELC2-PV series, there is no limit on the number of times this instruction may
be used in the program. However, for the ELC-PA series, the program only allows two PLSY
instructions to be executed at the same time. For ELC-PV series, the program allows four
PLSY instructions to be executed at the same time.

ELCM-PH/PA, ELC2-PA/PB/PH/PE Controllers

417. S1 specifies the pulse output frequency
Output frequency range
ELCM-PH/PA
Series ELC2-PB
ELC2-PA/PH/PE
Output Y0~Y3 Y0, Y2 Y1, Y3
16-bit instruction 0~10,000Hz 0~32,767 Hz 0~10,000Hz
32-bit instruction 0~10,000Hz 0~100,000Hz 0~10,000Hz

If 0Hz is specified, pulse output will be disabled

418. S2 specifies the number of output pulses.
16-bit instruction: -32,768~32,767. 32-bit instruction: -2,147,483,648~2,147,483,647.

When S2 is specified as K0, the pulse will be continuous output.

419. ELCM-PH/PA, ELC2-PA/PB/PH/PE series have four pulse output modes as shown below.

Mode D1220 D1221

Output K0 K1 K2 K3 K0 K1 K2 K3#
Y0 Pulse Pulse A CW
Y1 Pulse Dir B Pulse
Y2 Pulse Pulse A CCW
Y3 Pulse Dir B Pulse
Pulse: Pulse A: A phase pulse CW: clockwise
Dir: Direction B: B phase pulse CCW: Counter-clockwise

Note #: When D1220 contains the value K3, D1221 is invalid.

420. Pulse output flags for ELCM-PH/PA, ELC2-PA/PB/PH/PE series:

Output device Y0 Y1 Y2 Y3

Completed Flag M1029 M1030 M1102 M1103

pause M1078 M1079 M1104 M1105

0.01~10Hz output M1190 M1191 M1192 M1193

a) M1029 = ON after Y0/Y1 (D1220=K1, pulse/Dir) is complete.

M1102 = ON after Y2/Y3 (D1221=K1, pulse/Dir) is complete.

M1029 = ON after the Y0/Y2 (D1220 = K3, CW/CCW) is complete.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-317
3. Instruction Set

b) The execution complete flag M1029, M1030, M1102, and M1103 should be manually
reset by the user program after the pulse output has completed.
c) When M1190~M1192 is ON, frequency 0.01~100Hz is available for outputs Y0~Y3.
d) When the PLSY / DPLSY instruction is OFF, the pulse output complete flags will all be
reset.
e) When M1190~M1192 = ON, the available output range for PLSY Y0~Y3 is 0.01~100Hz.
421. While the PLSY instruction is being executed, the output will not be affected if S2 is changed.
To change the number of pulses, stop the PLSY instruction, then change the number of
pulses.
422. S1 the pulse output frequency can be changed while the PLSY instruction is being executed.
423. The pulses sent out by the PLSY instruction are sent at a 50% duty cycle. For example, if each
pulse is sent at 1000Hz, it will be On for .5ms and Off for .5ms.
424. If operand S1, S2 use the index register F, only the 16-bit instruction (PLSY) is available.
425. There is no limit on the number of times this instruction can be used in the program. However
the program only allows 4 pulse output instructions (PLSY, PWM, PLSR) to be executed at the
same time. If Y1 is used for several high speed pulse output instructions, the controller will
execute each one in the order they are enabled and scanned in the program.

Program Example:
426. When X0=ON, 200 pulses will be sent out Y0 at 1KHz. When the instruction is finished,
M1029=ON (the complete flag) which will turn on Y20.
427. When X0=OFF, the pulse output to Y0 will immediately stop. When X0 turns ON again, the
pulse output will restart.
X0
PLSY K1000 K200 Y0

M1029
Y20

0.5ms

Output Y0 1 2 3 200

1ms

Points to note:
428. Flags and special registers for ELC-PB, ELCB-PB series:
M1010: When M1010=ON, continuous pulses will be sent out Y0. When M1010=OFF, the
PLSY instruction will send the number of pulses specified in S2.
M1023: When M1023=ON, Y1 will send continuous pulses. When M1023=OFF, the PLSY
instruction will send the number of pulses specified in S2.

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3. Instruction Set

M1029: M1029= ON after Y0 pulse output is complete.

M1030: M1030= ON after Y1 pulse output is complete.
M1078: Pause sending pulses out Y0.
M1079: Pause sending pulses out Y1.

D1030: Present number of pulses sent out Y0 (LOW WORD).

D1031: Present number of pulses sent out Y0 (HIGH WORD).
D1032: Present number of pulses sent out Y1 (LOW WORD).
D1033: Present number of pulses sent out Y1 (HIGH WORD).
429. Flags and special registers for ELC-PA series:
M1010: When On, Y0 output will be continuous with no limit on the number of pulses. When
Off, the number of output pulses from Y0 will be determined by S2.
M1023: When On, Y1 output will be continuous with no limit on the number of pulses. When
Off, the number of output pulses from Y1 will be determined by S2.
M1029: On when Y0 pulse output is complete.
M1030: On when Y1 pulse output is complete.
M1078: Pause sending pulses out Y0
M1079: Pause sending pulses out Y1
M1347: For ELC-PA, Auto reset Y0 when high speed pulse output is complete
M1348: For ELC-PA, Auto reset Y1 when high speed pulse output is complete
D1030: Low word of the current number of output pulses from Y0
D1031: High word of the current number of output pulses from Y0
D1032: Low word of the current number of output pulses from Y1
D1033: High word of the current number of output pulses from Y1
430. Flags and special registers for ELC-PV, ELC2-PV series:
M1010: When On, CH0, CH1, CH2 and CH3 will send pulses at END of program scan. Off
when the output starts.
M1029: On when CH0 pulse output is complete.
M1030: On when CH1 pulse output is complete.
M1036: On when CH2 pulse output is complete.
M1037: On when CH3 pulse output is complete.
M1190: Set Y0 high speed output as 0.01~100Hz
M1191: Set Y2 high speed output as 0.01~100Hz
M1192: Set Y4 high speed output as 0.01~100Hz
M1193: Set Y6 high speed output as 0.01~100Hz
M1334: Pause sending pulses out CH0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-319
3. Instruction Set

M1335: Pause sending pulses out CH1

M1520: Pause sending pulses out CH2
M1521: Pause sending pulses out CH3
M1336: CH0 pulse output has been sent.
M1337: CH1 pulse output has been sent.
M1522: CH2 pulse output has been sent.
M1523: CH3 pulse output has been sent.
M1338: CH0 offset pulses enabled.
M1339: CH1 offset pulses enabled.
M1340: I110 interrupt occurs after CH0 pulse output is complete.
M1341: I120 interrupt occurs after CH1 pulse output is complete.
M1342: I130 interrupt occurs when CH0 pulse output is in process.
M1343: I140 interruption occurs when CH0 pulse output is in process.
M1344: CH0 pulse compensation enabled.
M1345: CH1 pulse compensation enabled.
M1347: CH0 pulse output reset flag
M1348: CH1 pulse output reset flag
M1524: CH2 pulse output reset flag
M1525: CH3 pulse output reset flag
D1220: Phase setting for CH0 (Y0, Y1): D1220 determines the phase type for CH0 with the
two low bits; other bits in this word are invalid.
1. K0: Y0 output
2. K1: Y0, Y1 AB-phase output; A ahead of B.
3. K2: Y0, Y1 AB-phase output; B ahead of A.
4. K3: Y1 output
D1221: Phase setting for CH1 (Y2, Y3): D1221 determines the phase type for CH1 with the
low two bits; other bits in this word are invalid.
1. K0: Y2 output
2. K1: Y2, Y3 AB-phase output; A ahead of B.
3. K2: Y2, Y3 AB-phase output; B ahead of A.
4. K3: Y3 output
D1229: Phase setting for CH2 (Y4, Y5): D1229 determines the phase type for CH2 with the
low two bits; other bits in this word are invalid.
1. K0: Y4 output
2. K1: Y4, Y5 AB-phase output; A ahead of B.
3. K2: Y4, Y5 AB-phase output; B ahead of A.
4. K3: Y5 output
D1230: Phase setting for CH3 (Y6, Y7): D1230 determines the phase type for CH3 with the
low two bits; other bits in this word are invalid.
1. K0: Y6 output
2. K1: Y6, Y7 AB-phase output; A ahead of B.
3. K2: Y6, Y7 AB-phase output; B ahead of A.
4. K3: Y7 output

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3. Instruction Set

D1328: Low word of the number of CH0 offset pulses

D1329: High word of the number of CH0 offset pulses
D1330: Low word of the number of CH1 offset pulses
D1331: High word of the number of CH1 offset pulses
D1332: Low word of the number of remaining pulses at CH0
D1333: High word of the number of remaining pulses at CH0
D1334: Low word of the number of remaining pulses at CH1
D1335: High word of the number of remaining pulses at CH1
D1336: Low word of the current number of output pulses at CH0
D1337: High word of the current number of output pulses at CH0
D1338: Low word of the current number of output pulses at CH1
D1339: High word of the current number of output pulses at CH1
D1375: Low word of the current number of output pulses at CH2
D1376: High word of the current number of output pulses at CH2
D1377: Low word of the current number of output pulses at CH3
D1378: High word of the current number of output pulses at CH3
D1344: Low word of the number of compensation pulses at CH0
D1345: High word of the number of compensation pulses at CH0
D1346: Low word of the number of compensation pulses at CH1
D1347: High word of the number of compensation pulses at CH1
431. Flags and special registers for ELCM-PH/PA, ELC2-PA/PB/PH/PE series:
M1029: M1029 = ON when Y0 pulse output is complete.
M1030: M1030 = ON when Y1 pulse output is complete.
M1102: M1102 = ON when Y2 pulse output is complete.
M1103: M1103 = ON when Y3 pulse output is complete.
M1078: Pause sending pulses out Y0
M1079: Pause sending pulses out Y1
M1104: Pause sending pulses out Y2
M1105: Pause sending pulses out Y3
M1190 Set Y0 high speed output as 0.01~10Hz
M1191 Set Y1 high speed output as 0.01~10Hz
M1192 Set Y2 high speed output as 0.01~10Hz
M1193 Set Y3 high speed output as 0.01~10Hz
M1347: Auto reset Y0 when high speed pulse output is complete
M1348: Auto reset Y1 when high speed pulse output is complete
M1524: Auto reset Y2 when high speed pulse output is complete

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-321
3. Instruction Set

M1525: Auto reset Y3 when high speed pulse output is complete

M1538: Indicates if Y0 is paused
M1539: Indicates if Y1 is paused
M1540: Indicating if Y2 is paused
M1541: Indicating if Y3 is paused

D1030: Present number of Y0 output pulses (LOW WORD).

D1031: Present number of Y0 output pulses (HIGH WORD).
D1032: Present number of Y1 output pulses (LOW WORD).
D1033: Present number of Y1 output pulses (HIGH WORD).
D1336: Present number of Y2 output pulses (LOW WORD).
D1337: Present number of Y2 output pulses (HIGH WORD).
D1338: Present number of Y3 output pulses (LOW WORD).
D1339: Present number of Y3 output pulses (HIGH WORD).
D1220: Phase setting of the 1st pulse output group (Y0, Y1),
D1221: Phase setting of the 2nd pulse output group (Y2, Y3),
432. When several pulse output instructions (PLSY, PWM, PLSR) use Y0 as the output in the same
program, and are executed simultaneously in the same scan cycle, the ELC will perform the
instruction which has fewest step numbers.
433. More information for M1347,M1348, M1524, M1525:

Generally when the pulse output is complete, the PLSY instruction must be reset so that the
instruction can be executed again. When M1347, M1348, M1524 or M1525 is enabled, the
associated output terminals (Y0~Y3) will be reset automatically when the pulse output is
complete, i.e. the PLSY instruction is reset. When the ELC scans the PLSY instruction again,
the pulse output will automatically start. Also, the ELC updates the 4 flags at the END of the
program scan. This means that the PLSY instruction in continuous pulse output mode requires
a delay time of one scan cycle for the next pulse output operation.

The function is mainly used in subroutines or interrupts which require high speed pulse outputs.
Here are a couple of examples:

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3. Instruction Set

Program Example 1:

FEND

M1000
I 001 SET M1347

DPLSY K1000 K1000 Y0

IRET

M1000
I 101 SET M1524

DPLSY K1000 K1000 Y2

IRET

END

Description:
a) Whenever I001 is triggered, Y0 will send 1,000 pulses; whenever I101 is triggered, Y2 will
send 1,000 pulses.
b) When the pulse output is complete, there should be an interval of at least one scan cycle
before the next pulse output operation can be triggered. .

Program Example 2:

X1
SET M1347
X2
PLSY K1000 K1000 Y0

END

Description:
When both X1 and X2 are ON, the pulse output to Y0 will operate continuously. However, there
will be a delay of approx. 1 scan cycle every 1000 pulses.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-323
3. Instruction Set

API Mnemonic Operands Function

58 PWM S 1 , S2 , D Pulse Width Modulation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F PWM: 7 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Pulse output width S2: Pulse output period D: Pulse output address

Description:
434. S1 is the pulse output width with a range of 0~32,767ms. S2 is specified as pulse output
period with a range of 1~32,767ms, where S1 ≦ S2.
435. D for all ELC controllers:
ELC ELC-PA, ELCB-PB ELC-PV, ELC2-PV ELCM-PH/PA,
ELC2-PA/PB/PH
/PE
Output point Y1 Y0, Y2, Y4, Y6 Y0 ~ Y3
436. For the ELC-PB, ELCB-PB models, The output specified in D cannot be the same as the
output used in a PLSY or PLSR instruction. The PWM instruction can only be used once in the
program.
437. When several pulse output instructions (PLSY, PWM, PLSR) enable same output point in the
same scan cycle, the ELC will perform the instruction which is executed first.
438. When S1≦0, S2≦0 or S1＞S2 , the ELC controller will fault (M1067 and M1068 will not be ON)
and no output will be generated from the pulse output instruction.. When S1 = S2, the pulse
output device will be ON continuously.
439. S1, S2 can be changed during the execution of PWM instruction.
440. For ELC-PA, ELCM-PH/PA, ELC2-PA/PB/PH/PE series, when M1070 = ON, the units for the
output pulses sent to Y1 are 100μs. When M1070 = OFF, the units are 1ms. When M1071 =
ON, the units for the output pulses sent to Y3 are 100μs. When M1070 = OFF, the units are
1ms.
441. For ELC-PV, ELC2-PV series, setting the time units for CH0 is determined by the contents of
D1371. Setting the time units for CH1 is determined by the contents of D1372.
442. For ELC-PA/PV, ELCM-PH/PA, ELC2-PA/PB/PH/PE/PV series, there is no limit on the
number of times this instruction can be used in the program. For ELC-PV, ELC2-PV series,

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3. Instruction Set

four instructions are allowed to be executed at the same time. For ELCM-PH/PA,
ELC2-PA/PB/PH/PE series, two instructions are allowed to be executed at the same time.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-325
3. Instruction Set

Program Example:
When X0=ON, the following pulses will be sent X0
PWM K1000 K2000 Y1
out Y1.
When X0=OFF, output Y1 will turn OFF. t=1000ms

Output Y1

T=2000ms

Note:
1. Flags and special registers for the ELC-PB/PA, ELCB-PB series controllers:
M1070:
Selecting the clock pulse units of Y1 for the PWM instruction (ON:100 us, OFF:
1ms)
2. Flags and special registers for ELC-PV, ELC2-PV series controllers:
M1010: When On, CH0, CH1, CH2 and CH3 will output pulses when the END instruction is
executed. Off when the output starts.
M1070:
The setting of time units for CH0 is determined by the contents of D1371.
M1071:
The setting of time units for CH1 is determined by the contents of D1372.
M1258: Reverse CH0 pulse output signals.
M1259: Reverse CH1 pulse output signals.
M1334: Pause CH0 pulse output.
M1335: Pause CH1 pulse output.
M1336: CH0 pulse output has been sent.
M1337: CH1 pulse output has been sent.
M1520: CH2 pulse output is paused.
M1521: CH3 pulse output is paused.
M1522: CH2 pulse output has been sent.
M1523: CH3 pulse output has been sent.
M1526: Reverse CH2 pulse output signals.
M1527: Reverse CH3 pulse output signals.
M1530:
M1530 = ON, the setting of time units for CH2 is determined by the contents of
D1373. When = Off, the time units are 1ms.
M1531:
M1531 = ON, the setting of time units for CH3 is determined by the contents of
D1374. When = Off, the time units are 1ms.
D1336: Low word of the current number of output pulses from CH0.

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3. Instruction Set

D1337: High word of the current number of output pulses from CH0.
D1338: Low word of the current number of output pulses from CH1.
D1339: High word of the current number of output pulses from CH1.
D1371: Time unit of CH0 output pulses when M1070 = On.
D1372: Time unit of CH1 output pulses when M1071 = On.
D1373: Time unit of CH2 output pulses when M1530 = On.
D1374: Time unit of CH3 output pulses when M1531 = On.
D1375: Low word of the current number of output pulses from CH2.
D1376: High word of the current number of output pulses from CH2.
D1377: Low word of the current number of output pulses from CH3.
D1378: High word of the current number of output pulses from CH3.
3. Flags and special registers for ELCM-PH/PA, ELC2-PA/PB/PH/PE series ELC:
M1070: Switching clock pulse of Y1 for PWM instruction (ON:100 us, OFF: 1ms)
M1071: Switching clock pulse of Y3 for PWM instruction (ON:100 us, OFF: 1ms)
D1032: Low word of the present value of Y1 pulse output
D1033 High word of the present value of Y1 pulse output
D1338: Low word of the present value of Y3 pulse output.
D1339: High word of the present value of Y3 pulse output.
4. Time unit settings for ELC-PV, ELC2-PV series:
You cannot modify M1070 in the program.
D1371, D1372, D1373 and D1374 determine the time units of the output pulses for CH0, CH1,
CH2 and CH3. The default setting is K1. If the value is not within range, the default value will be
used.
D1371, D1372, D1373, D1374 K0 K1 K2 K3
Time unit 10us 100us 1ms 10ms

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3. Instruction Set

API Mnemonic Operands Function

59 D PLSR S1, S2, S3, D Pulse Ramp
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F PLSR: 9 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DPLSR: 17 steps
S3 * * * * * * * * * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Maximum speed (Hz) S2: Number of pulses S3: Acceleration/Deceleration time (ms)
D: Pulse output address

Description: (ELC-PB/PA/PV, ELCB-PB, ELC2-PV)

443. S1: the maximum frequency (Hz) for the 16-bit instruction: 10 to 32,767 Hz. For the 32-bit
instruction: 10 to 200,000 Hz. The maximum speed must be multiples of 10, if not, the ones
digit will be discarded. 1/10 of the maximum speed is the maximum variation per accel/decel
step. Note: This condition meets acceleration requirements of a stepper motor and would not
result in stepper motor damage.
444. Range of S1 pulse output frequency:
Range of S1 pulse output frequency:
ELCB-PB ELC-PA ELC-PV, ELC2-PV
Y0：10~200,000Hz
Output
Y0：1~10,000Hz Y0：1~30,000Hz Y1：10~200,000Hz
frequency:
Y1：1~10,000Hz Y1：1~30,000Hz Y4：10~200,000Hz
Y6：10~200,000Hz
445. S2: Number of pulses for the 16-bit instruction: 110~32,767, For the 32-bit instruction:
110~2,147,483,647. The minimum value is 110.
446. S3: Acceleration/Deceleration time (ms). Set-points: below 5,000ms. The acceleration time
and the deceleration time are the same setting. For ELCB-PB series.

a) The accel/decel time must be larger than 10 times the maximum scan time ( D1012). If
the set-point is below this, the slope of the accel/decel may be inaccurate.

b) Minimum set-point of the accel/decel time can be obtained from the following equation.

90000

If the set-point is smaller than the result of the above equation, the accel/decel time will
be greater, and if the set-point is smaller than the 90000/ S1, the result value of 90000/ S1

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3. Instruction Set

will be treated as its regular set-point.

c) Maximum set-point of the accel/decel time can be obtained from the following equation.

818

d) The number of the accel/decel speed variation steps is fixed at 10 steps. If the input
acceleration/deceleration time is greater than the maximum set-point, the maximum
set-point will be treated as its regular set-point. If the set-point is smaller than the
minimum set-point, the minimum set-point will be treated as its regular set-point.
447. D for all series:
ELC ELC-PA, ELCB-PB ELC-PV, ELC2-PV
Output point Y0, Y1 Y0, Y2, Y4, Y6
448. The acceleration is performed when the pulses go from the static state to reaching its targeted
speed. Then it slows down the closer it gets to its targeted distance. The pulse will stop its
output once the targeted distance is reached.
449. When the PLSR instruction has been executed, its output frequency is first increased in
increments of 1/10 of the maximum frequency S1/10 and the time of each output frequency is
fixed at 1/9 of S3.
450. The output will not be affected if S1, S2 or S3 are changed when PLSR instruction is being
executed.
451. For ELC-PA, ELCB-PB series, when all the Y0 pulses have been sent, M1029 will be On;
when all the Y1 pulses have been sent, M1030 will be On. Next time when PLSR instruction is
enabled, M1029 or M1030 will be reset.
452. For ELC-PV, ELC2-PV series, when all the CH0 (Y0, Y1) pulses have been sent, M1029 will
be On; when all the CH1 (Y2, Y3) pulses have been sent, M1030 will be On; when CH2 (Y4,
Y5) pulses have been sent, M1036 will be On; when CH3 (Y6, Y7) pulses have been sent,
M1037 will be On. Next time when the PLSR instruction is enabled, M1029, M1030, M1036 or
M1037 will be reset.
453. For ELC-PV, ELC2-PV series, if the set value falls out of the allowable range of operands it will
be automatically corrected with the min. or max available value.
454. ELC-PV, ELC2-PV series has four groups of A-B phase pulse outputs CH0 (Y0, Y1), CH1 (Y2,
Y3), CH2 (Y4, Y5) and CH3 (Y6, Y7). See the remarks in API 57 PLSY for more information.
455. During the acceleration of each step, the pulse numbers (each frequency x time) may not all
be integer values, but the ELC controller only uses integer values for this operation. Therefore,
the time of each interval may have some deviation. The offset is determined by the frequency
value and by discarding the decimal point value. In order to ensure the output pulse values are
correct, the ELC will fill in pulses as needed to keep any deviation to a minimum.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-329
3. Instruction Set

456. For ELCB-PB series, PLSR instruction can be used twice in the program but the outputs
cannot be repeated.
457. For ELC-PV, ELC2-PV series, there is no limit on the number of times this instruction can be
used in the program. However, for ELC-PA series, two instructions can be executed at the
same time; for ELC-PV, ELC2-PV series, four instructions can be executed at the same time.

ELCM-PH/PA, ELC2-PA/PB/PH/PE controllers

458. The PLSR instruction performs a frequency ramp up/down process for positioning. The speed
ramp up process is activated between the static state and the target speed. The pulse output
continues at the target speed until it gets close to the target position. When it nears the target
position, the speed ramp down process begins, and the pulse output stops when the target
position is reached.
459. Set range of S1 pulse output frequency:

Output frequency range

Series ELC2-PB ELCM-PH/PA, ELC2-PA/PH/PE
Output Y0 ~ Y3 Y0, Y2 Y1, Y3
16-bit instruction 6~10,000Hz 6~32,767 Hz 6~10,000Hz
32-bit instruction 6~10,000Hz 6~100,000Hz 6~10,000Hz
460. When the output is specified as Y0, Y2, the start/end frequency of Y0 is set with D1340 and
the start/end frequency of Y2 is set with D1352.
461. When the output is specified as Y1, Y3, the start/end frequency is 0Hz.
462. The PLSR instruction supports two modes of pulse output per the table below.
Mode D1220 D1221
Output K0 K1 K0 K1
Y0 Pulse Pulse
Y1 Pulse Dir
Y2 Pulse Pulse
Y3 Pulse Dir
463. When using Y0 and Y2 in output mode Pulse, i.e. D1220 = K0, D1221 = K0, the available
range for S2 is 1~32,767 (16-bit instruction) and 1~2,147,483,647 (32-bit instruction).
464. When using Y0 and Y2 in output mode Pulse/Dir, i.e. D1220 = K1, D1221 = K1, the available
range for S2 is 1~32,767 or -1~-32,768 (16-bit instruction) and 1~2,147,483,647 or
-1~-2,147,483,648 (32-bit instruction)
465. When using outputs Y1 and Y3, the available range for S2 is 1~32,767 (16-bit instruction) and
1~2,147,483,647 (32-bit instruction).
466. S3: Ramp up/down time units: ms, min. 20ms. When using outputs Y1 and Y3, the value for the
ramp up and ramp down time are the same. When assigning outputs Y0 and Y2, and if:

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3. Instruction Set

M1534 = OFF (Y0) and M1535 = OFF (Y2), then the ramp up and ramp down times are the
same.

When M1534 = ON and M1535 = ON, S3 specifies the ramp up time only. The ramp down time
is specified by the value set in D1348 (Y0) and D1349 (Y2).
467. D for Y0, Y1, Y2, Y3.
468. When M1257 = OFF, the ramp up/down curve of Y0 and Y2 is a straight line. When M1257 =
ON, the ramp up/down curve will be an S curve.
469. The ramp up/down curve of Y1 and Y3 is a straight line.
470. The output will not be affected if S1, S2 or S3 are changed when the PLSR instruction is being
executed. The PLSR instruction must be stopped to change the S1, S2 or S3 values.
471. Pulse output status flags

Output Y0 Y1 Y2 Y3

Completion M1029 M1030 M1102 M1103

Pause M1078 M1079 M1104 M1105

a) When the pulse output on Y0/Y1 specified as Pulse/Dir (D1220 = K1) is complete, the
complete flag M1029 = ON.
b) When the pulse output on Y2/Y3 specified as Pulse/Dir (D1221 = K1) is complete, the
complete flag M1102 = On。
c) When the PLSR/DPLSR instruction is activated again, the complete flags will
automatically be reset.
472. During the ramp up process, the pulse numbers (frequency x time) of each speed shift may not
all be integer values, and the ELC will operates with integer values only. In this case, the
omitted decimal points will result in errors between each speed shift. To insure the correct
number of output pulses, the, ELC will fill in pulses as need to the last shift in order to correct
the deviation.
473. For ELCM-PH/PA series, there is no limit on the number of times this instruction can be used
in the program. However, only 4 instructions can be executed in the same scan. When several
pulse output instructions (PLSY, PWM, PLSR) use Y1 as the output device in the same scan
cycle, the ELC will execute the instructions in the order scanned.
474. If the set value falls out of the available range of operands, it will be automatically corrected
with the available min. or max value.

Program Example: (ELC-PA/PV, ELCB-PB, ELC2-PV)

475. When X0=ON, the maximum frequency of the PLSR instruction is 1,000Hz. D10 is the total
quantity of output pulses, the accel/decel time is 3,000ms and pulses are sent out Y0. The
output frequency changes 1,000/10 Hz each step. The frequency of each pulse is fixed at
3,000/9.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-331
3. Instruction Set

476. When X0 = OFF, the output will be interrupted, and when turned ON again, the pulses will
restart at zero.
X0
PLSR K1000 D10 K3000 Y0

Pulse speed(Hz)

Targeted speed: 10~30,000Hz

1010
9 9 The max. speed of the
8 8 one time speed variation
7 Output pulses7 is 1/10 of
6 6
10-step 10-step
5 variations variations
5
4 4
3 3
16-bit command:110~32,767PLS
2 32-bit command:110~2,147,483,647PLS
2
1 1
Time(Sec)
Accel time Decel time
below 5000ms below 5000ms

Program Example: (ELCM-PH/PA, ELC2-PA/PB/PH/PE)

477. When X0 = ON, the PLSR instruction sends pulses out Y0 with a target speed of 1000Hz, an
output pulse value of D10 and a ramp up/down time of 3000ms. The ramp up process begins
to increase 1000/20 Hz in every shift and every shift sends D10/40 pulses for 3000/20 ms.
478. When X0 = OFF, the output stops immediately and starts from the count value in D1030,
D1031 when PLSR is executed again.
479. Ramp up/down shifts for Y0, Y2: 20. Ramp up/down shifts for Y1, Y3: 10
X0
PLSR K1000 D10 K3000 Y0

Pulse speed(Hz)

Target speed:1000 Hz Frequency

20 20 increased/decreased
19 19 in every shift:
1000/20 Hz
... ...
7 Output pulses 7
6 6
20-shifts 20-shifts
5 5
4 4
3 3
16-bit instruction:1~32,767
2 32-bit instruction:1~2,147,483,647
2
1 1
Time(Sec)
Ramp up time Ramp down time
3000ms 3000ms

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3. Instruction Set

Note:
480. When the PLSR instruction is used in a program, the outputs used in the PLSR instruction
cannot be used in the PLSY instruction or PWM instruction.
481. When several pulse output instructions (PLSY, PWM, PLSR) use Y0 as the pulse output in the
same program, and if they are executed simultaneously in the same scan cycle, the ELC will
perform the instruction with the fewest step numbers.

Functions in ELC-PV, ELC2-PV series:

1. Relevant devices for the ELC-PV, ELC2-PV series:

X0
PLSR K1000 D10 K3000 Y0

2. The range of the pulse rate for this instruction is 10 ~ 200,000Hz. If the values of maximum
speed and acceleration/deceleration time exceeds the range, the ELC will operate with the
default value that is within the range.
Operand S1 S2 S3 D
Total number of
Explanation Max. frequency Accel/Decel time Output point
pulses
16-bit 10 ~ 32,767Hz 110 ~ 32,767
Range 1 ~ 5,000ms Y0 ~ Y7
32-bit 10 ~ 200KHz 110 ~ 2,147,483,647
K0: No output
Kn: Designated Flag: M1067, See settings of
Definition Kn: Designated
number M1068 D1220, D1221
frequency
Frequency F

Maximum speed: 10 ~ 200,000Hz

Total number of output pulses

F0 16-bit instruction: 110 ~ 32,767PLS

Start
frequency 32-bit instruction: 110 ~ 2,147,483,647PLS

Accel time Decel time

 1 ~ 5,000ms 1 ~ 5,000ms

3. The acceleration/deceleration of the PV series is based on the number of pulses. If the

output cannot reach the maximum acceleration frequency within the
acceleration/deceleration time, the instruction will automatically adjust the
acceleration/deceleration time and the maximum frequency.

4. The operands must be set before the execution of the instruction.

5. All acceleration/deceleration instructions are included with the brake function. The brake
function will be enabled when the ELC is performing acceleration and the switch contact is
turned Off. The deceleration will operate at the slope of the acceleration.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-333
3. Instruction Set

Frequency F

Original acceleration path

Brake path
S1

 Time T

Functions in ELCM-PH/PA, ELC2-PA/PB/PH/PE series:

482. Description on associated flags:

For M1029, M1030, M1102, M1103, M1078, M1079, M1104, M1105, M1538, M1539, M1540,
M1541, M1347, M1348, M1524, M1525, please refer to PLSY instruction for more
information.
M1108: Pause output Y0 pulses (ramp down). ON = pause, OFF = resume
M1109: Pause output Y1 pulses e (ramp down). ON = pause, OFF = resume
M1110: Pause output Y2 pulses (ramp down). ON = pause, OFF = resume
M1111: Pause output Y3 pulses (ramp down). ON = pause, OFF = resume
M1156: Enabling the mask and alignment mark function on I400/I401(X4) corresponding to
Y0.
M1257: Set the ramp up/down for Y0, Y2 to be “S curve.” ON = S curve, OFF = straight line
M1158: Enabling the mask and alignment mark function on I600/I601(X6) corresponding to
Y2.
M1534: Enable ramp-down time setting for Y0. Must be used with D1348
M1535: Enable ramp-down time setting for Y2. Must be used with D1349
483. Description of associated special registers:

For D1030~D1033, D1336~D1339, D1220, D1221, please refer to the PLSY instruction
D1026: M1156 = ON, D1026 stores the number of pulses for masking Y0 (LOW WORD).
D1027: M1156 = ON, D1026 stores the number of pulses for masking Y0 (HIGH WORD).
D1135: M1158 = ON, D1135 stores the number of pulses for masking Y2 (LOW WORD).
D1136: M1158 = ON, D1135 stores the number of pulses for masking Y2 (HIGH WORD).
D1232: The number of output pulses for ramp-down stop when Y0 mark sensor receives
signals. (LOW WORD).
D1233: The number of output pulses for ramp-down stop when Y0 mark sensor receives
signals. (HIGH WORD).
D1234: The number of output pulses for ramp-down stop when Y2 mark sensor receives

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3. Instruction Set

signals (LOW WORD).

D1235: The number of output pulses for ramp-down stop when Y2 mark sensor receives
signals (HIGH WORD).
D1348: M1534 = ON, D1348 stores the ramp-down time of the CH0(Y0, Y1) pulse output.
D1349: M1535 = ON, D1349 stores the ramp-down time of the CH1(Y2, Y3) pulse output.
D1340 Start/end frequency of the pulse output CH0 (Y0, Y1)
D1352 Start/end frequency of the pulse output CH1 (Y2, Y3)
484. Operation of Mark function on Y0:

Frequency

X4 external interrupt
Target
speed
Pulse num ber if no
external interrupt on X4
Start/end
freuquency
Time
D1340
D1348 Ramp-down time Pulse
Ramp-up number
time D1348 Ramp-down tim e

Ramp down pulse

number when Mark
is detected

a) When M1156 = ON, enable ramp-down pause on Y0 when X4 receives interrupt signal.
b) When Mark function is enabled, ramp down time is independent of the ramp up time.
Users can set the ramp up time in S3 and ramp down time in D1348. (Range:
20ms~32767ms)
c) When the PLSR instruction is executed, the ELC will automatically calculate the
minimum pulse number required for ramp down when Mark is detected, and store the
number of pulses in D1232~D1233
d) The number of ramp down pulses for the Mark function can be specified by users.
However, the specified number should be more than the number the ELC calculated for
the ramp-down time, otherwise the ELC will fill D1232~D1233 with the minimum Number
of pulses.
e) When the Mark signal is detected, M1108 = ON. The Y0 pulse output will pause during
the ramp down process.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-335
3. Instruction Set

f) Y0,Y2 relative parameters for Mask and Alignment Mark function:

Parameter Ramp Pulse number Pulse number
Input Output pause Pause
Mark flag down for masking for ramp-down
points (ramp down) status
Output time output of Mark function
Y0 M1156 X4 D1348 D1026, D1027 D1232, D1233 M1108 M1538
Y2 M1158 X6 D1349 D1135, D1136 D1234, D1235 M1110 M1540
g) Program example 1:
M0
SET M1156

DMOV K10000 D1232

M0
DPLSR K100000 K1000000 K20 Y0

FEND

M1000
I401 INCP D0

IRET

END

 When M0 is triggered, Y0 executes the pulse output. If an external interrupt is

detected on X4, the pulse output will execute the ramp down process for 10,000
pulses and then stop. M1108 will be ON to indicate the pause status (ramp down). If
no interrupt is detected, Y0 pulse output will stop after 1,000,000 pulses are
completed.
 When the pulse output ramps down and stops after the Mark is detected, M1538 will
be ON to indicate the pause status. If the remaining pulses need to be completed, set
the M1108 flag OFF and the pulse output will resume.

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3. Instruction Set

485. Operation of the Mask function on Y0:

Frequency
Y0 is masked from Y0 is ready for
interrupts on X4 interrupts from X4

Target
speed

Pulse num ber if no

external interrupt on X4
Start/end
frequency
Time
D1340
Pulse
number
Pulse to be masked, Ramp down time
Specified by D1026,D1027 (D1348)
(32bits) Ramp down pulse
number when M ark
is detected ( D1232~D1233 )

a) The Mask function is enabled when D1026 and D1027 contain values other than 0. The
Mask function is disabled when D1026 and D1027 contain a value of 0.
b) Program example 2:
M0
SET M1156

DMOV K50000 D1026

DMOV K10000 D1232

M0
DPLSR K100000 K1000000 K20 Y0

FEND

M1000
I401 INCP D0

IRET

END

 When M0 is triggered, the DPLSR instruction begins sending pulses out Y0.. When
an external interrupt is detected at X4 after 50,000 pulses have been sent, the pulse
output will perform the ramp down process for 10,000 pulses and then stop. M1108
will be ON. If no interrupt is detected at X4, pulses will continue to be sent out Y0
until 1,000,000 pulses have been sent, then it will stop..
 An interrupt triggered between 0 ~ 50,000 pulses will be invalid, i.e. no ramp-down
process will be performed before 50,000 pulses have been sent..

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-337
3. Instruction Set

API Mnemonic Operands Function

60 IST S, D1, D2 Manual/Auto Control
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F IST: 7 steps
S * * *
D1 *
D2 *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: The starting input address (Operand S will occupy 8 continuous addresses). D1 The smallest
number for the designated-status step point in auto mode. D2: The greatest number for the
designated-status step point in auto mode.

Description:
486. The IST is a convenient instruction made specifically for the initial state of the step function
control procedure.
487. ELCB-PB model, the range D1 and D2 = S20~S127 and D1 < D2. ELC-PA/PV and ELC-PV2
models, the range D1 and D2 = S20~S899 and D1 < D2. ELCM-PH/PA and
ELC2-PB/PH/PA/PE models, the range D1 and D2 = S20~S911 and D1 < D2.
488. IST instruction can only be used one time in a program.

Program Example 1:
M1000
IST X20 S20 S60

S: X20: Individual operation (Manual operation) X24: Continuous operation

X21: Zero point return X25: Zero point return start switch
X22: Step operation X26: Start switch
X23: One cycle operation X27: Stop switch
489. When the IST instruction is executed, the following special auxiliary relays will switch
automatically.
M1040: Movement inhibited S0: Manual operation/initial state step point
M1041: Movement start S1: Zero point return/initial state step point
M1042: Status pulse S2: Auto operation/initial state step point
M1047: STL monitor enable
490. When the IST instruction is used, S10~S19 are for the zero point return operation and the step
point of this state can’t be used as a general step point. However, when using S0~S9 step
points, S0 initiates “manual operation”, S1 initiates “zero point return operation” and S2

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3. Instruction Set

initiates “auto operation”. Thus, there should be three circuits of these three initial state step
points written first in the program.
491. When switching to S1 (zero point return mode), zero point return won’t take any action once
any of S10~S19 = ON.
492. When switching to S2 (auto operation mode), auto operation won’t take any action when S is
between D1 to D2 or if M1043=ON

Program Example 2:
The Robot arm control (using the IST instruction):
493. Control purpose: Select the big balls and small balls and move them to corresponding boxes.
Configure the control panel for each operation.
494. Motion of the Robot arm: lower robot arm, collect balls, raise robot arm, shift to right, lower
robot arm, release balls, raise robot arm, shift to left to finish motion in order.
495. I/O Device
Right-limit X2 Right-limit X3
Left-limit X1 (big balls) (small balls)
Y0

Upper-limit X4 Y3 Y2
Y1
Upper-limit X5
Big/small Big Small
sensor X0
496. Control panel

Power start Zero return X35 Auto start X36

Power stop Auto stop X37

Collect Raise Shift

balls robot arm to right Step X32

Zero return X31 One cycle

X20 X22 X24 operation X33
Release Lower Shift
balls robot arm to left Continuous
Manual
operation X30 operation X34
X21 X23 X25

a) Big/small sensor X0.

b) The left-limit of the robot arm X1, the right-limit X2 (big balls), the right-limit X3 (small balls),
the upper-limit X4, and the lower-limit X5.
c) Raise robot arm Y0, lower robot arm Y1, shift to right Y2, shift to left Y3, and collect balls Y4.
497. START circuit:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-339
3. Instruction Set

X0 X1 Y4
M1044
M1000
IST X30 S20 S80

498. Manual operation mode:

S0 X20
S SET Y4 Collect balls
X21
RST Y4 Release balls
X22 Y1
Y0 Raise robot arm
X23 Y0 Condition interlock
Y1 Lower robot arm
X24 X4 Y3
Y2 Shift to right Condition interlock
X25 X4 Y2 Raise robot arm to the
Y3 Shift to left upper-limit (X4 is ON)

499. Zero point return mode:

a) SFC figure:

S1
X35
S10 RST Y4 Release balls

RST Y1 Stop lowering robot arm

Raise robot arm to the
X4 Y0
upper-limit (X4 is ON)
S11 RST Y2 Stop shifting to right

Y3 Shift to left and shift to

X1 the left-limit (X1 is On)

S12 SET M1043 Start zero return completed flag

RST S12 Zero return operation completed

b) Ladder Diagram:

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3. Instruction Set

S1 X35
S SET S10 Enter zero return operation mode
S10
S RST Y4 Release balls

RST Y1 Stop lowering robot arm

Raise robot arm to the

Y0 upper-limit (X4 is ON)
X4
SET S11
S11
S RST Y2 Stop shifting to right

Y3
X1 Shift to left and shift to
SET S12 the left-limit (X1 is On)
S12
S SET M1043 Start zero return completed flag

RST S12 Zero return operation completed

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-341
3. Instruction Set

500. Auto operation (step/one-cycle/continuous operation modes):

a) SFC figure:

S2
M1041
M1044
S20 Y1

X5 X5
X0 X0
S30 SET Y4 S40 SET Y4

TMR T0 K30 TMR T1 K30

T0 T1
X4 X4
S31 Y0 S41 Y0
X4 X4
X2 X3
S32 Y2 S42 Y2
X2 X3
X5
S50 Y1
X5
S60 RST Y4

TMR T2 K30
T2
X4
S70 Y0
X4
X1
S80 Y3
X1

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3. Instruction Set

b) Ladder Diagram:
S2 M1041 M1044
S SET S20 Enter auto operation mode
S20
S Y1 Lower robot arm
X5 X0
SET S30
X5 X0
SET S40
S30
S SET Y4 Collect balls

TMR T0 K30
T0
SET S31
S31 X4
Raise robot arm to the
S Y0 upper-limit (X4 is ON)
X4
SET S32
S32 X2
S Y2 Shift to right
X2
SET S50
S40
S SET Y4 Collect balls

TMR T1 K30
T1
SET S41
S41 X4
S Y0 Raise robot arm to the
upper-limit (X4 is ON)
X4
SET S42
S42 X3
S Y2 Shift to right
X3
SET S50
S50 X5
S Y1 Lower robot arm
X5
SET S60
S60
S RST Y4 Release balls

TMR T2 K30
T2
SET S70
S70 X4
S Y0 Raise robot arm to the
upper-limit (X4 is ON)
X4
SET S80
S80 X1
S Y3 Shift to left and shift to
the left-limit (X1 is On)
X1
S2

RET

END

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-343
3. Instruction Set

Flag explanation:

M1040:
Step point movement disabled. When M1040=ON, all movements of the step point are disabled.
501. Manual operation mode: M1040 = ON.
502. Zero point return mode/one cycle operation mode: Pressing the STOP button and pressing
START button again, M1040 = ON.
503. Step operation mode: M1040 = ON, and will only be OFF when the START button is
pressed.
504. Continuous operation mode: When ELC goes from STOP→RUN, M1040 = ON, and will be
OFF when the START button is pressed.

M1041:
Step point movement start. the special auxiliary relay that reflects the movement of the primary step
point (S2) to the next step point.
505. Manual operation mode/Zero point return mode: M1041 = OFF.
506. Step operation mode/One cycle operation mode: M1041 = ON when the START button is
pressed.
507. Continuous operation mode: Stays ON when the START button is pressed, and turns OFF
when the STOP button is pressed.

M1042:
START pulse: Only once pulses will be sent out when the button is pressed.

M1043:
Zero point return complete: Once M1043 =ON, indicates that the RESET motion has been
executed.

M1044:
Conditions of the origin: In continuous operation mode, conditions of the origin, M1044= ON to
execute the initial step point (S2) moving to the next step point.

M1045:
All output reset inhibit. If executing conditions:
508. From manual control S0 to zero point return S1
509. From auto operation S2 to manual operation S0
510. From auto operation S2 to zero point return S1
a) When M1045=OFF and one of S of D1~D2 is ON, step point of SET Y output and actions
will be cleared to OFF.
b) When M1045 =ON, SET Y output will be reserved, and step point during action will be

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3. Instruction Set

cleared to OFF.
c) If executing from zero point return S1 to manual operation S0, no matter if M1045=ON or
M1045=OFF, SET Y output will be reserved, and step point action will be cleared to OFF.

M1046:
When STL action = ON: If one of step point S is ON, M1046=ON. After M1047 = ON, M1046 = ON
once one of S is ON. Besides, 8 prior points numbers is ON of step point S will be recorded in
D1040~D1047.

M1047:
STL monitor enabled. When IST instruction starts executing, M1047 will be forced to be ON and it
will be forced to ON for each scan time once IST instruction is still ON. This flag is used to monitor
all S.

D1040~D1047:
ON state number 1-8 of step point S.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-345
3. Instruction Set

API Mnemonic Operands Function

61 D SER P S1, S2, D, n Search a Data Stack
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F SER, SERP: 9 steps
S1 * * * * * * *
S2 * * * * * * * * * * * DSER, DSERP: 17 steps
D * * * * * *
N * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Starting source address S2: Compare value D: Starting destination for storing compared
result (occupies 5 continuous addresses) n: Number of addresses to compare

Description:
511. S1 specifies the starting address of the registers to compare, n specifies how many registers to
compare to the value specified by S2, and the compare result is stored in destination registers
specified by D.
512. D stores the total of the matched results; D+1 stores the address number of the first matched
result; D+2 stores the address number of the last matched result; D+3 stores the address
number of the smallest value; D+4 stores the address number of the largest value.
513. If the 32-bit instruction is used, operands S1, S2, D, n will reference 32-bit registers.
514. If operand S2 uses index F, only 16-bit instruction is available
515. The range of operand n: n=1~256 (16-bit instruction), n=1~128 (32-bit instruction)

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3. Instruction Set

Program Example:
516. When X0=ON, the data stack D10~D19 is compared against D0 and the result is stored in
D50~D54. If there are no equal values, the contents of D50~D52 will be 0.
517. The offset into the data file of the largest value of all compared data will be stored in D54 and
the offset into the data file of the smallest value of all compared data will be stored in D53.
When there are more then one largest value and/or smallest value, only the last location in the
data file will be recorded for each. For example, if there were a K5 in D17 and D18 in the table
below, the value stored in D53 will be 8 instead of 7. This is because the last occurance of the
smallest value in this case is in position 8 in the data file.
X0
SER D10 D0 D50 K10

Content Compare Data Content

S1 Result D Explanation
value data number value

D10 88 0 D50 4 The number of matches found

S2 The offset into the file where the

D11 100 1 Equal D51 1
first match is located
n
The offset into the file where the
D12 110 2 D52 8
last match is located

D0=K100 3 The offset into the file where the

D13 150 D53 7
smallest value is located

The offset into the file where the

D14 100 4 Equal D54 9
largest value is located

D15 300 5

D16 100 6 Equal

D17 5 7 Smallest

D18 100 8 Equal

D19 500 9 Largest

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-347
3. Instruction Set

API Mnemonic Operands Function

62 D ABSD S1, S2, D, n Absolute Drum Sequencer
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F ABSD: 9 steps
S1 * * * * * * *
S2 * * * DABSD: 17 steps
D * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Starting address of the data compare file S2: Counter number D: Starting address of
compare result n: Groups of multi-step comparison (n=1~64)

Description:
518. The ABSD instruction creates various output wave forms according to the current value of the
counter designated by S2. The instruction is typically used for absolute cam control
applications.
519. S2 of DABSD specifies a high-speed, 32-bit counter. However, when the current value of the
high-speed counter is compared against the set-point value, the result cannot happen
immediately, because it is influenced by the scan time. If an immediate output is required, use
the DHSZ instruction.
520. When operand S1 uses KnX, KnY, KnM or KnS, where n=4 only a 16-bit instruction can be
used. Use K8 for the 32-bit instruction.

Program Example:
521. Before executing the ABSD instruction, preload the set-point values into D100~D107. The
contents of the even number D register is the lower-limit value and the contents of the odd
number D register is the upper-limit value.
522. When X20=ON, the current value of counter C10 is compared against the upper and
lower-limit values of D100~D107 (four groups). The compared result is displayed in M10~M13.
523. When X20=OFF, the origin ON/OFF state of M10~M13 will be unchanged.
X20
ABSD D100 C10 M10 K4
C10 X21
RST C10

X21
CNT C10 K400

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3. Instruction Set

524. M10~ M13 = ON when the current value of C10 is equal to or greater than the lower-limit value
and equal to or less than the upper-limit value.
Lower-limit value Upper-limit value Current value of C10 Output

D100= 40 D101=100 40≦C10≦100 M10=ON

D102=120 D103=210 120≦C10≦210 M11=ON

D104=140 D105=170 140≦C10≦170 M12=ON

D106=150 D107=390 150≦C10≦390 M13=ON

525. When the lower-limit value is greater than the upper-limit value, if the current value of C10 is
greater than the lower-limit value (C10>140) and less than the upper-limit value (C10<60),
M12=ON.
Lower-limit value Upper-limit value Current value of C10 Output

D100= 40 D101=100 40≦C10≦100 M10=ON

D102=120 D103=210 120≦C10≦210 M11=ON

D104=140 D105= 60 60≦C10≦140 M12=OFF

D106=150 D107=390 150≦C10≦390 M13=ON

40 100

M10
120 210

M11

60 140

M12
150 390
M13

0 200 400

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-349
3. Instruction Set

API Mnemonic Operands Function

63 INCD S1, S2, D, n Incremental drum sequencer
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F INCD: 9 steps
S1 * * * * * * *
S2 *
D * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Starting address of the compare data table S2: Counter number D: Starting address of
compare result n: Groups of multi-step comparison (n=1~64)

Description:
526. The INCD instruction is a multi-step comparison instruction and is typically used for relative
cam control.
527. The current value of S2 is compared against the set-point values of S1, one at a time.. Once the
current value is equal to the present set-point value, the current value of S2 will be reset to 0
and be compared again. The total number of equal comparisons is stored in S2+1.
528. When the comparison of n groups of data has been completed, the execution complete flag
M1029 = ON for one scan cycle.
529. When operand S1 is specified as KnX, KnY, KnM or KnS, n=4 must be used.
530. In 16-bit instructions, operand S2 must be C0~C198 and will occupy 2 consecutive counters.
531. Flag: M1029 is the execution complete flag.

Program Example:
532. Before executing the INCD instruction, preload the set-point values into D100~D104 in
advance. D100=15, D101=30, D102=10, D103=40, D104=25.
533. The current value of counter C10 is compared against the set-point values of D100~D104, one
at a time. Each time the current value is equal to the current set-point value, the current value
of C10 will be reset to 0 and will be compared again. Meanwhile C11 keeps a count of the
number of equal comparisons..
534. When the content of C11 increments by 1, M10~M14 will also change. The state of each of
these bits indicates where in the compare cycle the instruction is. Refer to the timing diagram
below.
535. When the comparison of 5 groups of data has been completed, the execution completed flag
M1029 = ON for one scan cycle.

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3. Instruction Set

536. When X0 turns from ON →OFF, C10 and C11 will both be reset to 0 and M10~M14 =OFF.
When X0 turns ON again, this instruction will be executed again.

X0 M1013
CNT C10 K100

INCD D100 C10 M10 K5

X0
40
30 30
25
C10 15 15 15
10
Current value
4
C11 3
1 2
Current value 0 0 1 0 1

M10

M11

M12

M13

M14

M1029

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-351
3. Instruction Set

API Mnemonic Operands Function

64 TTMR D, n Alternate Timer

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F TTMR: 5 steps
D *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Device number for storing the ON time of the input n: Multiple set-points (n=0~2)

Description:
537. The ON time of the external switch is measured and stored in D +1. The units are 100ms
increments.
538. n determines the units for D. When n=0, D is in seconds. When n=1, D is in 100ms
increments.. When n=2, D is in 10ms increments.
539. Operand D occupies 2 consecutive registers.
540. ELC-PA, ELCM-PH/PA, ELC2-PB/PH/PA/PE: The TTMR instruction can only be used eight
times in a program.

Program Example 1:
541. The On duration of X0 is stored in D1 in 100ms increments. n is used to specify the units for
the On duration of X0 stored in D0. Then the switch can be used to adjust the set-point value
of a timer, for example.
542. When X0 = OFF, the contents of D1 will be reset to 0 but the contents of D0 is unchanged.
X0
TTMR D0 K0

D1
D0
D1
D0

T T
pushed time (sec) pushed time (sec)

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3. Instruction Set

543. If the ON duration of X0 is T seconds, the relationship between D0, D1 and n are shown as the
table below.

n D0 D1(unit: 100 ms)

K0 (unit: s) 1×T D1=D0×10

K1 (unit: 100 ms) 10×T D1=D0

K2 (unit: 10 ms) 100×T D1=D0/10

Program Example 2:
544. Using the TTMR instruction write preset values to 10 timers.
545. Write the preset values for timers T0-T9 to D100~D109. Use the thumbwheel switch wired to
X0-X4 to determine which timer’s preset to set..
546. T0~T9 are 100ms timebase timers. So, we will want the time values measured with the TTMR
instruction to also be in 100ms increments, because these values will be moved to the presets
for timers T0-T9.
547. Connect a single digit thumbwheel switch to X0~X3 and use the BIN instruction to convert the
set-point value of the switch to a BIN value and move it to the index register E. This allows the
thumbwheel switch to determine the timer number to move a new preset values to.
548. The ON duration (in 100ms increments) of X20 is stored in D200.
549. M0 is a pulse for one scan cycle generated when the alternate timer button X20 is released.
550. Use the set-point number of the thumbwheel switch as the pointer for index register E. Then
move the new preset value to the appropriate timer. If E=0, the contents of D200 is moved to
the preset for timer T0 (D100). If E=1, the contents of D200 is moved to the preset for timer T1
(D101) and so on.
M10
TMR T0 D100
M11
TMR T1 D101

M19
TMR T9 D109
M1000
BIN K1X0 E
X20
TTMR D200 K1
X20
PLF M0

M0
MOV D200 D100E

Note:
ELC-PA, ELCM-PH/PA, ELC2-PB/PB/PA/PE models, can only use the TTMR instruction eight times

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-353
3. Instruction Set

in a program. If used in a CALL subroutine or interrupt subroutine, it only can be use once.

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3. Instruction Set

API Mnemonic Operands Function

65 STMR S, m, D Special Timer
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F STMR: 7 steps
S *
m * *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Timer number m: Set-point value of the timer (m=1~32,767), units in 100ms
D: Starting address of the results (occupies 4 continuous bits)

Description:
551. The STMR instruction can be used for OFF-delay, ON/OFF triggering, or as a flashing circuit.
552. The timer number (S) specified by STMR instruction can be used only once.
553. Range of S: ELC-PA T0 ~ T191; ELC-PV T0 ~ T199; ELCM-PH/PA, ELC2-PB/PA/PE/PV T0 ~
T183

Program Example:
554. The preset value of timer T0 is 5 seconds.
555. Y0 is the OFF-delay output :

a) When X20 turns from OFF →ON, Y0= ON.

b) When X20 turns ON→OFF after a delay 5 seconds, Y0=OFF.

c) When X20 turns from ON→OFF, Y1= ON for 5 seconds, then turns Off.

d) When X20 turns from OFF→ON, Y2=ON for 5 seconds, then turns Off.

e) When X20 turns from OFF→ON, Y3=ON after a 5 second delay.

f) When X20 turns from ON→OFF, Y3=OFF after a 5 second delay.

X20
STMR T0 K50 Y0

X20

Y0 5 sec 5 sec

Y1 5 sec 5 sec

Y2 5 sec

Y3 5 sec

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-355
3. Instruction Set

g) Add a b contact addressed with Y3 (LDI Y3) in series with contact X20. Then Y1 and
Y2 can be used for a flash circuit. Y1 and Y2 will alternate, each on for 5 seconds, then
off for 5 seconds. When X20 turns OFF, Y0, Y1 and Y3 = OFF and the content of T10 will
be reset to 0.

X20 Y3
STMR T10 K50 Y0

X20

Y2 5 sec 5 sec

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3. Instruction Set

API Mnemonic Operands Function

66 ALT D Alternate ON/OFF

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F ALT, ALTP: 3 steps
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Destination address

Description:
556. The status of the destination address (D) alternates between on and off with each transition of
the ALT instruction..
557. This toggling of D will occur every program scan unless the pulse option P is used with this
instruction..
558. The ALT instruction is ideal for switching between two modes of operation e.g. start and stop,
ON and OFF etc.
559. This instruction should be used as a pulse instruction (ALTP)

Program Example 1:
When X0 turns from OFF →ON for the first time, Y0=ON. When X0 turns from OFF →ON for the
second time, Y0=OFF.
X0
ALTP Y0

Program Example 2:
When X20= ON, T0 will generate a pulse every two seconds and output Y0 will toggle between on
and off every 2 seconds..

X20 T0
TMR T0 K20

T0
ALTP Y0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-357
3. Instruction Set

API Mnemonic Operands Function

67 RAMP S1, S2, D, n Ramp variable Value

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F RAMP: 9 steps
S1 *
S2 * DRAMP: 17 steps
D *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Starting set-point of ramp signal S2: Ending set-point of ramp signal D: Current value of
ramp signal n: Scan times (n=1~32,767)

Description:
560. This instruction creates a ramp output. The linearity of the ramp depends on a consistent
program scan time. Therefore, set the scan time to a fixed time prior to using this RAMP
instruction. This can be done by setting the constant scan mode bit M1039 and the constant
scan time register D1039 (ms).
561. When the RAMP instruction is executed, the ramp signal will ramp from S1 to S2. The Current
value of the ramp signal is stored in D. D+1 stores the current number of accumulated scans.
When ramp signal reaches S2, or when the conditions preceding the RAMP instruction turn
OFF, the contents in D varies according to the setting of M1026 which is explained later in
Points to note.
562. When n specifies a D register, the value in D cannot be modified during the execution of the
instruction. The contents of D can only be modified when the instruction is stopped.
563. In ELC-PV, DRAMP only supports version 1.4 and above.

Program example:
564. Before executing the instruction, first set bit M1039 = ON to fix the scan time and move a value
in ms into the constant scan time register D1039. Assume 30 was moved into D1039, which
fixes the scan time at 30ms. If n = K100, the time for D10 to increase to D11 will be 3 seconds
(30ms × 100).
565. When X20 turns OFF, the instruction will stop execution. When X20 goes ON again, the
content in D12 and D13 will be reset to 0.
566. When M1026 = OFF, the RAMP instruction will operate continuously. The ramp complete bit
(M1029) will turn on for one scan at the end of each ramp cycle and the contents of D10 will be
moved into D12 for the start of the next ramp cycle. When M1026 = ON, the RAMP

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3. Instruction Set

instruction will operate for one ramp cycle and stop. When X20 turns off, then on again, the
contents of D10 will be moved into D12 and the next ramp cycle will execute. Each time the
instruction completes a ramp cycle, the ramp complete bit M1029 will turn on. M1029 will reset
when X20 turns off.
567. Set the Start and End of ramp signal in D10 and D11. When X20 = ON, D10 increases towards
D11, the current value of the ramp is stored in D12 and the number of current scans is stored
in D13.
X20
RAMP D10 D11 D12 K100

568. If X20 = ON,

D11
D10
D12
D12
D11

D10

n times scans n times scans

D10<D11 D10>D11
Scan time is stored in D13

Points to note:
The ramp cycles of D12 based on the state of M1026:

M1026=ON M1026=OFF

X20 Starting signal X20 Starting signal

D11
D11
D12 D12
D10 D10

M1029 M1029

API Mnemonic Operands Function

68 DTM S1, D, m, n Data Transform and Move

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F DTM: 9 steps
S *
D *
m * * *
n * * *
ELCB ELC ELC2 ELCM

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-359
3. Instruction Set

PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Starting address of the source data stack D: Starting address of the destination data stack
m: Transformation mode n: Length of the source data stack

Description:
1. Operand m, the Transformation Mode can use any of the following data types: K, H, D. If the
value is not in the available range, no transformation or move operation will be executed and
no error will occur. The available range for m is K1-K19.
2. K, H, D data types can also be used for operand n, which determines the length of the source
data stack. The range for n is K1~K256. If the value is out of range, the ELC will take the max
value (256) or the min value (1) and use it for operand n.
3. The DTM instruction modes set in operand m:

k0: Transform 8-bit data into 16-bit data (Hi-byte, Lo-byte) in the following format:

Hi-byte Lo-byte
 Hi-byte Lo-byte
  
  


k1: Transform 8-bit data into 16-bit data (Lo-byte, Hi-byte) in the following format:

Hi-byte Lo-byte

 Hi-byte Lo-byte
  
  


k2: Transform 16-bit data (Hi-byte, Lo-byte) into 8-bit data in the following format:

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3. Instruction Set

Hi-byte Lo-byte

Hi-byte Lo-byte 
  
  


k3: Transform 16-bit data (Lo-byte, Hi-byte) into 8-bit data in the following format:

Hi-byte Lo-byte
Hi-byte Lo-byte 
  
  


k4: Transform 8-bit HEX data into ASCII data (higher 4 bits, lower 4 bits) in the following format:

Hi-byte Lo-byte

Hi-byte Lo-byte H
 L
 H
 L
H
L

k5: Transform 8-bit HEX data into ASCII data (lower 4 bits, higher 4 bits) in the following format:

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3. Instruction Set

Hi-byte Lo-byte

Hi-byte Lo-byte L
 H
 L
 H
L
H

k6: Transform 8-bit ASCII data (higher 4 bits, lower 4 bits) into HEX data in the following format:
(ASCII value to be transformed includes 0 ~ 9 (0x30~0x39), A ~ F (0x41~0x46), and a ~ f
(0x61~0x66).)

Hi-byte Lo-byte
 Hi-byte Lo-byte
  
  


k7: Transform 8-bit ASCII data (lower 4 bits, higher 4 bits) into HEX data in the following format:

Hi-byte Lo-byte

 Hi-byte Lo-byte
  
  


K8: Transform 8-bit GPS data into 32-bit floating point data in the following format:

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3. Instruction Set

Hi-byte Lo-byte
32bit Floating (S+4=H4E )
S+0 dd
dd.mm1mm2 mm3 D+0
S+1 mm1
mm2 32bit Floating (S+4 != H4E )
S+2
S+3 mm3 –dd.mm1mm2 mm3 D+0
S+4 4E
S+5 dd1
S+6 dd0
32bit Floating (S+10=H45)
S+7 mm1
dd1dd0.mm1mm2mm3 D+2
S+8 mm2
S+9 mm3 32bit Floating (S+10 != H45)

S+10 45 –dd1dd0.mm1mm2mm3 D+2

K9: Calculate the optimal frequency for the positioning instructions with the ramp up/ down
function.
Only the total number of pulses need to be set up for positioning with the total time for
positioning first. The DTM instruction will automatically calculate the optimal max output
frequency as well as the optimal start frequency for positioning instructions with
ramp-up/down function such as PLSR, DDRVI and DCLLM.

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3. Instruction Set

Points to note:
 When the calculation results exceed the max frequency of the ELC, the output
frequency will be set as 0.
 When the total of ramp-up and ramp-down time exceeds the total time for operation,
the ELC will change the total time for operation (S+2) into “ramp-up time (S+3) +
ramp-down time (S+4) + 1” automatically.
 Description of the operands:

S+0, S+1: Total number of pulses (32-bit value)

S+2: Total time for operation (unit: ms)

S+3: Ramp-up time (unit: ms)

S+4: Ramp-down (unit: ms)

D+0, D+1: Optimal max output frequency (unit: Hz) (32-bit)

D+2: Optimal start frequency (Unit: Hz)

n: Reserved

K11: Conversion from Local Time to Local Sidereal Time

Unlike the common local time defined by time zones, local sidereal time is calculated based on
actual longitude. The conversion helps the user obtain the more accurate time difference of
each location within the same time zone.

Explanation on operands:

S+0, S+1: Longitude (32-bit floating point value; East: positive, West: negative)

S+2: Time zone (16-bit integer; unit: hour)

S+3~ S+8: Year, Month, Day, Hour, Minute, Second of local time (16-bit integer)

D+0~D+5: Year, Month, Day, Hour, Minute, Second of the converted local sidereal time (16-bit
integer)

n: Reserved

Example:
Input: Longitude F121.55, Time zone: +8, Local time: AM 8:00:00, Jan/6/2011
Conversion results: AM 8:06:12, Jan/6/2011

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3. Instruction Set

K12: Proportional Value Calculation Function of Multi-point Areas (16-bit values)

Explanation on operands (16-bit values):

S: input value

S+1, S+2….. S+n: set values of multi-point areas. S+1 must be the minimum value, S+2 must
be larger than S+1 and so on. Therefore, S+n must be the maximum value.

D: output value gotten from the proportional value calculation

D+1, D +2 … D+n: the range of values gotten from the proportional value calculation

n: set values of multi-point areas. The range of set values is K2~K50. When the set value
exceeds the range, it will not be executed.

The sample curve: (n is set to be K4)

D+1
D
D+2

D+4
D+3

S
S+1 S+2 S+3 S+4

The explanation of the sample:

1. When input value S is larger than S+1 (S1 for short) and smaller than S+2 (S2 for short),
D+1 (D1 for short) and D+2 (D2 for short), D= ( ( S – S1) x ( D2 – D1 ) / ( S2 – S1 ) ) + D1.
2. When input value S is smaller than S+1, D= D+1; when input value S is larger than S+n,
D= D+n.
3. The operation of instructions uses floating-point values. After the decimal value of the
output values is omitted, the value will be output in the 16-bit form.

K13: Proportional Value Calculation Function of Multi-point Areas (32-bit values)

The explanations of source and destination devices are illustrated as the explanation of K12,
but devices S and D are indicated by 32-bit values.

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3. Instruction Set

K14: Proportional Value Calculation Function of Multi-point Areas (floating-point values)

The explanations of source and destination devices are illustrated as the explanation of K12,
but devices S and D are indicated by 32-bit floating-point values.

K16: String combination

Explanation:

The system searches for the location of ETX (value 0x00) of the destination data string (lower
8 bits), then copies the data string starting of the source register (lower 8 bits) to the end of the
destination data string. The source data string will be copied in byte order until the ETX (value
0x00) is reached.

Points to note:

The operand n sets the max data length after the string combination (max 256). If the ETX is
not reached after the combination, the location indicated by n will be the ETX and filled with
0x00.

The combination will be performed in the following rule:

Hi-byte Lo-byte

S+0 ‘A’
S+1 ‘B’ Hi-byte Lo-byte

S+2 ‘C’ D+0 ‘a’

S+3 ‘D’ D+1 ‘b’

S+4 0x00 D+2 ‘c’

D+3 ‘A’
D+4 ‘B’
Hi-byte Lo-byte
D+0 ‘a’ D+5 ‘C’

D+1 ‘b’ D+6 ‘D’

D+2 ‘c’ D+7 0x00

D+3 0x00

K17: String capture

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3. Instruction Set

Explanations:
The system copies the source data string (lower 8 bits) with the data length specified by
operand n to the destination registers, where the n+1 register will be filled with 0x00. If value
0x00 is reached before the specified capture length n is completed, the capture will also be
ended.

The capture will be performed in the following rule:

Hi-byte Lo-byte
S+0 ‘a’
S+1 ‘b’ Hi-byte Lo-byte

S+2 ‘c’ D+0 ‘a’

n = k3
S+3 ‘A’ D+1 ‘b’

S+4 ‘B’ D+2 ‘c’

S+5 ‘C’ D+3 0x00
S+6 ‘D’
S+7 0x00

K18: Convert data string to floating point value

Explanations:

The system converts n words (lower 8 bits) of the source data string (decimal point is not
included) to floating point value and stores the converted value in the destination device.

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3. Instruction Set

Points to note:
1. Operand n sets the number of total digits for the converted floating value. Max 8 digits are
applicable and the value over n digit will be omitted. For example, n = K6, data string
“123.45678” will be converted to “123.456”.
2. When there are characters other than numbers 0~9 or the decimal point in the source data
string, the character before the decimal point will be regarded as 0, and the value after the
decimal point will be regarded as the ETX.
3. If the source data string contains no decimal point, the converted value will be displayed
by a n-digit floating point value automatically.

The conversion will be performed in the following rule:

Hi-byte Lo-byte
S+0 ‘1’
S+1 ‘2’
S+2 ‘3’
32-bit Floating value
S+3 ‘.’ D+0
123.456
S+4 ‘4’ D+1

S+5 ‘5’
S+6 ‘6’
S+7 0x00

K19: Convert floating point value to data string

Explanations:

The system converts the floating point value in the source device S to data string with
specified length n (decimal point is not included).

Points to note:
1. Operand n sets the number of total digits for the floating point value to be converted. Max
8 digits are applicable and the value over n digit will be omitted. For example, n = K6,
floating value F123.45678 will be converted to data string “123.456”.
2. When the digits of source value are more than the specified n digits, only the n digits from
the left will be converted. For example, source value F123456.78 with n=K4 will be
converted as data string "1234”.
3. If the source value is a decimal value without integers, e.g. 0.1234, the converted data
string will be “.1234” where the first digit is the decimal point.

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3. Instruction Set

The conversion will be performed in the following rule:

Hi-byte Lo-byte

D+0 ‘1’
D+1 ‘2’
D+2 ‘3’
32-bit Floating value n = k6
S+0 D+3 ‘.’
123.45678
S+1 D+4 ‘4’
D+5 ‘5’
D+6 ‘6’
D+7 0x00

Program Example1: m = K2, m = K4

1. When M0 = ON, transform 16-bit data in D0, D1 into ASCII data in the following order: H byte –
L byte – H byte – Low byte, and store the results in D10 ~ D17.

M0
DTM D0 D2 K2 K2

DTM D2 D10 K4 K4

2. Value of source data D0, D1:

Value H1234 H5678

st
3. When the 1 DTM instruction executes, the ELC transforms the 16-bit data (Hi-byte, Lo-byte)
into 8-bit data and moves it to registers D2~D5.

Value H12 H34 H56 H78

nd
4. When the 2 DTM instruction executes, the ELC transforms the 8-bit HEX data into ASCII
data and moves it to registers D10~D17.

Register D10 D11 D12 D13 D14 D15 D16 D17

Value H0031 H0032 H0033 H0034 H0035 H0036 H0037 H0038

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-369
3. Instruction Set

Program Example 2: m = K9
569. Set up the total number of pulses, total time, ramp-up time and ramp-down time in the source
starting with D0. Execute the DTM instruction and the optimal max frequency as well as
optimal start frequency can be obtained and executed by the positioning instructions.
570. Assume the source data is set up per the following:
Total Pulses Total Time Ramp-up Time Ramp-down Time
D0, D1 D2 D3 D4
K10000 K200 K50 K50

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3. Instruction Set

571. The optimal positioning results can be obtained below:

Max frequency Start frequency
D10, D11 D12
K70000 K3334

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3. Instruction Set

API Mnemonic Operands Function

69 D SORT S, m1, m2, D, n Data sort
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F SORT: 11 steps
S *
m1 * * DSORT: 21 steps
m2 * *
D *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting address of source data m1: The number of sort data groups (m1 =1~32) m2: The
number of columns for the data (m2 =1~6) D: Starting address for storing the sort data n: Present
column of the sort data matrix (n=1~ m2)

Description:
572. The sorted data is stored in the m1 × m2 table of registers beginning with D. If devices S and D
specify the same register, the resulting sorted data will be the same as the contents of source
device S.
573. Once the SORT instruction has completed, the Flag M1029 (Execution complete flag) = ON.
574. There is no limit to the number of times this instruction may be used in the program. However,
only one instruction can be executed at a time
575. In ELC-PV, DSORT only supports version 1.4 and above.
576. The function of sorting one-dimensional data is added. If m1 is 1, and m2 is 1, the function will
be enabled, and the operand n represents the number of data (n=1~32). The data in n devices
starting from the operand S are sorted. The sort result is stored in the devices starting from the
operand D. It takes one scan cycle for the data to be sorted. After the data is sorted, M1029
will be On. This function supports ELC2-PB/PH/PA/PE/PV, ELCM-PH/PAV2.0.

Program Example:
577. When X0 = ON, it starts to sort the specified data. After the data sort is complete, M1029= ON.
During the execution of the SORT instruction, data being sorted should not be changed. If the
sort data needs to be changed the SORT instruction should be turned OFF, modify the data,
then turn SORT instruction back on.
X0
SORT D0 K5 K5 D50 D100

578. The tables below show how the matrix is established and how the data is sorted in numerical
order in the selected column, based on the column number specified in D100. The first sort

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3. Instruction Set

table below using D0-D24 must be entered by the user. When a number from 1-5 for this
example is written to D100, that column will be sorted numerically in the matrix formed by
D50-D74. All data will be moved properly to the output matrix (D50-D74), but only the data in
the selected column will be sorted into numerical order. All other data in the destination matrix
will be placed in the proper position based on the data order in the selected column.

Example table of data sort

Data numbers: m2

Data Column

Column 1 2 3 4 5

Students
English Math. Physics Chemistry
Row No.

1 （D0）1 （D5）90 （D10）75 （D15）66 （D20）79

Data numbers: m1

2 （D1）2 （D6）55 （D11）65 （D16）54 （D21）63

3 （D2）3 （D7）80 （D12）98 （D17）89 （D22）90

4 （D3）4 （D8）70 （D13）60 （D18）99 （D23）50

5 （D4）5 （D9）95 （D14）79 （D19）75 （D24）69

579. Sort data table when D100=K3

Data numbers: m2

Data Column

Column 1 2 3 4 5

Students
English Math. Physics Chemistry
Row No.

1 （D50）4 （D55）70 （D60）60 （D65）99 （D70）50

Data numbers: m1

2 （D51）2 （D56）55 （D61）65 （D66）54 （D71）63

3 （D52）1 （D57）90 （D62）75 （D67）66 （D72）79

4 （D53）5 （D58）95 （D63）79 （D68）75 （D73）69

5 （D54）3 （D59）80 （D64）98 （D69）89 （D74）90


580. Sort data table when D100=K5

Data numbers: m2

Data Column

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3. Instruction Set

Column 1 2 3 4 5

Students
English Math. Physics Chemistry
Row No.

1 （D50）4 （D55）70 （D60）60 （D65）99 （D70）50

Data numbers: m1 2 （D51）2 （D56）55 （D61）65 （D66）54 （D71）63

3 （D52）5 （D57）95 （D62）79 （D67）75 （D72）69

4 （D53）1 （D58）90 （D63）75 （D68）66 （D73）79

5 （D54）3 （D59）80 （D64）98 （D69）89 （D74）90

Program Example 1: (Sorting one-dimensional data)

If X0 is On, the data specified will be sorted. After the data is sorted, M1029 will be On.

If m1 is K1, and m2 is K1, one-dimensional data will be sorted. The value in D100 is K5. The values
in D0~D4 are shown below.
1. The values in D0~D4 are listed below.

Data source (S) D0 D1 D2 D3 D4

Data 75 65 98 60 79
2. The sort result is stored in D50~D54.

Sort result (D) D50 D51 D52 D53 D54

Data 60 65 75 79 98

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3. Instruction Set

API Mnemonic Operands Function

70 D TKY S ,D1, D2 Ten Key Input
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F TKY: 7 steps
S * * * *
D1 * * * * * * * * DTKY: 13 steps
D2 * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting input address (occupies 10 consecutive bits) D1: Destination for storing key input
value D2: Key input signal (occupies 11 consecutives bits)

Description:
581. This instruction specifies ten external inputs with S and these ten external inputs are identified
as decimal values of 0 to 9. These ten external input devices are connected to ten keys. When
each key is pressed, the decimal value for that key from 0 to 9,999 (max. 4 digits in 16-bit
instruction) or from 0 to 99,999,999 (max. 8 digits in 32-bit instruction) is stored in destination
D1. D2 is used to store the state of the current key number pressed.
582. For ELC-PA, S and D2 do not support E, F index registers modification.
583. There is no limit on the number of times this instruction is used in the program, however only
one instruction is allowed to be executed at a time.

Program Example:
584. Specify ten input terminals beginning with X30 to connect the ten keys to. These keys are
numbered from 0 to 9. When X20=ON, the instruction is executed and it will store the BIN
value of the key pressed into D0 and set the associated bit (M10~M19). M0-M9 in this example
are used to store the condition of the key that has been pressed last.
X20
TKY X30 D0 M10

0 1 2 3 4 5 6 7 8 9

24G +24V S/S X30 X31 X32 X33 X34 X35 X36 X37 X40 X41

ELC

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3. Instruction Set

0 1 2 3 4 5 6 7 8 9 number key

BCD value one digit number BCD code

3 2 1 0
overflow 10 10 10 10

BCD value

BIN value D0

585. The chart below has four keys connected to X35, X33, X30 and X31 of a number keyboard.
After pressing the four keys in the following order, , the number 5,301 will be entered
into D0, one digit at a time. The maximum number which can be entered in D0 is 9,999 i.e. 4
digits. If the entered number exceeds the allowable range, the highest digits will overflow.
586. After X35 is pressed, M15=ON until another key is pressed. The process is the same as other
keys are pressed.
587. As each key is pressed, the associated M-bit will be turned ON.
588. M20 = ON when any of the keys is pressed.
589. When X20 is OFF, the value in D0 remains unchanged but all the M-bits will be turned OFF.

X30 3

X31 4

X33 2

X35 1

M10

M11

M13

M15

Key output
signal
M20 1 2 3 4

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3. Instruction Set

API Mnemonic Operands Function

71 D HKY S ,D1, D2, D3 Hexadecimal Key Input

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F HKY: 9 steps
S *
D1 * DHKY: 17 steps
D2 * * * * *
D3 * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting scan input address (occupies 4 consecutive bits) D1: Starting scan output address
(occupies 4 consecutive bits) D2: Destination for storing the key input value D3: Key input signal
(occupies 8 consecutive bits)

Description:
590. This instruction creates a 16-key keyboard by multiplexing 4 consecutive external inputs, with
the starting input address entered into parameter S and 4 consecutive external outputs with
the starting output address entered into parameter D1. The key input value will be stored in D2.
D3 stores the condition of keys A~F and indicates the key input status of 0~9 and A~F.
591. Every time this instruction is executed, the execution complete flag M1029 = ON for the
duration the key is pressed (one scan cycle).
592. If two or more keys are pressed at the same time, only the key activated first will be used.
593. When the HKY instruction is used in a 16-bit instruction, D2 can store numbers from 0 to 9,999
(max. 4 digits). When DHKY instruction is used in a 32-bit instruction (DHKY), D2 can store
numbers from 0 to 99,999,999 (max. 8 digits). If the entered number exceeds the allowable
ranges, the highest digits will overflow.
594. For ELC-PA, S, D1 and D2 do not support the E, F index registers modification.
595. There is no limit on the number of times this instruction can be used in the program, but only
one instruction is allowed to be executed at a time.

Program Example:

Use this instruction to create a 16-key keyboard which multiplexes 4 continuous external input
devices X20~X23 and 4 continuous external output devices Y20~Y23. When X4=ON, the instruction
is executed and it will store the BIN value of the 4 inputs into D0. M0~M7 in this example are used to
store the condition of the key that has been pressed last.

X4
HKY X20 Y20 D0 M0

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3. Instruction Set

Number input:

0 1 2 3 4 5 6 7 8 9 number key

BCD value one digit number BCD code

3 2 1 0
overflow 10 10 10 10

BCD value

BIN value D0

Function key input:

a) When the A key is pressed, M0=ON and latched.
Next, press the D key and, M0=OFF, M3=ON and F E D C B A

latched.
b) If two or more keys are pressed at the same time,
M5 M4 M3 M2 M1 M0
only the key activated first is used.

Key output signal:

a) When any key of A – F is pressed, M6=ON for one scan time.
b) When any key of 0 to 9 is pressed, M7=ON for one scan time.

When X4 = OFF, D0 remains unchanged but M0~M7 = OFF.

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3. Instruction Set

External wiring:
C D E F

8 9 A B

4 5 6 7

0 1 2 3

24G +24V S/S X20 X21 X22 X23

C Y20 Y21 Y22 Y23

ELC(Transistor output)

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3. Instruction Set

Points to note:
596. When this instruction is executed, 8 scan time cycles are required to read the input values of
the keys. If the scan cycle is too long or too short, it may cause the key values to be read
incorrectly. Therefore, a fixed scan time is suggested. Use Bit M1039 and register D1039 to fix
the scan time. If the scan time is too long, use this instruction in a time interrupt subroutine.
597. The function of flag M1167:
a) When M1167=ON, the HKY instruction can input hexadecimal values from 0~F.
b) When M1167=OFF, A~F of the HKY instruction are used as function keys.
598. D1037 functionality (only supported by the ELC-PV, ELC2-PV):

 Write the overlapping time for the keys into D1037 (unit: ms). The overlapping time will
vary upon different program scan times and the settings in D1037.

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3. Instruction Set

API Mnemonic Operands Function

72 DSW S, D1, D2, n Digital Switch

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F DSW: 9 steps
S *
D1 *
D2 * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting address of switch input D1: Starting address of switch output D2: Destination
address for storing the set-point value n: Number of digits (n=1~2)

Description:
599. This instruction creates 1 or 2 groups of 4-digit DIP switches by combining 4 or 8 consecutive
input points starting from S and 4 consecutive output points starting from D1. The value of the
inputs will be read in D2 and the value in n specifies the number of groups (1 or 2) of the DIP
switches.
600. If n = K1, D2 occupies 1 register. If n = K2, D2 occupies 2 consecutive registers..
601. There is no limit on the number of times this instruction may be used in the program. However
only one instruction is allowed to be executed at the same time.

Program Example:
602. The first group of switches consists of X20~X23 and Y20~Y23. The second group of switches
consists of X24~X27 and Y20~Y23. When X0=ON, the first group of switches are read and
converted to binary and stored in D20. Then the second group of switches are read and
converted to binary and stored in D21.

X0
DSW X20 Y20 D20 K2

603. When X0=ON, Y20~Y23 will each turn ON one at a time in order and continue to cycle over
and over. After the completion of each cycle, the execution completed flag M1029 will turn ON
for one scan after the completion of a cycle.

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3. Instruction Set

X0
operation start

Y20 0.1s 0.1s 0.1s

Y21 0.1s
interrupt
Y22 0.1s

Y23 0.1s

M1029 execution com pleted

604. Transistor outputs must be used for Y20~Y23. Also, be sure that a diode is connected to every
input terminal (0.1A/50V diode) as shown below.
Wiring diagram of digital switch:

0 1 2 3
BCD digital 10 10 10 10
switches
should connect
a diode (1N4148)
in serial

1 2 4 8 1 2 4 8
0V +24V S/S X20 X21 X22 X23 X24 X25 X26 X27

The first group The second group

ELC
C Y20 Y21 Y22 Y23
0 1 2 3
10 10 10 10

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3. Instruction Set

API Mnemonic Operands Function

73 SEGD P S, D 7-segment Decoder
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F SEGD, SEGDP: 5 steps
S * * * * * * * * * * *
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source address for decoding D: Output address after decoding

Description:
A single hexadecimal digit (0 to 9, A to F) occupying the lower 4 bits of source device S is decoded
into a data format used to drive a seven segment display. A representation of the hex digit is then
displayed. The decoded data is stored in the lower 8 bits of destination address D. The upper 8
bits of the address are not written to.

Program Example:
When X20=ON, the contents of the lower 4 bits (b0~b3) of
X20
D10 will be decoded per the table below, to be displayed on SEGD D10 K2Y20

a 7-segment display. The decoded results will be moved to

Y20~Y27.
Decoding Chart of the 7-segment Display Panel
Composition Status of each segment
Bit
16 bits of the 7-SEG
Combination B0(a) B1(b) B2(c) B3(d) B4(e) B5(f) B6(g)
display
0 0000 On On On On On On Off
1 0001 Off On On Off Off Off Off
2 0010 On On Off On On Off On
3 0011 On On On On Off Off On
4 0100 Off On On Off Off On On
5 0101 On Off On On Off On On
6 0110 On Off On On On On On
7 0111 On On On Off Off Off Off
8 1000 On On On On On On On
9 1001 On On On On Off On On
A 1010 On On On Off On On On
B 1011 Off Off On On On On On
C 1100 On Off Off On On On Off
D 1101 Off On On On On Off On
E 1110 On Off Off On On On On
F 1111 On Off Off Off On On On

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3. Instruction Set

API Mnemonic Operands Function

74 SEGL S, D, n 7-segment with Latch
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F SEGL: 7 steps
S * * * * * * * * * * *
D *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source address for the 7-segment display D: Starting address of 7-segment display outputs
n: Polarity set-point of output signal and scan signal (n=0~7)

Description:
605. 8 or 12 consecutive external output points with the starting address defined by D can be
regarded as display and scan signal outputs of 1 or 2 groups of 4 digits for a 7-segment display.
A 7-segment display module has the ability to convert input BCD code to a 7-segment display
and uses a control signal to latch it.
606. n will determine the number of groups of 4 digits for a 7-segment display..
607. Each time this instruction executes, it cycles through writing each group of outputs to the
outputs for the 7-segment display, one at a time.
608. For ELCB-PB series controllers, the instruction can only be used once in the program.
609. For ELC-PV, ELC2-PV series controllers, the instruction can be used twice in the program.
610. For ELC-PA, ELCM-PH/PA, ELC2-PB/PH/PA/PE series controllers, there is no limitation on
the times of using the instruction, but only one instruction can be executed at a time.
611. Flag: When SEGL is completed, M1029 = ON for one scan cycle.

Program Example:
612. When X20=ON, instruction will start to execute. 7-segment display is connected to outputs
Y20~Y27. The value of D10 will be converted to BCD code and sent to the first group for the
7-segment display. The value of D11 will be converted to BCD code and sent to the second
group for the 7-segment display. If any value of D10 or D11 is greater than 9,999, an operation
error will occur.
X20
SEGL D10 Y20 K4

613. When X20=ON, Y24~Y27 will begin cycling ON, one at a time. Each cycle needs 12 scan
cycles. M1029=ON when each cycle completes.
614. 4 digits per group, n=0~3

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a) After terminals 1, 2, 4, 8 for the first 7-segment display are decoded, the result will be written to
Y20~Y23 for this display. As terminals Y24-Y27 cycle ON and OFF, these values will be driven
and latched on the display..
b) When X20=ON, the contents of D10 will be transmitted to the 7-segment display to display in
sequential order the data to outputs Y24~Y27 cycling ON/OFF in sequence.
615. 4 digits of two groups, n=4~7
a) After the terminal of 1, 2, 4, 8 for the first 7-segment display are decoded and displayed, , the
terminals for the second 7-segment displayY30~Y33 will be decoded. Terminals Y24~Y27 are
used to latch the display values for both sets of displays by continually cycling On and OFF.
b) The contents of D10 will be decoded and written to the first group of outputs for the first
7-segment display and the contents of D11 will be decoded and written to the second group of
outputs for the second 7-segment display to display. If D10=K1234 and D11=K4321, the first
group will display 1 2 3 4 and the second group will display 4 3 2 1.
7-segment display output wiring

C Y20 Y21 Y22 Y23 C Y24 Y25 Y26 Y27 C Y30 Y31 Y32 Y33
0 1 2 3
1 2 4 8
10 10 10 10

3 2 1 0 3 2 1 0
10 10 10 10 10 10 10 10
1 1
2 V+ 2
V+
4 4
8 8

The first group The second group

Points to note:
616. ELC-PB, ELCB-PB series only provides a group of 4 digits for a 7-segment display and use 8
output points. The SEGL instruction only can be used once in the program and the usage
range of operand n is 0 to 3.
617. The scan time must be longer than 10ms for this instruction to execute properly. If the scan
time is shorter than 10ms, use the fixed scan time function to fix the scan time to 10ms.
618. n is used to set the polarity of transistor output loop. It can be set to positive polarity or
negative polarity. The type of 7-segment display it connects to (a group of 4 digits or two
groups of 4 digits) determines the value of n.
619. ELC transistor output is NPN type and it is open collect output. When wiring, connect the
output to a pull-up resistor to VCC (less than 30VDC). When the output point Y is ON, the

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-385
3. Instruction Set

output will be low voltage.

VCC
step up resistor

Y drive

Y
signal output
On

ELC

620. Positive logic (Negative polarity) output of BCD code

BCD value Y output (BCDcode) Signal output

b3 b2 b1 b0 8 4 2 1 A B C D

0 0 0 0 0 0 0 0 1 1 1 1

0 0 0 1 0 0 0 1 1 1 1 0

0 0 1 0 0 0 1 0 1 1 0 1

0 0 1 1 0 0 1 1 1 1 0 0

0 1 0 0 0 1 0 0 1 0 1 1

0 1 0 1 0 1 0 1 1 0 1 0

0 1 1 0 0 1 1 0 1 0 0 1

0 1 1 1 0 1 1 1 1 0 0 0

1 0 0 0 1 0 0 0 0 1 1 1

1 0 0 1 1 0 0 1 0 1 1 0
621. Negative logic (Positive polarity) output of BCD code
BCD value Y output (BCDcode) Signal output

b3 b2 b1 b0 8 4 2 1 A B C D

0 0 0 0 1 1 1 1 0 0 0 0

0 0 0 1 1 1 1 0 0 0 0 1

0 0 1 0 1 1 0 1 0 0 1 0

0 0 1 1 1 1 0 0 0 0 1 1

0 1 0 0 1 0 1 1 0 1 0 0

0 1 0 1 1 0 1 0 0 1 0 1

0 1 1 0 1 0 0 1 0 1 1 0

0 1 1 1 1 0 0 0 0 1 1 1

1 0 0 0 0 1 1 1 1 0 0 0

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3. Instruction Set

1 0 0 1 0 1 1 0 1 0 0 1
622. Display scan (latch) signal

Positive logic (Negative polarity) output Negative logic (Positive polarity) output

Y output (Latch) Output control signal Y output (Latch) Output control signal

1 0 0 1

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3. Instruction Set

623. Parameter n set-points:

Groups number of
A group Two groups
7-segment display

Y of BCD code outputs ＋－＋－

Display scan latch signal ＋－＋－＋－＋－

n 0 1 2 3 4 5 6 7

’＋’: Positive logic (Negative polarity) output

‘－’: Negative logic (Positive polarity) output

624. The output polarity of the ELC transistor and input polarity of 7-segment display is determined
by n.

API Mnemonic Operands Function

75 ARWS S, D1, D2, n Arrow Key Input

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F ARWS: 9 steps
S * * * *
D1 * * * * *
D2 *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting address of the key inputs (occupies 4 continuous addresses) D1: Display address for
the 7-segment display D2: Starting output address for the 7-segment display n: Polarity set-point
of output signal and scan signal (n=0~3)

Description:
625. This instruction displays the contents of a single integer D1 on a set of 4 digit, seven segment
displays. The data within D1 is actually in a standard decimal format but is automatically
converted to BCD to display on the seven segment units. Each digit of the displayed number
can be selected and edited. The editing procedure directly changes the value of D1.
626. S and D2 of ELC-PA, ELC2-PB/PA/PE, ELCM-PH/PA do not support the E, F index registers
modification.
627. D2 of ELCM-PH/PA, ELC2-PB/PH/PA/PE can only be specified as a multiple of 10 as well, e.g.
Y0, Y10, Y20…etc.
628. Only transistor outputs should be used for this instruction.

M
3 -N
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3. Instruction Set

629. When using this instruction, the scan time should be fixed or the instruction should be placed
into a timed interrupt.
630. There is no limit on the number of times this instruction can be used in the program, but only
one instruction is allowed to be executed at a time.

Program Example:
631. When the instruction is executed, X20 is defined as the down key, X21 is defined as the up key,
X22 is defined as the right key and X23 is defined as the left key. These keys are used to edit
and display the external set-point value. The set-point value is stored in D20 and its set-point
range is from 0 to 9,999.
3
632. When X0=ON, 10 is the effective set-point digit number. Pressing the left key, the effective
digit number will be displayed and it will jump from 103→100→101→102→103→100.
633. Pressing the right key, the effective digit number will be displayed and it will jump from 103→
102→101→100→103→102. At the same time, the digit position LED connected to Y24 to Y27
will indicate the effective set-point digit number.
634. Pressing the up key to increase the value , the number will change from 0→1→2→…8→9→0
→1. Pressing the down key, the number will change from 0→9→8→…1→0→9. The
changed value will be displayed on the 7-segment display.

X0
ARWS X20 D20 Y20 K0

Y24 Increase digit value

Y25 Digit
Y26 position
LED X21
Y27
Move Move
10
3 2
10 10
1
10
0 to X23 X22 to
the left the right
1
Y20 2 X20
Y21 4
Y22 8
Y23
decrease digit value
7-step display which displays The 4 switches is used to move
setting value (4 digits data) digit position to the left or to the
right and increase or decrease
the setting value of the digits

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3. Instruction Set

API Mnemonic Operands Function

76 ASC S, D ASCII Code Conversion

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F ASC: 11 steps
S
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: The alphanumeric character to be converted to ASCII code D: The destination address for
storing the ASCII code

Explanation:
635. The ASC instruction converts 8 characters stored in S to ASCII code and stores the result in D.
The values in S can be entered with ELCSoft programming software.
636. S in ELC-PA only accepts A, B, C, D, E, F, G, H, the 8 English character.
637. The alphanumeric characters can be used to display error messages.
638. Flag: M1161 selects 8 or 16 bit mode.

Program Example:
When X0=ON, A~H is converted to ASCII code and stored in D0~D3.
X0 b15 b0
ASC ABC D EFGH D0 D0 42H (B) 41H (A)

D1 44H (D) 43H (C)

D2 46H (F) 45H (E)

D3 48H (H) 47H (G)

High byte Low byte

When M1161=ON, the ASCII code converted from

b15 b0
each character will be placed in the lower 8-bits D0 00 H 41H (A)
(b7~b0) of one register. The high byte will be invalid D1 00 H 42H (B)
D2 00 H 43H (C)
and its contents filled with 0. This also means that one 00 H 44H (D)
D3
register is used to store one character. D4 00 H 45H (E)
D5 00 H 46H (F)
D6 00 H 47H (G)
D7 00 H 48H (H)

High byte Low byte

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3. Instruction Set

API Mnemonic Operands Function

77 PR S, D Outputs ASCII Code

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F PR: 5 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: The address for storing ASCII data (occupies 4 continuous addresses) D: The external output
address for the ASCII code (occupies 10 continuous bit addresses)

Description:
639. This instruction will display ASCII codes stored in 4 continuous registers (S) on the outputs
specified by D.
640. D ~ D+7 map the source data (ASCII code) directly in order, D+10 is the scan signal and D+11
is the execution flag.
641. The PR instruction can only be used twice in the program.
642. Flag: M1029 execution complete flag; M1027 outputs number flag.

Program Example 1:
643. First, use the ASC instruction to convert A~H to ASCII code and store the data in D0~D3. Then,
using the PR instruction move the data to the 8 outputs.
644. When M1027=OFF and X20=ON, this instruction will execute to write the ASCII data to Y20
(lower bit) through Y27 (upper bit). Y30 is the scan signal, and Y31 is the monitor signal. This
mode can sequentially display 8 ASCII characters on the 8 outputs.
645. If X20 turns from ON →OFF while the instruction being executed, all the outputs will be turned
OFF. When X20 turns ON again, the instruction will begin executing again.
X20
PR D0 Y20

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3. Instruction Set

X20 start signal

Y20~Y27 data
A B C D H
T T T T : scan time(ms)

Y30 scan signal

Y31 being executed

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Program Example 2:
646. The PR instruction provides an 8 character serial string output operation. When M1027=OFF,
a maximum of 8 character strings can be serially displayed on the outputs. When M1027=ON,
a 1 to 16 character string will be serially displayed on the outputs.
647. When M1027=ON and X20 transitions from OFF to ON, the PR instruction will execute to write
the ASCII data to Y20 (lower bit) through Y27 (upper bit), Y30 is the scan signal, and Y31 is
the monitor signal. This mode can sequentially display 16 ASCII characters on the 8 outputs.
648. . If X20 turns OFF during execution, the outputs will turn OFF.
649. If the instruction encounters a 00H (NULL) in the character string, it means the end of the
character string and the operation of PR instruction will stop.
650. If X20 is always ON, the instruction will stop automatically after one operation is complete. If
X20 remains ON at the end of execution, the execution complete bit (M1029) will not be active.

M1002
SET M1027
X20
PR D0 Y20

X20 start signal

Y20~Y27 data first character last character

T T T T : scan time or
interrupt time

Y30 scan signal

Y31 being executed

M1029 execution
is completed

Points to note:
651. Only transistor outputs should be used with this instruction.
652. When using this instruction, the scan time should be fixed or execute this instruction in a timed
interrupt subroutine.

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3. Instruction Set

API Mnemonic Operands Function

78 D FROM P m1, m2, D, n Read CR from Module
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F FROM, FROMP: 9 steps
m1 * * *
m2 * * * DFROM, DFROMP: 17
D * * * * * * * * steps
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
m1: Specialty module number m2: CR (Control Register) number in the specialty module
D: Location to save the read data n: number of data words to read

Description:
653. The ELC uses this instruction to read CR data from specialty modules.
654. The operands m1, m2, and n should be in the ranges listed in the table below:

ELCB-PB, ELC-PA:
Operand m1 m2 16-bit n 32-bit n
Right-side Range 0~7 0~48 1 ~ (49 – m2) 1 ~ (49 – m2)/2
Left-side Range Left-side modules are not supported.

ELC-PV, ELC2-PV:
Operand m1 m2 16-bit n 32-bit n
Right-side Range 0~7 0 ~ 499 1 ~ (500 – m2) 1 ~ (500 – m2)/2
Left-side Range 100~107 0 ~ 499 1 ~ (500 – m2) 1 ~ (500 – m2)/2

ELCM-PH/PA:
Operand m1 m2 16-bit n 32-bit n
1~4 1~2
Right-side Range 0~7 0~255
V2.0(above)1~6 V2.0(above)1~3
Left-side Range Left-side modules are not supported.

ELC2-PC/PA:
Operand m1 m2 16-bit n 32-bit n

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Right-side Range 0~7 0~48 1~6 1~3

Left-side Range 100~107 0~255 1~(256-m2) 1~(256-m2)/2

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3. Instruction Set

ELC2-PE:
Operand m1 m2 16-bit n 32-bit n
Right-side Range 0~7 0~48 1~6 1~3
Left-side Range 100~108 0~255 1~(256-m2) 1~(256-m2)/2

ELC2-PB:
Operand m1 m2 16-bit n 32-bit n
Right-side Range 0~7 0~48 1~6 1~3
Left-side Range Left-side modules are not supported.
655. ELCM-PH/PA and ELC2-PB/PH/PA/PE: The operand D only supports the D devices.
656. When D indicates a bit device operand, use K1~K4 for the16-bit instruction and K5~K8 for the
32-bit instruction.
657. Flag: When M1083=ON, it enables interrupts during the execution of the FROM/TO
instructions. M1083 only supports ELC-PA/PV, and ELC2-PV.
658. ELCB-PB doesn’t support the index registers E, F modification.

Program Example:
659. Read the contents of CR#29 and CR#30 from specialty module#0 and place the data in D0
and D1.in the ELC controller. 2 words are read because n=2.
660. The instruction will be executed when X0=ON.

X0
FROM K0 K29 D0 K2

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3. Instruction Set

API Mnemonic Operands Function

79 D TO P m1, m2, S, n Write CR to Module
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F TO, TOP: 9 steps
m1 * * *
m2 * * * DTO, DTOP: 17 steps
S * * * * * * * * * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
m1: Specialty module number m2: CR (Control Register) number of the special module
S: Data address of the data to write to the specialty module n: Number of words to write

Description:
661. The operands m1, m2, and n should be in the ranges listed in the table below:

ELCB-PB, ELC-PA:
Operand m1 m2 16-bit n 32-bit n
Right-side Range 0~7 0~48 1 ~ (49 – m2) 1 ~ (49 – m2)/2
Left-side Range Left-side modules are not supported.

ELC-PV, ELC2-PV:
Operand m1 m2 16-bit n 32-bit n
Right-side Range 0~7 0 ~ 499 1 ~ (500 – m2) 1 ~ (500 – m2)/2
Left-side Range 100~107 0 ~ 499 1 ~ (500 – m2) 1 ~ (500 – m2)/2

ELCM-PH/PA:
Operand m1 m2 16-bit n 32-bit n
1~4 1~2
Right-side Range 0~7 0~255
V2.0(above)1~6 V2.0(above)1~3
Left-side Range Left-side modules are not supported.

ELC2-PC/PA:
Operand m1 m2 16-bit n 32-bit n
Right-side Range 0~7 0~48 1~6 1~3

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Left-side Range 100~107 0~255 1~(256-m2) 1~(256-m2)/2

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ELC2-PE:
Operand m1 m2 16-bit n 32-bit n
Right-side Range 0~7 0~48 1~6 1~3
Left-side Range 100~108 0~255 1~(256-m2) 1~(256-m2)/2

ELC2-PB:
Operand m1 m2 16-bit n 32-bit n
Right-side Range 0~7 0~48 1~6 1~3
Left-side Range Left-side modules are not supported.
662. ELCM-PH/PA and ELC2-PB/PH/PA/PE: The operand S only supports the D devices.
663. When S is a bit operand, K1~K4 can be used for 16-bit instruction and K1~K8 can be used for
32-bit instruction.
664. Flag: When M1083=ON, it enables interrupts during the execution of the FROM/TO
instructions. M1083 only supports ELC-PA/PV, and ELC2-PV
665. ELCB-PB doesn’t support the index registers E, F modification.

Program Example:
666. Using the 32-bit instruction DTO, the program will write D11 and D10 into CR#13 and CR#12
of the specialty module#0.
667. The instruction will be executed when X0=ON.

X0
DTO K0 K12 D10 K1

The rule of instruction operand:

668. m1: The number of the specialty module. The right specialty module closest to the ELC
controller will be assigned 0, the next closest will be assigned 1, etc. for a maximum of 8
modules (0~7). The left special module closest to the ELC controller will be assigned 100, the
next closest will be assigned 101, etc. for a total of 8 modules (100~107).
669. m2: CR number. 16-bit memory in specialty modules is called CR (Control Registers). Valid
CR numbers are 0~499.

Upper 16-bit Lower 16-bit

CR #10 CR #9 Specified CR number

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3. Instruction Set

Specified device Specified CR Specified device Specified CR

D0 CR #5 D0 CR #5
D1 CR #6 D1 CR #6
D2 CR #7 D2 CR #7
D3 CR #8 D3 CR #8
D4 CR #9 D4 CR #9
D5 CR #10 D5 CR #10

16-bit command when n=6 32-bit command when n=3

670. In ELCB-PB and ELC2-PB/PH/PA/PE, M1083 is not supported. When the FROM/TO
instruction is executed, all interrupts (including external or internal interrupt subroutines) will be
disabled. All interrupts will be executed after the FROM/TO instruction is completed. The,
FROM/TO instruction can also be executed in an interrupt subroutine.
671. In ELC-PA/PV and ELC2-PV2, M1083 is supported. The functions of M1083 are described
below.:
a) When M1083=OFF, the FROM/TO instruction is executed, all interrupts (including external or
internal interrupt subroutines) will be disabled. All interrupts will be executed after the
FROM/TO instruction is completed.
b) When M1083=ON, if an interrupt occurs while the FROM/TO instruction is executing, the
FROM/TO instruction will be interrupted to execute the interrupt. In this case, the FROM/TO
instruction cannot be executed in the interrupt subroutine

Application program example of FROM/TO instruction:

672. Example 1: Configure the scaling parameters for the analog input CH1 of the ELC-AN04ANNN
with a set-point OFFSET value of 0V(=K0LSB) and a GAIN value of 2.5V(=K2000LSB).

M1002
TO K0 K1 H0 K1

TO K0 K33 H0 K1

X0
TO K0 K18 K0 K1

TO K0 K24 K2000 K1

1. Write H0 to CR#1 of analog input module No. 0, which sets CH1 to mode 0 (voltage input:
-10V to +10V).
2. Write H0 to CR#33 and allow it to adjust the characteristics of CH1 to CH4.
3. When X0 turns from OFF →ON, K0 OFFSET value will be written to CR#18 and K2000 GAIN
value will be written to CR#24.

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3. Instruction Set

b) Example 2: Adjust A/D conversion characteristic curve of ELC-AN04ANNN by the set-point

OFFSET value of CH2 to 2mA(=K400) and GAIN value of CH2 to 18 mA(=K3600).
M1002
TO K0 K1 H18 K1

TO K0 K33 H0 K1

X0
TO K0 K19 K400 K1

TO K0 K25 K3600 K1

1. Write H18 to CR#1 of analog input module No. 0, which sets CH2 to mode 3 (current input:
-20mA to +20mA).
2. Write H0 to CR#33 to adjust characteristics of CH1 to CH4.
3. When X0 turns from OFF →ON, K400, the OFFSET value will be written to CR#19 and K3600,
the GAIN value will be written to CR#25.
c) Example 3: Adjust D/A conversion characteristic curve of ELC-AN02NANN by set-point
OFFSET value for CH2 to 0mA(=K0) and GAIN value for CH2 to 10mA(=K1000).
M1002
TO K1 K1 H18 K1

TO K1 K33 H0 K1

X0
TO K1 K22 K0 K1

TO K1 K28 K1000 K1

1. Write H18 to CR#1 of analog input mode No. 1 which sets CH2 to mode 3 (current input: 0mA
to +20mA).
2. Write H0 to CR#33 to adjust characteristics of CH1 and CH2.
3. When X0 turns from OFF →ON, write K0, the OFFSET value to CR#22 and K1000, the GAIN
value will be written to CR#28.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-401
3. Instruction Set

API Mnemonic Operands Function

80 RS S, m, D, n Serial Data Communication
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F RS: 9 steps
S *
m * * *
D *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting address of transmit data m: Transmit data length (m=0~255) D: Starting address of
receive data n: receive data length (n=0~255)

Description:
673. The RS instruction is used for transmitting data and/or receiving data between an ELC
controller and an external device. Data needs to be entered into registers starting from S with
length m. Then, specify the data receive register D and the receiving data length n.
674. Please refer to the following table for more information about the communication ports
supported by RS:

COM COM1(RS-232) COM2(RS-485) COM3(RS-485)

ELC-PA/PV - V -

ELCB-PB - V -

ELCM-PH/PA V V V

ELC2-PB/PA/PV V V -

ELC2-PC V V V

ELC2-PE - V V
675. If data does not need to be transmitted, m must be K0. If it doesn’t need to receive data, n
must be K0.
676. There is no limit on the number of times this instruction can be used, however, only 1
instruction can be executed on one communication port at the same time.
677. During execution of the RS instruction, the data being sent cannot be changed.
678. For Flags: M1120~M1131, M1140~M1143, M1161, see the examples below.
679. The ELCB-PB do not support the index registers E, F modification.

Program Example 1: COM2 RS-485

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3. Instruction Set

680. Enter data into the registers that start with D100 and set M1122=ON (send request-flag).
681. If the RS instruction is executed when X20=ON, the ELC will transmit the 10 data values that
start from D100, then wait for the receive data. M1122 will be set to OFF at the end of
transmitting (do not use the program to reset M1122). After a 1ms delay, it will start to receive
the 10 external data values and store them into consecutive registers that start from D120.
682. When the receive operation is complete, M1123 will be set to ON. The ELC program should
reset M1123 = OFF when the receive is complete. Do not use ELC program to continuously
reset M1123. Reset it once each time the receive is complete.
M1002
MOV H86 D1120 Setting communication protocol 9600, 7, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication time out 100ms

Transmission
request
Write transmitting data in advance
Pulse
SET M1122 Sending request
X20
RS D100 K10 D120 K10
Receiving
completed
Process of receiving data
M1123
RST M1123 Receiving completed and flag reset

Program Example 2: COM2 RS-485

8-bit mode (M1161=ON) / 16-bit mode (M1161=OFF) switch:

8-bit mode:
683. Start and End Characters for the ELC transmission data will be set with M1126 and M1130
with the data in D1124~D1126. Once the start and end characters are set, the ELC will send
start and end data automatically when executing the RS instruction.
684. When M1161=ON, the mode will be 8-bit. 16-bit data will be divided into high byte and low byte.
High byte will be ignored and low byte will be received and transmitted.
M1000
M1161
X0
RS D100 K4 D120 K7

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3. Instruction Set

Transmit data: (ELC→External equipment)

STX D100L D101L D102L D103L ETX1 ETX2

Head source data register will start from Tail code Tail code
code low byte of D100 1 2

length = 4

Receive data: (External equipment→ELC)

D120L D121L D122L D123L D124L D125L D126L

Head receive data register will start from Tail code Tail code
code low byte of D120 1 2

length = 7

685. The ELC will receive all data transmitted from the external equipment, including header and
footer.

16-bit mode:
686. Start and End Characters for the ELC to transmit are set by using M1126 and M1130 and the
data must be entered into D1124~D1126. The ELC will send start and end data automatically
when executing the RS instruction.
687. When M1161=OFF, the mode will be 16-bit. 16-bit data will be divided into high byte and low
byte for data transmitting and receiving.
M1001
M1161
X0
RS D100 K4 D120 K7

Transmit data: (ELC→External equipment)

STX D100L D100L D101L D101L ETX1 ETX2

Head source data register will start from Tail code Tail code
code low byte of D100 1 2

length = 4

Receive data: (External equipment→ELC)

D120L D120H D121L D121H D122L D122H D123L

Head receive data register will start from Tail code Tail code
code low byte of D120 1 2

length = 7

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3. Instruction Set

688. ELC will receive all data transmitted from external equipment, including start and end
characters..

Program Example 3: COM1 RS-232

1. Only 8-bit mode is supported (ELC sets M1161 = ON automatically)
2. STX/ETX function (M1126/M1130/D1124~D1126) is not supported.
3. High byte of 16-bit data is not available. Only low byte is valid for data communication.
4. Enter the data to be transmitted into registers starting from D100 and set M1312 (COM1
sending request) ON
5. When X10 = ON, the RS instruction executes and the ELC is ready for communications. The
instruction will then start to send out 4 data bytes beginning with D100. When transmitting data
is complete, M1312 will be automatically reset. (DO NOT reset M1312 in the program). After
approximate 1ms, the ELC will start to receive 7 data bytes and store them in 7 consecutive
registers starting from D20.
6. When the data read is complete, M1314 will turn ON. When data processing on the received
data is complete, M1314 must be reset (OFF) and the ELC will be ready for communication
again. However, DO NOT continuously execute RST M1314.

M1002
MOV H87 D1036 Setting communication protocol as 9600,8,E,1

SET M1138 Retain communication protocol

MOV K100 D1249 Set up communication time out as 100ms

Pulse for
sending request
Write transmitting data in advance
Pulse
SET M1312 Sending request
X0
RS D100 K4 D120 K7
M1314
Processing received data

RST M1314 Receiving completed and flag reset

Sending data: (ELC→External equipment)

D100L D101L D102L D103L

Source data register, starting from

lower 8 bits of D100

Length = 4

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-405
3. Instruction Set

Receving data: (External equipment→ELC)

D120L D121L D122L D123L D124L D125L D126L

Registers for received data, starting from

lower 8 bits of D120

Length = 7

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3. Instruction Set

Program Example 4: COM3 RS-485

1. Only the 8-bit mode is supported (ELC sets M1161 = ON automatically)
2. STX/ETX function (M1126/M1130/D1124~D1126) is not supported.
3. The high byte of the 16-bit data is not available. Only the low byte is valid for data
communications.
4. Enter the data to be transmitted into registers starting with D100 then set M1316 (COM3
sending request) to ON
5. When X10 = ON, the RS instruction executes and the ELC is ready for communications. 4
bytes of data beginning with D100 will be sent. Each time the data has been sent, M1318 will
be automatically reset. (DO NOT reset M1318 in the program). After approximate 1ms, the
ELC will start to receive 7 data bytes and store them in 7 consecutive registers starting from
D120.
6. When the data received is complete, M1318 will automatically be ON. When the received data
is completed, M1318 must be reset (OFF) and the ELC will be ready for communications
again.

M1002
MOV H87 D1120 Setting communication protocol as 9600,8,E,1

SET M1136 Retain communication protocol

MOV K100 D1252 Set up communication time out as 100ms

Pulse for
sending request
Write transmitting data in advance
Pulse
SET M1316 Sending request
X0
RS D100 K4 D120 K7
M1318
Processing received data

RST M1318 Receiving completed and flag reset

Sending data: (ELC→External equipment)

D100L D101L D102L D103L

Source data register, starting from

lower 8 bits of D100

Length = 4

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-407
3. Instruction Set

Receving data: (External equipment→ELC)

D120L D121L D122L D123L D124L D125L D126L

Registers for received data, starting from

lower 8 bits of D120

Length = 7

Points to note:
689. ELC COM1 RS-232: Special bits (M-bits) and special registers (D-registers) used for
communication instructions RS / MODRD
Flag Function Action

COM1 lock communication settings. Communication settings will be

set according to the contents in D1036 after every scan cycle, unless
after setting the interface parameters with D1036, M1038 is Set. This
User sets
M1138 will retain the communication protocol settings. When M1138 = ON, the
and resets
communication settings for COM1 will not be changed when the
content in D1036 is changed.

Supported communication instructions: RS / MODRW

COM1 ASCII / RTU mode selection, ON: RTU, OFF: ASCII. User sets
M1139
Supported communication instructions: RS / MODRW and resets

COM1 sending request. Before executing communication instructions,

users need to set M1312 to ON with a trigger pulse, to initiate data User sets
M1312 transmission. When the communication is completed, the ELC will and system
reset M1312 automatically. resets
Supported communication instructions: RS / MODRW

COM1 ready to receive data. When M1313 is ON, the ELC is ready to
M1313 receive data System
Supported communication instructions: RS / MODRW

M1314 will be ON when the data received is complete. Process the

System sets
data received when M1314 is on. When the data has been
M1314 and user
processed, M1314 must be reset by the program.
resets
Supported communication instructions: RS / MODRW

COM1 receiving error. M1315 will be set ON when errors occur and the System sets
M1315 error code will be stored in D1250. and user
Supported communication instructions: RS / MODRW resets

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3. Instruction Set

Special register Function

COM1 (RS-232) communication protocol. Refer to the table in point

D1036
number 4 below for the necessary settings.

The specific end word to be detected for the RS instruction to execute an

D1167 interruption request (I140) on COM1 (RS-232).

Supported communication instructions: RS

D1121 COM1 (RS-232) and COM2 (RS-485) communication address.

COM1 (RS-232) Communication time-out setting (unit: ms). If a time-out

value is set in D1249 and if the data being received times-out, M1315 will
D1249
be set ON and the error code K1 will be stored in D1250. M1315 must be
reset by the program when the time-out status is cleared.

COM1 (RS-232) communication error code.

D1250
Supported communication instructions: MODRW
690. ELC COM2 RS-485: Special M-bits and special D-registers for communication instructions RS
/ MODRD / MODWR / FWD / REV / STOP / RDST / RSTEF / MODRW.
Flag Function Action

Retain communication settings. Communication settings will be reset

(changed) according to the content in D1120 after every scan cycle.
Users can set M1120 ON if the communication protocol requires the
User
M1120 port configuration data to be retained. When M1120 = ON,
sets/resets
communication settings cannot be modified when communication
instructions are being processed, even if the content in D1120 is
changed.

Data transmission ready. M1121 = OFF indicates that RS-485 in

M1121 System sets
COM2 is transmitting

Sending request. Before executing communication instructions, users

User sets,
need to set M1122 to ON by trigger pulse, to initiate sending and
M1122 system
receiving data. When the communications is complete, the ELC will
resets
reset M1122 automatically.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-409
3. Instruction Set

Flag Function Action

Receiving data complete. When data is received via the RS

instruction, M1123 will be ON. The received data can be processed System sets
M1123 when M1123 is ON. When data processing is completed, M1123 must ON and user
be reset by the program. resets
Supported communication instructions: RS

Data receiving ready. When M1124 is ON, the ELC is ready to receive
M1124 System sets
data.

Communication ready status reset. When M1125 is set ON, the ELC
resets the communication (transmitting/receiving) ready status.
M1125
M1125 has to be reset by user after resetting the communication
ready status.

Set STX/ETX as user-defined or system-defined for RS User

M1126 communications. For details refer to the table in point 5. sets/resets
M1126 only supports the RS instruction.

Set STX/ETX as user-defined or system-defined in RS

M1130 communications. For details please refer to the table in point 5.

M1130 only supports the RS instruction

COM2 (RS-485) data sending/receiving/converting completed. RS

System sets
instruction is NOT supported.
M1127 and user
Supported communication instructions:
resets
MODRD / MODWR / MODRW

M1128 Transmitting/receiving status indication. System sets

System sets
Receiving time out. If time-out value is set up in D1129 and the data
M1129 and user
receiving time exceeds the time-out value, M1129 will be set ON.
resets

In ASCII mode, M1131 = ON only when MODRD / MODRW data is

being converted to HEX.
M1131
Supported communication instructions:

MODRD / MODRW System sets

MODRD/MODWR/MODRW data receiving error

M1140 Supported communication instructions:

MODRD / MODWR / MODRW

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3. Instruction Set

Flag Function Action

MODRD/MODWR/MODRW parameter error

M1141 Supported communication instructions: System sets

MODRD / MODWR/ MODRW

ASCII / RTU mode selection. ON : RTU mode, OFF: ASCII mode.

User sets
M1143 Supported communication instructions:
and resets
RS / MODRD / MODWR / MODRW

8/16-bit mode. ON: 8-bit mode. OFF: 16-bit mode

M1161 User sets
Supported communication instructions: RS

Special register Function

Delay time of data response when ELC is a SLAVE on COM2, COM3

RS-485 communication, Range: 0~10,000. (Unit: 0.1ms).
D1038
By using ELC LINK on COM2, D1038 can be set to send next
communication data with delay. (unit: one scan cycle)

Converted data for Modbus communication data processing. ELC

automatically converts the ASCII data in D1070~D1085 into Hex data and
D1050~D1055
stores the 16-bit Hex data in D1050~D1055

Supported communication instructions: MODRD

Received data (ASCII) from Modbus communications. When the ELC’s

RS-485 communication instruction receives data, the data will be saved in
D1070~D1085
registers D1070~D1085.

RS instruction is not supported.

Sent data of Modbus communication. When the ELC’s RS-485

communication instruction (MODRD), the data will be stored in
D1089~D1099
D1089~D1099.

RS instruction is not supported

COM2 (RS-485) communication protocol. Refer to the following table in

D1120
point 4 below for protocol settings.

D1121 COM1 (RS-232) and COM2 (RS-485) ELC communication address.

D1122 COM2 (RS-485) number of words of transmitted data.

D1123 COM2 (RS-485) number of words of the received data.

D1124 COM2 (RS-485) Definition of start character (STX)

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3. Instruction Set

Special register Function

Supported communication instruction: RS

COM2 (RS-485) Definition of first ending character (ETX1)

D1125
Supported communication instruction: RS

COM2 (RS-485) Definition of second ending character (ETX2)

D1126
Supported communication instruction: RS

COM2 (RS-485) Communication time-out setting (unit: ms). If a time-out

value is moved into D1129 and the data received time exceeds the
D1129 time-out value, M1129 will be set ON and the error code K1 will be stored
in D1130. M1129 must be reset manually when the time-out status is
cleared.

COM2 (RS-485) Error code returned from Modbus. RS instruction is not

D1130 included.

Supported communication instructions: MODRD / MODWR / MODRW

The specific end word to be detected for RS instruction to execute an

D1168 interrupt request (I150) on COM2 (RS-485).

Supported communication instruction: RS

For RS instruction, when the received data length = the low byte of D1169,
the interrupt I160 will be triggered. When D1169 = 0, I160 will not be
 D1169
triggered.

Supported communication instruction: RS

For COM2 RS-485 MODRW instruction. D1256~D1295 store the sent

data of MODRW instruction. When MODRW instruction sends out data,
D1256~D1295 the data will be stored in D1256~D1295. Users can check the sent data in
these registers.

Supported communication instruction: MODRW

For COM2 RS-485 MODRW instruction. D1296~D1311 store the

converted hex data from D1070 ~ D1085 (ASCII). ELC automatically
D1296~D1311 converts the received ASCII data in D1070 ~ D1085 into hex data and
places it into D1296-D1311.

Supported communication instruction: MODRW

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3. Instruction Set

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3. Instruction Set

691. ELC COM3 RS-485: Special M-bits and D-registers for communication instructions RS /
MODRW.
Flag Function Action

COM3 retain communication settings. Communication settings will be

reset (changed) according to the content in D1109 after every scan
cycle. Users can set ON M1136 if the communication protocol requires
M1136 to be retained. When M1136 = ON, communication settings will not be
reset (changed) when communication instructions are being User sets

processed, even if the content in D1109 is changed. and resets

Supported communication instructions: RS / MODRW

COM3 ASCII / RTU mode selection. ON: RTU, OFF: ASCII.

M1320
Supported communication instructions: RS / MODRW

COM3 sending request. Before executing communication instructions,

set M1316 to ON by with a pulse, to initiate sending and receiving data. User sets,
M1316 When communications is completed, ELC will reset M1316 system
automatically. resets
Supported communication instructions: RS / MODRW

Data receive ready. When M1317 is ON, ELC is ready to receive data.
M1317 System sets
Supported communication instructions: RS / MODRW

System
COM3 data receive complete.
M1318 sets, user
Supported communication instructions: RS / MODRW
resets

COM3 data receive error. M1319 will be set ON when errors occur and System
M1319 the error code will be stored in D1252 sets, user
Supported communication instructions: RS / MODRW resets

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3. Instruction Set

Special register Function

Delay time of data response when the ELC is a SLAVE on COM2, COM3
RS-485 ports, Range: 0~10,000. (unit: 0.1ms).
D1038
By using ELC LINK on COM2, D1038 can be set to send next
communication data with delay. (unit: one scan cycle)

COM3 (RS-485) communication protocol. Refer to the following table in

D1109
point 4 below for protocol settings.

The specific end word to be detected for RS instruction to execute an

D1169 interrupt request (I160) on COM3 (RS-485).

Supported communication instructions: RS

COM3 (RS-485) Communication time-out setting (ms). If a time-out value

is set up in D1252 and the data receiving time exceeds the time-out value,
D1252
M1319 will be set ON and the error code K1 will be stored in D1253.
M1319 has to be reset manually when time-out status is cleared.

D1253 COM3 (RS-485) communication error code

D1255 COM3 (RS-485) ELC communication address when ELC is Slave.

692. COM port and communication settings/status table.

COM1 COM2 COM3 Function Description

M1138 M1120 M1136 Retain communication setting

Protocol M1139 M1143 M1320 ASCII/RTU mode selection
setting D1036 D1120 D1109 Communication protocol
D1121 D1121 D1255 ELC communication address
- M1161 - 8/16 bit mode selection

- M1121 - Indicates transmission status

M1312 M1122 M1316 Sending request
- M1126 - Set STX/ETX as user/system defined. (RS)
Sending - M1130 - Set STX/ETX as user/system defined. (RS)
request - D1124 - Definition of STX (RS)
- D1125 - Definition of ETX1 (RS)
- D1126 - Definition of ETX2 (RS)
D1249 D1129 D1252 Communication timeout setting (ms)

- D1122 - Residual number of words of transmitting data

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3. Instruction Set

COM1 COM2 COM3 Function Description

D1256
- ~ - Store the sent data of MODRW instruction.
Sending D1295
request D1089
Store the sent data of MODRD / MODWR / FWD /
- ~ -
REV / STOP / RDST / RSTEF instruction
D1099
M1313 M1124 M1317 Data receiving ready
- M1125 - Communication ready status reset
- M1128 - Transmitting/Receiving status Indication
- D1123 - Residual number of words of the receiving data
Data
D1070
receiving Store the feedback data of Modbus
- ~ -
communication. RS instruction is not supported.
D1085
Store the specific end word to be detected for
D1167 D1168 D1169
executing interrupts I140/I150/I160 (RS)

M1314 M1123 M1318 Data receiving completed

COM2 (RS-485) data sending / receiving /

- M1127 - converting completed. (RS instruction is not
supported)
ON when MODRD/RDST/MODRW data is being
- M1131 -
Receiving converted from ASCII to Hex
completed D1296
Store the converted HEX data of MODRW
- ~ -
instruction.
D1311
D1050
Store the converted HEX data of MODRD
- ~ -
instruction
D1055

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3. Instruction Set

COM1 COM2 COM3 Function Description

M1315 - M1319 Data receiving error

D1250 - D1253 Communication error code
- M1129 - COM2 (RS-485) receiving time out
COM2 (RS-485) MODRD/MODWR/MODRW data
- M1140 -
receiving error
Errors
MODRD/MODWR/MODRW parameter error
- M1141 - (Exception Code exists in received data)
Exception Code is stored in D1130
Data receiving error of VFD-A handy instructions
- M1142 -
(FWD/REV/STOP/RDST/RSTEF)
COM2 (RS-485) Error code returning from
Errors - D1130 -
Modbus communication
693. Communication protocol settings: D1036(COM1 RS-232) / D1120(COM2 RS-485) /
D1109(COM3 RS-485)

Content

b0 Data Length 0: 7 data bits 1: 8 data bits

00: None
b1
Parity bit 01: Odd
b2
11: Even
b3 Stop bits 0: 1 bit 1: 2bits
b4 0001(H1): 110 bps
b5 0010(H2): 150 bps
b6 0011(H3): 300 bps
b7 0100(H4): 600 bps
0101(H5): 1200 bps
0110(H6): 2400 bps
0111(H7): 4800 bps
Baud rate
1000(H8): 9600 bps
1001(H9): 19200 bps
1010(HA): 38400 bps
1011(HB): 57600 bps
1100(HC): 115200 bps
1101(HD): 500000 bps (ELCM-PH/PA COM2
1110(HE): 31250 bps / COM3 support)

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3. Instruction Set

Content

1111(HF): 921000 bps

b8 (D1120) STX 0: None 1: D1124
b9 (D1120) ETX1 0: None 1: D1125
b10 (D1120) ETX2 0: None 1: D1126
b11~b15 N/A
694. When RS instruction is applied for communication between ELC and peripheral devices on
COM2 RS-485, usually STX (Start of the text) and ETX (End of the text) have to be set into
communication format. In this case, b8~10 of D1120 should be set to 1, so that users can set
up STX/ETX as user-defined or system-defined by using M1126, M1130, and D1124~D1126.
For settings of M1126 and M1130, please refer to the following table.
M1130

0 1
D1124: user defined D1124: H 0002
0 D1125: user defined D1125: H 0003
M1126

D1126: user defined D1126: H 0000 (no setting)

D1124: user defined D1124: H 003A (‘:’)
1 D1125: user defined D1125: H 000D (CR)
D1126: user defined D1126: H 000A (LF)
695. Example of setting communication format in D1120:
Communication format:

Baud rate: 9600, 7, N, 2

STX: “: “
ETX1: “CR”
ETX2: “LF”
Check to the table in point 4 and the set value H788 can be referenced corresponding to the
baud rate. Set the value into D1120.

b15 b0
D1120 0 0 0 0 0 1 1 1 1 0 0 0 1 0 0 0
0
N/A 7 8 8

M1002
MOV H788 D1120

When STX, ETX1 and ETX2 are applied, care should be taken on setting the ON/OFF status
of M1126 and M1130.

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3. Instruction Set

696. D1250(COM1)、D1253(COM3) communication error code:

Value Error Description
H0001 Communication time-out

H0002 Checksum error

H0003 Exception Code exists

H0004 Command code error / data error

H0005 Communication data length error

697. Corresponding table between D1167~D1169 and the associated interrupt pointers. (Only
lower 8 bits are valid)
COM Port I1□0 interrupt Special D
COM1 I140 D1167
COM2 I150 D1168
COM3 I160 D1169
698. Take standard MODBUS format for example:

ASCII mode
Field Name Descriptions
STX Start word = ‘: ’ (3AH)
Address Hi Communication address:
Address Lo The 8-bit address consists of 2 ASCII codes
Function Hi Function code:
Function Lo The 8-bit function code consists of 2 ASCII codes
DATA (n-1)
Data content:
…….
n × 8-bit data content consists of 2n ASCll codes
DATA 0
LRC CHK Hi LRC check sum:
LRC CHK Lo 8-bit check sum consists of 2 ASCll code
END Hi End word:
END Lo END Hi = CR (0DH), END Lo = LF(0AH)
The communication protocol is in Modbus ASCII mode, i.e. every byte is composed of 2 ASCII
characters. For example, 64Hex is ‘64’ in ASCII, composed by ‘6’ (36Hex) and ‘4’ (34Hex). Every
character ‘0’…’9’, ‘A’…’F’ corresponds to an ASCII code.
Character ‘0’ ‘1’ ‘2’ ‘3’ ‘4’ ‘5’ ‘6’ ‘7’
ASCII code 30H 31H 32H 33H 34H 35H 36H 37H

Character ‘8’ ‘9’ ‘A’ ‘B’ ‘C’ ‘D’ ‘E’ ‘F’

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-419
3. Instruction Set

ASCII code 38H 39H 41H 42H 43H 44H 45H 46H

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3. Instruction Set

Start word (STX): ‘:’ (3AH)

Address:
‘0’ ‘0’: Broadcasting to all drives (Broadcast)
‘0’ ‘1’: toward the drive at address 01
‘0’ ‘F’: toward the drive at address 15
‘1’ ‘0’: toward the drive at address 16
… and so on, max. address: 254 (‘FE’)
Function code:
‘0’ ‘3’: read contents from multiple registers
‘0’ ‘6’: write one word into a single register
‘1’ ‘0’: write contents to multiple registers
Data characters:
The data sent by the user
LRC checksum:
LCR checksum is 2’s complement of the value added from Address to Data Characters.
For example: 01H + 03H + 21H + 02H + 00H + 02H = 29H. 2’s complement of 29H = D7H.
End word (END):
Fix the END as END Hi = CR (0DH), END Lo = LF (0AH)

Example:
Read 2 continuous data stored in the registers of the drive at address 01H (see the table
below). The start register is at address 2102H.
Inquiry message: Response message:
STX ‘: ’ STX ‘: ’
‘0’ ‘0’
Address Address
‘1’ ‘1’
‘0’ ‘0’
Function code Function code
‘3’ ‘3’
‘2’ Number of data ‘0’
‘1’ (count by byte) ‘4’
Start address ‘0’ ‘1’
‘2’ Content of start ‘7’
address
‘0’ 2102H ‘7’
Number of data ‘0’ ‘0’
(count by word) ‘0’ ‘0’
‘2’ Content of address ‘0’
‘D’ 2103H ‘0’
LRC Checksum
‘7’ ‘0’
CR ‘7’
END LRC Checksum
LF ‘1’
END CR

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3. Instruction Set

RTU mode
Field Name Descriptions
START Refer to the following explanation
Address Communication address: n 8-bit binary
Function Function code: n 8-bit binary
DATA (n-1)
Data:
…….
n × 8-bit data
DATA 0
CRC CHK Low CRC checksum:
CRC CHK High 16-bit CRC consists of 2 8-bit binary data
END Refer to the following explanation
START/END:
RTU Timeout Timer:
Baud rate(bps) RTU timeout timer (ms) Baud rate (bps) RTU timeout timer (ms)
300 40 9,600 2
600 21 19,200 1
1,200 10 38,400 1
2,400 5 57,600 1
4,800 3 115,200 1
Address:
00 H: Broadcasting to all drives (Broadcast)
01 H: toward the drive at address 01
0F H: toward the drive at address 15
10 H: toward the drive at address 16
… and so on, max. address: 254 (‘FE’)
Function code:
03 H: read contents from multiple registers
06 H: write one word into single register
10 H: write contents to multiple registers
Data characters:
The data sent by the user
CRC checksum: Starting from Address and ending at Data Content. The calculation is as follows:

 Step 1: Set the 16-bit register (CRC register) = FFFFH

 Step 2: Operate XOR on the first 8-bit message (Address) and the lower 8 bits of
CRC register. Store the result in the CRC register.

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3. Instruction Set

 Step 3: Right shift CRC register for a bit and fill “0” into the highest bit.

 Step 4: Check the lowest bit (bit 0) of the shifted value. If bit 0 is 0, fill in the new
value obtained at step 3 to CRC register; if bit 0 is NOT 0, operate XOR on A001H and
the shifted value and store the result in the CRC register.

 Step 5: Repeat step 3 – 4 to finish all operation on all the 8 bits.

 Step 6: Repeat step 2 – 5 until the operation of all the messages are completed.
The final value obtained in the CRC register is the CRC checksum. Care should be taken
when placing the LOW byte and HIGH byte of the obtained CRC checksum.

Example:
Read 2 continuous data words stored in the registers of the drive at address 01H (see the table
below). The start register is at address 2102H
Inquiry message: Response message:

Field
Field Name Data (Hex) Nam Data (Hex)
e

Address 01 H Address 01 H
Function 03 H Function 03 H
Start data 21 H Number of data
04 H
address 02 H (count by byte)
Number of data 00 H Content of data address 17 H
(count by word) 02 H 2102H 70 H
CRC CHK Low 6F H Content of data address 00 H
CRC CHK High F7 H 2103H 00 H
CRC CHK Low FE H
CRC CHK High 5C H

Example program of RS-485 communication:

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3. Instruction Set

M1002
MOV H86 D1120 Setting communication protocol 9600, 7, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication time out 100ms

Transmission
request
X0
Write transmitting data in advance
Pulse
SET M1122 Sending request

X20
RS D100 K2 D120 K8
Receiving
completed
Process of receiving data
M1123
RST M1123 Receiving completed and flag reset

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3. Instruction Set

 Timing diagram:

SET M1122 X0

RS executes X20

Transmission ready M1121

Auto reset after transmitting completed

Sending request M1122

Receiving completed M1123 User has to manually

reset in program

Receiving ready M1124

Reset the status to the initial
communication ready status.
Communication reset M1125

M1127 ASCII to HEX,

MODRD/RDST/MODRW Change less than a scan cycle
data receiving/converting status
completed immediately
1 2 3 1 2 3 4 5 6 7 8
Transmitting/receiving M1128

Activated when time-out timer reaches

Receiving time out M1129 the set value
Stop timing after complete
Receive time out data is received
timer set by D1129

Converting data
Coverting data of M1131
MODRD /RDST/MODRW
3
to hexadecimal
2
Residual words of 1
transmitting data D1122
0

8
7
6
5
Residual words of
receiving data D1123 4
3
2
1
0

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3. Instruction Set

API Mnemonic Operands Function

81 D PRUN S, D Parallel Run

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F PRUN, PRUNP: 5 steps
S * *
D * * DPRUN, DPRUNP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Transmission source address D: Destination address

Description:
699. Transmit the content of S to D in octal number system format.
700. X, Y, M of KnX, KnY, KnM should be a multiple of 10, e.g. X20, M20, Y20.
701. When operand S is specified as KnX, operand D should be specified as KnM.
702. When operand S is specified as KnM, operand D should be specified as KnY.

Program Example 1:
When X3=ON, transmit the contents of K4X20 to K4M10 in octal number system format.
X3
PRUN K4X20 K4M10

X37 X36 X35 X34 X33 X32 X31 X30 X27 X26 X25 X24 X23 X22 X21 X20

M27 M26 M25 M24 M23 M22 M21 M20 M19 M18 M17 M16 M15 M14 M13 M12 M11 M10

No change

Program Example 2:
When X2=ON, transmit the content of K4M10 to K4Y20 in octal number system format.
X2
PRUN K4M10 K4Y20

These two devices will not be transmitted

M27 M26 M25 M24 M23 M22 M21 M20 M19 M18 M17 M16 M15 M14 M13 M12 M11 M10

Y37 Y36 Y35 Y34 Y33 Y32 Y31 Y30 Y27 Y26 Y25 Y24 Y23 Y22 Y21 Y20

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3. Instruction Set

API Mnemonic Operands Function

82 ASCI P S, D, n Converts HEX to ASCII
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F ASCI, ASCIP: 7 steps
S * * * * * * * * *
D * * * * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source data D: Destination of the result n: Number of digits to convert (n=1~256)

Description:
703. 16-bit conversion mode: When M1161=OFF (16-bit conversion mode), read n hexadecimal
characters from source S and convert them to ASCII. Then, store the result into high and low
bytes of D.
704. 8-bit conversion mode: When M1161=ON (8-bit conversion mode), read n hexadecimal
characters from source S and convert them to ASCII. Then, store the result into the low byte of
D (high byte of D will be set to 0).
705. Available range for Hex data: 0~9, A~F.

Program Example 1:
706. When M1161=OFF, conversion mode is 16-bit.
707. When X0=ON, read four hexadecimal characters from D10 and convert them into ASCII. Then,
store the converted characters in the register started from D20.
M1001
M1161
X0
ASCI D10 D20 K4

708. Assume:
(D10) = 0123 H ‘0’ = 30H ‘4’ = 34H ‘8’ = 38H
(D11) = 4567 H ‘1’ = 31H ‘5’ = 35H ‘9’ = 39H
(D12) = 89AB H ‘2’ = 32H ‘6’ = 36H ‘A’ = 41H
(D13) = CDEF H ‘3’ = 33H ‘7’ = 37H ‘B’ = 42H

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3. Instruction Set

709. When n is 4, the bit structure is:

D10=0123 H
0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1

0 1 2 3

D20 high byte low byte

0 0 1 1 0 0 0 1 0 0 1 1 0 0 0 0
1 31H 0 30H
D21 high byte low byte
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0

3 33H 2 32H

710. When n is 6, the bit structure is:

b15 D10 = H 0123 b0
0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1
0 1 2 3

b15 D11 = H 4567 b0

0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1
4 5 6 7
Convert to
b15 D20 b0
0 0 1 1 0 1 1 1 0 0 1 1 0 1 1 0
7 H 37 6 H 36

b15 D21 b0
0 0 1 1 0 0 0 1 0 0 1 1 0 0 0 0
1 H 31 0 H 30

b15 D22 b0
0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0
3 H 33 2 H 32

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3. Instruction Set

711. When n = 1 to 16:

n
K1 K2 K3 K4 K5 K6 K7 K8
D
D20 low byte “3” “2” “1” “0” “7” “6” “5” “4”
D20 high byte “3” “2” “1” “0” “7” “6” “5”
D21 low byte “3” “2” “1” “0” “7” “6”
D21 high byte “3” “2” “1” “0” “7”
D22 low byte “3” “2” “1” “0”
D22 high byte “3” “2” “1”
D23 low byte “3” “2”
D23 high byte “3”
D24 low byte
D24 high byte No
D25 low byte change
D25 high byte
D26 low byte
D26 high byte
D27 low byte
D27 high byte

n
K9 K10 K11 K12 K13 K14 K15 K16
D
D20 low byte “B” “A” “9” “8” “F” “E” “D” “C”
D20 high byte “4” “B” “A” “9” “8” “F” “E” “D”
D21 low byte “5” “4” “B” “A” “9” “8” “F” “E”
D21 high byte “6” “5” “4” “B” “A” “9” “8” “F”
D22 low byte “7” “6” “5” “4” “B” “A” “9” “8”
D22 high byte “0” “7” “6” “5” “4” “B” “A” “9”
D23 low byte “1” “0” “7” “6” “5” “4” “B” “A”
D23 high byte “2” “1” “0” “7” “6” “5” “4” “B”
D24 low byte “3” “2” “1” “0” “7” “6” “5” “4”
D24 high byte “3” “2” “1” “0” “7” “6” “5”
D25 low byte “3” “2” “1” “0” “7” “6”
D25 high byte “3” “2” “1” “0” “7”
D26 low byte “3” “2” “1” “0”
No
D26 high byte “3” “2” “1”
change
D27 low byte “3” “2”
D27 high byte “3”

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3. Instruction Set

Program Example 2:
712. When M1161=ON, conversion mode is 8-bit.
713. When X0=ON, read four hexadecimal data characters starting from D10 and convert them to
ASCII. Then, store the converted data in the register starting from D20.
M1000
M1161
X0
ASCI D10 D20 K4

714. Assume:
(D10) = 0123 H ‘0’ = 30H ‘4’ = 34H ‘8’ = 38H
(D11) = 4567 H ‘1’ = 31H ‘5’ = 35H ‘9’ = 39H
(D12) = 89AB H ‘2’ = 32H ‘6’ = 36H ‘A’ = 41H
(D13) = CDEFH ‘3’ = 33H ‘7’ = 37H ‘B’ = 42H
715. When n is 2, the bit structure is:

D10=0123 H
0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1

0 1 2 3

ASCII code of D20=2 is 32H

0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0
3 2
ASCII code of D21=3 is 33H
0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1
3 3

716. When n is 4, the bit structure is:

b15 D10 = H 0123 b0
0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1
0 1 2 3

Convert to
b15 D20 b0
0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0
0 H 30

b15 D21 b0
0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 1
1 H 31

b15 D22 b0
0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 0
2 H 32

b15 D23 b0
0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1
3 H 33

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3. Instruction Set

717. When n = 1 to 16:

n
K1 K2 K3 K4 K5 K6 K7 K8
D
D20 “3” “2” “1” “0” “7” “6” “5” “4”
D21 “3” “2” “1” “0” “7” “6” “5”
D22 “3” “2” “1” “0” “7” “6”
D23 “3” “2” “1” “0” “7”
D24 “3” “2” “1” “0”
D25 “3” “2” “1”
D26 “3” “2”
D27 “3”
D28
D29 No
D30 change
D31
D32
D33
D34
D35

n
K9 K10 K11 K12 K13 K14 K15 K16
D
D20 “B” “A” “9” “8” “F” “E” “D” “C”
D21 “4” “B” “A” “9” “8” “F” “E” “D”
D22 “5” “4” “B” “A” “9” “8” “F” “E”
D23 “6” “5” “4” “B” “A” “9” “8” “F”
D24 “7” “6” “5” “4” “B” “A” “9” “8”
D25 “0” “7” “6” “5” “4” “B” “A” “9”
D26 “1” “0” “7” “6” “5” “4” “B” “A”
D27 “2” “1” “0” “7” “6” “5” “4” “B”
D28 “3” “2” “1” “0” “7” “6” “5” “4”
D29 “3” “2” “1” “0” “7” “6” “5”
D30 “3” “2” “1” “0” “7” “6”
D31 “3” “2” “1” “0” “7”
D32 “3” “2” “1” “0”
No
D33 “3” “2” “1”
change
D34 “3” “2”
D35 “3”

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3. Instruction Set

API Mnemonic Operands Function

83 HEX P S, D, n Converts ASCII to HEX
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F HEX, HEXP: 7 steps
S * * * * * * * * *
D * * * * * *
n * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: source data D: Destination for the result n: number of digits to convert (n=1~256)

Description:
718. 16-bit conversion mode: When M1161=OFF, the conversion mode is 16-bit. Convert 16-bit
ASCII data of S (high and low byte) to hexadecimal and then store the result in D. The number
of converted ASCII characters is set by n.
719. 8-bit conversion mode: When M1161=ON, the conversion mode is 8-bit. Convert 16-bit ASCII
code of S (high and low byte) to hexadecimal data characters and then transmit to low byte of
D. The number of converted ASCII codes is set by n. (high byte of D set to 0)
720. Available range for Hex data: 0~9, A~F

Program Example 1:
721. When M1161=OFF, it is 16-bit conversion mode.
722. When X0=ON, read ASCII bytes from starting register D20 and convert them to hexadecimal
characters. Then, store the converted data to four registers starting with D10.
M1001
M1161
X0
HEX D20 D10 K4

723. Assume:
HEX HEX
S ASCII code S ASCII code
conversion conversion
D20 low byte H 43 “C” D24 low byte H 34 “4”
D20 high byte H 44 “D” D24 high byte H 35 “5”
D21 low byte H 45 “E” D25 low byte H 36 “6”
D21 high byte H 46 “F” D25 high byte H 37 “7”
D22 low byte H 38 “8” D26 low byte H 30 “0”
D22 high byte H 39 “9” D26 high byte H 31 “1”
D23 low byte H 41 “A” D27 low byte H 32 “2”

M-N
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3. Instruction Set

HEX HEX
S ASCII code S ASCII code
conversion conversion
D23 high byte H 42 “B” D27 high byte H 33 “3”
724. When n is 4, the bit structure is:

D20 0 1 0 0 0 1 0 0 0 1 0 0 0 0 1 1

44H D 43H C

D21 0 1 0 0 0 1 1 0 0 1 0 0 0 1 0 1
46H F 45H E

D10 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1

C D E F

725. When n = 1 to 16:

D
D13 D12 D11 D10
n
1 ***C H
2 **CD H
3 *CDE H
4 CDEF H
The used
5 ***C H DEF8 H
registers which
6 **CD H EF89 H
are not
7 *CDE H F89A H
specified are all
8 CDEF H 89AB H
0
9 ***C H DEF8 H 9AB4 H
10 **CD H EF89 H AB45 H
11 *CDE H F89A H B456 H
12 CDEF H 89AB H 4567 H
13 ***C H DEF8 H 9AB4 H 5670 H
14 **CD H EF89 H AB45 H 6701 H
15 *CDE H F89A H B456 H 7012 H
16 CDEF H 89AB H 4567 H 0123 H

Program Example 2:
726. When M1161=ON, it is 16-bit conversion mode.
M1000
M1161
X0
HEX D20 D10 K4

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3. Instruction Set

727. Assume:
HEX HEX
S ASCII code S ASCII code
conversion conversion
D20 H 43 “C” D28 H 34 “4”
D21 H 44 “D” D29 H 35 “5”
D22 H 45 “E” D30 H 36 “6”
D23 H 46 “F” D31 H 37 “7”
D24 H 38 “8” D32 H 30 “0”
D25 H 39 “9” D33 H 31 “1”
D26 H 41 “A” D34 H 32 “2”
D27 H 42 “B” D35 H 33 “3”
728. When n is 2, the bit structure is
D20 0 1 0 0 0 0 1 1
43H C

0 1 0 0 0 1 0 0
D21
44H D

0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 1
D10
C D
729. When n = 1 to 16:
D
D13 D12 D11 D10
n
1 ***C H
2 **CD H
3 *CDE H
4 CDEF H
The used
5 ***C H DEF8 H
registers which
6 **CD H EF89 H
are not
7 *CDE H F89A H
specified are all
8 CDEF H 89AB H
0
9 ***C H DEF8 H 9AB4 H
10 **CD H EF89 H AB45 H
11 *CDE H F89A H B456 H
12 CDEF H 89AB H 4567 H
13 ***C H DEF8 H 9AB4 H 5670 H
14 **CD H EF89 H AB45 H 6701 H
15 *CDE H F89A H B456 H 7012 H
16 CDEF H 89AB H 4567 H 0123 H

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3. Instruction Set

API Mnemonic Operands Function

84 CCD P S, D, n Check Code
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F CCD, CCDP: 7 steps
S * * * * * * *
D * * * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: source address D: Destination for storing the check sum n: Number of values to use in the
instruction (n=1~256)

Description:
730. This instruction is used to create the check sum for data packets to ensure data integrity.
731. 16-bit conversion mode: When M1161=OFF, the conversion mode is 16-bit. Create a check
sum of n words from the register specified by S and store the check sum in the register
specified by D. The parity bits are in D +1.
732. 8-bit conversion mode: When M1161=ON, conversion mode is 8-bit. Create a checksum of n
words (8-bits per byte, only low bytes are available) from the register specified by S and store
the check sum in the register specified D. The parity bits are in D +1

Program Example 1:
733. When M1161=OFF, the conversion mode is 16-bit.
734. When X0=ON, the checksum for the 6 words from registers D0-D5 is calculated and stored in
D100. The parity bits are stored in D101.
M1000
M1161
X0
CCD D0 D100 K6

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-435
3. Instruction Set

(S) Content of data(words)

D0 low byte K100 = 0 1 1 0 0 1 0 0
D0 high byte K111 = 0 1 1 0 1 1 1 1
D1 low byte K120 = 0 1 1 1 1 0 0 0
D1 high byte K202 = 1 1 0 0 1 0 1 0
D2 low byte K123 = 0 1 1 1 1 0 1 1
D2 high byte K211 = 1 1 0 1 0 0 1 1
D100 K867 Total
D101 0 0 0 1 0 0 0 1

An even result is indicated

by the use of 0(zero)
An odd result is indicated
by the use of 1(one)

D100 0 0 0 0 0 0 1 1 0 1 1 0 0 0 1 1

D101 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 Parity

Program Example 2:
735. When M1161=ON, it is 8-bit conversion mode.
736. When X0=ON, the checksum of the 6 words from registers D0-D5 is calculated and stored in
D100. The parity bits are stored in D101.

M1000
M1161
X0
CCD D0 D100 K6

(S) Content of data(words)

D0 low byte K100 = 0 1 1 0 0 1 0 0
D1 low byte K111 = 0 1 1 0 1 1 1 1
D2 low byte K120 = 0 1 1 1 1 0 0 0
D3 low byte K202 = 1 1 0 0 1 0 1 0
D4 low byte K123 = 0 1 1 1 1 0 1 1
D5 low byte K211 = 1 1 0 1 0 0 1 1
D100 K867 Total
D101 0 0 0 1 0 0 0 1

An even result is indicated

by the use of 0(zero)
An odd result is indicated
by the use of 1(one)

D100 0 0 0 0 0 0 1 1 0 1 1 0 0 0 1 1

D101 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 Parity

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3. Instruction Set

API Mnemonic Operands Function

85 VRRD P S, D Volume Read
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F VRRD, VRRDP: 5 steps
S * *
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Variable resistor number (0~1) D: Destination for storing the values

Description:
737. VRRD instruction is used to read the two variable resistors on ELC. The read value will be
scaled to a decimal range of 0 to 255 and stored in destination D.
738. For information on flags: M1178 and M1179 see the Note below.

Program Example:
Variable resistor values are used in this example as M1000
VRRD K0 D100
set points for two timers. The VRRD instructions read
the VR values as decimal values from 0-255. Since VRRD K1 D101

the timers are 100ms time-base timers, the range for X20
TMR T0 D100
the VR values as presets for these timers are 0-25.5 T0
seconds. Y0

X21
TMR T1 D101
T1
Y1

END

Note:
739. VR means VARIABLE RESISTOR.
740. The Variable Resistor. values are from the special D registers below and the M bits are used to
enable each VR.
Device Function
M1178 Start volume VR0
M1179 Start volume VR1
D1178 VR0 value
D1179 VR1value

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-437
3. Instruction Set

API Mnemonic Operands Function

86 VRSC P S, D Volume Scale Read
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F VRSC, VRSCP: 5 steps
S * *
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Variable resistor number (0~1) D: Destination address for the scaled value

Explanation:
The VRSC instruction reads the variable resistor values and scales them to 0-10 decimal. The
scaled values from the 2 Variable Resistors on ELC are referenced by VR 0 and VR 1. The read
data will be stored in destination address D.

Program Example 1:
When X0=ON, the scaled value (0 to10) of VR 0 is stored in address D10.
X0
VRSC K0 D10

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3. Instruction Set

API Mnemonic Operands Function

87 D ABS P D Absolute Value

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F ABS, ABSP: 3 steps
D * * * * * * * * DABS, DABSP: 5 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Source and destination for absolute value

Explanation:
741. When the instruction is executed, take the absolute value of the specified value in D.
742. This instruction works best using the pulse option (ABSP, DABSP).
743. If D uses index F, then only the 16-bit instruction is available.

Program Example:
When X0 goes from OFF→ON, take the absolute value of the contents of D0.
X0
ABS D0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-439
3. Instruction Set

API Mnemonic Operands Function

88 D PID S1, S2, S3, D PID Calculation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F PID : 9 steps
S1 *
S2 * DPID: 17 steps
S3 *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Target value (SV) S2: Present value (PV) S3: Parameters (for 16-bit instruction, uses 20
continuous addresses, for 32-bit instruction, uses 21 continuous addresses) D: Output value
(MV)

Description:
1. This instruction is specifically for PID control. PID operation will be executed only when the
sampling time is reached. PID refers to “proportion, integration and derivative”. PID control is
widely applied to mechanical, pneumatic and electronic equipment.
2. After all the parameters are set up, the PID instruction can be executed and the results will be
stored in D. D must be an unlatched data register. (If users want to designate a latched data
register area, clear the latched registers to 0 at the beginning of the user program.

Program Example:
744. Pre-write the PID parameters into all the registers before executing the PID instruction.
745. This instruction will be executed when X0=ON and the result will be stored in D150. The
instruction will not be executed when X0=OFF and the data will be unchanged.
X0
PID D0 D1 D100 D150

746. The timing chart for the PID instruction (ELC-PA/PV, ELCB-PB max. operation time is 474us,
ELCM-PH/PA max. operation time is 80us)

Scan cycle Scan cycle

A#1 + B#2 B B A+B B B A+B

Sampling time (Ts) Sampling time (Ts)

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3. Instruction Set

Note1: The time for equation calculation during PID operation (ELC- PA/PV, ELCB-PB,
ELC2-PV about 430us) (ELCM-PH/PA, ELC2-PB/PH/PA/PE approx. 72us)

Note2: The PID operation time without equation calculation (ELC- PA/PV, ELCB-PB, ELC2-PV
about 44us) (ELCM-PH/PA, ELC2-PB/PH/PA/PE approx. 8us)

Points to note:
747. There is no limit on the number of times the PID instruction can be used in a program, but the
addresses S3~ S3+19 cannot be repeated.
748. For 16-bit instructions: S3 uses 20 registers. In the example below the parameter area of the
PID instruction for S3 is D100~D119.
749. Parameter table of 16-bit S3:

Device No. Function Set-point range Explanation

Time interval between PID calculations

and updates of MV. If TS = 0, the PID
instruction will not be enabled. If TS is
1~2,000
S3: Sampling time (TS) less than 1 program scan time, the PID
(unit: 10ms)
instruction sets S3 to 1 program scan
time, i.e. the value of TS cannot be less
than one program scan time.
The proportion for minimizing the error
S3+1: Propotional gain (KP) 0~30,000(%)
between SV and PV.
The proportion for minimizing the
Integral gain (KI) 0~30,000(%) integral value (The accumulated error).
S3+2: For control mode K0~K8.
Integral time
0~30,000 (ms) For control mode K10
constant (TI)
The proportion for minimizing the
-30,000~30,000 derivative value (The rate of change of
Differential gain (KD)
(%) the process error). For control mode
S3+3:
K0~K8
Derivative time -30,000~30,000
For control mode K10
constant (TD) (ms)

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3. Instruction Set

Device No. Function Set-point range Explanation

0: Automatic control
1: Forward control (E = SV - PV).
2: Reverse control (E = PV - SV).
3: Auto-tuning of parameters exclusively for the
temperature control. The device will automatically
become K4 when the auto-tuning is completed and KP,
KI and KD are set with appropriate values (not avaliable
in the 32-bit instruction).
4: Exclusively for the adjusted temperature control (not
avaliable in the 32-bit instruction).
5: Automatic mode with MV upper/lower bound control.
When MV reaches upper/lower bound, the
accumulation of integral value stops.
S3+4: Control method 7: Manual control 1: User set an MV. The accumulated
integral value increases according to the error. It is
suggested that the control mode should be used in a
control environment which change more slowly.
ELCM-PH/PA, ELC2-PB/PH/PA/PE/PV are supported.
8: Manual control 2: User set an MV. The accumulated
integral value will stop increasing. When the control
mode becomes the automatic mode (the control mode
K5 is used), the instruction PID outputs an appropriate
accumulated integral value according to the last MV.
ELCM-PH/PA, ELC2-PB/PH/PA/PE/PV are supported.
10: TI / TD : The control changes the integra gain and the
differential gain into integral time constant and
differential time constant.

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3. Instruction Set

Device No. Function Set-point range Explanation

E = the error between SV and PV. If S3 +5

The range in which
is set as 5, when E is between -5 and 5,
S3+5: Error value (E) will 0~32,767
MV will be 0. When S3 +5 = K0, the
not work
function will not be enabled.
Ex: if S3+6 is set as 1,000, MV will be
1,000 when it exceeds 1,000. S3+6 has to
Upper limit of -32,768
S3+6: be bigger or equal to S3+7, otherwise the
saturated output (MV) ~32,767
upper bound and lower bound values will
switch.
Lower limitof -32,768 Ex: if S3+7 is set as -1,000, MV will be
S3+7:
saturated output (MV) ~32,767 -1,000 when it is smaller than -1,000..
Ex: if S3+8 is set as 1,000, the integral
value will be 1,000 when it is bigger than
Upper limit of -32,768 1,000 and the integration will stop. S3+8
S3+8:
saturated integration ~32,767 has to be bigger or equal S3 +9;
otherwise the upper bound and lower
bound values will switch
Ex: if S3+9 is set as -1,000, the integral
Lower limit of -32,768
S3+9: value will be -1,000 when it is smaller
saturated integration ~32,767
than -1,000 and the integration will stop.

The accumulated integral value is usually

Save accumulated 32-bit
for reference. Users can clear or modify it
S3+10, 11: integral value floating point
(in 32-bit floating point) according to
temporality range
specific needs.

The previous PV is usually for reference.

Save previous PV -32,768~32,
S3 +12: Users can clear or modify it according to
value temporality 767
specific needs.

Device No. Function Set-point range Explanation

S3 +13:
For system use only.
~

S3 +19:
750. When a parameter setting exceeds its range, the upper / lower bound will be selected as the
set value. However, if the control direction (DIR) exceeds the available range, it will be set to 0.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-443
3. Instruction Set

751. The PID instruction can be used in interrupt subroutines, step ladders and with the CJ
instruction.
752. The maximum error of sampling time TS = - (1 scan time + 1ms) ~ + (1 scan time). When the
error affects the output, fix the scan time or execute the PID instruction in timed interrupt.
753. The PV parameter of the PID instruction must be stable before the PID operation executes.
754. For the 32-bit instruction, S3 occupies 21 registers. In the program example above, the area
designated in S3 will be D100 ~ D120. Before execution of the PID instruction, users must
move the parameters to the designated register area with a MOV instruction. If the designated
registers are latched, use the MOVP instruction to transmit all parameters once. If S3+1~3: are
out of range, either the upper or lower limit value will be used.

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3. Instruction Set

755. Parameter table of 32-bit S3:

Device No. Function Set-point range Explanation

Time interval between PID

calculations and updates of MV. If
TS= 0, the PID instruction will not
be enabled. If TS is less than 1
1~2,000
S3 : Sampling time (TS) program scan time, the PID
(unit: 10ms)
instruction sets S3 to 1 program
scan time, i.e. the value of TS
cannot be less than one program
scan time.
The proportion for minimizing the
S3+1: Proportional gain (KP) 0~30,000(%)
error between SV and PV.
The proportion for minimizing the
integral value (The accumulated
Integration gain (KI) 0~30,000(%)
error). For control mode K0~K2,
S3+2:
K5.
Integral time constant
0~30,000 (ms) For control mode K10
(TI)
The proportion for minimizing the
-30,000~30,000( derivative value (The rate of
Derivative gain (KD)
%) change of the process error). For
S3+3:
control mode K0~K2, K5.
Derivative time -30,000~30,000
For control mode K10
constant (TD) (ms)
0: Automatic control
1: Forward control (E = SV - PV).
2: Reverse control (E = PV - SV).
5: Automatic mode with MV upper/lower bound control.
S3+4: Control mode When MV reaches upper/lower bound, the
accumulation of integral value stops.
10: TI / TD mode with MV upper/lower bound control.
When MV reaches upper/lower bound, the
accumulation of integral value stops.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-445
3. Instruction Set

Device No. Function Set-point range Explanation

E = the error between SV and PV.

If S3 +5 is set as 5, when E is
Tolerable range for error 0~
S3+5, 6: between -5 and 5, MV will be 0.
(E), 32-bit 2,147,483,647
When S3 +5 = K0, the function will
not be enabled.
Ex: if S3+6 is set as 1,000, MV will
be 1,000 when it exceeds 1,000.
Upper bound of output -2,147,483,648~
S3+7, 8: S3+6 has to be bigger or equal to
value (MV) , 32-bit 2,147,483,647
S3+7, otherwise the upper bound
and lower bound value will switch
Ex: if S3+7 is set as -1,000, MV will
Lower bound of output -2,147,483,648~
S3+9, 10: be -1,000 when it is smaller than
value (MV) , 32-bit 2,147,483,647
-1,000.
Ex: if S3+8 is set as 1,000, the
integral value will be 1,000 when it
is bigger than 1,000 and the
Upper bound of integral -2,147,483,648~
S3+11, 12: integration will stop. S3+8 has to
value, 32-bit 2,147,483,647
be bigger or equal S3 +9;
otherwise the upper bound and
lower bound value will switch.
Ex: if S3+9 is set as -1,000, the
Lower bound of integral -2,147,483,648~ integral value will be -1,000 when
S3+13, 14:
value, 32-bit 2,147,483,647 it is smaller than -1,000 and the
integration will stop.
The accumulated integral value is
Available range
Accumulated integral usually for reference. Users can
S3+15, 16: of 32-bit floating
value, 32-bit clear or modify it (in 32-bit floating
point
point) according to specific needs.
The previous PV is usually for
-2,147,483,648~ reference. Users can clear or
S3+17, 18: The previous PV, 32-bit
2,147,483,647 modify it according to specific
needs.

S3+19, 20 For system use only.

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3. Instruction Set

756. The description of 32-bit S3 and 16-bit S3 are nearly the same. The difference is the capacity of
S3+5 ~ S3+20.

PID Equations:
1. When control mode (S3+4) is selected as K0, K1, K2 or K5:
 In this control mode, the PID operation can be selected as Automatic, Forward, Reverse
or Automatic with MV upper/lower bound control modes. Forward / Reverse direction is
designated in S3+4. Other relevant settings of the PID operation are set by the registers
designated in S3 ~ S3+5.
 PID equation for control mode k0~k2:
1
MV  K P * E t   K I * E t   K D * PV t S
S

where
MV : Output value
K P : Proprotional gain
E t  : Error value
PV (t): Present measured value
SV (t): Target value
K D : Derivative gain

PV t S : Derivative value of PV(t)

K I : Integral gain
1 : Integral value of E(t)
E t 
S

 When E(t ) is smaller than 0 as the control mode is selected as forward or inverse, E(t )
will be regarded as “0"
Control mode PID equation

Forward, automatic E(t) = SV – PV

Inverse E(t) = PV – SV

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-447
3. Instruction Set

 Control diagram:

In diagram below, S is the derivative value, referenced to “(PV﹣previous PV) ÷ sampling

time”. 1 / S is integral value, referenced to “previous integral value + (error value × sampling
time)”. G(S) refers to the device being controlled.

PID operation is within dotted area

1/S KI
+
+ +
KP G(s)
+

 The equation above illustrates that this operation is different from a general PID
operation in the way the derivative value is applied. To avoid the fault that the transient
derivative value could be too big when a general PID instruction is first executed, our PID
instruction monitors the derivative value of the PV. When the variation of PV is excessive, the
instruction will reduce the output MV
2. When control mode (S3+4) is selected as K3 and K4:
 The equation is exclusively for temperature control:

1  1  1 
MV   E t    E t    K D * E t S  ,
KP  KI  S 

where E t   SV t  - PV t 
 Control diagram:

In diagram below, 1/KI and 1/KP refer to “divided by KI” and “divided by KP”. Because this
mode is exclusively for temperature control, users must use the PID instruction together with
the GPWM instruction. See Example 3 below for more details.

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3. Instruction Set

PID operation is within dotted area

1/S 1/K I
+
+ +
1/K P G(s)
+

S KD

 This equation is exclusively designed for temperature control. Therefore, when the
sampling time (TS) is set to 4 seconds (K400), the range of output value (MV) will be K0 ~
K4,000 and the cycle time of the GPWM instruction used together has to be set as 4 seconds
(K4000) as well.
 Auto tuning is available by, selecting K3 (auto-tuning). After all the parameters are
adjusted (the control direction will be automatically set as K4), parameters can be modified
based on the adjusted results.
3. When control mode (S3+4) is selected as K10:
 S3+2 (KI) and S3+3 (KD) in this mode will be switched to parameter settings of Integral
time constant (TI) and Derivative time constant (TD).
 When the output value (MV) reaches the upper bound, the accumulated integral value
will not increase. Also, when MV reaches the lower bound, the accumulated integral value will
not decrease.
 The equation for this mode will be:

 1 
MV  K P   E t    E t dt  TD E t 
d
 TI dt 

Where

Et   SV t  - PV t 
 Control diagram:

PID operation is within dotted area

1/S 1/T I
+
+ +
KP G(s)
+

S TD

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3. Instruction Set

Notes and suggestion:

757. S3 + 3 can only be in the range 0 ~ 30,000.
758. When the three main parameters are adjusted, KP, KI and KD (S3 + 4 = K0 ~ K2), adjust KP first
and reset KI and KD to 0. When the output can roughly be controlled, proceed to increase KI
and KD (see example 4 below for adjustment methods). KP = 100 refers to 100%, i.e. the
proportional gain to the error is 1. KP < 100% will decrease the error and KP > 100% will
increase the error
759. When the temperature auto-tuning function is selected(S3 + 4 = K3, K4), it is suggested to
store the parameters in D registers in the latched area to prevent the adjusted parameters
from being cleared when the controller is powered down or when it is placed in program mode.
There is no guarantee that the adjusted parameters are suitable for every control requirement.
Users can modify the adjusted parameters according to specific needs, but it is suggested to
modify only KI or KD.
760. The PID instruction has to be controlled with many parameters; therefore care should be taken
when setting each parameter to prevent the PID operation from going out of control.

Example 1: Block diagram for positioning application (S3+4 = 0)

MV Controlled
Position instruction PID
(SV) device

Encoder

Example 2: Block diagram for an AC motor drive application (S3+4 = 0)

S+MV AC motor
Speed instruction (S)
drive

Acceleration/deceleration
output (MV)
Speed
Acceleration/deceleration detection
instruction (SV) PID
device (P)
Actual acceleration/
deceleration speed
(PV = S - P)

Example 3: Block diagram for a temperature control application (S3+4 = 1)

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3. Instruction Set

Heating (MV)
Temperature instruction (SV) PID Heater

Temperature
detection
Actual temperature device
(PV)

Example 4: Adjusting PID parameters

Assume that the transfer function of the controlled device G(S) in a control system is a first-order

function G s   b (model of general motors), SV = 1, and sampling time (TS) = 10ms. Suggested
sa

steps for adjusting the parameters are as follows:

Step1:
Set KI and KD as 0, and KP as 5, 10, 20, 40. Record the SV and PV respectively and the results are
per the figure below.
1.5

KP =40 SV=1
K P =20 K P =10
1

KP =5
0.5

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Time (sec)

Step 2:
When KP is 40, response overshoot occurs, so we will not select it.
When KP is 20, PV response is close to SV and won’t overshoot, but transient MV will be too large
due to a fast start-up. A better curve is needed.
When KP is 10, PV response is close to SV and is smooth. We can consider using it.
When KP is 5, the response is too slow. So we won’t use it.

Step 3:
Select KP = 10 and increase KI gradually, e.g. 1, 2, 4, 8. KI should not be bigger than KP. Then,
increase KD as well, e.g. 0.01, 0.05, 0.1, 0.2. KD should not exceed 10% of KP. Finally we obtain the
curves for PV and SV below.

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3. Instruction Set

1.5

PV=SV

0.5
K P =10,K I =8,K D=0.2

0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
Time (sec)

Note: The example is only for reference. Users have to adjust parameters according to the condition
of the actual control system.

Example 5: Transition between the manual mode (K7) and the automatic mode (K5)
If the setting of the PID parameters is complete, and the control mode is the manual mode (K7), the
control curve will be as shown below.

If the control mode becomes the automatic mode (K5), the output value MV changes from the output
value set by users to the output value of the PID operation.
Example 6: Transition between the manual mode (K8) and the automatic mode (K5)
If the setting of the PID parameters is complete, and the control mode is the manual mode (K8), the
control curve will be as shown below.

If the control mode becomes the automatic mode (K5), the accumulated integral value will be the
integral value converted from the last MV, and the accumulated integral value will be converted into
the output value of the PID operation.
The program for example 5 and program 6 are shown below. In the figure below, ,M0 is a flag for

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3. Instruction Set

enabling the instruction PID. When M1 is On, the manual mode is used. When M1 is Off, the
automatic mode is used.

Application 1:
PID instruction in pressure control system. (Use the block diagram in example 1)
Control purpose:
Enabling the control system to reach the target pressure.
Control properties:
The system requires a gradual control. Therefore, the system will be overloaded or out of
control if the process progresses too fast.
Suggested solution:
Solution 1: Longer sampling time
Solution 2: Using delay instruction. See the figure below

0rpm
0 0 0V
3000
511 rpm 255 5V

Pressure Set value MV Speed AC

SV MV converted
SV (D0) ramp up PID converted motor
D1 D5 to to drive
PV speed voltage D1116

Wave Voltage
A Wave
B D1110 converted pressure
to meter
SV

0 0V

511 10V

SV SV

D2 stores increased
280 280 value of each shift
250 D3 stores the time interval
200 of each shift
150
100
50 Values in can modify D2 and D3
0 t t according to actual requirement
0
Wave A Wave B

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3. Instruction Set

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3. Instruction Set

Example program of SV ramp up function:

M1002
MOV K10 D3

M0
TMR T0 D3

T0
RST T0

> D0 D1 MOV K50 D2

< D0 D1 MOV K-50 D2

= D0 D1 MOV K0 D2

ADD D2 D1 D1

CMP D2 K0 M10

M10
> D1 D0 MOV D0 D1

M12
< D1 D0 MOV D0 D1

M0
PID D1 D1116 D10 D5

Application 2:
Speed control systems and pressure control systems operate separately (use the diagram of
Example 2)
Control purpose:
After the speed control operates in open loop for a period of time, add a pressure control
system (PID instruction) to perform a close loop control.
Control properties:
Since the speed and pressure control systems are not interrelated, we have to structure an
open loop for speed control first followed by a close loop pressure control. If there is concern
that the pressure control system changes excessively, consider adding the SC ramp-up
function illustrated in Application 1 into this control. See the control diagram below.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-455
3. Instruction Set

0
255
M3 M2=ON

D40 speed
+ D32 convert D1116 AC
SV of
speed D30 to drive
+ voltage
D31
0rpm
3000rpm MV
convert to
accel/decel

D0 M0=ON D5 MV
SV SV PV D1110 pressure
SV of D1
ramp-up PID
pressure meter
(optional)
M1=ON

Part of the example program:

M1002
MOV K1000 D40

M0
MOV D0 D1

M1
MOV K0 D5

M3
MOV D40 D30

M2
ADD D30 D31 D32

> D32 K3000 MOV K3000 D32

< D32 K0 MOV K0 D32

DIV D32 K11 D32

> D32 K255 MOV K255 D32

MOV D32 D1116

M1
PID D1 D1110 D10 D5

Application 3:

Using auto-tuning for temperature control

Control purpose:

Calculating optimal parameters for the PID instruction for temperature control

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3. Instruction Set

Control properties:

Users may not be familiar with a new temperature environment. In this case, selecting auto-tuning
(S3+4 = K3) for an initial adjustment is suggested. After initial tuning is complete, the instruction will
auto modify the control mode to the mode exclusively for adjusted temperature (S3+4 = K4). In this
example, the control environment is an oven. See the example program below.
M1002
MOV K4000 D20

MOV K400 D200

MOV K800 D10

TO K0 K2 K2 K1

M1013
FROM K0 K6 D11 K1
M0
MOV K3 D204

RST M0
M1
PID D10 D11 D200 D0

GPWM D0 D20 Y0

END

Results of initial auto-tuning

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-457
3. Instruction Set

Auto tuning area PID control area

S3+4 = k3 S3+4 = k4

Results of using adjusted parameters generated by initial auto-tuning function.

From the figure above, we can see that the temperature control after auto-tuning is working
fine and it used only approximately 20 minutes for the control. Next, we modify the target
temperature from 80°C to 100°C and obtain the result below.

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3. Instruction Set

From the result above, we can see that when the parameter is 100°C, temperature control works
fine and requires only 20 minutes which is the same as that in 80°C above.

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3. Instruction Set

API Mnemonic Operands Function

89 PLS S Rising-edge Output
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F PLS: 3 steps
S * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Rising edge pulse output

Description:
When X0=OFF→ON (rising-edge trigger), the PLS instruction will be executed and M0 will be On for
one program scan..

Program Example:
Ladder Diagram:
X0
PLS M0
M0
SET Y0

Timing Diagram:

X0
A scan cycle
M0

Instruction: Operation:
LD X0 ; Load A contact of X0
PLS M0 ; M0 rising-edge output
LD M0 ; Load the contact A of M0
SET Y0 ; Y0 latched (ON)

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3. Instruction Set

API Mnemonic Operands Function

90 LDP S Rising-edge Detection Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F LDP: 3 steps
S * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Bit address

Description:
The LDP instruction is similar to the LD instruction, but LDP requires a false-to-true transition of S to
be energized for one program scan. Then, the state of S must go false, then true again to be
energized.

Program Example:
Ladder Diagram:

X0 X1
Y1

Instruction: Operation:
LDP X0 ; Start X0 rising-edge detection
AND X1 ; Series connection A contact of X1
OUT Y1 ; Drive Y1 coil

Points to Note:
761. If a specific rising-edge contact state is ON before the ELC is powered, the rising-edge contact
will be True after power is applied to the ELC
762. If X1 is ON and X0 transitions from OFF to ON, Y1 will be energized for one program scan,
then it will turn OFF. Y1 will not turn on again until X0 goes OFF, then ON again. .

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3. Instruction Set

API Mnemonic Operands Function

91 LDF S Falling-edge Detection Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F LDF: 3 steps
S * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Bit address

Description:
The LDF instruction is similar to the LD and LDP instructions, but LDF requires a true-to-false
transition of S to be energized for one program scan. Then, the state of S must go true, then false
again to be energized.

Program Example:
Ladder Diagram:

X0 X1
Y1

Instruction: Operation:
LDF X0 ; Start X0 falling-edge detection
AND X1 ; Series connection A contact of X1
OUT Y1 ; Drive Y1 coil

Points to Note:
1 If specific rising-edge contact state is ON before ELC is powered, the rising-edge contact
will be True after power is applied to the ELC

2 If X1 is ON and X0 transitions from ON to OFF, Y1 will be energized for one program scan,
then it will turn OFF. Y1 will not turn on again until X0 goes ON, then OFF again. .

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3. Instruction Set

API Mnemonic Operands Function

92 ANDP S Rising-edge Series Connection

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F ANDP: 3 steps
S * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Bit address

Description:
The ANDP instruction is used to detect the rising edge of series contacts.

Program Example:
Ladder Diagram:

X0 X1
Y1

Instruction: Operation:
LD X0 ; Load A contact of X0
ANDP X1 ; X1 rising-edge detection in series connection
OUT Y1 ; Drive Y1 coil

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3. Instruction Set

API Mnemonic Operands Function

93 ANDF S Falling-edge Series Connection

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F ANDF: 3 steps
S * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Bit address

Description:
The ANDF instruction is used to detect the falling edge of series contacts.

Program Example:
Ladder Diagram:

X0 X1
Y1

Instruction: Operation:
LD X0 ; Load A contact of X0
ANDF X1 ; X1 falling-edge detection in series connection
OUT Y1 ; Drive Y1 coil

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3. Instruction Set

API Mnemonic Operands Function

94 ORP S Rising-edge Parallel Connection
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F ORP: 3 steps
S * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: The parallel connection device that is detected switching from OFF to ON

Description:
The ORP instruction is used to detect the rising edge of a parallel contact.

Program Example:
Ladder Diagram:
X0
Y1
X1

Instruction: Operation:
LD X0 ; Load A contact of X0
ORP X1 ; X1 rising-edge detection in parallel connection
OUT Y1 ; Drive Y1 coil

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3. Instruction Set

API Mnemonic Operands Function

95 ORF S Falling-edge Parallel Connection
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F ORF: 3 steps
S * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: The parallel connection device that is detected switching from ON to OFF

Description:
The ORF instruction is used to detect the falling edge of a parallel contact.

Program Example:
Ladder Diagram:
X0
Y1
X1

Instruction: Operation:
LD X0 ; Load A contact of X0
ORF X1 ; X1 falling-edge detection in parallel connection
OUT Y1 ; Drive Y1 coil

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API Mnemonic Operands Function

96 TMR S1, S2 Timer
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F TMR: 5 steps
S1 *
S2 * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Timer number (T0~T255) S2: Set value (K0~K32,767)

Description:
When the TMR instruction is executed, the timer is energized and will start timing. When the Set
value of the timer is reached (accumulated value >= Set value), the timer done bit will be set. The
timer done bit for any timer must use a bit instruction addressed with the timer number (T5 for
example). The accumulative value of a timer must be used in a word type instruction and is also
addressed with the timer number (T5 for example).
A timer’s time base is determined by the timer number. Each type of ELC controller contains a
different number of timers, so to determine the time base of a timer, refer to the memory maps for
the various controllers located early in Chapter 2. For example, for all controllers timer T0 is a
100ms time base timer. This means that if the Set is K200, timer T0 will be a 20 second timer (200 x
100ms = 20 seconds). There are also 10ms and 1ms time base timers for most ELC controllers.

Program example:
Ladder Diagram:
X0
TMR T5 K1000

Instruction: Operation:
LD X0 ; Load A contact of X0
TMR T5 K1000 ; T5 timer Setting is K1000

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3. Instruction Set

API Mnemonic Operands Function

97 CNT S1, S2 Counter 16-bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F CNT: 5 steps
S1 *
S2 * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: 16 bit counter number (C0~C199, ELCB-PB only C0~C127) S2: Set value (K0~K32,767)

Description:
Each time the conditions preceding a CNT instruction transition from false-to-true, the counter will
increment by one. When the accumulative value of a counter equals its Set value, the counter done
bit will turn on. The done bit of a counter is the counter number (C2 for example) and must be used
in a bit instruction. When the counter number is used in a word instruction, it is the accumulative
value (the count value). If the conditions preceding a CNT instruction transition from false-to-true
after the Set value has been reached, the done bit contact and the accumulative value will remain
unchanged. To reset a counter, use the RST instruction.

Program example:
Ladder Diagram:
X0
CNT C20 K100

Instruction: Operation:
LD X0 ; Load A contact of X0
CNT C20 K100 ; C20 counter Setting is K100

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API Mnemonic Operands Function

97 DCNT S1, S2 Counter 32-bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DCNT: 9 steps
S1 *
S2 * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: 32 bit counter number S2: Set value

Description:
763. DCNT is the startup instruction for the 32-bit counters C200 ~ C254(ELCB-PB: only
C235~C254).
764. S2 Set value: K-2,147,483,648~K2,147,483,647. (C243/C244 in ELCM-PH/PA:
0~K2,147,483,647).
765. The 32-bit counters are listed in the following table.
Model General Counter High speed Counter
ELCB-PB - C235~C254
ELC-PV/PA, ELC2-PV C200~C234 C235~C254
ELCM-PH/PA C200~C231 C232~C254
ELC2-PB/PH/PA/PE C200~C232 C233~C254
766. General counters are 32-bit up/down counters. The present value will count up (add 1) or
count down (subtract 1) according to the flags M1200~M1234 (setting count mode) when
command DCNT is OFF->ON.
Model General Counter Flag (Count direction)
ELCB-PB - -
ELC-PV/PA, ELC2-PV C200~C234 M1200~M1234
ELCM-PH/PA C200~C231 M1200~M1231
ELC2-PB/PH/PA/PE C200~C232 M1200~M1232
767. The count direction is determined by M1200-M1234. Each M-bit is for a specific counter
number (C200-C234). When a particular counters direction bit is off, the counter will count up.
When the bit is on, the counter will count down.
768. For information on high speed counters, refer to section 2.12.
769. When the DCNT instruction is OFF, the counter will stop counting, but the count values will not
be cleared. Use the RST instruction to reset a counter. High-speed counters can use a specific
external input to reset these counters.

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3. Instruction Set

Program Example:
Ladder Diagram:
M0
DCNT C254 K1000

Instruction: Operation:
LD M0 ; Load A contact of M0
DCNT C254 K1000 ; C254 counter Setting is K1000

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API Mnemonic Operands Function

98 INV - Inverse Operation

OP Description Program Steps

N/A Invert the current result of the internal ELC operations INV: 1 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Description:
Invert the state of the conditions preceding the INV Instruction. If the conditions preceding the INV
instruction are true, the output will be off. If the conditions preceding the INV instruction are false,
the output will be on.

Program Example:
Ladder Diagram:
X0
Y1

Instruction: Operation:
LD X0 ; Load A contact of X0
INV ; Inverting the operation result
OUT Y1 ; Drive Y1 coil

In the example above, when X0 is on, output Y1 will be off. When X0 is off, output Y1 will be on.

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3. Instruction Set

API Mnemonic Operands Function

99 PLF S Falling-edge Output

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F PLF: 3 steps
S * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Output address

Description:
When X0= ON→OFF (falling-edge trigger), the PLF instruction will be executed and M0 will be on for
one program scan..

Program Example:
Ladder Diagram:
X0
PLF M0
M0
SET Y0

Timing Diagram:

X0
A scan cycle
M0

Command Code: Operation:

LD X0 ; Load A contact of X0
PLF M0 ; M0 falling-edge output
LD M0 ; Load the contact A of M0
SET Y0 ; Y0 latched (ON)

API Mnemonic Operands Function

100 MODRD S1, S2, n Modbus Data Read
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MODRD: 7 steps
S1 * * *
S2 * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

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3. Instruction Set

Operands:
S1: External device’s node address (K0~K254) S2: Modbus Data address of the external device
n: Number of registers to read (K1＜n≦K6)

Description:
770. MODRD instruction supports COM2 (RS-485).
771. MODRD is a Modbus read instruction for the MODBUS ASCII / RTU communication modes.
The MODRD instruction can be used to read MODBUS data from external devices that support
MODBUS.
772. If the Modbus data address S2 is illegal for the external device, the device will respond with an
error. The ELC will record the error code in D1130 and set bit M1141.
773. The response data from the external device will be stored in D1070 to D1085. After receiving
the reply, the ELC verifies that the reply is correct. If there is an error, then M1140 = ON.
774. If ASCII mode is selected, the ELC will automatically convert the response data to hex and
store it in D1050 to D1055. D1050 to D1055 will be invalid if using RTU mode for ELC-PV,
ELC-PV2 controllers.
775. After M1140 or M1141 = ON, the command will be sent to the external device again. If the
response is correct, then the flags M1140, M1141 will be reset.
776. There is no limit on the number of times this instruction can be used in the program, but only
one instruction can be executed at a time on the same COM port.
777. Rising-edge contact (LDP, ANDP, ORP) and falling-edge contact (LDF, ANDF, ORF) can not
be used with MODRD instruction.
778. Refer to the RS instruction for more information. The RS instruction also uses COM2.
779. ELCB-PB doesn’t support the index registers E, F modification.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-473
3. Instruction Set

Program Example 1:
Communication between the ELC and MVX AC drives (ASCII Mode, M1143= OFF)

M1002
MOV H87 D1120 Setting communication protocol 9600, 8, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication time out 100ms

X1
SET M1122 Setting transmission flag
X0
MODRD K1 H0708 K6
Setting communication command:
Data length 6 words
Data address H0708
Device address 01
M1127 ELC will convert the receiving data stored
Process of receiving data in D1070~D1085 from ASCII character to
value and store the value in D1050~D1055.

Receiving RST M1127 Receiving completed and flag reset

completed

ELC  MVX, ELC transmits: “01 03 0708 0006 E7”

MVX  ELC , ELC receives: “01 03 0C 0100 1766 0000 0000 0136 0000 3B”
ELC transmit message
Register Data Descriptions
D1089 low byte ‘0’ 30 H ADR 1
ADR (1,0) is AC drive address
D1089 high byte ‘1’ 31 H ADR 0
D1090 low byte ‘0’ 30 H CMD 1
CMD (1,0) is instruction code
D1090 high byte ‘3’ 33 H CMD 0
D1091 low byte 0’ 30 H
D1091 high byte ‘7’ 37 H
Starting data address
D1092 low byte ‘0’ 30 H
D1092 high byte ‘8’ 38 H
D1093 low byte ‘0’ 30 H
D1093 high byte ‘0’ 30 H
Number of data (count by word)
D1094 low byte ‘0’ 30 H
D1094 high byte ‘6’ 36 H
D1095 low byte ‘E’ 45 H LRC CHK 1 LRC CHK (0,1) is error check
D1095 high byte ‘7’ 37 H LRC CHK 0 code

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3. Instruction Set

ELC receive message

Register Data Descriptions
D1070 low ‘0’ 30 H ADR 1
D1070 high ‘1’ 31 H ADR 0
D1071 low byte ‘0’ 30 H CMD 1
D1071 high byte ‘3’ 33 H CMD 0
D1072 low byte ‘0’ 30 H
Number of data (count by byte)
D1072 high byte ‘C’ 43 H
D1073 low byte ‘0’ 30 H ELC automatically converts
D1073 high byte ‘1’ 31 H Content of address ASCII codes to hex and
D1074 low byte ‘0’ 30 H 0708 H stores the converted values
D1074 high byte ‘0’ 30 H in D1050 = 0100 H
D1075 low byte ‘1’ 31 H ELC automatically converts
D1075 high byte ‘7’ 37 H Content of address ASCII codes to hex and
D1076 low byte ‘6’ 36 H 0709 H stores the converted values
D1076 high byte ‘6’ 36 H in D1051 = 1766 H
D1077 low byte ‘0’ 30 H ELC automatically converts
D1077 high byte ‘0’ 30 H Content of address ASCII codes to hex and
D1078 low byte ‘0’ 30 H 070A H stores the converted values
D1078 high byte ‘0’ 30 H in D1052 = 0000 H
D1079 low byte ‘0’ 30 H ELC automatically converts
D1079 high byte ‘0’ 30 H Content of address ASCII codes to hex and
D1080 low byte ‘0’ 30 H 070B H stores the converted values
D1080 high byte ‘0’ 30 H in D1053 = 0000 H
D1081 low byte ‘0’ 30 H ELC automatically converts
D1081 high byte ‘1’ 31 H Content of address ASCII codes to hex and
D1082 low byte ‘3’ 33 H 070CH stores the converted values
D1082 high byte ‘6’ 36 H in D1054 = 0136 H
D1083 low byte ‘0’ 30 H ELC automatically converts
D1083 high byte ‘0’ 30 H Content of address ASCII codes to hex and
D1084 low byte ‘0’ 30 H 070D H stores the converted values
D1084 high byte ‘0’ 30 H in D1055 = 0000 H
D1085 low byte ‘3’ 33 H LRC CHK 1
D1085 high byte ‘B’ 42 H LRC CHK 0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-475
3. Instruction Set

Program Example 2:
Communication between ELC and MVX AC drive (RTU Mode, M1143= ON)

M1002
MOV H87 D1120 Setting communication protocol 9600, 8, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication timeout 100ms

SET M1143 Setting as RTU mode

X1
SET M1122 Setting transmission flag
X0
MODRD K1 H0708 K2
Setting communication command:
Data length 2 words
Data address H0708
Device address 01
M1127
The receiving data in HEX value
Process of receiving data
format is stored in D1070~D1085.

Receiving RST M1127 Receiving completed and flag reset

completed

ELC  MVX, ELC transmits: 01 03 0708 0002 44 BD

MVX  ELC, ELC receives: 01 03 04 1770 0000 FE 5C
ELC transmit message
Register Data Descriptions
D1089 low byte 01 H Address
D1090 low byte 03 H Function
D1091 low byte 07 H
Starting data address
D1092 low byte 08 H
D1093 low byte 00 H
Number of data (count by word)
D1094 low byte 02 H
D1095 low byte 44 H CRC CHK Low
D1096 low byte BD H CRC CHK High
ELC receive message
Register Data Descriptions
D1070 low byte 01 H Address
D1071 low byte 03 H Function
D1072 low byte 04 H Number of data (count by byte)
D1073 low byte 17 H
Content of address 2102 H
D1074 low byte 70 H
D1075 low byte 00 H Content of address 2103 H

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3. Instruction Set

D1076 low byte 00 H

Program Example 3:
780. The ELC is connected to an MVX AC drive (ASCII Mode, M1143= OFF). If a message
times-out occurs, retry the message.
781. When X0= ON, read data from address H0708 of device 01 (MVX) and save the reply data in
D1070~D1085 in ASCII format. The ELC will auto convert its contents to hex and save it in
D1050~D1055.
782. If flag M1129 = ON, the previous message timed out.
783. If flag M1140 = ON, an error was received for the previous message
784. If flag M1141 = ON, an invalid Modbus data address occurred.
785. When any of the above flags are set, the message was not delivered successfully. The
program can clear the flag and retransmit the message. This is demonstrated in the example
program below.

M1002
MOV H87 D1120 Setting communication protocol to 9600, 8, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication time-out to 100ms

X0
SET M1122 Setting transmission request

M1129
Communication time-out Retry
M1140
Data receive error Retry
M1141
Sending address error Retry
X0
MODRD K1 H0708 K6
Setting communication command:
Data length 6 words
Data address H0708
Device address 01
Receiving completed
M1127
The receiving data in ASCII format stored in D1070-D1085.
Handle received data ELC will convert to numeral and save into D1050-D1055 automatically.

RST M1127 Receiving completed and flag reset

M1129
RST M1129 Communication time-out and flag reset

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-477
3. Instruction Set

API Mnemonic Operands Function

101 MODWR S1, S2, n Modbus Data Write
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MODWR: 7 steps
S1 * * *
S2 * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: External device’s node address (K0~K254) S2: Modbus data address in external device
n: Data to be written (ELC address or constant value)

Description:
786. MODWR instruction supports COM2 (RS-485).
787. MODWR is a specific instruction for the MODBUS ASCII / RTU mode communications. The
MODWR instruction can be used to write MODBUS data to external devices that support
MODBUS communications.
788. If the address of S2 is illegal for the designated communication device, the device will respond
with an error and the ELC will record the error code in D1130 and M1141 will be ON. For
example, 8000H is an illegal register address in the MVX drive, resulting in M1141 = ON,
D1130=2. The error code is generated by the external device. To determine the cause of the
error, the user manual for the external device will need to be referenced. In this case the
MVX series user manual would need to be referenced.
789. The response from the external device will be stored in D1070 to D1076. After receiving the
response, the ELC will check if there are any data errors. If there is an error, then M1140 =
ON.
790. After M1140 or M1141 = ON, resend the correct data to the external device again. If the
response is correct, then the flags M1140, M1141 will be cleared.
791. There is no limit on the number of times this instruction can be used in the program, but only
one instruction can be executed at a time for the same COM port.
792. If rising-edge contacts (LDP, ANDP, ORP) or falling-edge contacts (LDF, ANDF, ORF) are
used as conditions for the MODWR instruction, energizing flag M1122 is required to initiate the
message request.
793. Refer to the RS instruction for more information. The RS instruction also uses COM2.
794. ELCB-PB doesn’t support index registers E, F modification.

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3. Instruction Set

Program Example 1:
Communication between the ELC and MVX AC drives (ASCII Mode, M1143= OFF)
Program diagram
M1002
MOV H87 D1120 Setting communication protocol 9600, 8, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication timeout 100ms

X1
SET M1122 Setting transmission flag

X0
MODWR K1 H0706 H1770
Setting communication command:
Data H1770
Data address H0706
Device address 01
M1127
The receiving data in ASCII character
Process of receiving data
format is stored in D1070~D1085

RST M1127 Receiving completed and flag reset

Receiving
completed

ELC  MVX, ELC transmits: “01 06 0706 1770 65 ”

MVX  ELC, ELC receives: “01 06 0706 1770 65 ”

ELC transmit message

Register Data Descriptions
D1089 low ‘0’ 30 H ADR 1
ADR (1,0) is AC drive address
D1089 high ‘1’ 31 H ADR 0
D1090 low ‘0’ 30 H CMD 1
CMD (1,0) is instruction code
D1090 high ‘6’ 36 H CMD 0
D1091 low ‘0’ 30 H
D1091 high ‘7’ 37 H
Data address
D1092 low ‘0’ 30 H
D1092 high ‘6’ 36 H
D1093 low ‘1’ 31 H
D1093 high ‘7’ 37 H
Data contents
D1094 low ‘7’ 37 H
D1094 high ‘0’ 30 H
D1095 low ‘6’ 36 H LRC CHK 1 LRC CHK (0,1) is error check
D1095 high ‘5’ 35 H LRC CHK 0 code

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-479
3. Instruction Set

ELC receive message

Register Data Descriptions
D1070 low ‘0’ 30 H ADR 1
D1070 high ‘1’ 31 H ADR 0
D1071 low ‘0’ 30 H CMD 1
D1071 high ‘6’ 36 H CMD 0
D1072 low ‘0’ 30 H
D1072 high ‘7’ 37 H
Data address
D1073 low ‘0’ 30 H
D1073 high ‘6’ 36 H
D1074 low ‘1’ 31 H
D1074 high ‘7’ 37 H
Data content
D1075 low ‘7’ 37 H
D1075 high ‘0’ 30 H
D1076 low ‘6’ 36 H LRC CHK 1
D1076 high ‘5’ 35 H LRC CHK 0

Program Example 2:
Communication between the ELC and MVX AC drives (RTU Mode, M1143= ON)
Program diagram

M1002
MOV H87 D1120 Setting communication protocol 9600, 8, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication timeout 100ms

SET M1143 Setting as RTU mode

X1
SET M1122 Setting transmission flag
X0
MODWR K1 H0706 H1770
Setting communication command:
Write in data H1770
Data address H0706
Device address 01
M1127
The receiving data in HEX value
Process of receiving data
format is stored in D1070~D1085.
Receiving Receiving completed and flag reset
completed RST M1127

ELC  MVX, ELC transmits: 01 06 0706 1770 66 AB

MVX  ELC, ELC receives: 01 06 0706 1770 66 AB

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3. Instruction Set

ELC transmit message

Register Data Descriptions
D1089 low 01 H Address
D1090 low 06 H Function
D1091 low 07 H
Data address
D1092 low 06 H
D1093 low 17 H
Data content
D1094 low 70 H
D1095 low 66 H CRC CHK Low
D1096 low AB H CRC CHK High
ELC receive message
Register Data Descriptions
D1070 low 01 H Address
D1071 low 06 H Function
D1072 low 07 H
Data address
D1073 low 06 H
D1074 low 17 H
Data content
D1075 low 70 H
D1076 low 66 H CRC CHK Low
D1077 low AB H CRC CHK High

Program Example 3:
795. The ELC connects to an MVX AC drive (ASCII Mode, M1143= OFF). When communication
times-out, retry when the error occurs.
796. When X0= ON, the ELC will write data H1770(K6000) into address H0706 of device 01 (MVX).
797. Flag M1129 = ON when communication times-out and the program will send a request from
M1129 to re-energize M1122 to resend the message.
798. Flag M1140 = ON when response is a receive error, the program will send a request from
M1140 and re-energize M1122 to resend the message.
799. Flag M1141 = ON when the response is a received address error, the program will send a
request from M1141 and re-energize M1122 to resend the message.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-481
3. Instruction Set

M1002
MOV H87 D1120 Setting communication protocol to 9600, 8, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication timeout 100ms

X0
SET M1122 Setting transmission request

M1129
Communication time-out Retry
M1140
Data receive error Retry
M1141
Sending address error Retry
X0
MODWR K1 H0706 H1770
Setting communication command:
Data H1770
Data address H0706
Device address 01
Receiving completed
M1127
Handle received data The receiving data in ASCII format stored in D1070-D1085.

RST M1127 Receiving completed and flag reset

M1129
RST M1129 Communication time-out and flag reset

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3. Instruction Set

API Mnemonic Operands Function

107 LRC P S, n, D LRC Generator
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F LRC, LRCP: 7 steps
S *
n * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting address for the checksum operation (ASCII mode) n: Number of values to perform the
operation on (n=K1~K256) D: Destination for storing the operation result

Description:
800. n: n must be even. If n is out of range, an error will occur and the instruction will not be
executed. If an error occurs, M1067 and M1068 = ON and error code H’0E1A will be recorded
in D1067.
801. 16-bit conversion mode: When M1161= OFF, hexadecimal data that starts from the source S
will be divided into upper 8-bit and lower 8-bit values and the checksum operation will be
performed on n values. Then, the result will be stored in the upper and lower 8-bits of D.
802. 8-bit conversion mode: When M1161= ON, divide the hexadecimal data that starts with source
address S into upper 8-bit (invalid data) and lower 8-bit and perform the checksum operation
on n values. Then, store the result in the lower 8-bits of D (upper 8-bits of D will be zero (0)).
803. Flag: M1161 8/16-bit mode

Program Example:
ASCII communication mode: Data stored as following:

Register Data Descriptions

D100 low byte ‘: ’ 3A H STX

D101 low byte ‘0’ 30 H ADR 1
ADR (1,0) is AC drive address
D102 low byte ‘1’ 31 H ADR 0
D103 low byte ‘0’ 30 H CMD 1
CMD (1,0) is instruction code
D104 low byte ‘3’ 33 H CMD 0
D105 low byte ‘0’ 30 H
D106 low byte ‘7’ 37 H
Starting data address
D107 low byte ‘0’ 30 H
D108 low byte ‘8’ 38 H
D109 low byte ‘0’ 30 H Number of data (count by word)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-483
3. Instruction Set

Register Data Descriptions

D110 low byte ‘0’ 30 H

D111 low byte ‘0’ 30 H
D112 low byte ‘6’ 36 H
D113 low byte ‘E’ 45 H LRC CHK 0
LRC CHK (0,1) error check code
D114 low byte ‘7’ 37 H LRC CHK 1
D115 low byte CR DH
END
D116 low byte LF AH
The LRC CHK (0,1) above is error check code and it can be calculated with the LRC instruction
(8-bit Mode, M1161= ON).
M1000
LRC D101 K12 D113

LRC check: 01 H + 03 H + 07 H + 08 H + 00 H + 06 H = 19 H, then take the 2’s complement, E7 H.

At that time, ‘E’(45 H) is stored in the lower 8-bits of D113 and ‘7’ (37 H) is stored in the lower 8-bits
of D114.

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3. Instruction Set

API Mnemonic Operands Function

108 CRC P S, n, D CRC Generator
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F CRC, CRCP: 7 steps
S *
n * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting address for the checksum operation (RTU mode) n: Number of values to perform the
operation on (n=K1~K256) D: Destination for storing the operation result

Description:
804. If n is out of range, an error will occurred and the instruction will not be executed. If an error
occurs, M1067 and M1068 = ON and error code H’0E1A will be recorded in D1067.
805. 8-bit conversion mode: When M1161 = ON, divide the hexadecimal data that starts with
source S into the high byte (invalid data) and low byte and have the CRC operation performed
on n values and store the result in the low byte of D (upper 8-bit of D will be zero)
806. 16-bit conversion mode: W hen M1161 = OFF, divide hexadecimal data that starts with source
S into the high byte and low byte and have the CRC operation performed on n values and
store the result in the low byte and high byte of D

Program Example:
RTU communication mode: Data stored as following:
Register Data Descriptions
D100 low byte 01 H Address
D101 low byte 06 H Function
D102 low byte 07 H
Data address
D103 low byte 06 H
D104 low byte 17 H
Data content
D105 low byte 70 H
D106 low byte 66 H CRC CHK 0
D107 low byte AB H CRC CHK 1
The CRC CHK (0,1) above is the error check code and it can be calculated using the CRC
instruction (8-bit Mode, M1161= ON).
M1000
CRC D100 K6 D106

CRC check: 66 H is stored in the lower 8-bits of D106 and AB H is stored in the lower 8-bits of D107.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-485
3. Instruction Set

API Mnemonic Operands Function

110 D ECMP P S 1 , S2 , D Floating Point Compare
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DECMP, DECMPP: 13
S1 * * *
S2 * * * steps
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: 1st comparison value S2: 2nd comparison value D: Destination result, 3 consecutive bit
addresses

Description:
807. The data of S1 is compared to the data of S2 and the result (＞, ＝, ＜) is displayed via three
bit addresses beginning with D.
808. If the source operand S1 or S2 is a constant K or H, the integer value will automatically be
converted to binary floating point to compare.

Program Example:
809. If M10 is entered for D, M10~M12 will automatically be used.
810. When X0= ON, one of M10~M12 = ON. When X0= OFF, DECMP is not executed, M10~M12
will retain their previous state before X0= OFF.
811. M10~M12 are used to display the result of the DECMP.
812. Use RST or ZRST instruction to reset the result.
X0
DECMP D0 D100 M10
M10
It is ON when (D1,D0)>(D101,D100)
M11
It is ON when (D1,D0)=(D101,D100)
M12
It is ON when (D1,D0)<(D101,D100)

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3. Instruction Set

API Mnemonic Operands Function

111 D EZCP P S1, S2, S, D Floating Point Zone Compare
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DEZCP, DEZCPP: 17
S1 * * *
S2 * * * steps
S * * *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Lower limit of zone comparison S2: Upper limit of zone comparison S: Comparison value
D: Comparison result, 3 consecutive bit addresses

Description:
813. The contents of S is compared to the data range of S1~ S2 and the result (＞, ＝, ＜) is
displayed by three bit addresses beginning with D.
814. If the source operand S1 or S2 is a constant K or H, the integer value will automatically be
converted to binary floating point for the compare.
815. Operand S1 should be smaller than operand S2, when S1＞S2, S1 will be used as upper and
lower limit for the comparison.

Program Example:
816. If M10 is entered for D, M10~M12 will automatically be used.
817. When X0= ON, one of M10~M12 = ON. When X0= OFF, DEZCP instruction is not executed,
M10~M12 will retain their previous state before X0= OFF.
818. Use RST or ZRST instruction to reset the result.
X0
DEZCP D0 D10 D20 M10
M10
It is ON when (D1,D0)>(D21,D20)
M11
It is ON when (D1,D0) < (D21,D20) < (D11,D10)
M12
It is ON when (D21, D20)>(D11,D10)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-487
3. Instruction Set

API Mnemonic Operands Function

112 D MOVR P S, D Floating Point Data Move
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DMOVR, DMOVRP: 9
S
D * * * * * * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Data source of the floating point value D: Destination of the move

Description:
819. Directly enter a floating point value in S.
820. When instruction is enabled, the contents of S is moved to D.

Program Example:

When X0 = OFF, D10 and D11 will not change. When X0 = ON, move F1.200E+0 (Input F1.2, and
scientific notation F1.200E+0 to D11/D10. In ELCSoft, under “Edit Monitored Devices” enter D10
and D11 and view the floating point data value for those addresses in the floating point column. ..
X0
DMOVR F1.200E+0 D10

Remarks:
DMOVR/DMOVRP supports ELCB-PB V1.2 and ELC-PA V1.2 above.

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3. Instruction Set

API Mnemonic Operands Function

113 ETHRW S1, S2, D, n Ethernet communication
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F ETHRW: 9 steps
S1 *
S2 * * *
D *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: IP address, communication port number, and read/write mode S2: Device address D:
Source/Destination data register n: Data length (Unit: Word; Range: K1~K96)

Description:
1. S1: IP address, communication port number, and read/write mode

The operand S1 occupies five consecutive data registers. The functions are as follows.
 IP address: Two data registers are occupied, that is, S1+0 and S1+1.
IP addressIP3.IP2.IP1.IP0192.168.0.2
If S1 is D100, the values in D100 and D101 are H’0002 and H’C0A8 respectively.
D100 (S1+0) D101 (S1+1)
High Low High Low
IP1 IP0 IP3 IP2
0 2 192 168
H’0002 H’C0A8
 S1+2: Communication port number

The communication port number(k108) of the Ethernet port on ELC2-PE. The

communication ports on the left-side Ethernet modules connected to a CPU module are
numbered according to their distances from the CPU module. The numbers start from
K100 to K107.
 S1+3: Station address of a slave
 S1+4: Read/Write mode

The definition is the same as Modbus. The function codes supported are H’03, H’04,
H’06, and H’10.
2. S2: Device address

The definition is the same as Modbus.

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3. Instruction Set

3. The operand D specifies a source data register or a destination data register.

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3. Instruction Set

4. n: Length of data (Unit: word)

The setting range is K1~K96. If n exceeds the range, it will be taken as the maximum value or
the minimum value.
5. Whenever the instruction is executed, the communication command is sent. Users do not
need to enable a special flag to send the communication command.
6. The instruction can be used several times. However, if an ETHRW instruction specifies a
module, other ETHRW instructions can not send communication commands to the module.
The next communication command can not be sent until the reception is complete or the
module replies that an error occurs.
7. If a communication command is being received, the reception stops when the execution of the
instruction stops. Besides, the flag related to the command’s having being received and the
error flag are not ON.
8. The communication timeout is stored in D1349. The default timeout is 3000 milliseconds. The
range of digital values is 1~32767. If the communication timeout exceeds the range, it will be
taken as 3000 milliseconds.
9. The values of bit0~bit8 in D1395 indicate which communication port has received a command.
For example, if the communication port built in ELC2-PE has received a command, “BLD
D1395 K8” is satisfied.
10. The values of bit0~bit8 in D1396 indicate which module For example, if a reception error
occur in the first left-side EN01-SL, “BLD D1396 K0” is satisfied.
11. When the instruction is executed, user can not use the online editing function. Otherwise, the
data received will not be stored correctly.

Program Example:
(The command is sent and received through the Ethernet port built in ELC2-PE.)

The IP address stored in D100 and D101 is 192.168.0.2, the communication port number stored in
D102 is K108, the station address stored in D103 is K1, and the function code stored in D104 is
H’03. The device address is H’1000, and two pieces of data are read. When M0 is ON, ETHRW is
executed. After the reception of the communication command is complete, bit8 in D1394 is ON. The
data received is stored in D10 and D11.

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3. Instruction Set

M1002
MOV H0002 D100

MOV HC0A8 D101

MOV K108 D102

MOV K1 D103

MOV K3 D104
M0
ETHRW D100 H1000 D10 K2

BLD D1394 K8 MOV D10 D20

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3. Instruction Set

API Mnemonic Operands Function

116 D RAD P S, D Degree  Radian
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DRAD, DRADP: 9 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: source (degrees) D: Destination result (radians)

Description:
821. This instruction uses the following formula to convert degrees to radians:
Radians ＝ degrees × (π/180)
822. Flags: M1020 Zero flag, M1021 Borrow flag, M1022 Carry flag
If the absolute value of the result is larger than the maximum floating point value, the carry flag
M1022= ON.
If absolute value of the results is less than the minimum floating point value, the borrow flag
M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example:
When X0= ON, convert the degrees value of the binary floating point value in D1/D0 to radians and
save the result in D11/D10. The result is binary floating point.
X0
DRAD D0 D10

D1 D0 Degree value
binary floating point

D11 D10 RAD value (degree x /180)

binary floating point

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3. Instruction Set

API Mnemonic Operands Function

117 D DEG P S, D Radian  Degree
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DDEG, DDEGP: 9 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: data source (radians) D: Destination result (degrees)

DESCRIPTION:
823. This instruction uses the following formula to convert radians to degrees:
Degrees ＝ Radians × (180/π)
824. Flags: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag.
If the absolute value of the result is larger than the maximum floating point value, the carry flag
M1022= ON.
If absolute value of the results is less than the minimum floating point value, the borrow flag
M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example:
When X0= ON, convert the degrees value of the binary floating point in D1/D0 to radians and save
the result in D11/D10 The result is binary floating point.
X0
DDEG D0 D10

D1 D0 Radian value
binary floating point

D 10 Degree value (radian x 180/)

D 11
binary floating point

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3. Instruction Set

API Mnemonic Operands Function

118 D EBCD P S, D Floating to Scientific Conversion
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DEBCD, DEBCDP: 9
S * steps
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Data source D: Destination result

Description:
825. Convert the binary floating point value in the register specified by S to a decimal floating point
value and store the result in the register specified by D.
826. ELC controllers utilize the binary floating point format. The DEBCD instruction is the instruction
used to convert binary floating point to decimal floating point.
827. Flag: M1020 Zero flag, M1021 Borrow flag, M1022 Carry flag
If the absolute value of the result is larger than the maximum floating point value, the carry flag
M1022= ON.
If absolute value of the results is less than the minimum floating point value, the borrow flag
M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example:
When X0= ON, the binary floating point value in D1/D0 will be converted to decimal floating point
and the result stored in D3/D2.
X0
DEBCD D0 D2

Binary 23 bits for real number, 8 bits for exponent

D1 D0
Floating Point 1 bit for symbol bit

Exponent Real number

Real number Exponent
Decimal
D3 D2 [D3]
Floating Point [D2] * 10

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3. Instruction Set

API Mnemonic Operands Function

119 D EBIN P S, D Scientific to Floating Conversion
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DEBIN, DEBINP: 9 steps
S *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Data source D: Destination result

Description:
828. Convert a decimal floating point value in the register specified by S to a binary floating point
value and store the result in the register specified by D.
829. For example, S =1234, S +1= 3 will become S =1.234 x 106
830. D must be in binary floating point format. S and S +1 represent the real number and the
exponent of the floating point number respectively.

Program Example 1:
When X1= ON, the decimal floating point Exponent Real number
Decimal Real number Exponent
value in D1/D0 will be converted to binary Floating Point D1 D0 [D1]
[D0] * 10
floating point stored in D3/D2.
X1 23 bits for real number
Binary
DEBIN D0 D2 D3 D2 8 bits for exponent
Floating Point
1 bit for sign bit

Program Example 2:
831. Before performing this floating point operation, you must use the FLT instruction to convert BIN
integer to binary floating point. The source data should be a BIN integer. The DEBIN
instruction can be used to convert a floating point value to a binary floating point value.
832. When X0= ON, move K314 to D0 and move K-2 to D1 to generate decimal floating point
format (3.14 = 314 × 10-2).
X0
MOVP K314 D0 K314 D0 [D1]
-2
314 x10
MOVP K-2 D1 K-2 D1 [D0]

(D1, D0) (D3, D2)

DEBIN D0 D2
Binary
314 x10 Floating Point

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3. Instruction Set

API Mnemonic Operands Function

120 D EADD P S 1 , S2 , D Floating Point Addition
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DEADD, DEADDP: 13
S1 * * *
S2 * * * steps
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Augend S2: Addend D: Addition result

Description:
833. S1  S2  D. The floating point value in the registers specified by S1 and S2 are added together
and the result is stored in the registers specified by D.
834. If the source operand S1 or S2 is a constant K or H, the integer value will automatically be
converted to binary floating point to perform the addition operation.
835. S1 and S2 can specify the same register number (the same address can be used for S1 and
S2).
836. This instruction works best when used as a pulse instruction (EADDP).
837. Flags: M1020 (Zero flag), M1021 (Borrow flag) and M1022 (Carry flag)
If the absolute value of the result is larger than the maximum floating point value, the carry flag
M1022= ON.
If absolute value of the results is less than the minimum floating point value, the borrow flag
M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example 1:
When X0= ON, add the binary floating point value in D1/D0 and the binary floating point value in D3
/D2 and store the result in D11/D10.
X0
DEADD D0 D2 D10

Program Example 2:
When X2= ON, add the binary floating point value of D11/D10 and K1234 (automatically converted
to binary floating point) and store the result in D21/D20.
X2
DEADD D10 K1234 D20

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3. Instruction Set

API Mnemonic Operands Function

121 D ESUB P S 1 , S2 , D Floating Point Subtraction
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DESUB, DESUBP: 13
S1 * * *
S2 * * * steps
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Minuend S2: Subtrahend D: Subtraction result

Description:
838. S1  S2  D. The floating point value in the registers specified by S2 is subtracted from the
floating point value in the registers specified by S1 and the result is stored in the registers
specified by D. All data will be operated in floating point format and the result will be also
stored in floating point format.
839. If the source operand S1 or S2 is a constant K or H, the integer value will automatically be
converted to binary floating point to perform the subtraction operation.
840. S1 and S2 can specify the same register number (the same address can be used as S1 and S2).
If this is the case and if the continuous execution of the DESUB instruction is used, the data in
the register will be subtracted one time in every program scan when the condition contact is
ON. Therefore, the pulse instruction (DESUBP) is recommended.
841. Flags: M1020 (Zero flag), M1021 (Borrow flag) and M1022 (Carry flag)
If the absolute value of the result is larger than the maximum floating point value, the carry flag
M1022= ON.
If absolute value of the results is less than the minimum floating point value, the borrow flag
M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example1:
When X0= ON, the binary floating point value in D3/D2 is subtracted from binary floating point value
in D1/D0 and the result is stored in D11/D10.
X0
DESUB D0 D2 D10

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3. Instruction Set

Program Example 2:
When X2 = ON, the binary floating point value in D1/D0 will be subtracted from K1234 (automatically
converted into binary floating point) and the result will be stored in D11/D10.
X2
DESUB K1234 D0 D10

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3. Instruction Set

API Mnemonic Operands Function

122 D EMUL P S 1 , S2 , D Floating Point Multiplication
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DEMUL, DEMULP: 13
S1 * * *
S2 * * * steps
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Multiplicand S2: Multiplier D: Multiplication result

Description:
842. S1  S2  D. The floating point value in the registers specified by S1 is multiplied by the floating
point value in the registers specified by S2 and the result is stored in the registers specified by
D. All data will be operated in floating point format and the result will also be stored in floating
point format.
843. If the source operands S1 or S2 are a constant K or H, the integer value will automatically be
converted to binary floating point to perform the multiplication operation.
844. S1 and S2 can specify the same register number (the same address can be used as S1 and S2).
If in this case and continuous execution of the DEMUL instruction is used, the data in the
register will be multiplied one time in every program scan as long as the condition contact =
ON. Therefore, the pulse instruction (DEMULP) is recommended.
845. Flags: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag
If the absolute value of the result is larger than the maximum floating point value, the carry flag
M1022= ON.
If absolute value of the results is less than the minimum floating point value, the borrow flag
M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example1:
When X1= ON, the binary floating point value in D1/D0 is multiplied by the binary floating point value
in D11/D10 and the result is stored in D21/D20.
X1
DEMUL D0 D10 D20

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3. Instruction Set

Program Example 2:
When X2 = ON, K1234 (automatically converted into binary floating point) is multiplied by the binary
floating point value in D1/D0 and the result is stored in D11/D10..
X2
DEMUL K1234 D0 D10

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3. Instruction Set

API Mnemonic Operands Function

123 D EDIV P S 1 , S2 , D Floating Point Division
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DEADD, DEADDP: 13
S1 * * *
S2 * * * steps
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Dividend S2: Divisor D: Quotient and Remainder

Description:
846. S1  S2  D. The floating point value in the registers specified by S1 is divided by the floating
point value in the registers specified by S2 and the result is stored in the registers specified by
D. All data will be operated in floating point format and the result will be also stored in floating
point format.
847. If the source operands S1 or S2 are a constant K or H, the integer value will automatically be
converted to binary floating point to perform the division operation.
848. If S2 is 0 (zero), the operation will fail and will result in an “operand error” and the instruction
will not be executed.
849. Flags: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag
If the absolute value of the result is larger than the maximum floating point value, the carry flag
M1022= ON.
If absolute value of the results is less than the minimum floating point value, the borrow flag
M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example 1:
When X1= ON, the binary floating point value in D1/D0 is divided by the binary floating point value in
D11/D10 and the result is stored in D21/D20.
X1
DEDIV D0 D10 D20

Program Example 2:
When X2= ON, the binary floating point value in D1/D) is divided by K1234 (automatically converted
to binary floating point) and the result is stored in D1/D10.
X2
DEDIV D0 K1234 D10

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3. Instruction Set

API Mnemonic Operands Function

124 D EXP P S, D Floating Point Exponent Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DEXP, DEXPP: 9 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: operand source address D: operand result address

Description:
850. The DEXP instruction calculates e S, where the exponent is S
[S +1, S ]
851. e =[ D +1, D ]
852. Both S and D must be 32 bit floating point values and therefore each value uses two
consecutive D-registers.
853. S can be a positive or negative value.
S
854. When operand D= e , e=2.71828 and S is a floating point value.
855. Error flags: M1067 and M1068. Error codes: D1067 and D1068.
856. Flags: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag.
If the absolute value of the result is larger than the maximum allowable floating point value, the
carry flag M1022= ON.
If the absolute value of the result is less than the minimum allowable floating point value, the
borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example:
857. When M0= ON, convert (D0, D1) to binary floating point and save the result in register (D10,
D11).
858. When M1= ON, use (D10, D11) as the exponent to perform the operation: e S. The result is a
binary floating point value that is saved in register (D20, D21).
859. When M2= ON, convert (D20, D21) from binary floating point to decimal floating point and
save the result in register (D30, D31).
M0
RST M1081

DFLT D0 D10
M1
DEXP D10 D20
M2
DEBCD D20 D30

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3. Instruction Set

API Mnemonic Operands Function

125 D LN P S, D Floating Natural Logarithm Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DEXP, DEXPP: 9 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: operand source address D: operand result address

Description:
860. Perform natural logarithm operation to operand S:
LN[S +1, S ]=[ D +1, D ]
861. Only a positive number is valid for S. Operand D must use a 32-bit floating point value for this
instruction. Therefore, S needs to be converted to floating point.
862. eD=S and D=ln S.
863. Flags: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag.
If the absolute value of the result is larger than the maximum allowable floating point value, the
carry flag M1022= ON.
If the absolute value of the result is less than the minimum allowable floating point value, the
borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example:
864. When M0= ON, convert (D0, D1) to binary floating point and save the result in register (D10,
D11).
865. When M1= ON, use (D10, D11) as a real number and perform natural logarithm operation. The
result is a binary floating point value saved in register (D20, D21).
866. When M2= ON, convert (D20, D21) binary floating point to decimal floating point and save the
result in register (D30, D31).
M0
RST M1081

DFLT D0 D10
M1
DLN D10 D20
M2
DEBCD D20 D30

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3. Instruction Set

API Mnemonic Operands Function

126 D LOG P S 1 , S2 , D Floating Point Logarithm Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DLOG, DLOGP: 13 steps
S1 * * *
S2 * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: operand base address S2: operand source address D: operand result address

Description:
867. Perform logarithm operation to S1 and S2 and save the result to D. LOG base S1 of S2 = D.
868. Only positive numbers are valid for S2 (positive and negative numbers are valid for S1).
Operand D is a 32-bit floating point value. Therefore, S1 and S2 need to be converted to
floating point.
869. Flag: M1020 Zero flag, M1021 Borrow flag and M1022 Carry flag.
If the absolute value of the result is larger than the maximum allowable floating point value, the
carry flag M1022= ON.
If the absolute value of the result is less than the minimum allowable floating point value, the
borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example:
870. When M0= ON, convert (D0, D1) and (D2, D3) to binary floating point and save the result in
register (D10, D11) and (D12, D13). (D10, D11) is the base of the log and (D12,D13) is the
value we are taking the log of.
871. When M1= ON, use (D10, D11) and (D12, D13) binary floating point of 32-bit registers to
perform logarithm operation and save the result in 32-bit register (D20, D21).
872. When M2= ON, convert (D20, D21) binary floating point of 32-bit registers to decimal floating
point and save the result in register (D30, D31).

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3. Instruction Set

M0
RST M1081

DFLT D0 D10

DFLT D2 D12
M1
DLOG D10 D12 D20
M2
DEBCD D20 D30

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3. Instruction Set

API Mnemonic Operands Function

127 D ESQR P S, D Floating point Square Root
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DESQR, DESQRP: 9
S * * *
D * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source address D: Destination address to store the result

Description:
873. This instruction performs a square root operation on the floating point value of source S and
stores the result at the destination D. All operations are performed in the floating point format
and the result will also be stored in floating point format.
874. If the source S is a constant K or H, the integer value will automatically be converted to binary
floating point to perform the ESQR operation.
875. If the ESQR operation result in D is 0 (zero), the Zero flag M1020= ON.
876. S can only be a positive value. Performing any square root operation on a negative value will
result in an “operation error” and this instruction will not be executed. M1067 and M1068 = ON
and error code “0E1B” will be recorded in D1067.
877. Flags: M1020 (Zero flag), M1067 (Program execution error)

Program Example 1:
When X0= ON, the square root of binary floating point value in (D1, D0) is stored in register (D11,
D10) in binary floating point.
X0
DESQR D0 D10

(D1, D0) (D11, D10)

Binary floating point Binary floating point

Program Example 2:
When X2= ON, the square root of K1234 (automatically converted to binary floating point) is stored
in (D11, D10).
X2
DESQR K1234 D10

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3. Instruction Set

API Mnemonic Operands Function

128 D POW P S 1 , S2 , D Floating Point Power Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DPOW, DPOWP: 13
S1 * * *
S2 * * * steps
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: base address. S2: exponent. D: result

Description:
878. Perform the power operation to binary floating point S1 to the power of S2 and save the result
to D.
POW [S1+1, S1 ]^[ S2+1, S2 ]= D. That is, S1 to the power of S2 .Only a positive number is valid
for S1. Result D needs to use two consecutive D-registers to accommodate the 32-bit floating
point value. S1 and S2 also need to be converted to floating point before executing the DPOW
instruction.
879. Error flags: M1067 and M1068, read D1067 and D1068.
If the absolute value of the result is larger than the maximum allowable floating point value, the
carry flag M1022= ON.
If the absolute value of the result is less than the minimum allowable floating point value, the
borrow flag M1021= ON.
If the conversion result is 0, zero flag M1020= ON.

Program Example:
880. When M0= ON, convert (D0, D1) and (D2, D3) to binary floating point and save the results in
register (D10, D11) and (D12, D13).
881. When M1= ON, use (D10, D11) and (D12, D13) to perform the power operation and save the
result in 32-bit register (D20, D21).
882. When M2= ON, convert (D20, D21) binary floating point 32-bit registers to decimal floating
point and save the result in register (D30, D31).

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3. Instruction Set

M0
RST M1081

DFLT D0 D10

DFLT D2 D12
M1
DPOW D10 D12 D20
M2
DEBCD D20 D30

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3. Instruction Set

API Mnemonic Operands Function

129 D INT P S, D Floating Point to Integer
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F INT, INTP: 5 steps
S * * *
D * * * DINT, DINTP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source address D: Destination address to store the result

Description:
883. The binary floating point value of register S is converted to BIN integer and stored in register
D.
884. This instruction is the opposite of the API 49 (FLT) instruction.
885. Flags: M1020 (Zero flag), M1021 (Borrow flag), M1022 (Carry flag)
If the absolute value of the result is larger than the maximum allowable floating point value, the
carry flag M1022= ON.
If the absolute value of the result is less than the minimum allowable floating point value, the
borrow flag M1021= ON.
If the result exceeds the integer or double integer range (an overflow occurs), the Carry flag
M1022= ON.
886. ELCB-PB/ELC-PA/ELC-PVV1.2 don’t support T,C registers.

Program Example:
887. When X0= ON, the binary floating point value of (D1, D0) will be converted to BIN integer and
the result is stored in (D10).
888. When X1= ON, the binary floating point value of (D21, D20) will be converted to BIN integer
and the result is stored in (D31, D30).
X0
INT D0 D10
X1
DINT D20 D30

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3. Instruction Set

API Mnemonic Operands Function

130 D SIN P S, D Floating Point Sine Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DSIN, DSINP: 9 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Specified RAD value or an angle (0°≦S＜360°) D: Result of the SIN operation

Description:
889. Source S can be in radians or an angle based on flag M1018.
890. When M1018= OFF, it is set to radian mode. RAD=angle ×π/180.
891. When M1018= ON, it is set to angle mode. Angle range: 0°≦angle＜360°.
892. The SIN value of an angle specified by S is calculated and the result is stored in the register
specified by D.
893. Flag: M1018 flag for radian/angle.
Following shows the relation between radian and result:
R S: Radian
1 R: Result

S
-2 - 32 -2 -2 0
2
3
2
2

-1

894. If result of D is 0, the Zero flag M1020=ON.

Program Example 1:
When M1018= OFF, the radian mode is used. When X0= ON, the SIN of the RAD value (D1, D0) is
calculated and the result is stored in (D11, D10). The result in (D11, D10) is in binary floating point
format.
M1002
RST M1018
X0
DSIN D0 D10

RAD value(degree x /180)

D1 D0
binary floating point

D11 D10 SIN value

binary floating point

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3. Instruction Set

Program Example 2:
When M1018= OFF, the radian mode is used. Select an angle of 30 degrees with X0 or 60 degrees
with X1 and convert the angle to a RAD value to calculate the SIN.

X0
MOVP K30 D10 (K30 D10)
X1
MOVP K60 D10 (K60 D10)
M1000
FLT D10 D14 (D10 D15, D14) Binary floating point

(  /180) (D21, D20)

DEDIV K31415926 K1800000000 D20 Binary Binary
floating point floating point

(D15, D14) Degree x  /180

DEMUL D14 D20 D40
(D41, D40) RAD binary floating point

DSIN D40 D50 (D41, D40) RAD (D51, D50) SIN

binary floating point

Program Example 3:
When M1018= ON, the angle mode is used. When X0= ON, the SIN of the angle value in (D1, D0) is
calculated and the result is stored in (D11, D10). The angle range is: 0°≦angle value＜360°. The
result is saved in (D11, D10) in the binary floating point format.
M1002
SET M1018
X0
DSIN D0 D10

D1 D0 Angle value

SIN value
D 11 D 10 (binary floating point)

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3. Instruction Set

API Mnemonic Operands Function

131 D COS P S, D Floating Point Cosine Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DCOS, DCOSP: 9 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Specified RAD value (0°≦S＜360°) D: Result of the COS operation

Description:
895. Source designated by S can be radians or an angle based on flag M1018.
896. When M1018= OFF, is set to radian mode. RAD=angle ×π/180.
897. When M1018= ON, is set to angle mode. Angle range: 0°≦angle＜360°.
898. The COS value of an angle specified by S is calculated and the result is stored in the register
specified by D.
Following shows the relation between radian and result:
R S: Radian
R: Result
1

S
-2 - 32 -2 -2 0
2
3
2
2

-1

899. If result of D is 0, the Zero flag M1020=ON.

Program Example 1:
When M1018= OFF, it is in radian mode. When X0= ON, calculate the COS value of the angle
specified in (D1, D0) and store the result in (D11, D10). The value in (D1, D0) and the result stored
in (D11, D10) are all in binary floating point format.
M1002
RST M1018
X0
DCOS D0 D10

RAD value(degree x /180)

D1 D0
binary floating point

D11 D10 COS value

binary floating point

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3. Instruction Set

Program Example 2:
When M1018= ON, it is angle mode. When X0= ON, take the COS of the angle specified in (D1, D0)
and store the result in (D11, D10) in the binary floating point format.
M1002
SET M1018
X0
DCOS D0 D10

D1 D0 Angle value

COS value
D 11 D 10 binary floating point

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3. Instruction Set

API Mnemonic Operands Function

132 D TAN P S, D Floating Point Tangent Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DTAN, DTANP: 9 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Specified RAD value (0°≦S＜360°) D: Area where calculated result is stored

Description:
900. Source designated by S can be in radians or an angle based on flag M1018.
901. When M1018= OFF, is set to radian mode. RAD=angle ×π/180.
902. When M1018= ON, is set to angle mode. Angle range: 0°≦angle＜360°.
903. The TAN value of an angle specified by S is calculated and the result is stored in the register
specified by D.
Following shows the relation between radian and result:
R S: Radian
R: Result

1
-2 2
2
-2 - 0 3
S
- 32 -1 1
2

904. If result of D is 0, the zero flag M1020=ON.

Program Example 1:
When M1018= OFF, it is in radian mode. When X0= ON, take the TAN of RAD value (D1, D0) and
store the result in (D11, D10). The value in (D1, D0) and the result stored in (D11, D10) are all in
binary floating point format.
M1002
RST M1018
X0
DTAN D0 D10

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3. Instruction Set

RAD value(degree x  / 180)

D1 D0
binary floating point

D11 D10 TAN value

binary floating point

Program Example 2:
When M1018= ON, it is angle mode. When X0= ON, take the TAN of the angle specified by (D1, D0)
and store the result in (D11, D10) in the binary floating point format.
M1002
SET M1018
X0
DTAN D0 D10

D1 D0 Angle value

TAN value
D 11 D 10 (binary floating point)

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3. Instruction Set

API Mnemonic Operands Function

133 D ASIN P S, D Floating Point Arcsine Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DASIN, DASINP: 9 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Specified source (binary floating point) D: Area where calculated result is stored

Description:
905. ASIN value=SIN-1
906. See the figure below for the relation between radians and the result of the arcsine operation:

R S: Radian
R: Result
2

S
-1,0 0 1,0

-2

907. If the result in D is 0, the zero flag M1020=ON.

908. The decimal floating point of the SIN value designated by S should be within -1.0 ~ +1.0. If the
value falls outside of this range, error bits M1067 and M1068 will be ON.

Program Example:
When X0= ON, calculate the ASIN of the specified binary floating point value (D1, D0) and save the
result in (D11, D10). The result stored in (D11, D10) is in the binary floating point format.
X0
DASIN D0 D10

D1 D0 Binary floating point

D11 D10 ASIN value

binary floating point

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3. Instruction Set

API Mnemonic Operands Function

134 D ACOS P S, D Floating Point Arccosine Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DACOS, DACOSP: 9
S * * *
D * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Specified source (binary floating point) D: Area where calculated result is stored

Description:
909. ACOS value=COS-1
910. See the figure below for the relation between radian and result:

R S: Radian
R: Result

S
-1,0 0 1,0

911. If the result of D is 0, the zero flag M1020=ON.

912. The decimal floating point of the COS value designated by S should be within -1.0 ~ +1.0. If
the value falls outside of this range, error bits M1067 and M1068 will be ON.

Program Example:
When X0= ON, the ACOS of binary floating point value (D1, D0) is calculated and the result is saved
in (D11, D10). The result (D11, D10) is in binary floating point format.
X0
DACOS D0 D10

D1 D0 Binary floating point

D11 D10 ACOS value

binary floating point

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3. Instruction Set

API Mnemonic Operands Function

135 D ATAN P S, D Floating Point Arctangent Operation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DATAN, DATANP: 9
S * * *
D * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Specified source (binary floating point) D: Area where calculated result is stored

Description:
913. ATAN value=TAN-1
914. See the figure below for the relation between radian and result:

R
S: Radian
R: Result
2

0
S

-
2

915. If the result of D is 0, the zero flag M1020=ON.

Program Example:
When X0= ON, calculate the ATAN of the binary floating point value (D1, D0) and save the result in
(D11, D10). The result stored in (D11, D10) is in binary floating point format.
X0
DATAN D0 D10

D1 D0 Binary floating point

D11 D10 ATAN value

binary floating point

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3. Instruction Set

API Mnemonic Operands Function

136 D SINH P S, D Hyperbolic Sine
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DSINH, DSINHP: 9 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

 S: Source value (binary floating point) D: SINH result

Description:

1. Flags: M1020 (zero flag); M1021 (borrow flag); M1022 (carry flag)

2. SINH S =(es-e-s)/2. The result is stored in D.

 Program Example:
1. When X0 = On, obtain the SINH of binary floating point value (D1, D0) and store the binary
floating point result in (D11, D10).
X0
DSINH D0 D10

D1 D0 binary floating point

D11 D10 SINH value

binary floating point

2. If the absolute value of the result ＞ maximum available floating point value, the carry flag
M1022 = On.

3. If the absolute value of the result ＜ minimum available floating point value, the borrow flag
M1021 = On.

4. If the result = 0, the zero flag M1020 = On.

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3. Instruction Set

API Mnemonic Operands Function

137 D COSH P S, D Hyperbolic Cosine
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DCOSH, DCOSHP: 9
S * * *
D * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

 S: Source value (binary floating point) D: COSH result

Description:

1. Flags: M1020 (zero flag); M1021 (borrow flag); M1022 (carry flag)

2. COSH S =(es+e-s)/2. The result is stored in D.

 Program Example:
1. When X0 = On, obtain the COSH of binary floating point value (D1, D0) and store the binary
floating point result in (D11, D10).
X0
DCOSH D0 D10

D1 D0 binary floating point

D11 D10 COSH value

binary floating point

2. If the absolute value of the result ＞ maximum available floating point value, the carry flag
M1022 = On.

3. If the absolute value of the result ＜ minimum available floating point value, the borrow flag
M1021 = On.
4. If the result = 0, the zero flag M1020 = On.

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3. Instruction Set

API Mnemonic Operands Function

138 D TANH P S, D Hyperbolic Tangent
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DTANH, DTANHP: 9
S * * *
D * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

 S: Source value (binary floating point) D: TANH result

Description:

1. See the specifications of each model for their range of use.

2. Flags: M1020 (zero flag); M1021 (borrow flag); M1022 (carry flag)

3. TANH S =(es-e-s)/(es+e-s) . The result is stored in D.

 Program Example:
1. When X0 = On, obtain the TANH of binary floating point value (D1, D0) and store the binary
floating point result in (D11, D10).
X0
DTANH D0 D10

D1 D0 binary floating point

D11 D10 TANH value

binary floating point

2. If the absolute value of the result ＞ maximum available floating point value, the carry flag
M1022 = On.

3. If the absolute value of the result ＜ minimum available floating point value, the borrow flag
M1021 = On.

4. If the result = 0, the zero flag M1020 = On.

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3. Instruction Set

API Mnemonic Operands Function

143 DELAY P S Delay
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DELAY, DELAYP: 3 steps
S * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Delay time, units are 0.1ms (K1~K1000)

Description:
After executing the DELAY instruction, in every scan the program will be delayed by the time
specified in the Delay instruction. The delay will occur in each scan immediately following the
execution of the Delay instruction.

Program Example:
If an external interrupt occurs when X0 goes from OFF to ON, the interrupt subroutine will execute
the DELAY instruction and Y0=ON will be delayed by 2 seconds when X1=ON.

EI
Interrupt input X0
Main routine program Input X1

Output Y0
FEND
M1000
T=2ms
I001 DELAY K20

X1
Y0

REF Y0 K8

IRET

END

Points to note:
916. When executing the DELAY instruction, the delay time may increase upon the execution of
communications, high-speed counters and high-speed pulse output commands.
917. If the external output (transistor output or relay output) is specified, the delay time may
increase due to the transistor or relay turn-on delay.

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3. Instruction Set

API Mnemonic Operands Function

144 GPWM S 1 , S2 , D General PWM Output
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F GPWM: 7 steps
S1 *
S2 *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Pulse output width S2: Pulse output cycle (occupies 3 addresses) D: Pulse output address

Description:
918. S1 is specified as the pulse output width as t: 0~32,767ms.
919. S2 is specified as the pulse output cycle as T:1~32,767ms, S1 ≦ S2.
920. S2 +1 and S2 +2 are for internal system use. They should not be used in the program. If the
data in these addresses is modified in any way, unexpected operation of the GPWM
instruction could occur. The address for the pulse output (D) must be: Y, M or S.
921. When the GPWM instruction is executed, pulses will be sent to the Pulse output address (D)
based on the pulse output width S1 and pulse output cycle S2.
922. When S1 ≦ 0, no pulses will be generated. When S1 ≧ S2, the pulse output address will be
always ON.
923. S1 and S2 can be modified when executing GPWM instruction.

Program Example:
When D0=K1000, D2=K2000 and X0= ON, the following pulses will be sent out Y20. When X0=
OFF, the Y20 output will also be OFF.
t T
X0 t=1000ms
GPWM D0 D2 Y20

Output Y20

T=2000ms

Points to note:
924. This instruction counts by scan cycle so the maximum offset will be an ELC program scan
cycle. The value of S1, S2 and (S2 - S1) should be larger than one ELC program scan cycle.
Otherwise, an error will be generated.
925. If using this instruction in a subroutine or interrupt, the GPWM output may not be accurate.

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3. Instruction Set

API Mnemonic Operands Function

145 FTC S1, S2, S3, D Fuzzy Temperature Control
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F FTC: 9 steps
S1 * * *
S2 * * *
S3 *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Target value (SV) S2: Present measured value (PV) S3: Parameter list (occupies 6
consecutive addresses) D: Output value (MV)

Description:
926. Operand S1 range is 1~5000 representing 0.1C ~500C. The units are 0.1C. If S3+1 (refer to
the Notes below) is set to K0 it represents 0.1C~500C.
927. Operand S2 range is 1~5000 representing 0.1C ~500C. The units are 0.1C. If S3+1 (refer to
the Notes below) is set to K0 it represents 0.1C~500C.
928. The analog temperature input will be scaled to the range 1~5000.
929. S3 is the sampling time setting. If this setting is less than K1, the instruction will not operate. If
this setting exceeds K200, it will use K200.
930. Bit 0 of S3+1 configures the temperature for C or F. If bit 0 is K0, it’s C and if bit 0 is K1 it’s F.
If Bit 1 of S3+1 is K0 the input filter is disabled. If bit 1 of S3+1 is k1, the input filter is active.
Refer to the Notes below for information on bits 2-5.
931. The range of D is 0~(sampling time*100). When using the FTC instruction, it is necessary to
use it in conjunction with other instructions, based on the heater type. For example, the FTC
instruction can be used with the GPWM instruction to control output pulses. (Sampling
time*100) would be the output cycle time of GPWM and MV the output width of the GPWM
pulse. See Example 1 below.
932. There is no limit on the number of times this instruction can be used in a program.

Program Example:
933. Enter the parameters before executing the FTC instruction.
934. When X0= ON, the instruction is executed and the result is saved in D150. When X0= OFF,
instruction is not executed and the data is unchanged.
X0
FTC D0 D1 D100 D150

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3. Instruction Set

Notes:
935. The settings for S3 are as follows:

Device Function Usage range Explanation

When TS is less than the scan time of the program,

the PID instruction will execute for one scan time.
When TS=0, the instruction will not execute. The
Sampling time 1~200
S3 : minimum setting of TS should be larger than a
(TS) (unit: 100ms)
program scan time.

When this setting exceeds 200, the value 200 will be

used.

b0=0 : C
Temperature units
b0=1 : F
b0:Temperature
When the filter is disabled, the present
unit
b1=0:no filter value(PV)=present measured value. If the filter is
b1:filter function
b1=1:filter enabled, the present value(PV)=(present measure
S3 +1: b2~b5:heat value + previous measure value)/2
environment
b2=1 Slow heat environment
b6~b15
b3=1 General heat environment
preserved
b4=1 Rapid heat environment

b5=1 High-speed heat environment

S3 +2:
For system use only, do not use.
~

S3 +6:
936. Control Diagram:
FTC

+ e Fuzzy
SV Controller MV

-
PV
Temperature
Sensor

Points to notes:
It is recommended to set the sampling time to twice that of the sampling time of the temperature
sensor for better temperature control.

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3. Instruction Set

Example 1: control diagram

FTC

+ e GPWM
SV Fuzzy MV
instruction Y0
D10 Controller D22
-
PV D11
Temperature
PT modular
Sensor

The output D22 (MV) of the FTC instruction is used as the input to the GPWM instruction. D22
represents the pulse output width and D30 is the pulse output cycle. The timing chart for output Y0
is as follows.

D22

Output Y0

D30

The settings for the FTC instruction for this example are D10=k1500(target temperature),
D12=k60(sampling time is 6 seconds), D13=k8 (Bit 3=1) and D30=k6000 (=D12*100). The ladder
diagram is as follows:
M1002
MOV K1500 D10

TO K0 K2 K2 K1

FROM K0 K6 D11 K1

MOV K60 D12

MOV K8 D13

MOV K6000 D30

SET M1

M1
FTC D10 D11 D12 D22

GPWM D22 D30 Y0

M1013
FROM K0 K6 D11 K1

END

This example application is controlling an oven (The temperature it can heat is 250℃). A plot of the
target and real temperatures are shown below.

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3. Instruction Set

Example 2: This example application requires rapid heating. Use D13=k16 due to overshoot. The
result after testing is shown as follows.

From the plot above, there is no overshoot but it takes more than one hour and fifteen minutes to
make the error of the target temperature  1℃. This means that the current test environment is
correct but there will be long sampling time delays.
Example 3: To make example 2 reach the target temperature faster, set the sampling time to 4
seconds (D12=k40 and D30=k4000). The result is shown as below.

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3. Instruction Set

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-529
3. Instruction Set

API Mnemonic Operands Function

146 CVM S 1 , S2 , D Valve Control
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F CVM: 7 steps
S1 *
S2 * * *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

 S1: Target time of valve (absolute position) S2: Time from

fully-closed to fully-open of valve (destination) D:
Startingoutput address

Description:
1. S1 occupies 3 consecutive registers. S1 + 0 is for storing the designated value; S1 + 1 is the
current position of the valve and S1 + 2 is for storing the parameters recorded in the instruction
execution. DO NOT alter the last two registers.
2. D occupies 2 consecutive output addresses. D + 0 is the “open” contact and D + 1 is the
“closed” contact.
3. The unit of time: 0.1 seconds. When the scan time of the program exceeds 0.1 seconds, DO
NOT use this instruction to adjust the position of the valve.
4. Frequency of the output device: 10Hz.
5. When the time of S1 + 0 ＞ the fully-opened time set in S2, D + 0 will remain On and D + 1 will
remain Off. When the time of S1 + 0 ＜ 0, D + 0 will remain Off and D + 1 will remain On.
6. When the instruction is enabled, it will start to control the valve from “0” time position. If it cannot
be determined that the valve is at “0” before executing the instruction, be sure that S1 + 0 is less
than 0 and execute the instruction for S2 (time) before sending in the correct target control time.

 Program Example 1:
1. The control valve

Fully-closed Fully-open

Y1 Y0

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3. Instruction Set

2. Definitions of the control valve:

a) When Y0 and Y1 = Off: No valve action
b) When Y0 = On and Y1 = Off: Valve “open”
c) When Y0 = Off and Y1 = On: Valve “closed”
d) When Y0 and Y1 = On: The action is prohibited.
3. Timing diagram and program of the control:

5
M0

Y0 4sec
1sec

Y1 2sec 2sec
1 2 3 4
D0=k40 D0=k20 D0=k30 D0=k10

M0
CVM D0 K50 Y0

4. Control phases:
1) Phase : When M0 = On, D0 = K40 implies the valve shall be open (Y0 = On, Y1 = Off)
until 4 seconds is reached.
2) Phase : Change the position of the valve. Make D0 = K20. Because the previous
position was at 4 seconds, the valve shall be closed (Y0 = Off, Y1 = On) for 2 seconds.
3) Phase : Change the position of the valve. make D0 = K30. Because the previous
position was at 2 seconds, the valve shall be open (Y0 = On, Y1 = Off) for 1 second,
moving the valve to the position of 3 seconds.
4) Phase : Change the position of the valve. Make D0 = K10. Because the previous
position was at 2 seconds, the valve shall be closed (Y0 = Off, Y1 = On) for 2 seconds,
moving the valve to the position of 1 second.
5) Phase : Switch off M0 and the valve will remain at it’s last state (Y0 = Off, Y1 = Off).

 Program Example 2:
1. Timing diagram and program control:

Y0 4sec

Y1 5sec 2sec
1 2 3 4
D0=k-1 D0=k40 D0=k10

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3. Instruction Set

M0
TMR T0 K50
T0
MOV k-1 D0

CVM D0 K50 Y0

2. Control phases:
1) Phase : When M0 = On, because the valve position is not known, set D0 = K-1 to
deliberately close the valve (Y0 = Off, Y1 = On) for 5 seconds and make sure the valve is
at the position of 0 seconds before moving on to the next step.
2) Phase : When T0 = On, allow D0 = K40 to begin execution. Open the valve (Y0 = On,
Y1 = Off) for 4 seconds, moving the valve to the position of 4 seconds.
3) Phase : Change the position of the valve and make D0 = K10. Because the previous
position was at 4 seconds, the valve shall be closed (Y0 = Off, Y1 = On) for 3 seconds,
moving the valve to the position of 1 second.
4) Phase : Switch off M0 and the valve will no longer move (Y0 = Off, Y1 = Off).

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3. Instruction Set

API Mnemonic Operands Function

147 D SWAP P S Swap High/Low Byte

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F SWAP, SWAPP: 3 steps
DSWAP, DSWAPP: 5
S * * * * * * * *
steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Address of the value to be byte swapped.

Description:
937. When used as a 16-bit instruction, swap high/low bytes.
938. When used as a 32-bit instruction, swap high/low bytes of each word separately.
939. This instruction works best using the pulse option (SWAPP, DSWAPP).
940. If operand D is used with index register F, it is only available as a 16-bit instruction.

Program Example 1:
When X0=ON, swap the high/low bytes of D0.
X0
SWAPP D0

D0
High Byte Low Byte

Program Example 2:
When X0=ON, swap the high/low bytes of word D10 and of word D11.
X0
DSWAP D10

D11 D 10
High Byte Low Byte High Byte Low Byte

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3. Instruction Set

API Mnemonic Operands Function

148 D MEMR P m, D, n File Memory Read

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F MEMR, MEMRP: 7 steps
m * * * DMEMR, DMEMRP: 13
D *
steps
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB/PE PH/PA PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
m: Constant offset for reading from the data file register D: Address for storing read data
n: Quantity of data read from the file register

Description:
941. Range of m, D and n in each model:

ELC2-PC/PA
model ELC-PA ELC-PV ELC2-PV
ELCM-PH/PA

m K0~K1599 K0~K9,999 K0~K49,999 K0~K4,999

D D2000~D4999 D2000~D9999 D2000~D11999 D2000~D9999

16-bit n K1~K1,600 K1~K8,000 K1~K8,000 K1~K5,000

32-bit n K1~K800 K1~K4,000 K1~K4,000 K1~K5,000

942. The number of 16-bit file registers in each model(all can be read):

ELC2-PC/PA
model ELC-PA ELC-PV ELC2-PV
ELCM-PH/PA

16-bit file registers 1,600 10,000 50,000 5,000

943. m and n of ELC-PA do not support E and F index registers modification.
944. If operands m, D and n are out of range, an operand error will occurr. M1067, M1068= ON and
error code 0E1A will be recorded in D1067.
945. Flag: M1101, please refer the Notes below in API 149.
946. MEMR/MEMRP supports ELCM-PH/PA version 2.0 (and above).

Program Example 1:
947. 16-bit instruction MEMR reads 100 16-bit words of data from the 10th address of the file
register and stores the read data in the data register starting with D2000.

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3. Instruction Set

948. When X0= ON, the instruction is executed. When X0 goes to OFF, the instruction is not
executed.
X0
MEMR K10 D2000 K100

Program Example 2:
949. 32-bit instruction DMEMR reads 100 32-bit data words from the 20th address of the file register
and store the read data in the data register starting with D3000.
950. When X0= ON, the instruction is executed. When X0 goes to OFF, the instruction is not
executed.
X0
DMEMR K20 D3000 K100

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3. Instruction Set

API Mnemonic Operands Function

149 D MEMW P S, m, n File Memory Write
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MEMW, MEMWP: 7 steps
S *
m * * * DMEMW, DMEMWP: 13 steps
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB/PE PH/PA PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Address for storing the data to be written to the file register m: Constant offset into the file
register n: Quantity of data to be written to the file register

Description:
951. Range of m, D and n in each model:

ELC2-PC/PA
model ELC-PA ELC-PV ELC2-PV
ELCM-PH/PA

m K0~K1599 K0~K9,999 K0~K49,999 K0~K4,999

D D2000~D4999 D2000~D9999 D2000~D11999 D2000~D9999

16-bit n K1~K1,600 K1~K8,000 K1~K8,000 K1~K100

32-bit n K1~K800 K1~K4,000 K1~K4,000 K1~K100

952. ELC uses this instruction to write data register data into file registers.
953. The number of 16-bit file registers in each model:

ELC2-PC/PA
model ELC-PA ELC-PV ELC2-PV
ELCM-PH/PA

16-bit file registers 1,600 10,000 50,000 5,000

all can be write by

Yes Yes No Yes
MEMW

Write times limited None None 10,000 10,000

954. There are 50,000 files registers in ELC2-PV. Owing to the fact that 40,000 of the file registers
(K10,000~K49,999) are stored permanently in a flash ROM, values can only be written into

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these file registers by means of ELCSoft, and API149 MEMW does not support these file
registers.
955. m and n of ELC- PA do not support E and F index registers modification.
956. If operands m, D and n are out of range, an operand error will occur. M1067, M1068= ON and
error code 0E1A will be recorded in D1067.
957. Flag: M1101, please refer the Note below .
958. MEMW/MEMWP supports ELCM-PH/PA version 2.0 (and above).

Program Example:
959. When X0= ON, the double word instruction DMEMW is executed. Write 100 32-bit data words
starting from D2001, D2000 into the file register address 0 to 199.
960. When X0= ON, the instruction is executed. When X0 goes to OFF, the instruction is not
executed.

X0
DMEMW D2000 K0 K100

File Register Notes:

961. ELCM-PH/PA and ELC2-PC/PA do not support M1101..
962. ELC-PA, when the ELC starts up, it will determine the state of M1101 and the contents of
D1101 (file register provides numbers, K0~K1,599), D1102 ( the number of file registers to be
read, K1~K1,600), D1103 (destination address which stores the read data from the file register,
specified by a data register D number, K2,000~K4,999) and automatically transfers the
contents of the file register to the specified data register.
963. ELC-PA, when the value of D1101 is less than 0 or more than 1,599, or the value of D1103 is
less than 2,000 or more than 4,999, reading data from file register to data register is disabled.
964. ELC-PV, ELC2-PV: When the ELC is powered, it will decide whether to automatically send the
data in the file register to the designated data register based on the state of M1101, the
contents of D1101 (starting address in file register K0 ~ K9,999), D1102 (amount of data to be
read in file register K1 ~ k8,000), and D1103 (address for storing read data, starting from D,
ELC-PV, ELC2-PV: K2,000 ~ K9,999; ELC2-PV: K2,000 ~ K11,999).
965. ELC-PV, ELC2-PV: The reading of data from file register to data register D will not be executed
if D1101 < 0, D1101 > K9,999, D1103 < K2,000 or (ELC-PV: D1103 > K9,999; ELC2-PV:
D1103>K11,999).
966. When the file register read executes,, if the address of the file register or data register exceeds
the allowable range, the ELC will stop reading.
967. File registers do not have actual addresses. Reading and writing to the file registers can only
be done through API 148 MEMR, API 149 MEMW, using an offset into the file register.
968. If the address in the file register to be read exceeds its range, the read value will be 0.

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3. Instruction Set

969. Related special relays and registers of file register:

Flag Function Explanation

M1101 Startup function for the file register, Latched, Default is OFF

Special
Function Explanation
Register

Starting address of the file register. ELC-PA: K0 ~ K1,599; ELC-PV, ELC2-PV: K0

D1101
~ K9,999; latched; default = 0

Maximum amount of data to read/write to the file register. ELC-PA: K1 ~ K1,600;

D1102
ELC-PV, ELC2-PV: K1 ~ K8,000; latched; default = 1600

D-register address for storing read/write data for the file register. ELC-PA: K2,000
D1103 ~ K4,999; ELC-PV: K2,000 ~ K9,999; ELC2-PV: K2,000~K11,999; latched;
default = 2,000

API Mnemonic Operands Function

150 MODRW S1, S2, S3, S, n MODBUS Data Read/Write
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MODRW: 11 steps
S1 * * *
S2 * * *
S3 * * *
S *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: External device address (K0~K254) S2: Function code K2(H02), K3(H03), K4(H04), K5(H05),
K6(H06), K15(H0F), K16(H10) , K23(H17) S3: Data address being read from or written to in the
external device S: Internal address to store a read message reply or to store write data to be
sent n: Length of read/write data.

Description:
970. Please refer to the following table for more information about the communication ports
supported by MODRW:

COM port COM1(RS-232) COM2(RS-485) COM3(RS-485)

ELC-PA/PV - V -

ELCB-PB - V -

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ELCM-PH/PA V V V

ELC2-PB/PA/PV V V -

ELC2-PC V V V

ELC2-PE - V V
971. S1: Address of the external device the ELC will communicate with. The valid range is K0~K254.
The address specified by the function codes K2, K3, K4, and K23 can not be K0.
972. S2: Function code. Only the function codes listed below are available currently; other function
codes are not executable. Please refer to the program examples below for more information.

Function code Description Models supported

H02 Read multiple bits devices All series (except ELCB-PB)

H03 Read multiple word devices All series

ELCM-PH/PA V2.0 (above)
H04 Read multiple word devices
ELC2-PB/PH/PA/PE/PV
H05 Force On/Off a single bit devices All series (except ELCB-PB)
H06 Write single word device All series
H0F Write multiple bit devices All series (except ELCB-PB)

H10 Write multiple word devices All series

ELCM-PH/PA V2.0 (above)
H17 Read/Wrie multiple word devices
ELC2-PB/PH/PA/PV
973. S3: Modbus data address in the external device. If the address is illegal for the external device,
it will respond with an error message and ELC will store the error code and associated error
flag will be ON. If the function code is K23, S3 only can specify a data register. Besides, S3 is a
data register from which data is read, S3+1 is a data register into which data is written.
 Associated registers and flags indicating errors on ELC com ports: (For additional details
refer to Points to note for API 80 RS instruction.)
ELC COM COM1 COM2 COM3
Error flag M1315 M1141 M1319
Error code D1250 D1130 D1253
 If an ELC controller receives a Modbus message with an illegal Modbus data address, the
error will be indicated by a different set of flags and registers. For COM2, M1141 will be
ON and D1130 = 2; for COM1, M1315 = ON and D1250 = 3, for COM3, M1319 = ON and
D1253 = 3.
974. S: Registers for storing read/written data. Registers starting from S stores the data to be written
into the communication device or the data read from the communication device. When COM2
sends the function code of reading (K2/K3/K4), the registers from S directly receive the data

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3. Instruction Set

string and stored the converted data in D1296~D1311. Please refer to program example 1 and
3 for further explanation. When COM1 or COM3 sends the function code of reading (K2/K3/K4),
the registers store the converted data directly. Refer to program example 2 and program
example 4 for further explanations. If the function code is K23, the index value in S indicates a
data register into which data is read, and the index value S+1 indicates a data register from
which data is written. If the function code for COM2 is K23, the data which is received and
converted will not be stored in D1296~D1311. Please refer to program example 13 and
program example 14 for more information about the function code K23.
975. n: Data length for accessing.
 When S2 (MODBUS function code) is specified as H05 which designates the PLC force
ON/OFF status, n = 0 indicates ON and n = 1 indicates OFF.
 When S2 is specified as H02, H03, H04, H0F, H10, H17 which designate the data length
for accessing, the available set range will be K1~Km, where m value should be specified
according to communication modes and COM ports as the table below. (H02/H0F, unit:
Bit. H03/H04/H10/H17, unit: Word.) If the function code is H17, n is the number of data
registers from which data is read, n+1 is the number of data registers into which data is
written.

Communication Communication Function code

mode port H02 H03/H04 H0F H10 H17

COM1(RS-232) K 64 K 16 K 64 K 16 K 16

RTU COM2(RS-485) K 64 K 16 K 64 K 16 K 16

COM3(RS-485) K 64 K 16 K 64 K 16 K 16

COM1(RS-232) K 64 K 16 K 64 K 16 K 16

ASCII COM2(RS-485) K 64 K8 K 64 K8 K 16

COM3(RS-485) K 64 K 16 K 64 K 16 K 16

976. The functions of S3, S, and n vary with the function code used.

Function code S3 S n
Address from which the Register in which the
H02 Length of data read
data is read data read is stored

Address from which the Register in which the

H03 Length of data read
data is read data read is stored
Address from which the Register in which the
H04 Length of data read
data is read data read is stored
Address into which the
H05 No meaning Status value written
data is written

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Function code S3 S n
Address into which the Register in which the
H06 No meaning
data is written data written is stored

Address into which the Register in which the

H0F Length of data written
data is written data written is stored

Address into which the Register in which the

H10 Length of data written
data is written data written is stored

S: Register in which the

S3: Address from which n: Length of data
data read is stored
the data is read read
H17 S+1: Register in which
S3+1: Address into n+1: Length of data
the data written is
which the data is written written
stored
977. There is no limit on the number of times this instruction can be used, however only one
instruction can be executed on the same COM port at a time.
978. Rising-edge contacts (LDP, ANDP, ORP) and falling-edge contacts (LDF, ANDF, ORF) can not
be used as conditions for the MODRW instruction, using Function Codes H02, H03, H04, H17
or the data stored in the receive registers will be incorrect.
979. The following bits need to be energized after the MODRW instruction is executed to send the
message: M1122(COM2) / M1312(COM1) / M1316(COM3).
980. MODRW instruction determines the COM port according to the communication request. The
COM port determination is made following the order: COM1COM3COM2. Therefore,
please insert every MODRW instruction right after the sending request instruction for avoiding
errors on the target location for data access.
981. Flags: M1120~M1131, M1140~M1143, refer to the RS (API 80) instruction or section 2.9 for
information.

Program Example 1: COM2(RS-485), Function Code H02

982. Function code K2 (H02): read multiple bit addresses, up to 64 bits can be read.
983. M1143 = OFF, ASCII mode, M1143 = ON, RTU Mode
984. In ASCII or RTU mode, when the ELC’s COM2 sends a read message, the data in the reply will
be stored in D1296~D1311. The data sent with a write message will be stored in registers
D1256~D1295 (the data should be placed into the D-register address in the instruction).
985. The tables below show the status of the outputs when ELC1 reads Y0~Y17 from ELC2.

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3. Instruction Set

M1002
MOV H87 D1120 Set communication protocol as 9600, 8, E, 1

SET M1120 Retain communication protocol

MOV K100 D1129 Set communication timeout as 100ms

M1143 = OFF M1143 = ON

RST M1143 SET M1143
ASCII mode RTU mode
X0
SET M1122 Sending request
X0
MODRW K1 K2 H0500 D0 K16
Data length (bit)
Data storing register
Data address Y0=H0500
Function code K2
read multiple bits
Receiving completed Connection device
address K1
M1127
Processing received data

ASCII mode: The received data is stored in registers starting from D0 in ASCII format and
ELC converts the content to registers D1296~D1311 in hexadecimal automatically.

RTU mode: The received data is stored in registers starting from D0 in Hex.

RST M1127 Reset M1127

 ASCII Mode (M1143 = OFF):

When X0 = ON, MODRW instruction executes the function specified by Function Code 02.
ELC1 ELC2，ELC1 sends: “01 02 0500 0010 E8”
ELC2 ELC1，ELC1 receives: “01 02 02 3412 B5”
Registers for data to be sent
Register Data Descriptions
D1256 Low ‘0’ 30 H ADR 1
Device address: ADR (1,0)
D1256 High ‘1’ 31 H ADR 0
D1257 Low ‘0’ 30 H CMD 1
Control parameter: CMD (1,0)
D1257 High ‘2’ 32 H CMD 0
D1258 Low ‘0’ 30 H
D1258 High ‘5’ 35 H Y0 = H0500
D1259 Low ‘0’ 30 H Starting Data Address
D1259 High ‘0’ 30 H

Register Data Descriptions

D1260 Low ‘0’ 30 H
Number of Data bits
D1260 High ‘0’ 30 H

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3. Instruction Set

D1261 Low ‘1’ 31 H

D1261 High ‘0’ 30 H
D1262 Low ‘E’ 45 H LRC CHK 1
Checksum: LRC CHK (0,1)
D1262 High ‘8’ 38 H LRC CHK 0

Registers for received data

Register Data Descriptions
D0 Low ‘0’ 30 H ADR 1
D0 High ‘1’ 31 H ADR 0
D1 Low ‘0’ 30 H CMD 1
D1 High ‘2’ 33 H CMD 0
D2 Low ‘0’ 30 H
Number of Data (count by Byte)
D2 High ‘2’ 32 H
D3 Low ‘3’ 33 H 1234 H
Content of
D3 High ‘4’ 34 H ELC automatically converts ASCII
address 0500H~
D4 Low ‘1’ 31H codes and store the converted
0515H
D4 High ‘2’ 32H value in D1296
D5 Low ‘B’ 52H LRC CHK 1
D5 High ‘5’ 35 H LRC CHK 0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-543
3. Instruction Set

State of the bits read from ELC2 Y0~Y17: 1234H

Device Status Device Status Device Status Device Status
Y0 OFF Y1 OFF Y2 ON Y3 OFF
Y4 ON Y5 ON Y6 OFF Y7 OFF
Y10 OFF Y11 ON Y12 OFF Y13 OFF
Y14 ON Y15 OFF Y16 OFF Y17 OFF

 RTU Mode (M1143 = ON):

When X0 = ON, MODRW instruction sends the message using Function Code 02
ELC1 ELC2，ELC1sends: “01 02 0500 0010 79 0A”
ELC2  ELC1，ELC1receives: “01 02 02 34 12 2F 75”
Registers for data to be sent
Register Data Descriptions
D1256 Low 01 H Address
D1257 Low 02 H Function
D1258 Low 05 H Y0 = H0500
D1259 Low 00 H Starting Data Address
Register Data Descriptions
D1260 Low 00 H
Number of Data (count by word)
D1261 Low 10 H
D1262 Low 79 H CRC CHK Low
D1263 Low 0A H CRC CHK High

Received data registers

Register Data Descriptions

D0 1234 H ELC stores the value 1234H into D1296

D1 Low 02 H Function
D2 Low 02 H Number of Data (Byte)
D3 Low 34 H Content of address
D4 Low 12 H H0500~H0515
D5 Low 2F H CRC CHK Low
D6 Low 75 H CRC CHK High

State of the bits read from ELC2 Y0~Y17: 1234H

Device Status Device Status Device Status Device Status
Y0 OFF Y1 OFF Y2 ON Y3 OFF

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Device Status Device Status Device Status Device Status

Y4 ON Y5 ON Y6 OFF Y7 OFF
Y10 OFF Y11 ON Y12 OFF Y13 OFF
Y14 ON Y15 OFF Y16 OFF Y17 OFF

Program Example 2: COM1(RS-232) / COM3(RS-485), Function Code H02

1. Function code K2 (H02): read multiple bit devices. Up to 64 bits can be read.
2. ELC1 connects to ELC2. COM3: (M1320 = OFF, ASCII mode), (M1320 = ON, RTU mode)
3. For both ASCII and RTU modes, ELC COM1/COM3 only stores the received data in registers
starting from S, and does not store the data to be sent.
4. The connection between ELC1 (ELC COM3) and ELC2(ELC COM1) is shown in the tables
below when ELC1 reads Y0~Y17 from ELC2

If ELC1 uses COM1 for communication rather than COM3, change the following parameters in
the program below:
1. D1109→D1036: communication protocol
2. M1136→M1138: retain communication setting
3. D1252→D1249: Set value for data receiving timeout
4. M1320→M1139: ASCII/RTU mode selection
5. M1316→M1312: sending request
6. M1318→M1314: receiving completed flag

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-545
3. Instruction Set

M1002
MOV H87 D1109 Set communication protocol as 9600, 8, E,1

SET M1136 Retain communication setting

MOV K100 D1252 Set receiving timeout as 100ms

M1320 = OFF, M132 0 = ON

RST M1320 SET M1320
ASCII mode RTU mode
X0
SET M1316 Sending request

X0
MODRW K1 K2 H0500 D0 K16

Data length (bit)

Data st oring register
Data address: Y0=H0500
Function code: K2
read multiple bits
Connection device
Receiving completed address: K1
M1318
Processing received data

ASCII mode: The received data is converted to Hex value

and stored in registers starting from D0
RTU mode: The received data is stored in registers starting from D0

RST M1318 Reset M1318

ASCII mode (COM3: M1320 = OFF, COM1: M1139 = OFF):

When X0 = ON, the MODRW instruction sends the message using Function Code 02.
ELC1 ELC2, ELC1 sends: “01 02 0500 0010 E8”
ELC2 ELC1, ELC1 receives: “01 02 02 3412 B5”

ELC1 receives data in register D0

Register Data Descriptions
ELC converts the ASCII data in address 0500H~0515H and
D0 1234H
stores the converted data automatically.

State of the bits read from ELC2 Y0~Y17: 1234H

Device Status Device Status Device Status Device Status
Y0 OFF Y1 OFF Y2 ON Y3 OFF
Y4 ON Y5 ON Y6 OFF Y7 OFF
Y10 OFF Y11 ON Y12 OFF Y13 OFF
Y14 ON Y15 OFF Y16 OFF Y17 OFF

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3. Instruction Set

RTU mode (COM3: M1320 = ON, COM1: M1139 = ON):

When X0 = ON, MODRW instruction sends the message using Function Code 02
ELC1 ELC2, ELC1 sends: “01 02 0500 0010 79 0A”
ELC2  ELC1, ELC1 receives: “01 02 02 34 12 2F 75”

ELC data receiving register:

Register Data Descriptions

ELC converts the data in address 0500H ~ 0515H and stores the
D0 1234 H
converted data automatically.

State of the bits read from ELC2 Y0~Y17: 1234H

Device Status Device Status Device Status Device Status
Y0 OFF Y1 OFF Y2 ON Y3 OFF
Y4 ON Y5 ON Y6 OFF Y7 OFF
Y10 OFF Y11 On Y12 OFF Y13 OFF
Y14 ON Y15 OFF Y16 OFF Y17 OFF

5. Flags and data registers for COM1 / COM2 / COM3 when they act as a Modbus Master:

COM2 COM1 COM3 Function

M1120 M1138 M1136 Retain communication setting

COM. M1143 M1139 M1320 ASCII/RTU mode selection
setting D1120 D1036 D1109 Communication protocol
D1121 D1121 D1255 ELC communication address

Sending M1122 M1312 M1316 Sending request

request D1129 D1249 D1252 Set value for data receiving timeout (ms)

Receiving
M1127 M1314 M1318 Data receiving completed
completed

- M1315 M1319 Data receiving error

- D1250 D1253 Communication error code
M1129 - - Receiving timeout
M1140 - - Data receiving error
Errors
Parameter error. Exception Code is stored in
M1141 - -
D1130
Error code (Exception code) returning from
D1130 - -
Modbus communication

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-547
3. Instruction Set

Program Example 3: COM2 (RS-485), Function Code H03 (The function code H04 is the same
as the function code H03.)
986. Function code K3 (H03): read multiple registers. For COM2 ASCII mode, only 8 words can be
read.
ELC connects to a drive on Modbus. (ASCII Mode, when M1143=OFF)
ELC connects to a drive on Modbus. (RTU Mode, when M1143=ON)
987. For ASCII or RTU mode, ELC COM2 stores the data to be sent in D1256~D1295, and stores
the command reply in registers starting from S, and stores the converted 16-bit data in D1296
~ D1311. M1131=ON when ELC starts converting to hexadecimal and M1131 = OFF after the
conversion is complete.
988. Use MOV, DMOV or BMOV instructions to move the hexadecimal data from D1296~D1311
and store in D-registers.
989. After receiving data, the ELC will automatically check if the received data is correct. If there is
any fault, M1140 = ON and the fault code will be stored in D1130.
990. After M1140=ON or M1141=ON, the ELC will re-transmit the data to the drive. If the received
data is correct, M1140 and M1141 will be reset.
M1002
MOV H87 D1120 Setting communication protocol 9600, 8, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication timeout 100ms

X1
M1143 RTU mode setting
X0
SET M1122 Setting sending request
X0
MODRW K1 K3 H0708 D0 K6

Read/write data length(word)

Data stored register
Data address H0708
Function code K3
read many items data
Connection device
address K1
M1127
Handling received data

ASCII mode : received data is stored in 16 consecutive registers that start from D0 with ASCII format
when in ASCII mode. ELC will convert the content to hexadecimal and store in registers
D1296~D1311 automatically
RTU mode : received data is stored in 8 consecutive registers that start from D0 and specified by
users in hexadecimal type in RTU mode

RST M1127 Receiving data completed and reset flag

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3. Instruction Set

 ASCII Mode (M1143=OFF): ELC connects to the drive.

ELC  the drive, ELC transmits: “ 01 03 0708 0006 E7 ”
MVX  the drive, ELC receives: “ 01 03 OC 0100 1766 0000 0000 0136 0000 3B ”

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-549
3. Instruction Set

ELC transmits data register (transmit message)

Register Data Descriptions
D1256 Low byte ‘0’ 30 H ADR 1
ADR (1,0) is MVX drive address
D1256 High byte ‘1’ 31 H ADR 0
D1257 Low byte ‘0’ 30 H CMD 1
CMD (1,0) is instruction code
D1257 High byte ‘3’ 33 H CMD 0
D1258 Low byte ‘0’ 30 H
D1258 High byte ‘7’ 37 H
Data Address
D1259 Low byte ‘0’ 30 H
D1259 High byte ‘8’ 38 H
D1260 Low byte ‘0’ 30 H
D1260 High byte ‘0’ 30 H
Number of data (count by word)
D1261 Low byte ‘0’ 30 H
D1261 High byte ‘6’ 36 H
D1262 Low byte ‘E’ 45 H LRC CHK 1
LRC CHK (0,1) error check
D1262 High byte ‘7’ 37 H LRC CHK 0

ELC receive data register (response message)

Register Data Descriptions
D0 low byte ‘0’ 30 H ADR 1
D0 high byte ‘1’ 31 H ADR 0
D1 low byte ‘0’ 30 H CMD 1
D1 high byte ‘3’ 33 H CMD 0
D2 low byte ‘0’ 30 H
Number of data (count by byte)
D2 high byte ‘C’ 43 H
D3 low byte ‘0’ 30 H ELC automatically converts
D3 high byte ‘1’ 31 H Content of ASCII codes to hex and store
D4 low byte ‘0’ 30 H address 0708 H the converted value in D1296
D4 high byte ‘0’ 30 H = 0100 H
D5 low byte ‘1’ 31 H ELC automatically converts
D5 high byte ‘7’ 37 H Content of ASCII codes to hex and store
D6 low byte ‘6’ 36 H address 0709 H the converted value in D1297
D6 high byte ‘6’ 36 H = 1766 H
D7 low byte ‘0’ 30 H ELC automatically converts
Content of
D7 high byte ‘0’ 30 H ASCII codes to hex and store
address 070A H
D8 low byte ‘0’ 30 H the converted value in D1298

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D8 high byte ‘0’ 30 H = 0000 H

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3. Instruction Set

Register Data Descriptions

D9 low byte ‘0’ 30 H ELC automatically converts
D9 high byte ‘0’ 30 H Content of ASCII codes to hex and store
D10 low byte ‘0’ 30 H address 070B H the converted value in D1299
D10 high byte ‘0’ 30 H = 0000 H
D11 low byte ‘0’ 30 H ELC automatically converts
D11 high byte ‘1’ 31 H Content of ASCII codes to hex and store
D12 low byte ‘3’ 33 H address 070C H the converted value in D1300
D12 high byte ‘6’ 36 H = 0136 H
D13 low byte ‘0’ 30 H ELC automatically converts
D13 high byte ‘0’ 30 H Content of ASCII codes to hex and store
D14 low byte ‘0’ 30 H address 070D H the converted value in D1301
D14 high byte ‘0’ 30 H = 0000 H
D15 low byte ‘3’ 33 H LRC CHK 1
D15 high byte ‘B’ 42 H LRC CHK 0

 RTU Mode (M1143=ON): ELC connects to the drive

ELC  the drive, ELC transmits: 01 03 0708 0006 45 7E
The drive  ELC, ELC receives: 01 03 0C 0000 0503 0BB8 0BB8 0000 012D 8E C5

ELC transmit data

Register Data Descriptions
D1256 Low byte 01 H Address
D1257 Low byte 03 H Function
D1258 Low byte 07 H
Data Address
D1259 Low byte 08 H
D1260 Low byte 00 H
Number of data (count by word)
D1261 Low byte 06 H
D1262 Low byte 45 H CRC CHK Low
D1263 Low byte 7E H CRC CHK High

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ELC receive data

Register Data Descriptions
D0 low byte 01 H Address
D1 low byte 03 H Function
D2 low byte 0C H Number of data (count by byte)
D3 low byte 00 H Content of ELC automatically store the
D4 low byte 00 H address 0708 H value in D1296 = 0000 H
D5 low byte 05 H Content of ELC automatically store the
D6 low byte 03 H address 0709 H value in D1297 = 0503 H
D7 low byte 0B H Content of ELC automatically store the
D8 low byte B8 H address 070A H value in D1298 = 0BB8 H
D9 low byte 0B H Content of ELC automatically store the
D10 low byte B8 H address 070B H value in D1299 = 0BB8 H
D11 low byte 00 H Content of ELC automatically store the
D12 low byte 00 H address 070C H value in D1300 = 0000 H
D13 low byte 01 H Content of ELC automatically store the
D14 low byte 2D H address 070D H value in D1301 = 012D H
D15 low byte 8E H CRC CHK Low
D16 low byte C5 H CRC CHK High

Program example 4: COM1(RS-232) / COM3(RS-485), Function Code H03 (The function code
H04 is the same as the function code H03.)
991. Function code K3 (H03): read multiple Words, up to 16 words can be read.
992. ELC COM1 / COM3 stores the received data in registers starting from S.
993. The data sent between the ELC and the drive, is shown in the tables below.
994. If the ELC uses COM1 rather than COM2, the program below would be changed as follows:

D1109→D1036: Communication protocol

M1136→M1138: Retain communication setting

D1252→D1249: Set value for data receiving timeout

M1320→M1139: ASCII/RTU mode selection

M1316→M1312: Sending request

M1318→M1314: Receiving completed flag

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-553
3. Instruction Set

M1002
MOV H87 D1109 Set communication protocol as 9600, 8, E,1

SET M1136 Retain communication setting

MOV K100 D1252 Set communication timeout as 100ms

M1320 = OFF M1320 = ON

RST M1320 SET M1320 RTU mode
ASCII mode
X0
SET M1316 Sending request

X0
MODRW K1 K3 H2100 D0 K6

Data length(word)
Data storing register
Data address: H2100
Function code: K3
Read multiple words
Receiving completed Connection device
M1318 address: K1
Processing received data

ASCII mode: The received data is converted to Hex value

and stored in registers starting fr om D0
RTU mode: The received data is stored in registers starting from D0

RST M1318 Reset M1318

 ASCII mode (COM3: M1320 = OFF, COM1: M1139 = OFF):

When X0 = ON, MODRW instruction executes the function specified by Function Code 03
ELC  the drive , ELC sends: “ 01 03 0708 0006 E7 ”
The drive ELC, ELC receives: “01 03 0C 0100 1766 0000 0000 0136 0000 3B”

Registers for receive data

Register Data Descriptions
ELC converts ASCII codes in 0708 H and stores the converted
D0 0100 H
data automatically.
ELC converts ASCII codes in 0709 H and stores the converted
D1 1766 H
data automatically.
ELC converts ASCII codes in 070A H and stores the converted
D2 0000 H
data automatically.
ELC converts ASCII codes in 070B H and stores the converted
D3 0000 H
data automatically.
ELC converts ASCII codes in 070C H and stores the converted
D4 0136 H
data automatically.

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Register Data Descriptions

ELC converts ASCII codes in 070D H and stores the converted
D5 0000 H
data automatically.

 RTU mode (COM3: M1320 = ON COM1: M1139 = ON):

When X0 = ON, MODRW instruction executes the function specified by Function Code 03
ELC  the drive, ELC sends: ” 01 03 0708 0006 45 7E”
The drive ELC, ELC receives: “01 03 0C 0000 0503 0BB8 0BB8 0000 012D 8E C5”
Registers for received data
Register Data Descriptions
ELC converts data in 0708 H and stores the converted data
D0 0000 H
automatically.
ELC converts data in 0709 H and stores the converted data
D1 0503 H
automatically.
ELC converts data in 070A H and stores the converted data
D2 0BB8 H
automatically.
ELC converts data in 070B H and stores the converted data
D3 0BB8 H
automatically.
ELC converts data in 070C H and stores the converted data
D4 0136 H
automatically.
ELC converts data in 070D H and stores the converted data
D5 012D H
automatically.

Program example 5: COM2(RS-485), Function Code H05

995. Function code K5(H05): Force ON/OFF bit device
996. ELC1 connects to ELC2: (M1143 = OFF, ASCII mode), (M1143 = ON, RTU Mode)
997. n = 1 indicates Force ON (set FF00H) and n = 0 indicates Force OFF (set 0000H)
998. For ASCII or RTU mode, ELC COM2 stores the data to be sent in D1256~D1295 and stores
the received data in D1070~D1085
999. Take the connection between ELC1 (ELC COM2) and ELC2 (ELC COM1) for example, the
tables below explain the status when ELC1 Force ON ELC2 Y0.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-555
3. Instruction Set

M1002
MOV H87 D1120 Set communication protocol as 9600,8,E,1

SET M1120 Retain communication prot oc ol

MOV K100 D1129 Set receiving timeout as 100ms

M1143 = OFF M1143 = ON

RST M1143 SET M1143
ASCII mode RTU mode
X0
SET M1122 Sending request

X0
MODRW K1 K5 H0500 D0 K1

Force ON status (Set FF00H)

Reserved
Data address : Y0 = H0500
Function Code K5:
Force ON/OFF bit device
Receiving completed
Connection device address: K1
M1127
Processing received data

ASCII mode: The received data is stored in D1070~D1085 in ASCII format

RTU mode: The received data is stored in D1070~ D1085 in Hex.

RST M1127 Reset M1127

 ASCII mode (M1143 = OFF):

When X0 = ON, MODRW instruction executes the function specified by Function Code 05
ELC1  ELC2, ELC sends: “01 05 0500 FF00 6F”
ELC2  ELC1, ELC receives: “01 05 0500 FF00 6F”

Data to be sent
Register Data Descriptions
D1256 low byte ‘0’ 30 H ADR 1
Device address: ADR (1,0)
D1256 high byte ‘1’ 31 H ADR 0
D1257 low byte ‘0’ 30 H CMD 1
CMD (1,0) Control parameter
D1257 high byte ‘5’ 35H CMD 0
D1258 low byte ‘0’ 30 H
D1258 high byte ‘5’ 35 H
Data Address
D1259 low byte ‘0’ 30 H
D1259 high byte ‘0’ 30 H
D1260 low byte ‘F’ 46 H
High byte to be force ON/OFF
D1260 high byte ‘F’ 46 H
D1261 low byte ‘0’ 30H Low byte to be force ON/OFF

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Register Data Descriptions

D1261 high byte ‘0’ 30 H
D1262 low byte ‘6’ 36 H LRC CHK 1
Checksum: LRC CHK (0,1)
D1262 high byte ‘F’ 46 H LRC CHK 0

Received data

Register Data Descriptions

D1070 low byte ‘0’ 30 H ADR 1

D1070 high byte ‘1’ 31 H ADR 0
D1071 low byte ‘0’ 30 H CMD 1
D1071 high byte ‘5’ 35H CMD 0
D1072 low byte ‘0’ 30 H
D1072 high byte ‘5’ 35 H
Data Address
D1073 low byte ‘0’ 30 H
D1073 high byte ‘0’ 30 H
D1074 low byte ‘F’ 46 H
High byte to be force ON/OFF
D1074 high byte ‘F’ 46 H
D1075 low byte ‘0’ 30H
Low byte to be force ON/OFF
D1075 high byte ‘0’ 30 H
D1076 low byte ‘6’ 36 H LRC CHK 1
D1076 high byte ‘F’ 46 H LRC CHK 0

 RTU mode (M1143 = ON)

When X0 = ON, MODRW instruction executes the function specified by Function Code 05
ELC1 ELC2, ELC1 sends: “01 05 0500 FF00 8C F6”
ELC2 ELC1, ELC1 receives: “01 05 0500 FF00 8C F6”

Data to be sent
Register Data Descriptions
D1256 Low byte 01 H Address
D1257 Low byte 05 H Function
D1258 Low byte 05 H
Data Address
D1259 Low byte 00 H
D1260 Low byte FF H
Data content (ON = FF00H)
D1261 Low byte 00 H

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3. Instruction Set

Register Data Descriptions

D1262 Low byte 8C H CRC CHK Low
D1263 Low byte F6 H CRC CHK High

Received data
Register Data Descriptions
D1070 Low byte 01 H Address
D1071 Low byte 05 H Function
D1072 Low byte 05 H
Data Address
D1073 Low byte 00 H
D1074 Low byte FF H
Data content (ON = FF00H)
D1075 Low byte 00 H
D1076 Low byte 8C H CRC CHK Low
D1077 Low byte F6 H CRC CHK High

Program example 6: COM1(RS-232) / COM3(RS-485), Function Code H05

1000. Function Code K5 (H05): Force ON/OFF bit.
1001. M1320 = OFF, ASCII Mode , M1320 = ON, RTU Mode
1002. n = 1 indicates Force ON (set FF00H) and n = 0 indicates Force OFF (set 0000H)
1003. The messages sent between ELC1 (ELC COM3) and ELC2(ELC COM1) are shown in
the tables below.
1004. If ELC1 uses COM1 for communications, the program below can be usable by changing:
1. D1109→D1036: communication protocol
2. M1136→M1138: retain communication setting
3. D1252→D1249: Set value for data receiving timeout
4. M1320→M1139: ASCII/RTU mode selection
5. M1316→M1312: sending request
6. M1318→M1314: receiving completed flag

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3. Instruction Set

M1002
MOV H87 D1109 Set communication protocol as 9600,8,E,1

SET M1136 Retain communication prot oc ol

MOV K100 D1252 Set receiving timeout as 100ms

M1320 = OFF M1320 = ON

RST M1320 SET M1320
ASCII mode RTU mode
X0
SET M1316 Sending request

X0
MODRW K1 K5 H0500 D0 K1

Force ON status (Set FF00H)

Reserved
Data address : Y0 = H0500
Function Code K5:
Force ON/OFF bit device
Receiving completed
Connection device address: K1
M1318
Received data

ASCII mode: No processing on received data .

RTU mode: No processing on received data .

RST M1318 Reset M1318

 ASCII mode (COM3: M1320 = OFF, COM1: M1139 = OFF):

When X0 = ON, MODRW instruction executes the function specified by Function Code 05
ELC1  ELC2, ELC sends: “01 05 0500 FF00 6F”
ELC2  ELC1, ELC receives: “01 05 0500 FF00 6F”
(No data processing on received data)
 RTU mode (COM3: M1320 = ON, COM1: M1139 = ON):
When X0 = ON, MODRW instruction executes the function specified by Function Code 05
ELC1 ELC2, ELC1 sends: “01 05 0500 FF00 8C F6”
ELC2 ELC1, ELC1 receives: “01 05 0500 FF00 8C F6”
(No data processing on received data)

Program Example 7: COM2(RS-485), Function Code H06

1005. Function code K6(H6) : write one data word
ASCII Mode when M1143=OFF
RTU Mode when M1143=ON
1006. When in ASCII mode, store the data that will be written to the drive in ASCII format in
register D50. Data received from the drive will be stored in registers D1070~D1076.
1007. When in RTU mode, store data that will be written to the drive in hexadecimal format in
register D50. Data received from the drive will be stored in registers D1070~D1077.
1008. When in ASCII or RTU mode, the ELC will transmit the data stored in registers
D1256~D1295.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-559
3. Instruction Set

1009. After receiving a response, the ELC automatically checks if the received data is correct. If
there is any fault, M1140 will be set to ON.
1010. If the register address of the drive is illegal, a fault code will be stored in D1130 and
M1141 = ON. For example, 8000H is illegal for the drive and M1141=ON and D1130=2. Refer
to MVX user manual to fault code.
1011. After M1140=ON or M1141=ON, the ELC will re-transmit the same data to the drive. If
the received data is correct, M1140 and M1141 will be reset.

M1002
MOV H87 D1120 Setting communication protocol 9600, 8, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication timeout 100ms

X1
M1143 RTU mode setting
X0
SET M1122 Setting sending request
X0
MODRW K1 K6 H0706 D50 K1
Read/write data length(word)
Data stored register
Data address H0706
Function code K6
write one data in
Connection device
address K1
M1127
Handling received data

ASCII mode : received data in ASCII format stored in special registers D1070~D1076
RTU mode : received data in hexadecimal format stored in special registers D1070~D1077

RST M1127 Receiving data completed and reset flag

 ASCII Mode (M1143=OFF): ELC connects to the drive.

ELC  the drive, ELC transmits: “ 01 06 0706 1770 65 ”
The drive  ELC, ELC receives: “ 01 06 0706 1770 65 ”

ELC transmit data

Register Data Descriptions
D1256 Low byte ‘0’ 30 H ADR 1
ADR (1,0) is MVX drive address
D1256 High byte ‘1’ 31 H ADR 0
D1257 Low byte ‘0’ 30 H CMD 1
CMD (1,0) is function code
D1257 High byte ‘6’ 36 H CMD 0
D1258 Low byte ‘0’ 30 H
Data Address
D1258 High byte ‘7’ 37 H

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3. Instruction Set

D1259 Low byte ‘0’ 30 H

D1259 High byte ‘6’ 36 H
D1260 Low byte ‘1’ 31 H
D1260 High byte ‘7’ 37 H Data The content of register D50
D1261 Low byte ‘7’ 37 H contents (H1770=K6000)
D1261 High byte ‘0’ 30 H
D1262 Low byte ‘6’ 36 H LRC CHK 1
LRC CHK (0,1) is error check
D1262 High byte ‘5’ 35 H LRC CHK 0

Data received
Register Data Descriptions
D1070 Low byte ‘0’ 30 H ADR 1
D1070 High byte ‘1’ 31 H ADR 0
D1071 Low byte ‘0’ 30 H CMD 1
D1071 High byte ‘6’ 36 H CMD 0
D1072 Low byte ‘0’ 30 H
D1072 High byte ‘7’ 37 H
Data Address
D1073 Low byte ‘0’ 30 H
D1073 High byte ‘6’ 36 H
D1074 Low byte ‘1’ 31 H
D1074 High byte ‘7’ 37 H
Data content
D1075 Low byte ‘7’ 37 H
D1075 High byte ‘0’ 30 H
D1076 Low byte ‘6’ 36 H LRC CHK 1
D1076 High byte ‘5’ 35 H LRC CHK 0

 RTU Mode (M1143=ON): ELC connects to the drive

ELC  the drive, ELC transmits: 01 06 0706 1770 66 AB
The drive  ELC, ELC receives: 01 06 0706 1770 66 AB

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-561
3. Instruction Set

ELC transmit data

Register Data Descriptions
D1256 Low byte 01 H Address
D1257 Low byte 06 H Function
D1258 Low byte 07 H
Data Address
D1259 Low byte 06 H
D1260 Low byte 17 H Data The content of register D50
D1261 Low byte 70 H content (H1770=K6000)
D1262 Low byte 66 H CRC CHK Low
D1263 Low byte AB H CRC CHK High

Data received
Register Data Descriptions
D1070 Low byte 01 H Address
D1071 Low byte 06 H Function
D1072 Low byte 07 H
Data Address
D1073 Low byte 06 H
D1074 Low byte 17 H
Data content
D1075 Low byte 70 H
D1076 Low byte 66 H CRC CHK Low
D1077 Low byte AB H CRC CHK High

Program example 8: COM1 (RS-232) / COM3 (RS-485), Function Code H06

1012. Function code K6 (H06): Write single Word.
1013. Set the value to be written to the drive in the register specified by operand S.
1014. The messages sent between ELC (ELC COM3) and the drive is shown in the tables
below.
1015. If ELC uses COM1 for communications, the program below can be usable by changing:
1. D1109→D1036: communication protocol
2. M1136→M1138: retain communication setting
3. D1252→D1249: Set value for data receiving timeout
4. M1320→M1139: ASCII/RTU mode selection
5. M1316→M1312: sending request
6. M1318→M1314: receiving completed flag

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3. Instruction Set

M1002
MOV H87 D1109 Set communication protocol as 9600,8,E, 1

SET M1136 Retain communication setting

MOV K100 D1252 Set receiving t imeout as 100ms

M1320 = ON M1320 = OFF

RST M1320 ASCII mode SET M1320 RTU mode
X0
SET M1316 Sending request
X0
MODRW K1 K6 H2000 D50 K1
Data length
Data register: D50=H1770
Data address: H2000
Function code: K6
Write in single Word data
Connection device
Receiving completed address: K1
M1318
Received data

ASCII mode: No processing on received data .

RTU mode: No processing on received data .

RST M1318 Reset M1318

 ASCII mode (COM3: M1320 = OFF, COM1: M1139 = OFF):

When X0 = ON, MODRW instruction executes the function specified by Function Code 06
ELC  the drive , ELC sends: “01 06 0706 1770 65”
The drive  ELC, ELC receives: “01 06 0706 1770 65”
(No data processing on received data)
 RTU mode (COM3: M1320 = ON, COM1: M1139 = ON)
When X0 = ON, MODRW instruction executes the function specified by Function Code 06
ELC  the drive, ELC sends: “01 06 0706 1770 66 AB”
The drive  ELC, ELC receives: “01 06 0706 1770 66 AB”
(No data processing on received data)

Program Example 9: COM2 (RS-485), Function Code H0F

1016. Function code K15 (H0F): write multiple bits. Up to 64bits can be written.
1017. M1143 = OFF, ASCII Mode, M1143 = ON, RTU Mode
1018. For ASCII or RTU mode, ELC COM2 stores the data to be sent in D1256~D1295 and the
received data in D1070~D1085.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-563
3. Instruction Set

1019. The messages for ELC1 (ELC COM2) and ELC2 (ELC COM1) are shown in the tables
below.

Set value: K4Y0=1234H

Device Status Device Status Device Status Device Status
Y0 OFF Y1 OFF Y2 ON Y3 OFF
Y4 ON Y5 ON Y6 OFF Y7 OFF
Y10 OFF Y11 ON Y12 OFF Y13 OFF
Y14 ON Y15 OFF Y16 OFF Y17 OFF

M1002
MOV H87 D1120 Set communication protocol as 9600, 8, E, 1

SET M1120 Retain communication protocol

MOV K100 D1129 Set receiving timeout as 100ms

M1143 = OFF M1143 = ON

RST M1143 SET M1143
ASCII mode RTU mode
X0
SET M1122 Sending request
X0
MODRW K1 K15 H0500 D0 K16
Data length(bit)
Data storing register
Data address: H0500
Function code: K15
Write in multiple bit devices
Receiving completed Connection device
address: K1
M1127
Processing received data

ASCII mode: The received data is stored in D1070~D1085 in ASCII format.

RTU mode: The received data is stored in D1070~D1085 in Hex format.

RST M1127 Reset M1127

 ASCII mode (M1143 = OFF)

When X0 = ON, MODRW instruction executes the function specified by Function Code H0F.
ELC1  ELC2, ELC sends: “ 01 0F 0500 0010 02 3412 93 ”
ELC2  ELC1, ELC receives: “ 01 0F 0500 0010 DB ”

Data to be sent
Register Data Descriptions
D1256 Low byte ‘0’ 30 H ADR 1
Device address: ADR (1,0)
D1256 High byte ‘1’ 31 H ADR 0

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3. Instruction Set

D1257 Low byte ‘0’ 30 H CMD 1

Control parameter: CMD (1,0)
D1257 High byte ‘F’ 46 H CMD 0
D1258 Low byte ‘0’ 30 H
D1258 High byte ‘5’ 35 H
Data Address
D1259 Low byte ‘0’ 30 H
D1259 High byte ‘0’ 30 H
D1260 Low byte ‘0’ 30 H
D1260 High byte ‘0’ 30 H
Number of Data (count by bit)
D1261 Low byte ‘1’ 31H
D1261 High byte ‘0’ 30 H
D1262 Low byte ‘0’ 30 H
Byte Count
D1262 High byte ‘2’ 32 H
D1263 Low byte ‘3’ 33 H
D1263 High byte ‘4’ 46 H 1234H
Data contents
D1264 Low byte ‘1’ 33 H Content of register D0
D1264 High byte ‘2’ 46 H
D1265 Low byte ‘9’ 39 H LRC CHK 1
Checksum: LRC CHK (0,1)
D1265 High byte ‘3’ 33 H LRC CHK 0

Received data

Register Data Descriptions

D1070 Low byte ‘0’ 30 H ADR 1

D1070 High byte ‘1’ 31 H ADR 0
D1071 Low byte ‘0’ 31 H CMD 1
D1071 High byte ‘F’ 46 H CMD 0
D1072 Low byte ‘0’ 30 H
D1072 High byte ‘5’ 35 H
Data Address
D1073 Low byte ‘0’ 30 H
D1073 High byte ‘0’ 30 H
D1074 Low byte ‘0’ 30 H
D1074 High byte ‘0’ 30 H
Number of Data(count by bit)
D1075 Low byte ‘1’ 31 H
D1075 High byte ‘0’ 30 H
D1076 Low byte ‘D’ 44 H LRC CHK 1
D1076 High byte ‘B’ 42 H LRC CHK 0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-565
3. Instruction Set

 RTU mode (M1143 = ON)

When X0 = ON, MODRW instruction executes the function specified by Function Code H0F
ELC1  ELC2，ELC1 sends: “01 0F 0500 0010 02 34 12 21 ED”

 ELC2  ELC1，ELC1 receives: “01 0F 0500 0010 54 CB”

Data to be sent
Register Data Descriptions
D1256 Low byte 01 H Address
D1257 Low byte 0F H Function
D1258 Low byte 05 H
Data Address
D1259 Low byte 00 H
D1260 Low byte 00 H
Number of Data(count by bit)
D1261 Low byte 10 H
D1262 Low byte 02 H Byte Count
D1263 Low byte 34 H Data content 1 Content of D0: H34
D1264 Low byte 12 H Data content 2 Content of D1: H12
D1265 Low byte 21 H CRC CHK Low
D1266 Low byte ED H CRC CHK High

Received data
Register Data Descriptions
D1070 Low byte 01 H Address
D1071 Low byte 0F H Function
D1072 Low byte 05 H
Data Address
D1073 Low byte 00 H
D1074 Low byte 00 H
Number of Data(count by bit)
D1075 Low byte 10H
D1076 Low byte 54H CRC CHK Low
D1077 Low byte CB H CRC CHK High

Program example 10: COM1 (RS-232) / COM3 (RS-485), Function Code H0F
1020. Function code K15 (H0F): write multiple bit devices. Up to 64 bits can be written
1021. M1143 = OFF, ASCII mode, M1143 = ON, RTU mode
1022. The messages sent between ELC1 (ELC COM3) and ELC2 (ELC COM1) is shown in the
tables below.

Set value: K4Y0=1234H

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3. Instruction Set

Device Status Device Status Device Status Device Status

Y0 OFF Y1 OFF Y2 ON Y3 OFF
Y4 ON Y5 ON Y6 OFF Y7 OFF
Y10 OFF Y11 ON Y12 OFF Y13 OFF
Y14 ON Y15 OFF Y16 OFF Y17 OFF

 If the ELC uses COM1 for communication, the program below can be usable by
changing:
a) D1109→D1036: communication protocol
b) M1136→M1138: retain communication setting
c) D1252→D1249: Set value for data receiving timeout
d) M1320→M1139: ASCII/RTU mode selection
e) M1316→M1312: sending request
f) M1318→M1314: receiving completed flag

M1002
MOV H87 D1109 Set communication protocol as 9600, 8, E, 1

SET M1136 Retain communication protocol

MOV K100 D1252 Set receiving timeout as 100ms

M1320 = OFF M1320 = ON

RST M1320 SET M1320
ASCII mode RTU mode
X0
SET M1316 Sending request
X0
MODRW K1 K15 H0500 D0 K16
Data length(bit)
Data storing register
Data address: H0500
Function code: K15
Write in multiple bit devices
Connection device
address: K1
Receiving completed
M1318
Received data

ASCII mode: No processing on received data .

RTU mode: No processing on received data .

RST M1318 Reset M1318

 ASCII mode (COM3: M1320 = OFF, COM1: M1139 = OFF):

When X0 = ON, MODRW executes the function specified by Function Code H0F
ELC1  ELC2, ELC sends: “ 01 0F 0500 0010 02 3412 93 ”

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-567
3. Instruction Set

ELC2  ELC1, ELC receives: “ 01 0F 0500 0010 DB ”

(No data processing on received data)
 RTU mode (COM3: M1320 = ON, COM1: M1139 = ON):
When X0 = ON, MODRW executes the function specified by Function Code H0F
ELC1  ELC2, ELC1 sends: “01 0F 0500 0010 02 34 12 21 ED”
ELC2  ELC1, ELC1 receives: “01 0F 0500 0010 54 CB” ,
(No data processing on received data)

Program Example 11: COM2 (RS-485), Function Code H10

1023. Function code K16(H10): write multiple words of data. For ELC COM2 ASCII mode, only
8 words can be written.
ASCII Mode when M1143=OFF
RTU Mode when M1143=ON
1024. In ASCII mode, store the data that will be written to the drive in ASCII format in 8
continuous registers started from D50. Received data from the drive will be stored in registers
D1070~D1076.
1025. Received data from the drive will be stored in registers D1070~D1077.
1026. After receiving a response, the ELC automatically checks if the received data is correct. If
there is any fault, M1140 = ON.
1027. If the register address of the drive is illegal, a fault code will be stored in D1130 and
M1141 = ON.
1028. After M1140=ON or M1141=ON, the ELC will re-transmit the same data to the drive. If
the received data is correct, M1140 and M1141 will be reset.

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3. Instruction Set

M1002
MOV H87 D1120 Setting communication protocol 9600, 8, E, 1

SET M1120 Communication protocol latched

MOV K100 D1129 Setting communication timeout 100ms

X1
M1143 RTU mode setting
X0
SET M1122 Setting sending request
X0
MODRW K1 K16 H0705 D50 K2
Read/write data length(word)
Data stored register
Data address H0705
Function code K16
write multiple data in
Connection device
address K1
M1127
Handling received data

ASCII mode : received data in ASCII format stored in special registers D1070~D1076
RTU mode : received data in hexadecimal format stored in special registers D1070~D1077

RST M1127 Receiving data completed and reset flag

 ASCII Mode: ELC connects to MVX drive.

ELC  the drive, ELC transmits: “ 01 10 0705 0002 04 1770 0012 44 ”
The drive  ELC, ELC receives: “ 01 10 0705 0002 E1 ”

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-569
3. Instruction Set

ELC transmit data

Register Data Descriptions
D1256 Low byte ‘0’ 30 H ADR 1
ADR (1,0) is MVX drive address
D1256 High byte ‘1’ 31 H ADR 0
D1257 Low byte ‘1’ 31 H CMD 1
CMD (1,0) is instruction code
D1257 High byte ‘0’ 30 H CMD 0
D1258 Low byte ‘0’ 30 H
D1258 High byte ‘7’ 37 H
Data Address
D1259 Low byte ‘0’ 30 H
D1259 High byte ‘5’ 35 H
D1260 Low byte ‘0’ 30 H
D1260 High byte ‘0’ 30 H
Number of Register
D1261 Low byte ‘0’ 30 H
D1261 High byte ‘2’ 32 H
D1262 Low byte ‘0’ 30 H
Byte Count
D1262 High byte ‘4’ 34 H
D1263 Low byte ‘1’ 31 H
D1263 High byte ‘7’ 37 H The content of register D50
Data contents 1
D1264 Low byte ‘7’ 37 H (H1770=K6000)
D1264 High byte ‘0’ 30 H
D1265 Low byte ‘0’ 30 H
D1265 High byte ‘0’ 30 H The content of register D51
Data contents 2
D1266 Low byte ‘1’ 31 H (H12)
D1266 High byte ‘2’ 32 H
D1267 Low byte ‘4’ 34 H LRC CHK 1
LRC CHK (0,1) is error check
D1267 High byte ‘4’ 34 H LRC CHK 0

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3. Instruction Set

ELC receive data

Register Data Descriptions
D1070 Low byte ‘0’ 30 H ADR 1
D1070 High byte ‘1’ 31 H ADR 0
D1071 Low byte ‘1’ 31 H CMD 1
D1071 High byte ‘0’ 30 H CMD 0
D1072 Low byte ‘0’ 30 H
D1072 High byte ‘7’ 37 H
Data Address
D1073 Low byte ‘0’ 30 H
D1073 High byte ‘5’ 35 H
D1074 Low byte ‘0’ 30 H
D1074 High byte ‘0’ 30 H
Number of Register
D1075 Low byte ‘0’ 30 H
D1075 High byte ‘2’ 32 H
D1076 Low byte ‘E’ 45 H LRC CHK 1
D1076 High byte ‘1’ 31 H LRC CHK 0

 RTU Mode: ELC connects to MVX drives

ELC  the drive, ELC transmits: 01 10 0705 0002 04 1770 0012 91 C2
The drive  ELC, ELC receives: 01 10 0705 0002 50 BD

ELC transmit data

Register Data Descriptions
D1256 Low byte 01 H Address
D1257 Low byte 10 H Function
D1258 Low byte 07 H
Data Address
D1259 Low byte 05 H
D1260 Low byte 00 H
Number of Register
D1261 Low byte 02 H
D1262 Low byte 04 H Byte Count
D1263 Low byte 17 H Data The content of register D50
D1264 Low byte 70 H content 1 (H1770=K6000)
D1265 Low byte 00 H Data The content of register D51
D1266 Low byte 12 H content 2 (H12)
D1262 Low byte 91 H CRC CHK Low
D1263 Low byte C2 H CRC CHK High

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-571
3. Instruction Set

ELC receive data

Register Data Descriptions
D1070 Low byte 01 H Address
D1071 Low byte 10 H Function
D1072 Low byte 07 H
Data Address
D1073 Low byte 05 H
D1074 Low byte 00 H
Number of Register
D1075 Low byte 02 H
D1076 Low byte 50 H CRC CHK Low
D1077 Low byte BD H CRC CHK High

Program example 12: COM1 (RS-232) / COM3 (RS-485), Function Code H10
1029. Function code K16 (H10): Write multiple words. Up to 16 Words can be written.
1030. The message data between ELC COM3 and the drive is shown in the tables below.
1031. If the ELC uses COM1 for communications, the program below can be usable by
changing:
1. D1109→D1036: communication protocol
2. M1136→M1138: retain communication setting
3. D1252→D1249: Set value for data receiving timeout
4. M1320→M1139: ASCII/RTU mode selection
5. M1316→M1312: sending request
6. M1318→M1314: receiving completed flag

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3. Instruction Set

M1002
MOV H87 D1109 Set communication protocol as 9600,8,E,1

SET M1136 Retain communication setting

MOV K100 D1252 Set communication t imeout as 100ms

M1320 = OFF M1320 = ON

RST M1320 SET M1320
ASCII mode RTU mo de
X0
SET M1316 Sending request
X0
MODRW K1 K16 H2000 D50 K2
Data length: K2
Datat register:
D50 = H1770, D51=H12
Data address: H2000
Function Code: K16
Write in multiple Word data
Receiving completed Connection device address: K1

M1318
Received data

ASCII mode: No processing on received data .

RTU mode: No processing on received data .

RST M1318 Reset M1318

 ASCII mode (COM3: M1320 = OFF, COM1: M1139 = OFF):

When X0 = ON, MODRW executes the function specified by Function Code H10
ELC  the drive, ELC sends: “01 10 0705 0002 04 1770 0012 44”
The driveELC, ELC receives: “01 10 0705 0002 E1”
(No processing on received data)
 RTU Mode (COM3: M1320=On, COM1: M1139=On):
When X0 = ON, MODRW executes the function specified by Function Code H10
ELC  the drive,,ELC sends: “01 10 0705 0002 04 1770 0012 91 C2”
The drive,ELC, ELC receives :” 01 10 0705 0002 50 BD”
(No processing on received data)

Program example 13: COM2 (RS-485)), Function Code H17

1. Function code K23 (H17): Data is read from multiple word devices and data is written into
multiple word devices. Data can be read from 16 word devices at most, and data can be
written into 16 word devices at most.
2. In the ASCII or RTU mode, the data received is stored in the registers starting from the register
indicated by the index value in S.
3. The connection between ELC-A (PLC COM2) and ELC-B:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-573
3. Instruction Set

 Data is read from multiple word devices in ELC-B into ELC-A, and data is written into
multiple word devices in ELC-B from ELC-A. (M1143=OFF, ASCII Mode) (M1143=ON,
RTU Mode)
M1002
MOV H87 D1120 Set communication protocol as 9600, 8, E, 1

SET M1120 Retain communication protocol

MOV K100 D1129 Set communication timeout as 100ms

M1143 = OFF M1143 = ON

RST M1143 SET M1143
ASCII mode RTU mode

MOV H1100 D0 The data is read from the address H1100.

MOV H1000 D1 The data is written into the address H1000.

MOV K3000 D10 The data is read into D3000.

MOV K4000 D11 The data is written from D4000.

MOV K2 D20 The length of the data which is read is K2.

MOV K2 D21 The length of the data which is written is K2.

X0
SET M1122 Sending request

X0
MODRW K1 K23 D0 D10 D20
D20: Length of the data read
D21: Length of the data written
D10:The index value indicates the register into which the data is read.
D11: The index value indicates the register from which the data is written.
D0: Address from which the data is read
D1: Address into which the data is written
Function code: K23
The data is read from/written into multiple word devices.
Connection device
address: K1
M1127
Processing received data

ASCII mode : The received ASCII data is stored in the registers starting from D3000.
RTU mode : The received data is stored in the registers starting from D3000 in Hex value.

RST M1127 Reset M1127

 ASCII Mode (M1143=OFF)

When X0=ON, MODRW executes the function specified by the function ode H17.
ELC-A ELC-B, ELC-A sends: “01 17 1100 0002 1000 0002 04 1770 0012 06”
ELC-BELC-A, ELC-A receives: “01 17 04 0100 1766 66”

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3. Instruction Set

Registers in ELC-A for received data (responding messages)

Register Data Description
D3000 Low byte ‘0’ 30 H ADR 1
D3000 High byte ‘1’ 31 H ADR 0
D3001 Low byte ‘1’ 31 H CMD 1
D3001 High byte ‘7’ 37 H CMD 0
D3002 Low byte ‘0’ 30 H
Number of data (bytes)
D3002 High byte ‘4’ 34 H
D3003 Low byte ‘0’ 30 H
D3003 High byte ‘1’ 31 H
Contents of the address 1100H
D3004 Low byte ‘0’ 30 H
D3004 High byte ‘0’ 30 H
D3005 Low byte ‘1’ 31 H
D3005 High byte ‘7’ 37 H
Contents of the address 1101H
D3006 Low byte ‘6’ 36H
D3006 High byte ‘6’ 36H
D3007 Low byte ‘6’ 36H LRC CHK 1
D3007 High byte ‘6’ 36H LRC CHK 0

 RTU Mode (M1143=ON)

When X0=ON, MODRW executes the function specified by the function ode H17.
ELC-A ELC-B,ELC-A sends: “01 17 1100 0002 1000 0002 04 1770 0012 A702”
ELC-BELC-A, ELC-A receives: “01 17 04 0100 1766 7701”

Registers in ELC-A for received data (responding messages)

Register Data Description
D3000 Low byte 01 H Address
D3001 Low byte 17 H Function
D3002 Low byte 04 H Number of data (bytes)
D3003 Low byte 01 H
Contents of the address 1100H
D3004 Low byte 00 H
D3005 Low byte 17 H
Contents of the address 1101H
D3006 Low byte 66 H
D3007 Low byte 77 H CRC CHK Low
D3008 Low byte 01 H CRC CHK High

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-575
3. Instruction Set

Program example 14: COM1 (RS-232)/ COM3 (RS-485), Function Code H17
1. Function code K23 (H17): Data is read from multiple word devices and data is written into
multiple word devices. Data can be read from 16 word devices at most, and data can be
written into 16 word devices at most.
2. In the ASCII or RTU mode, the data received through COM1/COM3 on the PLC is stored in the
registers starting from the register indicated by the index value in S+1. Users can use the
instruction DTM to transform and move the data.
3. The connection between ELC-A (PLC COM3) and ELC-B:
 Data is written into multiple word devices in ELC-B from ELC-A. (M1320=OFF, ASCII
Mode) (M1320=ON, RTU Mode)
 If COM1 on ELC-A is connected, the program can be modified as shown below.
1. D1109→D1036: Communication protocol
2. M1136→M1138: The communication setting is retained.
3. D1252→D1249: Communication timeout
4. M1320→M1139: Choice between the ASCII mode and the RTU mode
5. M1316→M1312: The sending of the data though the communication instruction is
requested.
6. M1318→M1314: The receiving of the data through the communication instruction is
complete.

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3. Instruction Set

M1002
MOV H87 D1109 Set communication protocol as 9600, 8, E, 1

SET M1136 Retain communication protocol

MOV K100 D1252 Set communication timeout as 100ms

M1320 = OFF M1320 = ON

RST M1320 SET M1320
ASCII mode RTU mode

MOV H 1100 D0 The data is read from the address H 1100.

MOV H 1000 D1 The data is written into the address H1000.

MOV K3000 D10 The data is read into D3000.

MOV K4000 D11 The data is written from D4000.

MOV K2 D20 The length of the data which is read is K2.

MOV K2 D 21 The length of the data which is written is K2.

X0
SET M1316 Sending request

X0
MODR W K1 K23 D0 D 10 D 20
D20: Length of the data read
D21: Length of the data written
D10:The index value indicates the register into which the data is read.
D11: The index value indicates the register from which the data is written.
D0: Address from which the data is read
D1: Address into which the data is written
Function code: K23
The data is read from/written into multiple word devices.
Connection device
address: K1
M1318
Processing received data

ASCII mode : The received ASCII data is stored in the registers starting from D3000 in Hex value .
RTU mode : The received data is stored in the registers starting from D3000 in Hex value.

RST M1318 Reset M1318

 ASCII Mode (COM3: M1320=OFF; COM1: M1139=OFF):

Registers in ELC-A for received data (responding messages)

Register Data Description
ELC-A converts ASCII codes in 1100H and stores the
D3000 0100H
converted data automatically.
ELC-A converts ASCII codes in 1101H and stores the
D3001 1766H
converted data automatically.

 RTU Mode (COM3: M1320=ON; COM1: M1139=ON):

When X0=ON, MODRW executes the function specified by the function ode H17.
ELC-A ELC-B,ELC-A sends: “01 17 2100 0002 2000 0002 04 1770 0012 A702”

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3. Instruction Set

ELC-BELC-A, ELC-A receives: “01 17 04 0100 1766 7701”

Registers in ELC-A for received data (responding messages)

Register Data Description
ELC-A converts data in 1100H and stores the converted data
D3000 0100 H
automatically.
ELC-A converts data in 1101H and stores the converted data
D3001 1766 H
automatically.

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3. Instruction Set

API Mnemonic Operands Function

151 PWD S, D Detection of Input Pulse Width
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F PWD: 5 steps
S *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source address D: Destination address for storing the result

Description:

1. Range of S: X10 ~ X17

2. Range of D: D0 ~ D999, occupying 2 consecutive devices. Can only be used once in the
program.

3. PWD instruction is used for detecting the time span of input signals from X10 ~ X17; the valid
frequency range is 1 ~1KHz. When M1169 = Off, the instruction will detect the time span from
the rising edge to the falling edge of the input signals (units: 100us). When M1169 = On, the
instruction will detect the time span from one rising edge of the input signal to the next rising
edge of the input signal (units: 1us). It cannot use the same input as is used in the DCNT and
ZRN instructions.

4. D occupies two consecutive words. The longest detectable time is 21,474.83647 seconds,
about 357.9139 minutes or 5.9652 hours.

5. There is no limit on the number of times this instruction can be used in a program. However,
only one instruction can be executed at a time.

 Program Example:
When X0 = On, record the time span of X10 = On and store it in D1 and D0.
X0
PWD X10 D0

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3. Instruction Set

API Mnemonic Operands Function

Start of the Measurement of Execution Time of I
152 RTMU S, D
Interruption
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F RTMU: 5 steps
D * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: The address offset for the execution time of an I interrupt (unit: 1us) n: time base. Parameter
range: K10 ~ K500 (units: 1us)

Description:

1. Range of D: K0 ~ K9

2. Range of n: K10 ~ K500

3. The special D registers (D1156 ~ D1165) are used to measure the execution time of up to 10
interrupt subroutines. For example, when D = K5, the D register will be D1161.

4. When RTMU is executed, if the D and n entered by the user are legal, the timer will be
enabled and the special D register designated by D is cleared to 0. When RTMD is executed,
the instruction will measure the execution time of the interrupt and store the result in the
special D register specified by D.

5. Refer to API 153 below for more information.

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3. Instruction Set

API Mnemonic Operands Function

End of the Measurement of the Execution Time
153 RTMD D
of I Interrupt
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F RTMD: 3 steps
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

 D: Address offset to store the measured time (unit: 1us).

Description:

1. Range of D: K0 ~ K9. The No. of D must be the same as that designated by D in API 152.

2. This instruction stops the RTMU instruction. It is necessary when using the RTMU instruction
to measure the execution time of an I interrupt, to terminate the measurment with the RTMD
instruction prior to the end of the I subroutine, per the example below.

 Program Example:

 When X0 goes from Off to On, the program will enter I001 interrupt
subroutine. RTMU will activate an 8-bit timer (unit: 10us) and
RTMD (when D = K0) will store the execution time in the special D
registers D1156 ~ D1165, referenced by the offset value in D (K0 ~
K9).

FEND
M1000
I 001 RTMU K0 K10

Both K0 should be the same

M1000
RTMD K0

IRET
M1000
I 101 RTMU K1 K10

Both K1 should be the same

M1000
RTMD K1

IRET

END


Remarks:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-581
3. Instruction Set

1. It is recommended that this be used only for test purposes and that this logic be removed
when testing is complete..

2. If RTMU is activated but RTMD is not activated before the end of the interrupt routine, the
interrupt timer will not stop.

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3. Instruction Set

API Mnemonic Operands Function

154 D RAND P S 1 , S2 , D Random Number

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F RAND, RANDP: 7 steps
S1 * * * * * * * * * * *
DRAND, DRANDP: 13
S2 * * * * * * * * * * *
D * * * * * * * * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: lower limit for the random numbers S2: upper limit for the random numbers D: Random
number result

Description:
1032. The range of 16-bit operands S1, S2 is: K0 ≦ S1 , S2 ≦K32,767, the range of 32-bit
operands S1, S2 is: K0 ≦ S1 , S2 ≦K2,147,483,647.
1033. If S1 > S2, the ELC will produce an operand error and M1067 and M1068=ON, and error
code 0E1A(HEX) will be recorded in D1067.

Program Example:
When X0=ON, the random number produced between lower limit D0 and upper limit D10 will be
saved in D20.
X0
RAND D0 D10 D20

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3. Instruction Set

API Mnemonic Operands Function

155 D ABSR S, D1, D2 Absolute Position Read
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DABSR: 13 steps
S * * * *
D1 * * *
D2 * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Input signal from Servo (occupies 3 continuous addresses) D1: Control signal for controlling
the Servo (occupies 3 continuous addresses) D2: Absolute position data (32-bit) read from Servo

Description:
1034. This instruction provides continuous absolute position data read function of the
Mitsubishi servo drive MR-J2 (with absolute position check function).
1035. There is no 16-bit instruction for API 155, it can only be used as a 32-bit instruction,
DABSR is available and it can only be used once in the program.
1036. Flags: For the description of M1010, M1029, M1102, M1103, M1334, M1335, M1336,
M1337, M1346, please refer to the Notes below.
1037. S is the input signal from the Servo and it will use 3 continuous addresses S, S +1, S +2.
Device S and S +1 are connected to the ABS (bit0, bit1) of the Servo for data transmitting.
Device S +2 is connected to Servo for transmitting the data ready flag.
1038. D1 is the control signal for controlling the Servo and it will use 3 continuous addresses D1,
D1+1, D1+2. Device D1 is connected to the Servo ON (SON), device D1+1 is connected to ABS
data transmitting mode and D1+2 is connected to ABS data request signal.

ELC-PC12NNDT SERVO AMP

MR-J2-A
CN1B
+24V VDD 3
S/S ABS(bit 0)
X0 ABS(bit 1)
D01 4
X1 Transmission data is ready
ZSP 19
X2 TLC 6
24G SG 10

SERVO ON
Y0 ABS transmission mode
SON 5
Y1 ABS requirement
ABSM 8
Y2 ABSR 9
C

1039. D2 is the absolute position data (32 bit) read from Servo and it will use 2 continuous
addresses D2, D2+1. D2 is low word and D2+1 is high word. The absolute position data should
be stored in the current value registers (D1348, D1349) corresponding to CH0 pulse or the

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3. Instruction Set

current value registers (D1350, D1351) corresponding to CH1 pulse, so it is recommended to

use these two registers. If other registers are used, the data will need to be transmitted into the
current value registers (D1348, D1349) corresponding to CH0 pulse or the current value
registers (D1350, D1351) corresponding to CH1 pulse.
1040. When the DABSR instruction is enabled and reading starts, the command execution
completed flag M1029 will be ON. The flags must be reset by the user.
1041. When executing the DABSR instruction, use a normally open contact. If the contact of
DABSR command turns OFF when DABSR command read starts, the execution of the
absolute current value read will be interrupted and result will be incorrect.
1042. If the DABSR instruction is disabled after the read is complete, the Servo ON (SON)
signal connected to D1 will also turn OFF and the operation will be disabled.

Program Example:
1043. When X7= ON, the absolute position data (32 bit) read from Servo should be stored in
the current value register (D1348, D1349) corresponding to the CH0 pulse. At the same time,
use a timer T0 to time for 5 seconds. If the time exceeds 5 seconds and the absolute position
data (32 bit) read is not complete, M10=ON and this means the absolute position data (32 bit)
read is abnormal.
1044. When connecting to the system, set the power of ELC-PV series and SERVO AMP to be
ON at the same time or set the SERVO AMP to be ON before power is applied to ELC.

X7
DABSR X0 Y4 D1348
M11
TMR T0 K50
ABS read completed
T0 ABS absolute position
M10 data read is abnormal
Read overtime
M1029
ABS absolute position
SET M11
data read completed
Execution completed flag

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-585
3. Instruction Set

Points to notes:
1045. The Timing chart for the DABSR instruction absolute position data read:

SERVO ON SON
ABS data
transmitting mode ABSM
Transmitting
TLC AMP output
data ready
ABS data ABSR Controller output
request
ABS(bit 1) ZSP AMP output

ABS(bit 0)
D01 AMP output

Current value position data 32-bit

+(plus) check data 6-bit
1046. When the DABSR instruction starts to execute, it will turn the Servo ON (SON) and
prompt it to send ABS data.
1047. With the transmit data ready flag and the ABS request signal, confirmation of the
transmission and receipt from both sides is verified.
1048. Data is transmitted by ABS (bit0, bit1) two bits.
1049. This command is applicable to the Servo motor equipped with absolute position detect
function, such as Mitsubishi MR-J2-A Servo drive.
1050. The Servo motor with absolute position detect function should be started at zero
reference more than one degree revolution and given the reset signal before manufacturing
equipments.
1051. Complete zero point return by using the reset signal function by executing API 156 ZRN
command.
1052. After using JOG or manual operation to adjust the zero point position of the equipment,
reset the SERVO AMP. For details on the wiring between ELC and Mitsubishi MR-J2-A,
please refer to the API 159 DRVA.
Use Mitsubishi MR-J2-A
as example

CR 8
Reset

SG 10

Flags and Special Data register descriptions:

1053. M1029: (For ELC-PV series) M1029=ON after the command execution is complete.
Range of settings:

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3. Instruction Set

API Mnemonic Operands Function

156 D ZRN S1, S2, S3, D Zero Return
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DZRN: 17 steps
S1 * * * * * * * * * *
S2 * * * * * * * * * *
S3 *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Zero return speed S2: Creep speed S3: Near point signal (DOG) D: Pulse output
address

Description: (ELC-PV)
1054. S1 is specified as the zero point return speed. For the ELC-PV series, the range of the
16-bit value is from 10 ~ 32,767Hz and the range of the 32-bit value is from 10 ~ 200,000Hz.
For the ELC-PH series, the range of the 32-bit value is from 100 to 100,000Hz. When the
speed is greater (less) than the maximum (minimum) range, the maximum (minimum) range
value will be used.
1055. S2 is specified as the creep speed (start and end frequency), the lower speed after the
near point signal (DOG) turns ON. For the ELC-PV series, the range is from 10 ~ 32,767Hz.
1056. S3 is specified as the near point signal (DOG) input. In the ELC-PV series, if devices
other than the input device (X10 ~ X17), e.g. X, Y, M, S are used, they will be affected by the
scan time, resulting in dispersion of the zero point. In addition, please note that the same input
points X10 ~ X17 used for this instruction should not be used by the DCNT and PWD
instructions.
1057. The ELC-PV series has four groups of A/B phase pulse outputs, CH0 (Y0, Y1), CH1 (Y2,
Y3), CH2 (Y4, Y5) and CH3 (Y6, Y7).
1058. When executing the API 158 DRVI and API 159 DRVA instructions, the ELC stores the
current pulse count in D-registers so that the machine position is always known. For the
ELC-PV series, Y0: D1337, D1336; Y2: D1339, D1338, Y4: D1376, D1375; Y6: D1378, D1377.
This allows the user to keep track of the position of the machine at any time. However, the data
may be lost when power to the ELC is turned off. Therefore, the machine should execute a
zero point return at power up.
1059. Flag: For the description of M1010, M1029, M1102, M1103, M1334, M1335, M1336,
M1337, M1346, refer to the PLSY (API 57) instruction.
1060. Zero return output addresses in the two ELC models

 Model  ELC-PV

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3. Instruction Set

 Zero
retur
 Y0, Y2,
n
Y4, Y6
outp
ut

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3. Instruction Set

The Timing Chart of the reset signal

1. Timing chart of the reset signal output for ELC-PV series.

a) When the reset signal flag M1346 = On, after zero return is completed, the ELC can send the
reset signal to the servo drive for approximately 20ms. After 20ms, the reset signal will return
to Off again.

b) Output addresses for reset signals of ELC-PV series:

CH0 (Y0, Y1) reset output device (Y10)

CH1 (Y2, Y3) reset output device (Y11)

CH2 (Y4, Y5) reset output device (Y12)

CH3 (Y6, Y7) reset output device (Y13)

Zero return speed

Program interrupt
Scan in circle Creep speed
On
DOG ON
Output near point signal (DOG)
Off
Reset signal
Reset signal Y4 or Y5

Inside 1 ms Greater than 20ms

M1336, M1337
Off
Pulse output monitor

Description of the zero point return operation:

1061. When the ZRN instruction is executed, accelerate to Zero point return speed S1 and start
to move; Y10 and Y11 will use S2 as the initial frequency. For the ELC-PV series, the
accel/decel time is set by Y10 (D1343) and Y11 (D1353).
1062. When the Near point signal (DOG) goes from OFF to ON, it will decelerate to the Creep
speed S2 according to the accel/decel time setting (D1343 and D1353).
1063. When the Near point signal (DOG) goes from ON to OFF and the pulse output stops, 0
will be written to Y10, the current pulse value (D1337, D1336), Y11 current pulse value (D1339,
D1338), Y12 current pulse value (D1375,D1376), and Y13 current pulses value (D1377,
D1378) in ELC-PV series. 0 will also be written to Y10 current pulse value (D1348,D1349) or
Y11 current pulse value (D1350,D1351) in ELC-PH series.
1064. When the Near point signal (DOG) goes from On to Off and the reset signal flag
M1346=On, Y10 (CH0), Y11 (CH1) , Y12 (CH2) and Y13 (CH3) in the ELC-PV series will send
a reset signal.
1065. For the ELC-PV series, when the pulse output is completed and M1029, M1030, M1036
and M1037 are enabled, flag M1336 will be reset for the CH0 pulses, M1337 for CH1, M1522

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3. Instruction Set

for CH2 and M1523 for CH3. For the ELC-PH series, when the pulse output is completed,
M1102 and M1103 will be enabled.
1066. The instruction can not search the position of the Near point signal (DOG) and the
operation of the ZRN instruction can only be processed in one direction. For the ZRN
instruction, the pulse value register (D1337,D1336) for Y10 or the pulse value register
(D1339,D1338) for Y11 will decrease in the ELC-PV series; the pulse value register (D1348,
D1349) for Y10 or the pulse value register (D1350, D1351) for Y11 will also decrease in
ELC-PH series.
Speed
S 3 Near point signal (DOG)ON

Zero return speed (S 1 )

Creep speed (S 2 )

Time

START S 3 (DOG) OFF

Accel/decel time D1343

Acceleration area Dcceleration area

1067. This instruction is applicable to the Servo motor equipped with the absolute positioning
function. It can record the current position even when the power is OFF. Because the current
position of the servo drive can be read by API 155 the DABSR instruction in the ELC-PV
series , the ZRN instruction should only be executed for one time.
1068. When instruction is in deceleration and the output frequency reaches creep speed, the
output pulses will stop when the near point signal transitions from ON to OFF.
1069. During instruction execution, parameters cannot be modified until instruction execution is
completed.
1070. When the instruction is OFF, all outputs will stop.

Description: (ELCM-PH/PA, ELC2-PA/PB/PH/PE)

1071. S1 (zero return speed): max. 100kHz. S2 (JOG speed for DOG) must be less than S1. The
JOG speed for the DOG also refers to the start frequency.
1072. S3 and D operands must be used as an input/output set according to the table below, i.e.
when S3 is specified as X4, D must be specified as Y0; also when S3 is specified as X6, D must
be specified as Y2.
1073. M1307 enables (ON) / disables (OFF) the left limit switch of CH0 (Y0, Y1) and CH1 (Y2,
Y3). M1307 must be set up before the instruction executes. M1305 and M1306 can reverse
the pulse output direction on Y1 and Y3 and must be set up before instruction executes.

The left limit switch for CH0 (Y0, Y1) is X5; the left limit switch for CH1 (Y2, Y3) is X7.

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3. Instruction Set


C
h
a
n
n
e
l

 In
p
u
t

D
O
G

p
o
i
n
t

L
e
f
t
li
m
i
t
s
w
i
t
c
h

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-591
3. Instruction Set


C
h
a
n
n
e
l

 In
p
u
t
M
1
3
0
7

O
N
)

R
e
v
e
r
s
e

p
u
l
s
e

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3. Instruction Set


C
h
a
n
n
e
l

 In
p
u
t
o
u
t
p
u
t
d
i
r
e
c
t
i
o
n
1074. When D is specified as Y0, its direction signal output is Y1; when D is specified as Y2, its
direction signal output is Y3.
1075. When the instruction executes, the pulse output starts in the reverse direction. The ELC
then controls the direction based on the limit switch and DOG switch. The current position of
the Y0 output: (D1030,D1031); current position of the Y1 output (D1032, D1033)
1076. When the pulse output reaches the zero point, the pulse output execution complete flag
M1029 (CH0), M1102 (CH1) is ON and the register indicating current position is reset to 0.
1077. When DZRN instruction executes, external interrupt I40x (Y0) or I60x (Y2) in program will
be disabled until DZRN instruction is complete. Also, if the left limit switch (X5 / X7) is enabled
during instruction execution, external interrupts will be disabled as well.

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3. Instruction Set

1078. Timing Diagram:

Mode1: Current position at right side of DOG switch, pulse output in reverse, limit switch
disabled.
Output in reverse

End flag OFF ON

M1029/M1102
OFF ON
DOG switch: X4/X6
Freq.
Target freq.

JOG freq.
Time

Start Meet DOG switch DOG switch OFF

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3. Instruction Set

Mode 2: DOG switch is ON, pulse output in reverse, limit switch disabled.

Output in reverse

End flag Off

M1029/M1102 On

On Off
DOG switch: X4/X6
Freq.

JOG freq.
Time

Start DOG switch OFF

Mode 3: Current position at left side of zero point, pulse output in reverse, limit switch enabled.
Reverse Forward Reverse
output output output

End flag Off

M1029/M1102 On
On
Off
Limit switch X5/X7
Off On
DOG switch: X4/X6
Freq.
Target freq.

JOG freq.
Time

Start Limit switch OFF DOG switch OFF

Limit switch ON DOG switch ON

Program Example:
When M0 = ON, Y0 pulse output executes zero return with a frequency of 20kHz. When it reaches
the DOG switch, X4 = ON, the frequency changes to the JOG frequency of 1kHz. Y0 will then stop
when X4 = OFF.
M0
DZRN K20000 K1000 X4 Y0

Description: (ELC2-PV)
1. When S1 and S2 are used in device F, only 16-bit instruction is applicable.
2. Flag: see remarks API 158 DDRVI for more details.
3. S1 is the starting speed of zero return operation. The 16-bit instruction can designate the
range of the speed, which is 10 ~ 32,767Hz and the range designated by the 32-bit instruction

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3. Instruction Set

is 10 ~ 200,000Hz. If the designated speed is slower than 10Hz, the zero return will operate at
10Hz and when the designated speed is faster than 200kHz, the zero return will operate at
200kHz.
4. S2 is the designated low speed after the near point signal (DOG) is On. ELC2-PV can
designate the range of S2, which is 10 ~ 32,767Hz.
5. S3 is the designated near point signal (DOG) input (input from A contact). In ELC2-PV series
MPU, if devices other than the external output device (X10 ~ X17), e.g. X, Y, M, S are
designated, they will be affected by the scan period, resulting in dispersion of the zero point. In
addition, please note that the MPU cannot designate the same input points X10 ~ X17 as
those designated by DCNT and PWD instructions.
6. Zero return output device in different models:
Model ELC2-PV
Zero return output Y0, Y2, Y4, Y6
7. The instruction DZRN can be used to detect the limit switch, nake the pulsed output stop at the
positive position, search for the Z phase, and output a certain number of displacement.
Therefore, when the instrcution is writtem, the input number of the DOG point should be
consisten with the description in the table below.
Output point number (D) Y0 Y2 Y4 Y6

Corresponding output point Y1 Y3 Y5 Y7

number
DOG point number (S3) X2 X6 X12 X16
Disabling the left limit M1570=On M1571=On M1572=On M1573=On
Left limit input point X3 X7 X13 X17
Stopping at the right side of DOG M1574=On M1575=On M1576=On M1577=On
Z phase X1 X5 X11 X15
number
The number of
Searching for
times the Z Positive value: Searching for the Z phase in the positive
the Z phase
phase is direction
(M1578=Off)
searched for is Negative value: Searching for the Z phase in the negative
stored in direction
D1312.
Number of The number of
Positive value: The pulse output is in the positive direction
displacement displacement is
Negative value: The pulse output is in the negative
(M1578=On) stored in
direction
D1312.
Clearing the output (M1346=On) Y10 Y11 Y12 Y13

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8. When executing API 158 DRVI (releative positioning) or API 159 DRVA (absolute positioning),
PLC will automatically store the increasing or decreasing forward/reverse pulses in the present
value registers. For ELC2-PV series MPU, Y0: D1337, D1336; Y2: D1339, D1338, Y4: D1376,
D1375; Y6: D1378, D1377.

Program Example:
When M10= On, Y0 output pulses start to operate zero return at the frequency of 20kHz. When the
zero return meets DOG X15 = On, Y0 output pulses will start to operate by creep speed 1kHz until
X15 is Off.
M10
ZRN K20000 K1000 X15 Y0

Remarks:
1. Timing chart of the reset signal output.
a) When the reset signal flag M1346 = On, after zero return is completed, the PLC can send the
reset signal to the servo drive and the signal will last for approximately 20ms. After 20ms, the
reset signal will return to Off again.
b) Output devices for reset signals:
CH0 (Y0, Y1) reset output device (Y10)
CH1 (Y2, Y3) reset output device (Y11)
CH2 (Y4, Y5) reset output device (Y12)
CH3 (Y6, Y7) reset output device (Y13)

Note: The designated devices, X, Y, M, and S, other than the external input devices X10 ~
X17 will be affected by the scan period, 2 times of the scan period at worst.

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3. Instruction Set

API Mnemonic Operands Function

157 D PLSV S, D1, D2 Adjustable Speed Pulse Output
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F PLSV: 7 steps
S * * * * * * * * * * *
D1 * DPLSV: 13 steps
D2 * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Pulse output frequency D1: Pulse output address (must use transistor outputs)
D2: Output address for the rotation direction signal

Description: (ELC-PV/ELC2-PV)

1. Flag: see remarks of API 158 DDRVI for more details.

2. S is the designated pulse output frequency. The 16-bit instruction ranges are 0 ~ +32,767Hz,
0 ~ -32,768Hz. The ranges for the 32-bit instruction are 0 ~ +200,000Hz and 0 ~ -200,000Hz.
“+/-” signs indicate forward/backward directions. During the pulse output, the frequency can
be changed, but not the direction.

3. D1 is the pulse output address. ELC-PV, ELC2-PV can use Y0, Y2, Y4 and Y6.

4. The operation of D2 corresponds to the “+” or “-“ of S. When S is “+”, D2 will be On; when S is
“-“, D2 will be Off.

5. The PLSV instruction does not have settings for acceleration and deceleration. Use API 67
RAMP for the acceleration and deceleration of the pulse output frequency.

6. When the absolute value of the input frequency during the execution of DPLSV is greater
than 200KHz, the output will operate at 200KHz.

7. D1222, D1223, D1383 and D1384 contain the Time difference between the direction signal
and the pulse output points for CH0, CH1, CH2 and CH3.

8. M1305, M1306, M1532 and M1533 are the flags for the direction signals for CH0, CH1, CH2
and CH3. When S is “+”, the output will operate in the forward direction and the flag will go Off.
When S is “-“, the output will operate in the backward direction and the flag will go On.

 Program Example:
When M10 = ON, Y0 will send pulses at 20KHz. Y5 = ON indicates forward direction.
M10
PLSV K20000 Y0 Y5

Description: (ELCM-PH/PA, ELC2-PB/PH/PA/PE)

1. S is the designated pulse output frequency. Available range: -100,000Hz ~ +100,000 Hz. “+/-”

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signs indicate forward/reverse output direction. The frequency can be changed during pulse
output execution. However, if the specified output direction is diferent from the current output
direction, the instruction will stop for 1 scan cycle then restart with the changed frequency.

2. D1 is the pulse output address. It can use CH0(Y0) and CH1(Y2).

3. D2 is the direction signal output device. It can use CH0(Y1) and CH1(Y3).

4. The operation of D2 corresponds to the “+” or “-“ of S. When S is “+”, D2 will be OFF; when S
is “-“, D2 will be ON.

5. M1305 and M1306 can change the output direction of CH0/CH1 set in D2. When S is “-“, D2
will be ON, however, if M1305/M1306 is set ON before instruction executes, D2 will be OFF
during execution of instruction.

6. PLSV instruction does not support the settings for ramp up or ramp down. If ramp up/down is
needed, use API 67 the RAMP instruction.

7. If the drive contact turns off during the pulse output process, the pulse output will stop
immediately.

8. D2 doesn’t support the index registers E, F modification.

 Program Example:
When M10 = ON, Y0 will send pulses at 20kHz. Y1 = OFF indicates forward direction.
M10
DPLSV K20000 Y0 Y1


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3. Instruction Set

API Mnemonic Operands Function

158 D DRVI S1, S2, D1, D2 Relative Position Control
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DDRVI: 17 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * *
D1 *
D2 * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Numbers of pulses (Target device) S2: Pulse output frequency D1: Pulse output address
D2: Rotation direction signal

Description: (ELC-PV, ELC2-PV)

1079. S1 is specified as the numbers of pulses (relative position). The 16-bit instruction range is
-32,768 ~ +32,767, and the range for the 32-bit instruction is -2,147,483,648 ~ +2,147,483,647.
The positive (+) and negative (-) symbol indicates the forward and reverse direction.
1080. S2 is specified as the pulse output frequency. The 16-bit instruction range is 10 ~
32,767Hz, and the range of the 32-bit instruction is 10 ~ 200,000Hz.
1081. Has four groups of A/B phase pulse outputs, CH0 (Y0, Y1), CH1 (Y2, Y3), CH2 (Y4, Y5)
and CH3 (Y6, Y7).
1082. D1 is specified as the pulse output address.

 Model  ELC-PV,
ELC2-
PV

 Pulse  Y0, Y2,

outp Y4, Y6
ut
end
1083. D2 is specified as rotation direction signal and it operates based on the polarity of S1.
When S1 is negative (-), D2 is OFF. When S1 is positive (+), D2 is ON and D2 will not be OFF
immediately following the completion of the pulse output. D2 will be turned OFF when contact
switch is OFF.
1084. S1 is

- The 32-bit data stored in the present value registers (D1337, D1336) of CH0 (Y0, Y1).

- The 32-bit data stored in the present value registers (D1339, D1338) of CH1 (Y2, Y3).

- The 32-bit data stored in the present value registers (D1376, D1375) of CH2 (Y4, Y5).

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- The 32-bit data stored in the present value registers (D1378, D1377) of CH3 (Y5, Y6).

- When in the reverse direction, the contents in the present value register will decrease.
1085. The contents of each operand cannot be changed while the DRVI instruction is executed.
The contents will be changed with the next execution of the instruction.
1086. If the conditions preceding the DRVI instruction turn OFF when the DRVI command is
executing, the machine will decelerate to a stop and the execution completed flag M1102 and
M1103 will turn ON.
1087. When the conditions preceding the DRVI instruction are Off, even if the indication flag
M1336 generated by CH0 pulses, M1337 generated by CH1 pulses, M1522 generated by CH2
pulses and M1523 generated by CH3 pulses are “On”, the DRVI instruction will not execute
again.
1088. When the absolute value of the input frequency of the DDRVI instruction is greater than
200KHz, the output will be operated at 200KHz. When the absolute value of the input
frequency is less than 10Hz, the output will be operated at 10Hz.
1089. D1343 (D1353) is the accel/decel time setting. The acceleration and deceleration time
shall not be shorter than 10ms. The output will be operatedp for 10ms if the time is shorter
than 10ms or longer than 10,000ms.
1090. Flags: For the description of M1010, M1029, M1102, M1103, M1334, M1335, M1336,
M1337, M1346, refer to the PLSY (API 57) instruction.
1091. M1305 (M1306) is the direction signal for CH0 (CH1). When S1 is a positive number, the
output will be operated in the forward direction and M1305 (M1306) will be Off. When S1 is a
negative number, the output will be operated in the reverse direction and M1305 (M1306) will
be On.

Program Example:
When M10= ON, 20000 pulses at a frequency of 2KHz will be sent out Y10 (relative position). Y0=
ON represents the positive direction.
M10
DDRVI K20000 K2000 Y10 Y0

Points to note:
1092. Relative position control: Using a positive or a negative value to specify travel distance
from the current position is also a way of doing relative position control.

ELC-PV, ELC2-PV series

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+3,000
F0 1st step acceleration
Last step deceleration
0 Y10(D1340) Min value: 10Hz

Current
position -3,000

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1093. The setting of relative position and acceleration/deceleration:

Sample time Max. speed Factory setting: 200,000Hz

of acceleration Y10(D1342,D1341)
Acceleration
slope

Acceleration Deceleration
Y10(D1340) Y10 (D1340)
Output pulse frequency
Min value: 10Hz Min value: 10Hz

Accel/Decel time Accel/Decel time Numbers of

output pulses
Factory setting: 200ms Factory setting: 200ms
Current Y10(D1343) Y10(D1343)
position

a) This instruction can be used many times in the program.

b) After Y10 is activated by the DDRVI instruction, output Y10 will be disabled as will Y11.

c) Once the instruction is active, parameters cannot be modified until the instruction is
de-activated.

d) When the instruction is OFF but the output is not complete, if M1334=ON, Y10 will stop
immediately. If M1334=OFF, Y10 will deceleration to the end frequency based on the
deceleration time and then stop.

e) When the instruction is OFF but the output is not complete, if M1335=ON, Y10 will stop
immediately. If M1335=OFF, Y10 will deceleration to the end frequency based on the
deceleration time and then stop.
1094. Flags description:
M1010: When M1010 = On, CH0, CH1, CH2 and CH3 will send pulses when the END
instruction is being executed. M1010 will be Off automatically when the output
starts.
M1029: M1029 = On after CH0 pulse output is complete.
M1030: M1030 = On after CH1 pulse output is complete.
M1036: M1036 = On after CH2 pulse output is complete.
M1037: M1037 = On after CH3 pulse output is complete.
M1305: Direction signal of CH0.
M1306: Direction signal of CH1.
M1334: CH0 pulse output stops.
M1335: CH1 pulse output stops.
M1336: CH0 sending pulses” indication.
M1337: CH1 sending pulses” indication.

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M1520: CH2 pulse output stops.

M1521: CH3 pulse output stops.
M1522: CH2 sending pulses” indication.
M1523: CH3 sending pulses” indication.
M1534: Deceleration time of CH0 (used with D1348).
M1535: Deceleration time of CH1 (used with D1349).
M1536: Deceleration time of CH2 (used with D1350).
M1537: Deceleration time of CH3 (used with D1351).
M1532: Direction signal of CH2.
M1533: Direction signal of CH3.
1095. Special registers:
D1220: Phase setting of CH0 (Y0, Y1): D1220 determines the phase by the last two
bits; other bits are invalid.
1. K0: Y0 output
1096. K1: Y0, Y AB-phase output; A ahead of B.
1097. K2: Y0, Y1 AB-phase output; B ahead of A.
1098. K3: Y1 output
D1221: Phase setting of CH1 (Y2, Y3): D1221 determines the phase by the last two
bits; other bits are invalid.
1. K0: Y2 output
2. K1: Y2, Y3 AB-phase output; A ahead of B.
3. K2: Y2, Y3 AB-phase output; B ahead of A.
1099. K3: Y3 output
D1222: The time difference between the direction signal and pulse output sent by
CH0.
D1223: The time difference between the direction signal and pulse output sent by
CH1.
D1229: Phase setting of CH2 (Y4, Y5): D1229 determines the phase by the last two
bits; other bits are invalid.
1. K0: Y4 output
1100. K1: Y4, Y5 AB-phase output; A ahead of B.
1101. K2: Y4, Y5 AB-phase output; B ahead of A.
1102. K3: Y5 output
D1230: Phase setting of CH3 (Y6, Y7): D1230 determines the phase by the last two
bits; other bits are invalid.
1. K0: Y6 output

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1103. K1: Y6, Y7 AB-phase output; A ahead of B.

1104. K2: Y6, Y7 AB-phase output; B ahead of A.
1105. K3: Y7 output
D1336: Low word of the current number of output pulses from CH0.
D1337: High word of the current number of output pulses from CH0.
D1338: Low word of the current number of output pulses from CH1.
D1339: High word of the current number of output pulses from CH1.
D1340: The first start frequency and the last end frequency of CH0.
D1343: Acceleration/deceleration time for CH0 pulse output.
D1352: The first start frequency and the last end frequency of CH1.
D1353: Acceleration/deceleration time for CH1 pulse output.
D1375: Low word of the current number of output pulses from CH2.
D1376: High word of the current number of output pulses from CH2.
D1377: Low word of the current number of output pulses from CH3.
D1378: High word of the current number of output pulses from CH3.
D1379: The first start frequency and the last end frequency of CH2.
D1380: The first start frequency and the last end frequency of CH3.
D1348: Deceleration time for CH0 pulse output when M1534 = On.
D1349: Deceleration time for CH1 pulse output when M1535 = On.
D1350: Deceleration time for CH2 pulse output when M1536 = On.
D1351: Deceleration time for CH3 pulse output when M1537 = On.
D1381: Acceleration/deceleration time for CH2 pulse output.
D1382: Acceleration/deceleration time for CH3 pulse output.
D1383: The time difference between the direction signal and pulse output sent by
CH2.
D1384: The time difference between the direction signal and pulse output sent by
CH3.

Description: (ELCM-PH/PA, ELC2-PB/PH/PA/PE)

1106. S1 is the number of pulses (relative position). Available range: -2,147,483,648 ~
+2,147,483,647. “+/-” signs indicate forward and reverse direction.
1107. S2 is the pulse output frequency. Available range: 6 ~ 100,000Hz.
1108. D1 is the pulse output address. It can use CH0 (Y0) or CH1 (Y2).
1109. D2 is the direction signal for the output. It can use CH0 (Y1) or CH1 (Y3).

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1110. The operation of D2 corresponds to the “+” or “-“of S. When S is “+”, D2 will be OFF; when
S is “-“, D2 will be ON. D2 will not be OFF immediately after pulse output complete and will be
OFF when the drive contact is OFF.
1111. The value in S1 is the relative position of

- The current position (32-bit data) of CH0 (Y0, Y1) which is stored in D1031(high), D1030 (low)

- The current position (32-bit data) of CH1 (Y2, Y3) which is stored in D1337(high), D1336
(low).

 In reverse direction the pulse output values are in (D1031, D1330)

and (D1336, D1337) decreases.
1112. D1343 (D1353) is the ramp up/down time setting of CH0 (CH1). Available range: 20 ~
32,767ms. Default: 100ms. The ELC will take the upper/lower bound value as the set value
when the specified value exceeds the available range.
1113. D1340 (D1352) is the start/end frequency setting of CH0 (CH1). Available range: 6 to
100,000Hz. The ELC will take the upper/lower bound value as the set value when specified
value exceeds the available range.
1114. M1305 and M1306 can change the output direction of CH0/CH1 set in D2. When S is “-“,
D2 will be ON, however, if M1305/M1306 is set ON before the instruction executes, D2 will be
OFF during execution of the instruction..
1115. Ramp-down time of CH0 and CH1 can be modified by using (M1534, D1348) and
(M1535, D1349). When M1534 / M1535 = ON, CH0 / CH1 ramp-down time is specified by
D1348 / D1349.
1116. If M1078 / M1104 = ON during instruction execution, Y0 / Y2 will pause immediately and
M1538 / M1540 = ON indicates the pause status. When M1078 / M1104 = OFF, M1538 /
M1540 = OFF, Y0 / Y2 will proceed to finish the remaining pulses.
1117. DRVI instruction supports Alignment Mark and Mask function. Please refer to the
explanation in API 59, the PLSR instruction.
1118. D2 doesn’t support the index registers E, F modification.

Program Example:
When M10= ON, 20,000 pulses (relative position) at 2kHz frequency will be generated from Y0. Y1=
OFF indicates positive direction.
M10
DDRVI K20000 K2000 Y0 Y1

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Points to note:
1119. Operation of relative positioning:

The Pulse output executes according to the relative distance and direction from the current
position.

+3,000

Ramp up time Ramp down time

Start / End freq. Min: 6Hz

Current
position
-3,000

1120. Registers for setting ramp up/down time and start/end frequency:

a) Output Y0:

Sample time
of ramp-up Pulse output frequency
Ramp-up
slope

Start freq. End freq.

Y0(D1340) Y0 (D1340)
Min: 6Hz Min: 6Hz

Numbers of
Ramp up time Ramp down time output pulses
Current Default: 100ms Default: 100ms
position Y0(D1343) Y0(D1343)

b) This instruction can be used many times in the program, but only one instruction will be
activated at a time.

c) After activating the instruction, parameters cannot be modified unless the instruction is OFF.
1121. Related Flags:
M1029: CH0 (Y0, Y1) pulse output execution complete.
M1102: CH1 (Y2, Y3) pulse output execution complete
M1078: CH0 (Y0, Y1) pulse output pause (immediate)
M1104: CH1 (Y2, Y3) pulse output pause (immediate)
M1108: CH0 (Y0, Y1) pulse output pause (ramp down).
M1110: CH1 (Y2, Y3) pulse output pause (ramp down)
M1156: Enabling the mask and alignment mark function on I400/I401(X4)

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corresponding to Y0.
M1158: Enabling the mask and alignment mark function on I600/I601(X6)
corresponding to Y2.
M1305: Reverse Y1 pulse output direction in high speed pulse output instructions
M1306: Reverse Y3 pulse output direction in high speed pulse output instructions
M1347: Auto-reset Y0 when high speed pulse output complete
M1524: Auto-reset Y2 when high speed pulse output complete
M1534: Enable ramp-down time setting on Y0. Has to be used with D1348
M1535: Enable ramp-down time setting on Y2. Has to be used with D1349.
M1538: Indicating pause status of CH0 (Y0, Y1)
M1540: Indicating pause status of CH1 (Y2, Y3)
1122. Special D registers:
D1030: Low word of the present value of Y0 pulse output
D1031: High word of the present value of Y0 pulse output
D1336: Low word of the present value of Y2 pulse output
D1337: High word of the present value of Y2 pulse output
D1340: Start/end frequency of the 1st group pulse output CH0 (Y0, Y1)
D1352: Start/end frequency of the 2nd group pulse output CH1 (Y2, Y3)
D1343: Ramp up/down time of the 1st group pulse output CH0 (Y0, Y1)
D1353: Ramp up/down time of the 2nd group pulse output CH1 (Y2, Y3)
D1348: CH0(Y0, Y1) pulse output. When M1534 = ON, D1348 stores the ramp-down
time
D1349: CH1(Y2, Y3) pulse output. When M1535 = ON, D1349 stores the ramp-down
time
D1232: Number of output pulses for ramp-down stop when Y0 masking sensor
receives signals. (LOW WORD)
D1233: Number of output pulses for ramp-down stop when Y0 masking sensor
receives signals. (HIGH WORD).
D1234: Number of output pulses for ramp-down stop when Y2 masking sensor
receives signals (LOW WORD).
D1235: Number of output pulses for ramp-down stop when Y2 masking sensor
receives signals (HIGH WORD).
D1026: Number of pulses for masking Y0 when M1156 = ON (Low word)
D1027: Number of pulses for masking Y0 when M1156 = ON (High word)
D1135: Number of pulses for masking Y2 when M1158 = ON (Low word)

3-608
MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m
3. Instruction Set

D1136: Number of pulses for masking Y2 when M1158 = ON (High word)

3-609
MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m
3. Instruction Set

API Mnemonic Operands Function

159 D DRVA S1, S2, D1, D2 Absolute Position Control
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DDRVA: 17 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * *
D1 *
D2 * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Numbers of pulses (Target device) S2: pulse output frequency D1: pulse output address
D2: Rotation direction signal

Description: (ELC- PV, ELC2-PV)

1123. S1 is specified as the number of output pulses (absolute position). The 16-bit instruction
range is -32,768 ~ +32,767. The range for the 32-bit instruction is -2,147,483,648 ~
+2,147,483,647. The positive (+) and negative (-) symbol indicates the forward and reverse
direction.
1124. S2 is specified as the pulse output frequency. The 16-bit instruction range is 10 ~
32,767Hz. The range for the 32-bit instruction is 10 ~ 200,000Hz.
1125. Has four groups of A/B phase pulse output, CH0 (Y0, Y1), CH1 (Y2, Y3), CH2 (Y4, Y5)
and CH3 (Y6, Y7).
1126. D1 is pulse output address:

 ELC-PV,
 Model ELC2-
PV

 Pulse  Y0, Y2,

outp Y4, Y6
ut
end
1127. D2 is specified as rotation direction signal.
1128. When S1 is larger than the current absolute position, D2 is OFF.
1129. When S1 is less than the current absolute position, D2 is ON.
1130. After the pulse output completes, D2 will not immediately turn OFF. D2 will be ON until the
conditions preceding the instruction are OFF.
1131. S1 is

- The 32-bit data stored in the present value registers (D1337, D1336) for CH0 (Y0, Y1).

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3. Instruction Set

- The 32-bit data stored in the present value registers (D1339, D1338) for CH1 (Y2, Y3).

- The 32-bit data stored in the present value registers (D1376, D1375) for CH2 (Y4, Y5).

- The 32-bit data stored in the present value registers (D1378, D1377) for CH3 (Y5, Y6).
1132. When in the reverse direction, the contents of the present value register will decrease.
1133. When the DRVA instruction is sending pulses, you cannot change the operands. The
changes will not be valid until the next time the instruction is enabled.
1134. When the conditions preceding the DRVA instruction are OFF, the pulse output will
decelerate to a stop and M1029 and M1030 will turn ON.
1135. When the conditions preceding the DRVA instruction are OFF, and the flag M1336 for the
CH0 pulses or M1337 for the CH1 pulses are “ON”, the DRVA instruction will not execute.
1136. When the absolute value of the input frequency of DRVA and DDRVA instructions is
greater than 200KHz, the output will be at 200KHz. When the absolute value of the input
frequency is less than 10Hz, the output will be at 10Hz.
1137. D1343 (D1353) is the acceleration/deceleartion time of the first step acceleration and the
last step deceleration. The acceleration and deceleration time shall not be shorter than 10ms.
The output will be set to 10ms if the time is shorter than 10ms and set to 100ms if the time is
longer than 10,000ms.
1138. M1305 (M1306) is the direction signal for CH0 (CH1). When S1 is a positive number, the
output will be operated in a forward direction and M1305 (M1306) will be OFF. When S1 is a
negative number, the output will be operated in the reverse direction and M1305 (M1306) will
be ON.
1139. Flags: Refer to API 158 DRVI for information on M1010, M1102, M1103, M1334, M1335,
M1336, M1337, M1346

Program Example:
When M10=ON, it will output 20,000 pulses from Y10 with 2KHz frequency. Y0=ON indicates
positive direction.
M10
DDRVA K20000 K2000 Y10 Y0

Points to note:

1. :

a) Absolute position control: The travel distance starting from the zero point (0); also known as
an absolute driving method.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3 - 6 11
3. Instruction Set

+3,000
F0 1st acceleration
Last deceleration
0 Y10(D1340) Min value: 100Hz Target
position

Zero
point 0

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3. Instruction Set

b) Settings for absolute positioning and the acceleration/deceleration speed:

Acceleration
sampling time Default: 200,000Hz
Max. speed
(D1342, D1341)

Acceleration slope

Output pulse frequency

First acceleration Last deceleration

segment (D1340) segment (D1340)
Min: 10Hz Min: 10Hz

T Accel/Decel time Accel/Decel time

Default: 100ms Default: 100ms Output pulse

Current (D1343) (D1343) numbers
position

2. When this instruction is OFF and the output is not complete:

If M1334=ON, Y10 will stop the pulse output immediately.
If M1334=OFF, Y10 will decelerate from the deceleration time to the end frequency and then
stop the pulse output.
It is the same way for M1335 with respect to Y11 output.

3. Please refer to the DDRVI instruction: “Remarks for flag information.

4. Wiring of the ELC-PV and a Servo drive:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-613
3. Instruction Set

PV Series Mitsubishi Servo Drive

MR-J2 series
220VAC R U
L
3-phase power S V
220VAC T W
N
+24V CN1
S/S CN1B 14 RD
24G SON 5
X0 Start RES 14 18 INP
X1 Zero point reset LSP 16
X2 JOG(+) LSN 17
CN1
X3 JOG( - ) TL 9
18 ALM
X4 Stop EMG 15
X5 Error reset SG 10
24V
5 VDD
X10 Forward limit SON: servo start
13 COM
X11 Reverse limit RES: servo reset
Rcal1 LSP: forward limit
X12 Servo LSN: reverse limit
Rcal2 malfunction CN2
X13 SV-END TL: emergency stop
Rcal3
X14 SV-READY
Z phase signal Error
X15 CN1A
(zero point signal) Counter
X16 OP 14
LG 1
Electric
Gear
Pulse clear
Y10 CR 8 100KPPS
C3 SG 20

Pulse output
Y0 PP 3
C2 SG 10

Forward/Reverse direction
Y1 NP 2
C0 SG 10

 ELC- PV28NNDT

Note:
(a) When detecting an absolute position by using DABSR instruction, the parameter settings
of a Mitsubishi MR-J2-□A servo drive that connects to ELC-PV:
P0: position mode.
P1: using absolute value.
P21: pulse input type as Pulse+DIR.
(b) The forward/reverse limit switch should be connected to SERVO AMP.
(c) When using OP (Z-phase signal) in a servo and given that the Z-phase signal is a
high-frequency signal, when the motor is running at high speed, the valid detection can
only be possible when the signal is within the range detectable by the ELC. When using
OP (Z phase signal) of the servo, if the Z phase signal is a high frequency signal during
high-speed motor operation, the high frequency signal shall be within the available range
that can be detected by the ELC.

5. Settings of the pulse output signals in the operation of position control :

a) Pulse + DIR (recommended)

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3. Instruction Set

Pulse
DIR

b) CW/CCW (limited frequency at 10KHz)

CW
CCW

c) A/B-phase output (limited frequency at 10KHz)

A
B

6. When the Y0 output is used with many high-speed pulse output instructions (PLSY, PWM,
PLSR) and position control instructions (ZRN, PLSV, DRVI, DRVA) in a program and these
instructions are executed synchronously in the same program scan, the ELC will execute the
instruction with the fewest step numbers.

Programming example for forward/reverse operation:

For the wiring, see the wiring drawing of the ELC-PV series and the servo drive above.

One operation mode performs positioning by absolute position:

500,000

Output pulse frequency 500Hz

100 200,000Hz

Zero point
500Hz

Acceleration/
Deceleration time
 200ms

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-615
3. Instruction Set

Explanations: (ELCM-PH/PA,ELC2-PB/PH/PA/PE)
1140. S1 is the number of pulses (Absolute positioning). Available range: -2,147,483,648 ~
+2,147,483,647. “+/-” signs indicate forward and reverse direction.
1141. S2 is the pulse output frequency. Available range: 6 ~ 100,000Hz.
1142. D1 is the pulse output address. It can use CH0 (Y0) or CH1 (Y2).
1143. D2 is the direction signal output address. If a Y output is used, only CH0 (Y1) and CH1
(Y3) are available.
1144. S1 is the target position for absolute positioning. The actual number of output pulses (S1 –
current position) will be calculated by the ELC. When the result is positive, the pulse output
executes in the forward direction, i.e. D2 = OFF; when the result is negative, the pulse output
executes in the reverse direction, i.e. D2 = ON.
1145. The value in S1 is the absolute position from the zero point. The calculated actual number
of output pulses will be the relative position of:

- The current position (32-bit data) of CH0 (Y0, Y1) which is stored in D1031(high), D1030 (low)

- The current position (32-bit data) of CH1 (Y2, Y3) which is stored in D1337(high), D1336 (low).

 In the reverse direction of the pulse output, the value in (D1031,

D1330) and (D1336, D1337) decreases.
1146. D1343 (D1353) is the ramp up/down time setting of CH0 (CH1). Available range: 20 ~
32,767ms. Default: 100ms. The ELC will use the upper/lower value as the set value when the
value exceeds the allowable range.
1147. D1340 (D1352) is the start/end frequency setting of CH0 (CH1). Available range: 6 to
100,000Hz. The ELC will use the upper/lower value as the set value when the value exceeds
the allowable range.
1148. M1305 and M1306 can change the output direction of CH0/CH1 set in D2. When S is “-“,
D2 will be ON. If M1305/M1306 is set ON before the instruction executes, D2 will be OFF during
execution of the instruction.
1149. The ramp-down time of CH0 and CH1 can be modified by using (M1534, D1348) and
(M1535, D1349). When M1534 / M1535 = ON, CH0 / CH1 ramp-down time is specified by
D1348 / D1349.
1150. If M1078 / M1104 = ON during instruction execution, Y0 / Y2 will pause immediately and
M1538 / M1540 = ON indicates the pause status. When M1078 / M1104 = OFF, M1538 /
M1540 = OFF, Y0 / Y2 will proceed to finish the remaining pulses.
1151. DRVA/DDRVA instructions do NOT support Alignment Mark and Mask function.

Program Example:
When M10 = ON, the DRVA instruction executes absolute positioning on Y0 at the target position
20000 and the target frequency 2kHz. Y5 = OFF indicates positive direction.

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3. Instruction Set

M10
DRVA K20000 K2000 Y0 Y5

Points to note:
1152. Operation of absolute positioning:

Pulse output executes according to the specified absolute position from zero point

+3,000

Ramp up time Ramp down time

0 Start / End freq. Min: 6Hz Target position

Zero point

1153. Registers for setting ramp up/down time and start/end frequency:

a) Output Y0:

Sample time
of ramp-up Pulse output frequency
Ramp-up
slope

Start freq. End freq.

Y0(D1340) Y0 (D1340)
Min: 6Hz Min: 6Hz

Target position
Ramp up time Ramp down time
Current Default: 100ms Default: 100ms
position Y0(D1343) Y0(D1343)

b) This instruction can be used many times in the program, but only one instruction will be
allowed to be active at a time. The instructions first activated will be first executed.

c) After activating the instruction, parameters cannot be modified unless the instruction is OFF.

d) For related special flags and special registers, please refer to Points to note of DDRVI
instruction.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-617
3. Instruction Set

API Mnemonic Operands Function

160 TCMP P S1, S2, S3, S, D Calendar Compare
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F TCMP, TCMPP: 11 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * *
S3 * * * * * * * * * * *
S * * *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: hours of comparison time, range is K0~K23 S2: minutes of comparison time, range is K0~K59
S3: seconds of comparison time, range is K0~K59 S: Current clock information (occupies 3
continuous addresses) D: Comparison result (occupies 3 continuous addresses)

Description:
1154. S1, S2, S3 are compared to the current values of the real-time clock S and save the
comparison result in D.
1155. S is the hour of the current time and the range is K0~K23. S +1 is the minutes of the
current time and the range is K0~K59. S +2 is the seconds of the current time and the range is
K0~K59.
1156. The current time of the RTC specified by S is read by using the TRD instruction
previously in the program and then compared by using TCMP instruction. If the contents of S
exceeds the range, it will result in “operation error”, the instruction will not execute and
M1067=ON, M1068=ON, and the error code 0E1A (HEX) will be in D1067.

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3. Instruction Set

Program Example:
1157. When X0= ON, the instruction is executed and the current time of the calendar is placed
in (D20~D22) and is compared to the value 12:20:45 and the result is shown at M10~M12.
When X0 goes from ON→OFF, the instruction stops executing, but the ON/OFF state of
M10~M12 is unchanged..
X0
TCMP K12 K20 K45 D20 M10

M10
ON when 12:20:45 > D20 Hour
D21 Minute
D22 Second
M11
ON when 12:20:45 = D20 Hour
D21 Minute
D22 Second
M12
ON when 12:20:45 < D20 Hour
D21 Minute
D22 Second

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-619
3. Instruction Set

API Mnemonic Operands Function

161 TZCP P S1, S2, S, D Calendar Zone Compare
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F TZCP, TZCPP: 9 steps
S1 * * *
S2 * * *
S * * *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Lower limit time data S2: Upper limit time data S: Current time of the RTC
D: Comparison result (occupies 3 continuous addresses)
Operands S1, S2, S occupy 3 continuous addresses S1 should be less than S2

Description:
1158. S is compared to the time of S1~ S2 and the comparison result is stored in D.
1159. S1, S1 +1, S1 +2: represents “Hour”, “Minute”, “Second” of the lower limit time data.
1160. S2, S2 +1, S2 +2: represents “Hour”, “Minute”, “Second” of the Upper limit time data。
1161. S, S +1, S +2: represents “Hour”, “Minute”, “Second” of the current time of calendar.
1162. The current time of the calendar specified by S is read by using the TRD instruction
previously in the program and then compared by using TZCP instruction. If the content of S, S1,
S2 exceeds the range, it will result in “operation error”. At this time, the instruction will not be
executed and M1067=ON, M1068=ON, and error code 0E1A (HEX) will be written to D1067.
1163. If S < S1 and S < S2, D is ON. If S > S1 and S > S2, D+2 is ON. Except for these two
situations, D +1 is ON. (Lower limit S1 should be less than upper limit S2.)

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3. Instruction Set

Program Example:
When X0= ON, the instruction is executed and one of M10~M12 = ON. When X0=OFF, the
instruction is not executed but the state of M10~M12 remain unchanged.

X0
TZCP D0 D20 D10 M10
M10
ON when D0 Hour D10 Hour
D1 Minute D11 Minute
D2 Second D12 Second
M11
ON when D0 Hour D10 Hour D20 Hour
D1 Minute D11 Minute D21 Minute
D2 Second D12 Second D22 Second
M12
ON when D10 Hour D20 Hour
D11 Minute D21 Minute
D12 Second D22 Second

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3. Instruction Set

API Mnemonic Operands Function

162 TADD P S 1 , S2 , D Calendar Data Addition
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F TADD, TADDP: 7 steps
S1 * * *
S2 * * *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Time augend S2: Time addend D: Addition result
Operand S1, S2, D occupies 3 continuous addresses

Description:
1164. S1  S2  D. The time data in the registers specified by S1 is added to the time data in the
registers specified by S2 and the result is stored in the registers specified by D.
1165. If the time data in S1, S2 exceeds the allowable range, it will result in “operation error”. At
this time, the instruction will not be executed and M1067=ON, M1068=ON, and error code
0E1A (HEX) will be written to D1067.
1166. If the addition result is a value greater than 24 hours, the Carry flag M1022=ON. The
value of the result shown in D is the time remaining above 24 hours.
1167. If the addition result is equal to 0 (zero, 0 hour, 0 minute, 0 second), the Zero flag
M1020= ON.

Program Example:
When X0= ON, the instruction is executed. Add the time data specified by D0~D2 and D10~D12 and
store the result in the register specified by D20~D22.

D0 08(Hour) D10 06(Hour) D20 14(Hour)

X0
TADD D0 D10 D20 D1 10(Min) D11 40(Min) D21 50(Min)
D2 20(Sec) D12 06(Sec) D22 26(Sec)

08:10:20 06:40:06 14:50:26

If the addition result is in a value greater than 24 hours, the Carry flag M1022=ON.

D0 18(Hour) D10 11(Hour) D20 06(Hour)

X0
TADD D0 D10 D20 D1 40(Min) D11 30(Min) D21 10(Min)
D2 30(Sec) D12 08(Sec) D22 38(Sec)

18:40:30 11:30:08 06:10:38

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3. Instruction Set

API Mnemonic Operands Function

163 TSUB P S 1 , S2 , D Calendar Data Subtraction
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F TSUB, TSUBP: 7 steps
S1 * * *
S2 * * *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Time Minuend S2: Time Subtrahend D: Subtraction result
Operand S1, S2, D occupies 3 continuous addresses.

Description:
1168. S1  S2  D. The time data in the registers specified by S2 is subtracted from the time data
in the registers specified by S1 and the result is stored in the registers specified by D.
1169. If the time data in S1, S2 exceeds the allowable range, it will result in “operation error”. At
this time, the instruction won’t be executed and M1067=ON, M1068=ON, and error code 0E1A
(HEX) will be written to D1067.
1170. If the subtraction result is a negative value, the Zero flag M1020= ON. The value of the
result shown in D is the time remaining.
1171. If the subtraction result is equal to 0 (zero, 0 hour, 0 minute, 0 second), the Zero flag
M1020= ON.
1172. Besides using the TRD instruction, the MOV instruction can also be used to move the
special registers D1315 (Hour), D1314 (Minute), D1313 (Second) to the three registers
specified to read the current time of the clock/calendar.

Program Example:
When X0= ON, the instruction is executed. The time data specified by D10~D12 is subtracted from
the time data specified by D0~D2 and the result is stored in the register specified by D20~D22.

D0 20(Hour) D10 14(Hour) D20 05(Hour)

X0
TSUB D0 D10 D20 D1 20(Min) D11 30(Min) D21 49(Min)
D2 05(Sec) D12 08(Sec) D22 57(Sec)

20:20:05 14:30:08 05:49:57

If the subtraction result is a negative value (less than 0), the borrow flag M1021= ON.

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3. Instruction Set

D0 05(Hour) D10 19(Hour) D20 10(Hour)

X0
TSUB D0 D10 D20 D1 20(Min) D11 11(Min) D21 09(Min)
D2 30(Sec) D12 15(Sec) D22 15(Sec)

05:20:30 19:11:15 10:09:15

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3. Instruction Set

API Mnemonic Operands Function

166 TRD P D Calendar Data Read
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F TRD, TRDP: 3 steps
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: The starting address of the current RTC(clock/calendar) data (occupies 7 continuous words)

Description:
1173. The RTC,provides the data about the year, week, month, date, hours, minutes and
seconds, total 7 data words stored in D1319~D1313. The TRD instruction reads the current
clock/calendar information and stores the values in the 7 data registers specified by D.
1174. D1319 is read as a two digit number for the year, but can be changed to a four digit
number per the notes below.
1175. The Real Time Clock in the ELC2-PB, ELCM-PH/PA version 1.0 maintains normal
operation only while powered. The RTC data registers D1319~D1313 are latched. When
power is re-applied, the RTC will resume from where it left off. Therefore, it is recommended
that each time the controller is powered that the current RTC information be moved into
D1313-D1319 using the TWR (API 167) instruction. For the ELC-PV/PA, ELC2-PA/PH/PE/PV,
ELCM-PH/PA version 2.0 (and above), the RTC information in D1313-D1319 will continue
when power is turned off to the controller. If the RTC information in D1313-D1319 was correct
when the controller was powered down, when power is re-applied to the unit the RTC
information will be correct.
1176. Flags: M1016, M1017, M1076, please see the Notes below.

Program Example:
When X0=ON, read the current time of calendar to the specified register D0~D6.
The content of D1318: 1 is Monday, 2 is Tuesday, 7 is Sunday.
X0
TRD D0

Special D General D
Meaning Content Meaning
device device

D1319 Year (A.D.) 00~99  D0 Year (A.D.)

D1318 Day (Mon.~Sun.) 1~7  D1 Day (Mon.~Sun.)

D1317 Month 1~12  D2 Month

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-625
3. Instruction Set

Special D General D
Meaning Content Meaning
device device

D1316 Date 1~31  D3 Date

D1315 Hour 0~23  D4 Hour

D1314 Minute 0~59  D5 Minute

D1313 Second 0~59  D6 Second

Notes:

The best method for setting the RTC is to use the TWR (API 167) instruction.
1. To display a four digit number for the year:

By default, ELC controllers display a 2 digit number for the year (for example: displays 03 for
year 2003). If you want to display a 4 digit number for the year, set special M bit M1016 at
power up, per the following:
M1002
SET M1016 Display 4 digit number for year

2. The RTC will display 4 digits in place of the original 2 digit number.

When using the 4-digit format for the year and a new value needs to be written to D1319,
writing a 2-digit value using the TWR instruction will result in a 4-digit value for the year if
M1016 is set. Writing a 4-digit value to D1319 when M1016 is set is not necessary. For
example, 00=year 2000, 50=year 2050 and 99=year 2099.
3. Error Flag of the calendar:
Device Name Function
M1016 year format Displays the 2 right-most digits for the year in D1319
for the when M1016 is OFF.
calendar Displays the 4-digit value for the year when M1016 is
ON.
M1017 ±30 seconds A false-to-true transition of this bit will result in the clock
correction changing the following: if it is 0-29 seconds, it will reset
to 0. If it is 30-59 seconds, add 1 to minutes and reset
seconds to 0.
M1076 calendar ON when RTC settings are out of range or the battery is
fault no longer working.

Device Name Range

D1313 Second 0-59

M-N
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26 F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m
3. Instruction Set

Device Name Range

D1314 Minute 0-59
D1315 Hour 0-23
D1316 Day 1-31
D1317 Month 1-12
D1318 Week 1-7
D1319 Year 0-99 (two right-most digit number of year)

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-627
3. Instruction Set

API Mnemonic Operands Function

167 TWR P D Calendar Data Write In
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F TWR, TWRP: 5 steps
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Starting address for new RTC data (occupies 7 continuous words)

Description:
1177. This instruction writes the values in D into the RTC registers.
1178. If any of the RTC data in D is out of the allowable range, it will result in an “operation
error”. The instruction will not execute and M1067=ON, M1068=ON, and error code 0E1A
(HEX) will be in D1067.
1179. To make adjustments to the RTC, use this instruction to write correct data into the RTC
registers (D1313-D1319).
1180. Flags: M1016, M1017, M1076. Refer to the TRD instruction for information on these
flags.

Program Example 1:
When X0= ON, write the new time/date into the RTC.
X0
TWRP D20

General D Special D
Meaning Content Meaning
device device

D20 Year (A.D.) 00~99  D1319 Year (A.D.)

D21 Day (Mon.~Sun.) 1~7  D1318 Day (Mon.~Sun.)

D22 Month 1~12  D1317 Month

D23 Date 1~31  D1316 Date

New setting time

Calendar Clock

D24 Hour 0~23  D1315 Hour

D25 Minute 0~59  D1314 Minute

D26 Second 0~59  D1313 Second

Program Example 2:
Adjust the clock/calendar information to 2004/12/15, Tuesday, 15:27:30.
The contents of D0~D6 is the RTC data.
When X0= ON, move the new RTC data to D0-D6 and execute the TWR instruction to write the new

M-N
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28 F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m
3. Instruction Set

RTC data to D1313-D1319.

When X1=ON, the calendar clock will perform the ±30 seconds correction. “Correction” means that if
the seconds of the clock is 1~29 seconds, the seconds value will be automatically set to “0” (zero)
seconds and the minutes will not change. If the seconds of the clock are between 30~59 seconds,
the seconds value will be automatically set to “0” (zero) seconds but the minutes will increase by 1
minute.
X0
MOV K04 D0 Year (2004)

MOV K3 D1 Day (Wednesday)

MOV K12 D2 Month(December)

MOV K26 D3 Date

MOV K15 D4 Hour

MOV K27 D5 Minute

MOV K30 D6 Second

TWR D0 Write the setting time in the perpetual calender

X1
M1017 30 seconds correction

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-629
3. Instruction Set

API Mnemonic Operands Function

168 D MVM P S1, S2, D Masked Move

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F MVM, MVMP: 7 steps
S1 * * * * * * * * * DMVM, DMVMP: 13
S2 * * * * * * * * * * *
D * * * * * * * * * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Source address 1 S2: Bits to be masked (OFF) D: Source device 2 / Operation results
[D = (S1 & S2) | (D & ~S2)]

Description:
1181. This instruction performs a move with mask operation. This means that data is moved bit
by bit from S1 through the mask S2 to D. Bit data will be moved from S1 to D only where there is
a logical 1 in that position in the mask.
1182. Where there is a logical 1 in the mask, data is passed. Where there is a logical 0 in the
mask, the data is blocked, i.e. the destination bit is unaffected.
1183. MVM is the new instruction for ELC-PV V1.6.

Program Example:
When X0 = ON, the MVM instruction moves the data from D0 to D4 bit by bit, only allowing bit data
to be passed where there is a logical 1 in the mask. The bit positions where there is a logical 0 in the
mask leaves the destination bit position unaffected. The value in D4 prior to executing the MVM
instruction is: 1000110001101010.
X0
MVM D0 HFF00 D4

b15 b0
D0 0 1 1 0 1 0 0 0 1 1 0 1 0 1 1

Mask 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0

D4 0 1 1 0 1 0 0 0 1 1 1 0 1 0

Note: The low 8 bits of D4 are unchanged. The high 8 bits of D0 are moved to the high 8 bits of D4.

API Mnemonic Operands Function

169 D HOUR S, D1, D2 Hour Meter

M
3 -N
6035
0003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m
3. Instruction Set

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F HOUR: 7 steps
S * * * * * * * * * * *
D1 * DHOUR: 13 steps
D2 * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Hours set-point value D1: Current time (occupies 2 continuous addresses) D2: Output
address

Description:
1184. D2 turns ON when the current accumulated time equals S (in hours), and the range is
K1~K32,767. D1 range is K0~K32,767. D1+1 is the current time in seconds. Its range is
K0~K3,599.
1185. This instruction is used to measure the number of hours a process is running. This can be
used for example, to measure the time a machine is running to plan for scheduled
maintenance.
1186. After the output D2 is ON, the timer will keep on timing.
1187. When the 16-bit timer counts to its max. value (32,767 hours and 3,599 seconds), it will
stop. When the 32-bit timer counts to its max. value (2,147,483,647 hours and 3,599 seconds),
it will stop.
1188. This Instruction can be used four times in the program.

Program Example:
For 16-bit instruction: When X0=ON, Y20 = ON, timing starts. When the time reaches 100 hours, Y0
= ON and D0 will record the current time (units are hours for D0 and, D1 will contain the number of
seconds that have elapsed (range is 0~3599 seconds).
X0
Y20
Y20
HOUR K100 D0 Y0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-631
3. Instruction Set

API Mnemonic Operands Function

170 D GRY P S, D BIN  GRAY CODE
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F GRY, GRYP: 5 steps
S * * * * * * * * * * *
D * * * * * * * * DGRY, DGRYP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source value D: Destination address to store the Gray code result

Description:
1189. The BIN value, S is converted to the equivalent GRAY CODE value and the result is
stored in the device specified by D.
1190. The range of S that can be converted to GRAY CODE is shown as follows:
16-bit instruction: 0~32,767
32-bit instruction: 0~2,147,483,647
1191. If the BIN value is outside the range shown above, it is an “Operation Error”. The
instruction will not be executed, M1067=ON, M1068=ON, and the error code 0E1A (HEX) in
D1067.

Program Example:
When X0=ON, constant K6513 is converted to GRAY CODE and stored in the K4Y20.
X0
GRY K6513 K4Y20

b15 b0
K6513=H1971 0 0 0 1 1 0 0 1 0 1 1 1 0 0 0 1

Y37 Y20
GRAY 6513 0 0 0 1 0 1 0 1 1 1 0 0 1 0 0 1
K4Y20

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3. Instruction Set

API Mnemonic Operands Function

171 D GBIN P S, D GRAY CODE  BIN
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F GBIN, GBINP: 5 steps
S * * * * * * * * * * *
D * * * * * * * * DGBIN, DGBINP: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source GRAY CODE D: Destination address for the converted BIN result

Description:
1192. The GRAY CODE value in S is converted to an equivalent BIN value and the result is
stored in the device specified by D.
1193. This instruction can be used to read the value from an absolute position type encoder (a
gray code encoder) which is connected to the ELC inputs. Convert the value to a BIN value
and store it in the specified register.
1194. If the source is inputs X20~X37, it can speed up the input response time by using the
REFF instruction or D1020 (adjust input response time).
1195. The range of S that can be converted to the GRAY CODE is as follows:

16-bit instruction: 0~32,767

32-bit instruction: 0~2,147,483,647

1196. If the GRAY CODE value is outside the range shown above, it is an “Operation Error”.

Program Example:
When X0=ON, the GRAY CODE value in the absolute position type encoder connected to X20~X37
inputs is converted to BIN value and stored in D10.
X0
GBIN K4X20 D10

X37 K4X20 X20

GRAY6513 0 0 0 1 0 1 0 1 1 1 0 0 1 0 0 1

b15 b0
H1971=K6513 0 0 0 1 1 0 0 1 0 1 1 1 0 0 0 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-633
3. Instruction Set

API Mnemonic Operands Function

172 D ADDR P S 1 , S2 , D Floating Point Number Addition
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DADDR, DADDRP: 13
S1 *
steps
S2 *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Floating point number summand S2: Floating point number addend D: Sum

Description:
1. S1 and S2 are Floating point numbers
2. ELCB-PB model does not support index register E and F modification.
3. The DADDR operands, S1 and S2 can each be 2 D-register addresses or actual floating point
values (e.g. F1.2).
4. When S1 and S2 use D registers, the function will be the same as API 120 EADD.
5. If the absolute value of the operation result > the maximum floating point number, the carry flag
M1022=On.
6. If the absolute value of operation result < the minimum floating point number, the borrow flag
M1021=On.
7. If the operation result equals 0, the zero flag M1020=On.

Program Example 1:

When X0 = ON, add floating point number F1.200E+0 (enter F1.2, scientific notation F1.200E+0 will be
displayed in the instruction.) to F2.200E+0 and store the result F3.400E+0 in register D10 and D11.

X0
DADDR F1.200E+0 F2.200E+0 D10

Program example 2:
When X0=On, store the result of (D1, D0)＋(D3, D2) into (D11, D10).
X0
DADDR D0 D2 D10

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3. Instruction Set

API Mnemonic Operands Function

173 D SUBR P S 1 , S2 , D Floating Point Number Subtraction
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DSUBR, DSUBRP: 13
S1 *
steps
S2 *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Floating point number minuend S2: Floating point number subtrahend D: Result

Description:
1. S1 and S2 are Floating point numbers
2. ELCB-PB model does not support index register E and F modification.
3. The DSUBR operands, S1 and S2 can each be 2 consecutive D-register addresses or actual
floating point values (e.g. F1.2).
4. When S1 and S2 use D registers, the function will be the same as API 120 ESUB.
5. If the absolute value of the operation result > the maximum floating point numbers, the carry flag
M1022=On.
6. If the absolute value of operation result < the minimum floating point numbers, the borrow flag
M1021=On.
7. If the operation result equals 0, the zero flag M1020=On.

Program example 1:

When X0 = ON, subtract floating point value F1.200E+0 (enter F1.2, scientific notation F1.200E+0 will be
displayed in the instruction.) with F2.200E+0 and store the result F-1.000E+0 in register D10 and D11.

X0
DSUBR F1.200E+0 F2.200E+0 D10

Program example 2:
When X0=On, store the result of floating point number value (D1, D0) － (D3, D2) into (D11, D10).
X0
DSUBR D0 D2 D10

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-635
3. Instruction Set

API Mnemonic Operands Function

174 D MULR P S 1 , S2 , D Floating Point Number Multiplication
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DMULR, DMULRP: 13
S1 *
S2 * steps
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Floating point number multiplicand S2: Floating point number multiplicator D: Product

Description:
1. S1 and S2 are Floating point numbers
2. ELCB-PB model does not support index register E and F modification.
3. The DMULR operands, S1 and S2 can each be 2 consecutive D-register addresses or actual
floating point values (e.g. F1.2).
4. When S1 and S2 use D registers, the function will be the same as API 122 EMUL.
5. If the absolute value of the operation result > the maximum floating point numbers, the carry flag
M1022=On.
6. If the absolute value of operation result < the minimum floating point numbers, the borrow flag
M1021=On.
7. If the operation result equals 0, the zero flag M1020=On.

Program Example 1:

When X0= ON, multiply floating point number F1.200E+0 (enter F1.2, scientific notation F1.200E+0 will be
displayed in the instruction.) by F2.200E+0 and store the result F2.640E+0 in register D10 and D11.

X0
DMULR F1.200E+0 F2.200E+0 D10

Program example 2:
When X1=On, store the result of floating point number value (D1, D0) × (D11, D10) into (D21, D20).
X1
DMULR D0 D10 D20

API Mnemonic Operands Function

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3. Instruction Set

175 D DIVR P S 1 , S2 , D Floating Point Number Division

Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DDIVR, DDIVRP: 13
S1 *
S2 * steps
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Floating point number dividend S2: Floating point number divisor D: Quotient

Description:
1. S1 and S2 are Floating point numbers
2. ELCB-PB model does not support index register E and F modification.
3. The DDIVR operands, S1 and S2 can each be 2 consecutive D-register addresses or actual
floating point values (e.g. F1.2).
4. When S1 and S2 use D registers, the function will be the same as API 123 EDIV.
5. If S2 = 0, this is a bad operation”, DDIVR will not execute, M1067, M1068=On, and D1067
records the error code H’0E19.
6. If the absolute value of the operation result > the maximum floating point numbers, the carry flag
M1022=On.
7. If the absolute value of operation result < the minimum floating point numbers, the borrow flag
M1021=On.
8. If the operation result equals 0, the zero flag M1020=On.

Program example 1:

When X0 = ON, divide floating point number F1.200E+0 (enter F1.2, scientific notation F1.200E+0
will be displayed in the instruction) by F2.200E+0 and store the result F0.545E+0 in D10 and D11.

X0
DDIVR F1.200E+0 F2.200E+0 D10

Program example 2:
When X1=On, divide the floating point number value (D1, D0) by (D11, D10) and store the quotient
into registers assigned by (D21, D20).
X1
DDIVR D0 D10 D20

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-637
3. Instruction Set

API Mnemonic Operands Function

176 MMOV P S, D 16-bit→32-bit Conversion
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MMOV, MMOVP: 5 steps
S * * * * * * * * *
D * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S: Source address (16-bit) D: Destination address (32-bit)

Description:
MMOV instruction sends the data in the 16-bit source S to the 32-bit destination D. The sign bit
(MSB) of the source will be copied to the high word of D and the high bit of the low word of D.

Program example:

When X23 = 0N, 16-bit data in D4 will be moved to D6 and D7.

X23
MMOV D4 D6

b15 b0
0 " ＋" 1 0 0 1 1 0 0 1 0 1 1 1 0 0 0 1 D4
1 "－"

1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 1 1 0 0 1 0 1 1 1 0 0 0 1 D7, D6
b31 b16 b15 b0

In the example above, b15 in D4 will be sent to b15~b31 of D7/D6.

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3. Instruction Set

API Mnemonic Operands Function

177 GPS S, D GPS Data Receiving
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F GPS: 5 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Sentence identifier for GPS data received D: Destination address for feedback data

Description:
1. ELC2-PE doesn’t support API177 GPS instruction.
2. The GPS instruction receives GPS data from COM1 (RS-232) only, with communication
settings: 9600,8,N,1 protocol: NMEA-0183, and communication frequency: 1Hz.
3. Operand S is the sentence identifier for receiving GPS data. K0: $GPGGA, K1: $GPRMC.
4. Operand D stores the received data. Up to 17 consecutive words will be used. Please refer to
the table below for a description of each D value.

When S is set to K0, the sentence identifier $GPGGA is specified. The D values are:
No. Content Range Format Note

D+0 Hour 0 ~ 23 Word

D+1 Minute 0 ~ 59 Word

D+2 Second 0 ~ 59 Word

D + 3~4 Latitude 0 ~ 90 Float Unit: dd.mmmmmm

D+5 North / South 0 or 1 Word 0(+)North, 1(-)South

D + 6~7 Longitude 0 ~ 180 Float Unit: ddd.mmmmmm

D+8 East / West 0 or 1 Word 0(+)East, 1(-)West

D+9 GPS data valid / invalid 0, 1, 2 Word 0 = invalid

D + 10~11 Altitude 0 ~9999.9 Float Unit: meter

D + 12~13 Latitude -90 ~ 90 Float Unit: dd.ddddd

D + 14~15 Longitude -180 ~ 180 Float Unit: ddd.ddddd

 When S is set to K1, the sentence identifier $GPRMC is specified. The D values are:
No. Content Range Format Note

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-639
3. Instruction Set

No. Content Range Format Note

D+0 Hour 0 ~ 23 Word

D+1 Minute 0 ~ 59 Word

D+2 Second 0 ~ 59 Word

D + 3~4 Latitude 0 ~ 90 Float Unit: dd.mmmmmm

D+5 North / South 0 or 1 Word 0(+)North, 1(-)South

D + 6~7 Longitude 0 ~ 180 Float Unit: ddd.mmmmmm

D+8 East / West 0 or 1 Word 0(+)East, 1(-)West

D+9 GPS data valid / invalid 0, 1, 2 Word 0 = invalid

D + 10 Day 1 ~ 31 Word

D + 11 Month 1 ~ 12 Word

D + 12 Year 2000 ~ Word

D + 13~14 Latitude -90 ~ 90 Float Unit: dd.ddddd

D + 15~16 Longitude -180 ~ 180 Float Unit: ddd.ddddd

5. When applying the GPS instruction, COM1 has to be in Master mode, i.e. M1312 must be
enabled to send the request. In addition, M1314 = ON indicates receiving completed. M1315 =
ON indicates an error. (D1250 = K1, receive time-out; D1250 = K2, checksum error)
6. Associated M flags and special D registers:
No. Function
M1312 COM1 (RS-232) sending request
M1313 COM1 (RS-232) ready for data receiving
M1314 COM1 (RS-232) data receiving completed
M1315 COM1 (RS-232) data receiving error
M1138 Retaining communication setting of COM1
D1036 COM1 (RS-232) Communication protocol
D1249 COM1 (RS-232) data receiving time-out setting. (Suggested value: >1s)
D1250 COM1 (RS-232) communication error code
7. Before using the GPS data, check the value in D+9. If D+9 = 0, the GPS data is invalid.
8. If an error occurs, the previous data in D registers will not be cleared, i.e. the previous received
data remains.

Program example: Sentence identifier: $GPGGA

1. Set COM1communication protocol first

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3. Instruction Set

M1002
Set communication protocol
MOV H81 D1036
as 9600,8,N,1

SET M1138 Retain communication setting

MOV K2000 D1249 Set receiving time-out as 2s

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-641
3. Instruction Set

2. Then enable M0 to execute the GPS instruction with sentence identifier $GPGGA
M0
SET M1312
M0
GPS K0 D0
M1314
Y0
M1315
Y1
b)
3. When the instruction finishes execution, M1314 = ON. If it fails, M1315 = ON. The data will be
stored in addresses beginning with D0.
No. Content No. Content

D0 Hour D8 East / West

D1 Minute D9 GPS data valid / invalid

D2 Second D10~D11 Altitude

D3~D4 Latitude D12~D13 Latitude. Unit: dd.ddddd

D5 North / South D14~D15 Longitude. Unit: ddd.ddddd

D6~D7 Longitude

4. Pin number description on the GPS module (LS20022)

Pin No. of GPS 1 2 3 4 5
Definition VCC(+5V) Rx Tx GND GND

5. Pin
2 number
1 description on ELC COM1:
5 4 3
8
Pin No. of COM1 1 2 3 4 5 6 7 8
6
7 Definition VCC(+5V) -- Rx Tx -- -- GND

M-N
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42 F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m
3. Instruction Set

API Mnemonic Operands Function

178 D SPA S, D Solar Positioning Algorithm
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DSPA: 9 steps
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Starting address for input parameters D: Starting address for output parameters

Description:
1. ELC2-PE doesn’t support API178 SPA instruction.
2. Operand S occupies 208 consecutive word registers. The function of each word is shown
below:
No. Content Range Format Note

S+0 Year 2000 ~ Word

S+1 Month 1 ~ 12 Word

S+2 Day 1 ~ 31 Word

S+3 Hour 0 ~ 23 Word

S+4 Minute 0 ~ 59 Word

S+5 Second 0 ~ 59 Word

S + 6~7 Time difference (∆t) (sec) ± 8000 Float

S + 8~9 Local time zone ± 12 Float West=negative

S + 10~11 Longitude ± 180 Float West=negative

S + 12~13 Latitude ± 90 Float South=negative

S + 14~15 Elevation 0~ Float Unit: meter

6500000

S + 16~17 Pressure 0 ~ 5000 Float Unit: millibar

S + 18~19 Mean annual temperature (MAT) -273~6000 Float Unit: °C

S + 20~21 Slope ± 360 Float

S + 22~23 Azimuth ± 360 Float

S + 24~25 Refraction of sunrise/sunset ±5 Float

S +26~207 Reserved for system operation

3. Operand D occupies 8 consecutive word registers. The function of each word is shown below:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-643
3. Instruction Set

No. Content Range Format Note

D + 0~1 Zenith 0 ~ 90 Float Horizontal=0

D + 2~3 Azimuth 0 ~ 360 Float North point=0

D + 4~5 Incidence 0 ~ 90 Float

D+6 Converted DA value of Zenith 0 ~ 2000 Word 1LSB = 0.045

degree

D+7 Converted DA value of Azimuth 0 ~ 2000 Word 1LSB = 0.18

degree

The execution time of the SPA instruction is up to 50ms.

Program example:

Input parameters starting from D4000: 2009/3/23/(y/m/d),10:10:30, ∆t = 0, Local time zone =

+8, Longitude/Latitude = +119.192345 East, +24.593456 North, Elevation = 132.2M, Pressure =
820m, MAT = 15.0℃, Slope = 0 degree, Azimuth = -10 degree.

M0 M1013
DSPA D4000 D5000

Output results:

D5000: Zenith = F37.2394 degree

D5002: Azimuth = F124.7042 degree

M-N
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3. Instruction Set

API Mnemonic Operands Function

179 D WSUM P S, D, n Sum of Multiple Devices

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F WSUM, WSUMP: 7 steps
S * * * DWSUM, DWSUMP: 13
n * * *
D * * * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source address n: Data length to be summed D: Address for storing the result

Description:
9. In ELC-PV, the WSUM is a new instruction in ELC-PV V1.4.
10. The WSUM instruction adds n values starting from S and stores the result in D.
11. Valid range for n: 1~64. If the n value is out of the available range (1~64), ELC will use the
upper (64) or lower (1) bound.

Program example:
When X10 = ON, 3 consecutive addresses (n = 3) starting from D0 will be added and the result will
be stored in D10
X10
WSUM D0 K3 D10

(D0+D1+D2) D10

D0 K100

D1 K113 Result: D10 K338

D2 K125

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-645
3. Instruction Set

API Mnemonic Operands Function

180 MAND P S1, S2, D, n Matrix AND
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MAND, MANDP: 9 steps
S1 * * * * * * *
S2 * * * * * * *
D * * * * * *
n *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: matrix source address 1 S2: matrix source address 2 D: Area where calculated result is
stored n: matrix length (n=K1~K256)

Description:
12. Execute the matrix AND operation to the matrix source addresses 1 and 2, with a length of n
and save the result in D.
13. If S1, and S2 designate KnX, KnY, KnM and KnS; D designates KnY, KnM and KnS. ELC-PA,
ELCM-PH/PA, ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV can designate
n=1- 4.

Program Example:

When X0=ON, execute the MAND instruction and the AND operation to 3 rows (D0-D2) of 16-bit
registers and 3 rows (D10-D12) of 16-bit registers. Then save the result in 3 rows (D20-D22) of
16-bit registers.
X0
MAND D0 D10 D20 K3

b15 b0
D0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1
D1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1
D2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1

Before MAND
Execution D10 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
D11 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0
D12 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0

After D20 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0
Execution D21 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0
D22 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0

M-N
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3. Instruction Set

API Mnemonic Operands Function

181 MOR P S1, S2, D, n Matrix OR
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MOR, MORP: 9 steps
S1 * * * * * * *
S2 * * * * * * *
D * * * * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: matrix source address 1 S2: matrix source address 2. D: Area where calculated result is
stored n: matrix length (n=K1~K256)

Description:

1 Execute the OR operation to the matrix source addresses 1 and 2, with a length of n and save
the result in D.

2. If S1, and S2 designate KnX, KnY, KnM and KnS; D designates KnY, KnM and KnS. ELC-PA,
ELCM-PH/PA, ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV can designate
n=1- 4.

Program Example:
When X0=ON, execute the MOR instruction and the OR operation to 3 rows (D0-D2) of 16-bit
register and 3 rows (D10-D12) of 16-bit register. Then save the result in 3 rows (D20-D22) of 16-bit
register.
X0
MOR D0 D10 D20 K3

b15 b0
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

Before MOR
Execution
D10 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1
D11 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1
D12 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1

After
Execution D20 0 1 0 1 1 1 1 1 1 1 1 1 0 1 0 1
D21 0 1 0 1 1 1 1 1 1 1 1 1 0 1 0 1
D22 0 1 0 1 1 1 1 1 1 1 1 1 0 1 0 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-647
3. Instruction Set

API Mnemonic Operands Function

182 MXOR P S1, S2, D, n Matrix XOR
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MXOR, MXORP: 9 steps
S1 * * * * * * *
S2 * * * * * * *
D * * * * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: matrix source address 1 S2: matrix source address 2 D: Area where calculated result is
stored n: matrix length (n=K1~K256)

Description:

1. Execute the XOR operation to the matrix source addresses 1 and 2, with a length of n and
save the result in D.

2. If S1, and S2 designate KnX, KnY, KnM and KnS; D designates KnY, KnM and KnS. ELC-PA,
ELCM-PH/PA, ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV can designate
n=1- 4.

Program Example:
When X0=ON, execute the MXOR instruction and the XOR operation to 3 rows (D0-D2) of 16-bit
register and 3 rows (D10-D12) of 16-bit register. Then save the result in 3 rows (D20-D22) of 16-bit
register.
X0
MXOR D0 D10 D20 K3

b15 b0
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

Before MXOR
Execution
D10 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1
D11 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1
D12 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1

After D20 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0
Execution
D21 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0
D22 0 1 0 1 1 0 1 0 1 1 1 1 0 0 0 0

M-N
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3. Instruction Set

API Mnemonic Operands Function

183 MXNR P S1, S2, D, n Matrix XNR
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MXNR, MXNRP: 9 steps
S1 * * * * * * *
S2 * * * * * * *
D * * * * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: matrix source address 1 S2: matrix source address 2 D: Area where calculated result is
stored n: matrix length (K1~K256)

Description:

1. Execute the matrix XNR operation to the matrix source addresses 1 and 2, with a length of n
and save the result in D.

2. The matrix XNR operation is: the result bit is 1 when 2 bits are the same otherwise it is 0.

3. If S1, and S2 designate KnX, KnY, KnM and KnS; D designates KnY, KnM and KnS. ELC-PA,
ELCM-PH/PA, ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV can designate
n=1- 4.

Program Example:
When X0=ON, Execute the matrix XNR operation to the matrix source addresses 1 and 2, with a
length of n and save the result in D.
XNR operation to 3 rows (D0-D2) of 16-bit register and 3 rows (D10-D12) of 16-bit register. Then
save the result in 3 rows (D20-D22) of 16-bit register.

X0
MXNR D0 D10 D20 K3

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-649
3. Instruction Set

b15 b0
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Before
MXNR
Execution
D10 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1
D11 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1
D12 0 0 0 0 1 1 1 1 1 0 1 0 0 1 0 1

After D20 1 0 1 0 0 1 0 1 0 0 0 0 1 1 1 1
Execution
D21 1 0 1 0 0 1 0 1 0 0 0 0 1 1 1 1
D22 1 0 1 0 0 1 0 1 0 0 0 0 1 1 1 1

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3. Instruction Set

API Mnemonic Operands Function

184 MINV P S, D, n Matrix Inverse
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MINV, MINVP: 7 steps
S * * * * * * *
D * * * * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Matrix source address D: result n : matrix length (K1~K256)

Description:
14. Do matrix inverse operation to the matrix source with a length of n and save the result in D.
15. If S designate KnX, KnY, KnM and KnS; D designates KnY, KnM and KnS. ELC-PA,
ELCM-PH/PA, ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV n=1- 4.
16. The inverse operation simply changes logical 1s to 0s and 0s to 1s.

Program Example:
When X0=ON, execute the MINV operation to 3 rows (D0-D2) of 16-bit registers by 3 rows
(D10-D12) of 16-bit registers. Then save the result in 3 rows (D20-D22) of 16-bit registers.
X0
MINV D0 D20 K3

b15 b0
Before D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Execution D1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

MINV

D20 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
After
Execution D21 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
D22 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-651
3. Instruction Set

API Mnemonic Operands Function

185 MCMP P S1, S2, n, D Matrix Compare
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MCMP, MCMPP: 9 steps
S1 * * * * * * *
S2 * * * * * * *
n * * *
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: matrix source address 1 S2: matrix source address 2 n: matrix length (K1~K256)
D: Address containing the pointer to the target address

Description:
17. For each comparison, it will compare each bit of S1 with each bit of S2, one at a time and
provide the pointer number for the bit position when two bits are equal in D. To find the
address of the next equal comparison and save the address in D, a false-to-true transition of
the instruction is needed.
18. Flag M1088. If M1088=1 an equal comparison was found and the pointer value is in D. Once a
comparison is found, it will stop comparing immediately and set bit M1091=1. When the
comparison reaches the last bit in the matrix, the matrix search end flag M1089 = ON and the
comparison pointer value is saved in D. For next scan period, it will start comparing from the
first bit and set the matrix search start flag M1090=1. If the D value exceeds its range, the
pointer error flag M1092 =1.
19. The matrix pointer should be a 16-bit D-register.
20. If S1, and S2 designate KnX, KnY, KnM and KnS; D designates KnY, KnM and KnS. ELC-PA,
ELCM-PH/PA, ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV can designate
n=1- 4.
21. Flag: M1088-M1092

Program Example:
When X0 transitions from OFF→ON, the matrix search start flag M1090=0 and it will start comparing
to find the first occurrence of two equal bits As long as M1088=0, there is no match.
When the present value of the pointer D20=2, and the instruction is executed 4 times, the following
pointer values will be found. Each execution requires a false-to-true transition of the MCMPP
instruction.
22. D20=5, matrix bit search flag M1091=1, matrix search end flag M1089=0.
23. D20=45, matrix bit search flag M1091=1, matrix search end flag M1089=0.

M-N
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3. Instruction Set

24. D20=47, matrix bit search flag M1091=0, matrix search end flag M1089=1.
25. D20=1, matrix bit search flag M1091=1, matrix search end flag M1089=0.
X0
MCMPP D0 D10 K3 D20

2
b0 D20
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1 Pointer
D1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
b47
MCMP
b0
D10 0 1 0 1 0 1 0 1 0 1 1 1 0 1 0 1
D11 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D12 0 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1
b47

Description of the flags:

M1088: Matrix comparison flag, if M1088=1, the result of the comparison is equal,
otherwise M1088=0.
M1089: Matrix search end flag, when the last bit in the matrix is encountered,
M1089=1.
M1090: Matrix search start flag, start comparing from the first bit, M1090=1.
M1091: Matrix bit search flag, it will stop comparing once an equal comparison is found
and M1091=1.
M1092: Matrix pointer error flag, pointer exceeds its range, M1092=1.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-653
3. Instruction Set

API Mnemonic Operands Function

186 MBRD P S, n, D Matrix Bit Read
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MBRD, MBRDP: 7 steps
S * * * * * * *
n * * *
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: matrix source address n: matrix length (K1~K256). D: pointer to where the target address is
saved

Description:
26. When executing the instruction, it will look at M1094 (matrix pointer clear flag) to see if it is ON.
If it is ON, pointer D will be cleared to 0 and it will read S starting from bit 0 and read the
ON/OFF state of each bit and write it to M1095 (matrix rotate/shift/output/carry). It will see if
M1093 (matrix pointer increase flag) is ON after reading each bit and increase D by 1 if it is ON.
When reading to the last bit, M1089 (matrix search end flag) =ON, pointer D records the bit
number of the read bit and ends execution of the instruction.
27. The Pointer should be a 16-bit D-register.
28. If S designate KnX, KnY, KnM and KnS; D designates KnY, KnM and KnS. ELC-PA,
ELCM-PH/PA, ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV n=1- 4.

Program Example:
29. When X0 transitions from OFF→ON, the pointer clear flag M1094=ON, the matrix pointer
increases by 1 if flag M1093=1, after the first bit is read.
30. When present value of pointer D20=45, it will read each of the last 3 bits with each false-to-true
transition of the instruction, while M1093 = 1. The following three results will be obtained.

D20=46, matrix rotate/shift/output carry flag M1095=0, matrix search end flag M1089=0.
a) D20=47, matrix rotate/shift/output carry flag M1095=1, matrix search end flag M1089=0.
b) D20=47, matrix rotate/shift/output carry flag M1095=1, matrix search end flag M1089=1.
X0
MBRDP D0 K3 D20

b0
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1
D1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
b47 Pointer
45
D20

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3. Instruction Set

Description of the flags:

M1089: Matrix search end flag, when reaching the last bit, M1089=1.

M1092: Matrix pointer error flag, the pointer exceeds its range, M1092=1.

M1093: Matrix pointer increase flag, when set, add 1 to the present pointer.

M1094: Matrix pointer clear flag, when set, clear the present pointer to 0.

M1095: Matrix rotate/shift/output carry flag.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-655
3. Instruction Set

API Mnemonic Operands Function

187 MBWR P S, n, D Matrix Bit Write
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MBWR, MBWRP: 7 steps
S * * * * * * *
n * * *
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: matrix source address n: matrix length (K1~K256) D: pointer to where the target address is
saved

Description:
31. When executing the instruction, it will look at M1094 (matrix pointer clear flag) to see if it is ON.
If it is ON, pointer D will be cleared to 0 and write the state of M1096 (matrix shift/input
complement flag) into bit 0 of S. It will see if M1093 (matrix pointer increase flag) is ON after
writing each bit and increase D by 1 if it is ON. When writing to the last bit, M1089 (matrix
search end flag) =ON, and pointer D will record the number of the bit written to and end
executing the instruction. If D exceeds its range, M1092=1.
32. The Pointer should be a 16-bit D-register.
33. If S designate KnX, KnY, KnM and KnS; D designates KnY, KnM and KnS. ELC-PA,
ELCM-PH/PA, ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV n=1- 4.
34. Flags: Refer to explanation for M1089-M1096 below.

Program Example:
35. When X0 transitions from OFF→ON, the pointer clear flag M1094=OFF and if the matrix
pointer flag M1093=1, the pointer (D20) is increased by 1.
36. When the present pointer is D20=45, M1096 (matrix shift/input complement flag) =1. When X0
is executed once from OFF→ON, it will obtain following result:
X0
MBWRP D0 K3 D20

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3. Instruction Set

b0
Before D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1
Execution D1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D2 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
b47 M1096
1 (Matrix shift/input complement flag)

45 D20 Pointer

After D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 1
Execution
D1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D2 0 1 1 1 0 1 0 1 0 1 0 1 0 1 0 1
b47

45 D20 Pointer

Description of the flags:

M1089: Matrix search end flag, when reaching the last bit, M1089=1.

M1092: Matrix pointer error flag, the pointer exceeds its range, M1092=1.

M1093: Matrix pointer increase flag, when set, add 1 to the present pointer.

M1094: Matrix pointer clear flag, when set, clear the present pointer to 0.

M1096: Matrix shift/input complement flag

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-657
3. Instruction Set

API Mnemonic Operands Function

188 MBS P S, D, n Matrix Bit Shift
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MBS, MBSP: 7 steps
S * * * * * * *
D * * * * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S: matrix source address D: result n: matrix length (K1~K256)

Description:
37. This instruction is used to shift bits left or right within a matrix S. When M1097=0 bits are
shifted to the left in the matrix. When M1097=1 bits are shifted to the right in the matrix.
38. M1096 is used to fill the empty bit when a shift occurs. M1095 is the carry flag and is where
the bit shifted out of the matrix goes.
39. This instruction works best when used as a pulse instruction (MBSP).
40. If S designate KnX, KnY, KnM and KnS; D designates KnY, KnM and KnS. ELC-PA,
ELCM-PH/PA, ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV n=1- 4.
41. Flags:
M1095: matrix rotate/shift/output carry flag
M1096: matrix shift/input complement flag
M1097: matrix rotate/shift direction flag

Program Example 1:
When X0=ON, M1097=OFF means shift the matrix to the left by one bit for each false-to-true
transition of the instruction. For this example, flag M1096 was 0. This bit is moved into the first
position of the matrix as shown below when a shift occurs. The bit shifted out of the matrix goes to
the Carry Bit M1095. The resulting matrix after the shift is the matrix represented by D20-D22. The
source matrix represented by D0-D2 is unaffected.

X0
RST M1097

MBSP D0 D20 K3

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3. Instruction Set

0 M1096
b15 b0
Before 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D0
Execution
1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D1
M1095 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D2
MBS
M1097=0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 D20
After shifting 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D21
to left
M1095 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D22

Program Example 2:
When X1=ON, M1097=ON means shift the matrix to the right by one bit for each false-to-true
transition of the instruction. For this example, flag M1096 was 1. This bit is moved into the first
position of the matrix as shown below when a shift occurs. The bit shifted out of the matrix goes to
the Carry Bit M1095. The resulting matrix after the shift is the matrix represented by D20-D22. The
source matrix represented by D0-D2 is unaffected.

X1
M1097

MBSP D0 D20 K3

b15 b0
Before 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 M1095
D0
Execution
D1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

D2 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

1 M1096 MBS

M1097=1 D20 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 M1095

After rotating
to right D21 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
D22 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-659
3. Instruction Set

API Mnemonic Operands Function

189 MBR P S, D, n Matrix Bit Rotator
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MBR, MBRP: 7 steps
S * * * * * * *
D * * * * * *
n * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: matrix source address D: result n: matrix length (K1~K256)

Description:

1 This instruction is used to shift bits left or right within a matrix S. When M1097=0 bits are
shifted to the left in the matrix. When M1097=1 bits are shifted to the right in the matrix.

2 For this instruction, the empty bit is filled by the bit shifted out of the other end of the matrix.
when a shift occurs. M1095 is the carry flag and is also where the bit shifted out of the matrix
goes.

3 This instruction works best when used as a pulse instruction (MBSP).

4 If S uses KnX, KnY, KnM and KnS or if D uses KnY, KnM and KnS ELC-PA, ELCM-PH/PA,
ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV n ≦ 4..

5. Flags:
M1095: matrix rotate/shift/output carry flag
M1097: matrix rotate/shift direction flag

Program Example 1:
When X0=ON, M1097=OFF means shift the matrix to the left by one bit for each false-to-true
transition of the instruction. The bit moved into the bit vacated by the shift is the bit shifted out of the
other end of the matrix. This bit shifted out of the matrix also goes to the Carry Bit M1095. The
resulting matrix after the shift is the matrix represented by D20-D22. The source matrix represented
by D0-D2 is unaffected.

X0
RST M1097

MBRP D0 D20 K3

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3. Instruction Set

b15 B0
Before 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D0
Execution 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D1
M1095 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 D2

MBR
M1097=0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D20
After rotating to left
0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D21
M1095 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 D22

Program Example 2:
When X1=ON, M1097=ON means shift the matrix to the right by one bit for each false-to-true
transition of the instruction. The bit moved into the bit vacated by the shift is the bit shifted out of the
other end of the matrix. The bit shifted out of the matrix also goes to the Carry Bit M1095. The
resulting matrix after the shift is the matrix represented by D20-D22. The source matrix represented
by D0-D2 is unaffected.

X1
M1097

MBRP D0 D20 K3

b15 b0
Before D0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 M1095
Execution
D1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
D2 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0

MBR

M1097=1 D20 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 M1095

After rotating D21 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
to right D22 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1

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3. Instruction Set

API Mnemonic Operands Function

190 MBC P S, n, D Matrix Bit State Count
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F MBC, MBCP: 7 steps
S * * * * * * *
n * * *
D * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Matrix source address n: matrix length (K1~K256) D: result

Description:
42. This instruction counts the number of 1s or 0s in a matrix of length n, and places the result in D.
M1098 determines if the instruction counts 1s or 0s. If M1098=0, it counts the number of 0s in
the matrix. If M1098=1, it counts the number of 1s in the matrix.
43. If S uses KnX, KnY, KnM and KnS or if D uses KnY, KnM and KnS ELC-PA, ELCM-PH/PA,
ELC2-PB/PH/PA/PE can designate n = 4. ELC-PV, ELC2-PV n ≦ 4.

3. Flags:
When M1099 is ON, this means the result is 0.
When M1098=1, count the number of 1s in the matrix. When M1098=0, count the number of
0s in the matrix.

Program Example:
When X0=ON and M1098=1, the instruction counts the number of 1s in the matrix D0-D2 and saves
the count in D10. When M1098=0, it counts the number of 0s in the matrix D0~D2 and saves the
count in D10.
X0
MBC D0 K3 D10

D0 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1
D1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1
D2 1 1 1 1 1 1 1 1 1 1 0 0 0 0 1 1

D10 12 M1098=0

D10 36 M1098=1

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3. Instruction Set

API Mnemonic Operands Function

191 D PPMR S1, S2, S, D 2-Axis Relative Point to Point Motion
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DPPMR: 17 steps
S1 * * *
S2 * * *
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Number of output pulses for the X axis S2: Number of output pulses for the Y axis S: Max.
point to point output frequency D: Pulse output address

Description: (ELC-PV, ELC2-PV)

44. This instructin only supports “pulse + direction” mode.
45. S1 and S2 are the designated number of output pulses in the X axis (Y0 or Y4) and Y axis (Y2
or Y6). The range of these values is -2,147,483,648 ~ +2,147,483,647 (+/- represents the
forward/reverse directions). When in the forward direction, the present value registers are:
CH0 (D1337 high word, D1336 low word), CH1 (D1339 high word, D1338 low word), CH2
(D1376 high word, D1375 low word) and CH3 (D1378 high word, D1377 low word) and they
will increase. When in the reverse direction, the present value will decrease.
46. D can use Y0 and Y4.

When Y0 is used:

Y0 refers to the 1st group of X-axis pulse outputs.

Y1 refers to 1st group of the X-axis direction signal.

Y2 refers to 1st group of Y-axis pulse outputs.

Y3 refers to 1st group of the Y-axis direction signal.

Y4 refers to 2nd group of X-axis pulse outputs.

Y5 refers to 2nd group of the X-axis direction signal.

Y6 refers to 2nd group of Y-axis pulse outputs.

Y7 refers to 2nd group of the Y axis direction signal.

When the instruction execution is complete, the direction signal output will not turn off until the
conditions driving the instruction go false.

D1340/D1379 are the start/end frequencies of the 2-axis of motion. D1343/D1381 are the times for
the first acceleration segment and last deceleration segment of the 2-axis of motion. The time shall
be longer than 10ms. If the time is shorter than 10ms or longer than 10,000ms, the output will be

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-663
3. Instruction Set

operated at 10ms. Default setting = 100ms.

47. If the maximum output frequency setting is less than 10Hz, the output will be operated at 10Hz.
If the setting is more than 200KHz, the output will be operated at 200KHz.
48. When the 2-axis synchronous motion instruction is enabled, the start frequency and
acceleration/deceleration time for the Y axis will be the same as the settings for the X axis.
49. The number of output pulses for the 2-axis motion shall not be less than 59; otherwise the line
drawn will not be straight.
50. There is no limit on the number of times this instruction can be used in the program. However,
if CH1 or CH2 is in use, the 1st group will not be able to send pulses. If CH3 or CH4 is in use,
the 2nd group will not be able to send pulses.
51. Flags: M1029, M1030, M1334, M1335. See Points to note below for more details.

Description: (ELCM-PH/PA, ELC2-PC/PA/PE)

52. If the maximum output frequency setting is less than 100Hz, the output will be operated at
100Hz. If the setting is more than 100KHz, the output will be operated at 100KHz.
53. When the 2-axis synchronous motion instruction is enabled, the start frequency and
acceleration/deceleration time in the Y axis will be same as the settings in the X axis.
54. The number of output pulses for the 2-axis motion shall not be less than 20; otherwise the line
drawn will not be straight.
55. There is no limitation on the number of times using the instruction.
56. Flags: M1029. See Points to note below for more details.

Program Example:
57. Draw a rhombus like the figure below.

(0,0)
X

(-27000,-27000) (27000,-27000)

(0,-55000)

58. Steps:

a) Set the four coordinates (0,0), (-27000, -27000), (0, -55000), (27000, -27000) per the figure
above. Calculate the relative coordinates of the four points and obtain (-27000, -27000), (27000,
-28000), (27000, 27000), and (-27000, 27000). Place them in the 32-bit registers (D200, D202),
(D204, D206), (D208, D210), (D212, D214).

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3. Instruction Set

b) Set M0 On to start the 2-axis motion.

= D0 K1 DPPMR D200 D202 K100000 Y0

= D0 K2 DPPMR D204 D206 K100000 Y0

= D0 K3 DPPMR D208 D210 K100000 Y0

= D0 K4 DPPMR D212 D214 K100000 Y0

M0
RST M1029

MOV K1 D0
M0 M1029
INCP D0

END

59. Motion description:

When M0 = On, the ELC will start the first point-to-point motion at 100KHz. D0 will increment by 1
whenever a motion step is complete, which will start the next motion step. This will continue until the
fourth motion step is complete.

Points to note:

1. ELC-PV, ELC2-PV Flag descriptions:

M1029 : On when the 1st group of 2-axis motion is complete.

M1036 : On when the 2nd group of 2-axis motion is complete.

M1334 : On when the 1st group of 2-axis motion is in error.

M1336 : 1st group of 2-axis pulse output indication flag

M1520 : On when the 2nd group of 2-axis motion is in error.

M1522 : 2nd group of 2-axis pulse output indication flag

2. ELC-PV, ELC2-PV Special register descriptions:

D1336, : Pulse present value register for the Y0 output of the 1st group of X-axis motion.
D1337 The present value increases or decreases based on the rotation direction. (D1337
high word; D1336 low word)

D1338, : Pulse present value register for the Y2 output of the 1st group of Y-axis motion.
D1339 The present value increases or decreases based on the rotation direction. (D1339
high word; D1338 low word)

D1340 : Frequency settings for the first acceleration and the last deceleration segment for
the Y0 output of the 1st group of X-axis motion and Y2 of the Y-axis motion for API
191 DPPMR and API 192 DPPMA.

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3. Instruction Set

D1343 : Time settings for the first acceleration and last deceleration segment for the Y0
output of the 1st group of X-axis motion and Y2 of the Y-axis motion for API 191
DPPMR and API 192 DPPMA.

D1375, : Pulse present value register for the Y4 output of the 2nd group of X-axis motion.
D1376 The present value increases or decreases based on the rotation direction. (D1337
high word; D1336 low word)

D1377, : Pulse present value register for the Y6 output of the 2nd group of Y-axis motion.
D1378 The present value increases or decreases based on the rotation direction. (D1339
high word; D1338 low word)

D1379 : Frequency settings for the first acceleration and last deceleration segment for the
Y4 output of the 2nd group of X-axis motion and Y6 of the Y-axis motion for API 191
DPPMR and API 192 DPPMA.

D1381 : Time settings for the first acceleration and last deceleration segment for the Y4
output of the 2nd group of X-axis motion and Y6 of the Y-axis motion for API 191
DPPMR and API 192 DPPMA.

3. ELCM-PH/PA, ELC2-PC/PA/PE Flag explanations:

M1029 : On when the 2-axis pulse output is complete.

4. ELCM-PH/PA, ELC2-PC/PA/PE Special register explanations:

D1030, : Pulse present value register for the Y0 output for the X-axis motion. The present
D1031 value increases or decreases based on the rotation direction. (D1031 high word;
D1030 low word)

D1336, : Pulse present value register for the Y2 output for the Y-axis motion. The present
D1337 value increases or decreases based on the rotation direction. (D1337 high word;
D1336 low word)

D1340 : Frequency settings for the first acceleration and last deceleration segment for the
Y0 output of the X-axis motion and Y2 of the Y-axis motion for API 191 DPPMR
and API 192 DPPMA.

D1343 : Time settings for the first acceleration and last deceleration segment for the Y0
output of the X-axis motion and Y2 of the Y-axis motion for API 191 DPPMR and
API 192 DPPMA.

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3. Instruction Set

API Mnemonic Operands Function

192 D PPMA S1, S2, S, D 2-Axis Absolute Point to Point Motion
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DPPMA: 17 steps
S1 * * *
S2 * * *
S * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Number of X axis output pulses S2: Number of Y axis output pulses S: Maximum output
frequency D: Pulse output address

Description: (ELC-PV, ELC2-PV)

1. Flags: M1029, M1030, M1334, M1335. Refer to API 191 DPPMR for details.
2. This instructin only supports “pulse + direction” mode.
3. S1 and S2 are the designated number of output pulses in the X axis (Y0 or Y4) and Y axis (Y2 or
Y6). The range of the values are -2,147,483,648 ~ +2,147,483,647 (+/- represents the
forward/reverse direction). When in the forward direction, the pulse present value registers CH0
(D1337 high word, D1336 low word), CH1 (D1339 high word, D1338 low word), CH2 (D1376
high word, D1375 low word) and CH3 (D1378 high word, D1377 low word) will increase. When
in the reverse direction, the present value will decrease.
4. D can use Y0 and Y4.

When Y0 is used:

Y0 refers to the 1st group of X-axis pulse outputs.

Y1 refers to the 1st group of the X-axis direction signal.

Y2 refers to the 1st group of Y-axis pulse outputs.

st
Y3 refers to the 1 group of the Y axis direction signal.

Y4 refers to the 2nd group of X-axis pulse outputs.

Y5 refers to the 2nd group of the X-axis direction signal.

Y6 refers to the 2nd group of Y-axis pulse outputs.

Y7 refers to the 2nd group of the Y axis direction signal.

When the instruction execution is complete, the direction signal output will not turn off until the
conditions driving the instruction go false.

5. D1340/D1379 refer to the settings of the start/end frequencies of the 2-axis motion.
D1343/D1381 refer to the time of the first acceleration segment and last deceleration segment

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3. Instruction Set

of the 2-axis motion. The time must be longer than 10ms. If the time is shorter than 10ms or
longer than 10,000ms, the output will be operated at 10ms. Default setting = 100ms.

6. If the maximum output frequency setting is less than 10Hz, the output will be operated at 10Hz.
If the setting is more than 200KHz, the output will be operated at 200KHz.

7. When the 2-axis synchronous motion instruction is enabled, the start frequency and the
acceleration/deceleration time in the Y axis will be the same as the settings for the X axis.

8. The number of output pulses for the 2-axis motion must be greater than 59, otherwise the line
drawn will not be straight.

9. There is no limit on the number of times this instruction can be used in the program.

Description: (ELCM-PH/PA, ELC2-PC/PA/PE)

1. Flags: M1029. See API 191 DPPMR for more details.
2. S1 and S2 are the designated number of output pulses in the X axis (Y0) and Y axis (Y2). The
range of the values is -2,147,483,648 ~ +2,147,483,647 (+/- represents the forward/backward
direction). When in forward direction, the pulse present value registers CH0 (D1031 high word,
D1030 low word), CH1 (D1337 high word, D1336 low word) will increase. When in the reverse
direction, the present value will decrease.

Program Example:

1. Draw a rhombus per the figure below.

(0,0)
X

(-27000,-27000) (27000,-27000)

(0,-55000)

2. Steps:

a) Set the four coordinates (0,0), (-27000, -27000), (0, -55000), (27000, -27000) per the figure
above. Place them in the 32-bit registers (D200, D202), (D204, D206), (D208, D210), (D212,
D214).

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3. Instruction Set

b) Set M0 On and start the 2-axis motion.

= D0 K1 DPPMA D200 D202 K100000 Y0

= D0 K2 DPPMA D204 D206 K100000 Y0

= D0 K3 DPPMA D208 D210 K100000 Y0

= D0 K4 DPPMA D212 D214 K100000 Y0

M0
RST M1029

ZRST D1336 D1339

MOV K1 D0
M0 M1029
INCP D0

END

3. Motion description:

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3. Instruction Set

API Mnemonic Operands Function

193 D CIMR S1, S2, S, D 2-Axis Relative Position Arc Interpolation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DCIMR: 17 steps
S1 * * *
S2 * * *
S *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Number of X axis output pulses S2: Number of Y axis output pulses S: Parameter
settings D: Pulse output address

Description: (ELC-PV, ELC2-PV)

1. Flags: M1029, M1030, M1334, M1335. See API 191 DPPMR for details.
2. This instructin only supports “pulse + direction” mode.
3. S1 and S2 are the designated number of output pulses in the X axis (Y0 or Y4) and Y axis (Y2 or
Y6). The range of the values are -2,147,483,648 ~ +2,147,483,647 (+/- represents the
forward/backward direction). When in the forward direction, the pulse present value registers
CH0 (D1337 high word, D1336 low word), CH1 (D1339 high word, D1338 low word), CH2
(D1376 high word, D1375 low word) and CH3 (D1378 high word, D1377 low word) will increase.
When in the reverse direction, the present value will decrease.
4. When the lower 16 bits of S are K0, this refers to a clockwise 10-segment (average resolution)
output; K2 refers to a clockwise 20-segment (higher resolution) output for a 90 arc (see figure 1
and 2). K1 refers to a counterclockwise 10-segment (average resolution) output; K3 refers to a
counterclockwise 20-segment (higher resolution) output for a 90 arc (see figure 3 and 4).
5. The higher 16 bits of S (time settings for the motion): K1 refers to 0.1 seconds. The setting
range for average resolution is K1 ~ K100 (0.1 sec. ~ 10 secs.), for higher resolution use K2 ~
K200 (0.2 sec. ~ 20 secs.).
Y Y
(S1 ,S2 ) (S1 ,S2 )
10 segments

20 segments

X X
(0,0) (0,0)
10 segments 20 segments

Figure 1 Figure 2

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3. Instruction Set

Y Y
(S1 ,S2 ) (S1 ,S2 )

20 segments
10 segments

X X
(0,0) (0,0)
10 segments 20 segments
Figure 3 Figure 4
6. D can use Y0 and Y4.

When Y0 is used:

Y0 refers to the 1st group of X-axis pulse outputs.

Y1 refers to the 1st group of the X-axis direction signal.

Y2 refers to the 1st group of Y-axis pulse outputs.

st
Y3 refers to the 1 group of the Y-axis direction signal.

When Y4 is used:

Y4 refers to the 2nd group of X-axis pulse outputs.

Y5 refers to the 2nd group of the X-axis direction signal.

Y6 refers to the 2nd group of Y-axis pulse outputs.

Y7 refers to the 2nd group of the Y-axis direction signal.

When the instruction execution is complete, the direction signal output will not turn off until the
conditions driving the instruction go false.
7. Draw four 90 arcs.
8. When the direction signal is On, the direction is positive. When the direction signal is Off, the
direction is negative. When S is set to K0, K2, the arcs will be clockwise (see figure 5). When S
is set as K1, K3, the arcs will be counterclockwise (see figure 6).
Quadrant I I Y Quadrant I Y Quadrant I

Quadrant I I

X X
Quadrant I II Quadrant I V
Quadrant I V Quadrant I II

Figure 5 Figure 6
9. When the 2-axis motion is being executed in 10 segments (of average resolution), the operation
time of the instruction when the instruction is first enabled is approximately 5ms. The number of
output pulses cannot be less than 100 and more than 1,000,000; otherwise, the instruction

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3. Instruction Set

cannot be enabled.
10. When the 2-axis motion is being executed in 20 segments (high resolution), the operation time
of the instruction when the instruction is first enabled is approximately 10ms. The number of
output pulses cannot be less than 1,000 and more than 10,000,000; otherwise, the instruction
cannot be enabled.
11. If the number of pulses in 10-segment or 20-segment motion needs to be lower or higher than
the allowable range, adjust the gear ratio of the servo to obtain the desired value.
12. Each time the instruction is executed, only one 90 arc can be drawn.
13. There are no settings for the start frequency and acceleration/deceleration time.
14. There is no limit on the number of times this instruction can be used in the program..
15. The settings for the direction and resolution are in the lower 16 bits of S and can only be K0 ~
K3.
16. The settings for the motion time are in the high 16 bits of S and can be slower than the the
fastest suggested time but must not be faster than the fastest suggested time.
17. The fastest suggested time for the arc interpolation:
Segments Max. target position (pulse) Fastest suggested set time (unit:100ms)
100 ~ 10,000 1

Average 10,001 ~ 19,999 2

resolution : :
Less than 1,000,000 Less than 100
1,000 ~ 20,000 2

Higher 20,000 ~ 29,999 3

resolution : :
Less than 10,000,000 Less than 200

Description: (ELCM-PH/PA, ELC2-PC/PA/PE)

1. Flags: M1029. See API 191 DPPMR for details.
2. S1 and S2 are the designated number of output pulses in the X axis (Y0) and Y axis (Y2). The
range of the values is -2,147,483,648 ~ +2,147,483,647 (+/- represents the forward/backward
direction). When in the forward direction, the pulse present value registers CH0 (D1031 high
word, D1030 low word), CH1 (D1337 high word, D1336 low word) will increase. When in
reverse direction, the present value will decrease.
3. The lower 16 bits of S (the settings for the direction and resolution): K0 refers to clockwise
20-segment output for a 90 arc (see figure 7). K1 refers to counterclockwise 20-segment output
for a 90 arc (see figure 8).
4. The higher 16 bits of S (the settings for the motion time): K1 refers to 0.1 seconds. The range for
the resolution is K2 ~ K200 (0.2 sec. ~ 20 secs.).

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3. Instruction Set

Y Y
(S1 ,S2 ) (S1 ,S2 )

20 segments

20 segments
X X
(0,0) (0,0)
20 segments 20 segments

Figure 7 Figure 8

5. D can use Y0.

When Y0 is used:

Y0 refers to the X-axis pulse outputs.

Y1 refers to the X-axis direction signal.

Y2 refers to the Y-axis pulse outputs.

Y3 refers to the Y-axis direction signal.

6. Draw four 90 arcs. When the direction signal is Off, the direction is positive. When the direction
signal is On, the direction is negative. When S is set as K0, the arcs will be clockwise (see figure
5). When S is set as K1, the arcs will be counterclockwise (see figure 6).
7. When the 2-axis motion is being executed, the operation time of the instruction when the
instruction is first enabled is approximately 2ms.
8. Each time the instruction is executed, only one 90 arc can be drawn.
9. There are no settings for the start frequency and acceleration/deceleration time.
10. There is no limit on the number of times this instruction can be used in the program.
11. The settings for the direction and resolution are in the lower 16 bits of S and can only be K0 ~
K1.
12. The settings for the motion time are in the high 16 bits of S and can be slower than the fastest
suggested time but shall not be faster than the fastest suggested time.
13. The fastest suggested time for the arc interpolation:
Segments Max. target position (pulse) Fastest suggested set time (unit:100ms)
1,000 ~ 20,000 2

20-segment 20,000 ~ 29,999 3

resolution : :
Less than 10,000,000 Less than 200

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-673
3. Instruction Set

Program Example 1:
1. Draw an ellipse per the figure below.
Y

( 1600,2200 )

X
( 0,0 ) ( 3200,0 )

(1600,-2200)

2. Steps:

a) Set the four coordinates (0,0), (1600, 2200), (3200, 0), (1600, -2200) per the figure above.
Calculate the relative coordinates of the four points and obtain (1600, 2200), (1600, -2200),
(-1600, -2200), and (-1600, 2200). Place them in the 32-bit registers (D200, D202), (D204,
D206), (D208, D210), (D212, D214).

b) Select “draw clockwise arc” and “average resolution” (S = K0)

c) Set M0 to On to start the motion.

= D0 K1 DCIMR D200 D202 K0 Y0

= D0 K2 DCIMR D204 D206 K0 Y0

= D0 K3 DCIMR D208 D210 K0 Y0

= D0 K4 DCIMR D212 D214 K0 Y0

M0
RST M1029

MOV K1 D0
M0 M1029
INCP D0

END

3. Motion description:
When M0 = On, the ELC will start drawing the first segment of the arc. D0 will increment each
time a segment of arc is complete, which also initiates the second segment of the arc. This
execution will continue until the fourth segment of the arc is complete.

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3. Instruction Set

Program Example 2:

1. Draw a tilted ellipse per the figure below.

(26000,26000)

(34000,18000)

X
(0,0)

(8000,-8000)

2. Steps:

a) Find the max. and min. coordinates for the X and Y axes (0,0), (26000,26000), (34000,18000),
(8000,-8000) per the figure above. Calculate the relative coordinates of the four points and
obtain (26000,26000)、(8000,-8000)、(-26000,-26000), (-8000,8000). Place them in the 32-bit
registers (D200,D202), (D204,D206), (D208,D210) and (D212,D214).

b) Select “draw clockwise arc” and “average resolution” (S = K0).

c) Set M0 to On to start the motion.

= D0 K1 DCIMR D200 D202 K0 Y0

= D0 K2 DCIMR D204 D206 K0 Y0

= D0 K3 DCIMR D208 D210 K0 Y0

= D0 K4 DCIMR D212 D214 K0 Y0

M0
RST M1029

MOV K1 D0
M0 M1029
INCP D0

END

3. Motion explanation:
When M0 = On, the ELC will start drawing the first segment of the arc. D0 will increment each
time a segment of the arc is complete, which initializes the second segment of the arc. This
execution will continue until the fourth segment of the arc is complete.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-675
3. Instruction Set

API Mnemonic Operands Function

194 D CIMA S1, S2, S, D 2-Axis Absolute Position Arc Interpolation
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DCIMA: 17 steps
S1 * * *
S2 * * *
S *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Number of X axis output pulses S2: Number of Y axis output pulses S: Parameter
settings D: Pulse output address

Description: (ELC-PV, ELC2-PV)

1. Flags: M1029, M1030, M1334, M1335. See API 191 DPPMR for details.
2. This instructin only supports “pulse + direction” mode.
3. S1 and S2 are the number of output pulses for the X axis (Y0 or Y4) and Y axis (Y2 or Y6). The
range of the values is -2,147,483,648 ~ +2,147,483,647. When S1 and S2 are greater than the
pulse present value registers CH0 (D1337 high word, D1336 low word), CH1 (D1339 high word,
D1338 low word), CH2 (D1376 high word, D1375 low word), and CH3 (D1378 high word, D1377
low word), the output direction will be positive and direction signals Y1, Y3, Y5, Y7 will be On.
When S1 and S2 are less than the pulse present value registers, the output direction will be
negative and direction signals Y1, Y3, Y5, Y7 will be Off.
4. The lower 16 bits of S (settings for the direction and resolution): K0 refers to clockwise
10-segment (average resolution) output; K2 refers to clockwise 20-segment (higher resolution)
output for a 90 arc (see figure 1 and 2). K1 refers to counterclockwise 10-segment (average
resolution) output; K3 refers to counterclockwise 20-segment (higher resolution) output for a 90
arc (see figure 3 and 4).
5. The higher 16 bits of S (the settings for the motion time): K0 refers to 0.1 second. The range for
the average resolution is K1 ~ K100 (0.1 sec. ~ 10 secs.), for the higher resolution the range is
K2 ~ K200 (0.2 sec. ~ 20 secs.).

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3. Instruction Set

Y Y
(S1 ,S2 ) (S1 ,S2 )

10 segments

20 segments
X X
(0,0) (0,0)
10 segments 20 segments

Figure 1 Figure 2

Y Y
(S1 ,S2 ) (S1 ,S2 )

20 segments
10 segments

X X
(0,0) (0,0)
10 segments 20 segments
Figure 3 Figure 4
6. D can use Y0 and Y4.

When Y0 is used:

Y0 refers to the 1st group of X-axis pulse outputs.

Y1 refers to the 1st group of the X-axis direction signal.

st
Y2 refers to the 1 group of Y-axis pulse outputs.

Y3 refers to the 1st group of the Y-axis direction signal.

When Y4 is used:

Y4 refers to the 2nd group of X-axis pulse outputs.

Y5 refers to the 2nd group of the X-axis direction signal.

Y6 refers to the 2nd group of Y-axis pulse outputs.

Y7 refers to the 2nd group of the Y-axis direction signal.

When the instruction execution is complete, the direction signal output will not turn off until the
conditions driving the instruction go false.
7. Draw four 90 arcs.
8. When the direction signal is On, the direction is positive. When the direction signal is Off, the
direction is negative. When S is set to K0, K2, the arcs will be clockwise (see figure 5). When S
is set to K1, K3, the arcs will be counterclockwise (see figure 6).

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-677
3. Instruction Set

Quadrant I I Y Quadrant I Y Quadrant I

Quadrant I I

X X
Quadrant I II Quadrant I V
Quadrant I V Quadrant I II

Figure 5 Figure 6

9. When the 2-axis motion is being executed in 10 segments (of average resolution), the operation
time of the instruction when the instruction is first enabled is approximately 5ms. The number of
output pulses cannot be less than 100 or more than 1,000,000; otherwise, the instruction cannot
be enabled.
10. When the 2-axis motion is being executed in 20 segments (of high resolution), the operation
time of the instruction when the instruction is first enabled is approximately 10ms. The number of
output pulses cannot be less than 1,000 or more than 10,000,000; otherwise, the instruction
cannot be enabled.
11. If the number of pulses in 10-segment or 20-segment motion needs to be lower or higher than
the allowable range, adjust the gear ratio of the servo to obtain the desired value
12. Each time the instruction is executed, only one 90 arc can be drawn.
13. There are no settings for the start frequency and acceleration/deceleration time.
14. There is no limit on the number of times this instruction can be used in the program
15. The settings for the direction and resolution are in the lower 16 bits of S and can only be K0 ~
K3.
16. The settings for the motion time are in the high 16 bits of S and can be slower than the fastest
suggested time but shall not be faster than the fastest suggested time.
17. The fastest suggested time for the arc interpolation:
Segments Max. target position (pulse) Fastest suggested set time (unit:100ms)
100 ~ 10,000 1

Average 10,001 ~ 19,999 2

resolution : :
Less than 1,000,000 Less than 100
1,000 ~ 20,000 2

Higher 20,000 ~ 29,999 3

resolution : :
Less than 10,000,000 Less than 200

Description: (ELCM-PH/PA, ELC2-PC/PA/PE)

1. Flags: M1029. See API 191 DPPMR for details.
2. S1 and S2 are the designated number of output pulses in the X axis (Y0) and the Y axis (Y2).

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3. Instruction Set

The range of the values is -2,147,483,648 ~ +2,147,483,647 (+/- represents the

forward/backward direction). When in forward direction, the pulse present value registers CH0
(D1031 high word, D1030 low word), CH1 (D1337 high word, D1336 low word) will increase.
When in backward direction, the present value will decrease.
3. For additional information refer to API 193 DCIMR.

Program Example 1:

1. Draw an ellipse per the figure below.

( 16000,22000 )

X
( 0,0 ) ( 32000,0 )

(16000,- 22000)

2. Steps:

a) Set the four coordinates (0,0), (16000, 22000), (32000, 0), (16000, -22000) per the figure
above. Place them in the 32-bit registers (D200, D202), (D204, D206), (D208, D210), (D212,
D214).

b) Select “draw clockwise arc” and “average resolution” (S = K0).

c) Set M0 to On to start the motion.

= D0 K1 DCIMA D200 D202 K0 Y0

= D0 K2 DCIMA D204 D206 K0 Y0

= D0 K3 DCIMA D208 D210 K0 Y0

= D0 K4 DCIMA D212 D214 K0 Y0

M0
RST M1029

ZRST D1336 D1339

MOV K1 D0
M0 M1029
INCP D0

END

3. Motion description:

When M0 = On, the ELC will start drawing the first segment of the arc. D0 will increment by 1 each

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-679
3. Instruction Set

time a segment of the arc is complete, which also initiates the second segment of the arc. This
execution will continue until the fourth segment of the arc is complete.

Program Example 2:

1. Draw a tilted ellipse as the figure below.

(26000,26000)

(34000,18000)

X
(0,0)

(8000,-8000)

2. Steps:

a) Find the max. and min. coordinates on the X and Y axes (0,0), (26000,26000),
(34000,18000), (8000,-8000) per the figure above. Place them in the 32-bit registers
(D200,D202), (D204,D206), (D208,D210) and (D212,D214).

b) Select “draw clockwise arc” and “average resolution” (S = K0).

c) Set M0 to On to start the motion.

= D0 K1 DCIMA D200 D202 K0 Y0

= D0 K2 DCIMA D204 D206 K0 Y0

= D0 K3 DCIMA D208 D210 K0 Y0

= D0 K4 DCIMA D212 D214 K0 Y0

M0
RST M1029

ZRST D1336 D1339

MOV K1 D0
M0 M1029
INCP D0

END

3. Motion description:

When M0 = On, the ELC will start drawing the first segment of the arc. D0 will increment each time a
segment of the arc is complete, which also initiates the second segment of the arc. This execution
will continue until the fourth segment of the arc is complete.

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3. Instruction Set

API Mnemonic Operands Function

195 D PTPO S 1 , S2 , D Single-Axis Pulse Output by Table
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DPTPO: 13 steps
S1 *
S2 *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Starting source address S2: Number of segments D: Pulse output address

Description: (ELC-PV, ELC2-PV)

1. Flags: M1029, M1030, M1334, M1335. See the remarks below for details.

2. The value of S2, determines the number of segments and each segment uses four D registers.
(S1 + 0) refers to the output frequency. (S1 + 2) refers to the number of output pulses.

3. When the output frequency of S1 is less than 1, the ELC will use a value of 1. When the value is
greater than 200,000KHz, the ELC will use 200,000KHz.

4. S2 + 0: the number of segments (range: 1 ~ 60). S2 + 1: the number of segments being executed.
Each time the program scans the instruction, it will update the segment number that is currently
being executed.

5. D can only designate output addresses Y0, Y2, Y4 and Y6 and can only perform pulse output
control.

6. This instruction does not offer acceleration and deceleration functions. When the instruction is
disabled, the output pulses will stop immediately.

7. There is no limit to the number of times this instruction can be used in the program, but only one
can be executed at a time for each channel.

8. When the instruction is being executed, the frequency and the number of the segments cannot
be modified.

Description: (ELCM-PH/PA, ELC2-PB/PH/PA/PE)

1. S1 specifies the output frequency and the number of pulses based on the number of segments
set by S2. Each segment occupies 4 consecutive registers in S1. (S1+0) and (S1+1) store the
output frequency; (S1+2) and (S1+3) store the number of output pulses.

2. Available output frequencies for S1: 6Hz~100,000Hz.

3. S2 is the total number of segments (range: 1 ~ 40). S2 + 1: The number of the current executing
segment. The number in S2 + 1 will be updated when the ELC scans this instruction.

4. D can only be designated with output addresses Y0 and Y2.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-681
3. Instruction Set

5. This instruction does not offer the ramp up/down function. Therefore, when the instruction is
disabled, the output pulses will stop immediately.

6. There is no limit to the number of times this instruction can be used in the program, but only one
can be executed at a time for each channel.

7. When the instruction is being executed, changes to the instruction parameters will be invalid.

Program Example:

1. When X0 = On, the output will be operated according to the frequency and number of pulses per
segment.

2. Format of the table:

S2 = D300, number of S1 = D0, frequency (S1 + 0) S1 = D0, number of output

segments (D300 = K60) pulses (S1 + 2)

K1 (1st segment) D1, D0 D3, D2

K2 (2nd segment) D5, D4 D7, D6

: : :

: : :
th
K60 (60 segment) D237, D236 D239, D238

3. Monitor the segment number that is currently being executed in register D301.

X0
DPTPO D0 D300 Y0

END

4. The pulse output curve:

Frequency (Hz)

(D237,D236)

....
(D239,D238)
(D5,D4)
....
(D7,D6)
(D1,D0)
(D3,D2)
Time (S)
t1 t 2 t .... t 60

Points to note:

1. ELC-PV, ELC2-PV Flag descriptions:

M1029: On when CH0 (Y0) pulse output is complete.

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3. Instruction Set

M1030: On when CH1 (Y2) pulse output is complete.

M1036: On when CH2 (Y4) pulse output is complete.

M1037: On when CH3 (Y6) pulse output is complete.

M1334: When On, CH0 (Y0) pulse output is in error.

M1335: When On, CH1 (Y2) pulse output is in error.

M1520: When On, CH2 (Y4) pulse output is in error.

M1521: When On, CH3 (Y6) pulse output is in error.

M1336: CH0 (Y0) pulse output indication flag

M1337: CH1 (Y2) pulse output indication flag

M1522: CH2 (Y4) pulse output indication flag

M1523: CH3 (Y6) pulse output indication flag

2. ELC-PV, ELC2-PV Special register descriptions:

D1336, D1337: Pulse present value register for CH0 (Y0) (D1337 high word, D1336
low word)

D1338, D1339: Pulse present value register for CH1 (Y2) (D1339 high word, D1338
low word)

D1375, D1376: Pulse present value register forCH2 (Y4) (D1376 high word, D1375
low word)

D1377, D1378: Pulse present value register forCH3 (Y6) (D1378 high word, D1377
low word)

3. ELCM-PH/PA, ELC2-PB/PH/PA/PE Flag descriptions:

M1029 CH0 (Y0) pulse output execution complete.

M1102 CH1 (Y2) pulse output execution complete

M1078 CH0 (Y0) pulse output pause (immediate)

M1104 CH1 (Y2) pulse output pause (immediate)

M1538 Indicating pause status of Y0

M1540 Indicating pause status of Y2

4. ELCM-PH/PA, ELC2-PB/PH/PA/PE Special register explanations:

D1030 Low word of the present value of the Y0 pulse output

D1031 High word of the present value of the Y0 pulse output

D1336 Low word of the present value of the Y2 pulse output

D1337 High word of the present value of the Y2 pulse output

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-683
3. Instruction Set

API Mnemonic Operands Function

196 HST P S High Speed Timer
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F HST, HSTP: 3 steps
S * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S: Start/stop condition for the high speed timer

Description:

1. Range of S: S = K0 or K1.

2. Flag: M1015: See below for details.

3. When S = 1, and the high speed timer is executed, M1015 will be On and, the high speed
timer will start to time and record the present value in D1015 (units: 100us).

4. The timing range of D1015: K0 ~ K32,767. When the accumulated value equals K32,767, the
timer will roll over to 0..

5. When S = 0, the high speed timer will be disabled and M1015 = Off. D1015 will stop the
timing immediately.

6. When S is other than 0 or 1, the HST instruction will not execute.

 Program Example:

1. When X10 = On, M1015 will be On. The high speed timer will start to time and record the
present value in D1015.

2. When X10 = Off, M1015 will be Off. The high speed timer will be shut down.
X10
HST K1
X10
HST K0

Points to note:

1. Flag descriptions:
M1015: high speed timer start-up indication
D1015: high speed timer accumulated value

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3. Instruction Set

API Mnemonic Operands Function

197 D CLLM S1, S2, S3, D Close Loop Position Control
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DCLLM: 17 steps
S1 * *
S2 * * *
S3 * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

 S1: Feedback source address S2: Target number of feedbacks

S3: Target frequency of the output D: Pulse output address

 Description: (ELC-PV, ELC2-PV)

1. Flags: M1029, M1030, M1334, M1335. See the remarks below for details.

2. The corresponding interrupt of S1:

 C241
~
C254

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3. Instruction Set

  = 1: rising-edige trigger;  = 0: falling-edge trigger

a) When S1 designates X as the input points and the pulse output reaches the set target
number of feedbacks in S2, the output will continue to operate with the frequency of the
last segment until the input interrupt occurs.

b) When S1 designates a high speed counter and the pulse output reaches the set target
number of feedbacks in S2, the output will continue to operate with the frequency of the
last segment until the feedback pulses reach the target number.

c) S1 can be a high speed counter C or an external input interrupt. If S1 is C, the DCNT

instruction should be the first executed to enable the high-speed counting function.

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3. Instruction Set

d) The range of S2 is -2,147,483,648 ~ +2,147,483,647 (+/- represents the

forward/backward direction). When in forward direction, the pulse present value registers
CH0 (D1337 high word, D1336 low word), CH1 (D1339 high word, D1338 low word),
CH2 (D1376 high word, D1375 low word) and CH3 (D1378 high word, D1377 low word)
will increase. When in reverse direction, the present value will decrease.

3. If S3 is less than 10Hz, the output will operate at 10Hz; if S3 is greater than 200KHz, the output
will operate at 200KHz.

4. D can only designate Y0, Y2, Y4 and Y6 and the direction signals are Y1, Y3, Y5 and Y7.

 When the instruction execution is complete, the direction signal

output will not turn off until the the conditions driving the instruction
go false.

5. D1340, D1352, D1379 and D1380 are the settings for the start/end frequencies of CH0 ~ CH3.
The minimun frequency is 10Hz and the default is 200Hz.

6. D1343, D1353, D1381 and D1382 are the settings for the time of the first segment and the last
deceleration segment of CH0 ~ CH3. The acceleration/deceleration time cannot be shorter
than 10ms. The outptut will be operated at 10ms if the time set is less than 10ms or greater
than 10,000ms. The dafault setting is 100ms.

7. D1198, D1199, D1478 and D1479 are the output/input ratio of the close loop control in CH0 ~
CH3. K1 refers to 1 output pulse out for the 100 target feedback input pulses; K200 refers to
200 output pulses out of the 100 target feedback input pulses. D1198, D1199, D1478 and
D1479 are the numerators of the ratio (range: K1 ~ K10,000) and the denominator is fixed at
K100 (the denominator does not need to be entered).

8. M1305, M1306, M1532 and M1533 are the direction signal flags for CH0 ~ CH3. When S2 is a
positive value, the output will be in the forward direction and the flag will be Off. When S2 is a
negative value, the output will be in the reverse direction and the flag will be On.

 Close Loop description:

1. Function: Immediately stop the high-speed pulse output based on the number of feedback
pulses or external interrupt signals.

2. The execution:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-687
3. Instruction Set

Frequency

C high speed counting = target number of feedb

Target frequency or
occurrence of external interruption

Start/end frequency
Time
Number

Acceleration High speed time Deceleration time

time Idling time

Number of output pulses =

 target number of feedbacks x percentage value/100

3. How to adjust the time for the positioning:

a) The time for the completion of the positioning refers to the time for “acceleration + high
speed + deceleration + idling” (see the figure above). For example, the entire number of
output pulses can be increased or decreased by making the adjustment to the
percentage value and further increase or decrease the time required for the positioning.

b) Among the four segments of time, only the idling time cannot be adjusted directly.
However, you can determine if the execution result is good or bad by the length of the
idle time.

c) Because this is a close loop operation, the length of the idle time will not be the same for
each execution. Therefore, when the content of the D register for displaying the actual
number of output pulses is smaller or larger than the calculated number of output pulses
(taget number of feedbacks x percentage value/100), this can be improved by adjusting
the percentage value, acceleration/decelartion time or the target frequency.

 Program Example:

1. Assume we choose X0 as the external interrupt, with I001 (rising-edge trigger) interrupt; target
number of feedbacks = 50,000; target frequency = 10KHz; Y0, Y1 (CH0) for the output pulses;
start/end frequency (D1340) = 200Hz; acceleration time (D1343) = 300ms; deceleration time
(D1348) = 600ms; percentage value (D1198) = 100; current number of output pulses (D1336,
D1337) = 0.

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3. Instruction Set

M1002
MOV K100 D1198

MOV K300 D1343

MOV K600 D1348

SET M1534

DMOV K0 D1336

RST C251

EI
M0
DCNT C251 K100000

DCLLM X0 K50000 K100000 Y0

FEND
M1000
I010 INC D0

IRET

END


2. Assume the first execution result as:

Frequency

X0 Off --> On
100KHz Y0 stops output

D1340 Time
Number

D1343 D1348
Estimated number of output pulses: 50,000

 Actual number of output pulses (D1336, D1337) = K49,200

3. Note the result of the first execution:

a) The actual output number 49,200 – estimated output number 50,000 = -800 (a negative
value). A negative value indicates that the entire execution finished early and has not
completed.

b) Try shortening the acceleration time (D1343) to 250ms and the deceleration time (D1348)
to 550ms.

4. The result of the second execution:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-689
3. Instruction Set

Frequency

X0 Off --> On
100KHz Y0 stops output

D1340 Time
Number

D1343 D1348
Estimated number of output pulses: 50,000

 Actual number of output pulses (D1336, D1337) = K50,020

5. Note the result of the second execution:

a) The actual output number 50,020 – estimated output number 50,000 = 20

b) 20 x (1/200Hz) = 100ms (idle time)

c) 100ms is an appropriate value. Therefore, set the acceleration time to 250ms and the
deceleration time to 550ms.

 Program Example 2:

1. Assume the feedback of the encoder is an A/B phase input and we use the C251 high speed
counter (reset the counter before execution); target number of feedbacks = 50,000; target
output frequency = 100KHz; Y0, Y1 (CH0) as output pulses; start/end frequency (D1340) =
200Hz; acceleration time (D1343) = 300ms; deceleration time (D1348) = 600ms; precentage
value (D1198) = 100; current number of output pulses (D1336, D1337) = 0.
M1002
MOV K100 D1198

MOV K300 D1343

MOV K600 D1348

SET M1534

DMOV K0 D1336

RST C251

EI
M0
DCNT C251 K100000

DCLLM C251 K50000 K100000 Y0

FEND
M1000
I010 INC D0

IRET

END


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3. Instruction Set

2. Assume the first execution result as:

Frequency

C251 =K50000
100KHz Y0 stops output

D1340 Time
Number

D1343 D1348 3s

Estimated number of output pulses: 50,000

 Actual number of output pulses (D1336, D1337) = K50,600

3. Note the result of the first execution:

a) The actual output number 50,600 – estimated output number 50,000 = 600

b) 600 x (1/200Hz) = 3s (idle time)

c) 3 seconds are too long. Therefore, increase the percentage value (D1198) to K101.
Frequency

C251 =K50000
100KHz Y0 stops output

D1340 Time
Number

D1343 D1348 300ms

Estimated number of output pulses: 50,500

 Actual number of output pulses (D1336, D1337) = K50,560

4. The result of the second execution:

a) The actual output number 50,560 – estimated output number 50,500 = 60

b) 60 x (1/200Hz) = 300ms (idling time)

c) 300ms is an appropriate value. Therefore, set the percentage value (D1198) to K101.

 Description: (ELCM-PH/PA, ELC2-PB/PH/PA/PE)

1. The corresponding interrupt pointers of S1:

 C2
4
3
~
C
2
5
4

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3. Instruction Set

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3. Instruction Set

  = 1: rising-edige triggered;  = 0: falling-edge triggered

a) When S1 designates input points X and the pulse output reaches the target number of
feedbacks in S2, the output will continue to operate with the last frequency until interrupts occur
on input points X.
b) When S1 designates high speed counters and the pulse output reaches the target number of
feedbacks in S2, the output will continue to operate with the last frequency until the feedback
pulses reache the target number.
c) S1 can be a high speed counter C or an input point X using an external interrupt. If S1 is C, the
DCNT instruction should be executed before enabling the high-speed counting function. If
input interrupts are used, the EI instruction with I0x0 should be enabled for external interrupts.

2. The range of S2 is -2,147,483,648 ~ +2,147,483,647 (+ / - indicates the positive / negative

rotation direction). the present value of the pulse output in CH0 (Y0, Y1) and CH1 (Y2, Y3)
increases in the positive direction and decreases in the negative direction. Registers storing
the present value of the pulse output are CH0(D1031 High, 1030 Low), CH1(D1337 High,
D1336 Low)

3. If S3 is less than 6Hz, the output will operate at 6Hz; if S3 is greater than 100kHz, the output
will operate at 100kHz.

4. D can only designate Y0 (Direction signal output: Y1) or Y2 (Direction signal output: Y3). The
direction signal output will be OFF only when the instruction is not being executed, i.e. the
completion of the pulse output will not reset Y1 or Y3.

5. D1340 and D1352 store the start/end frequencies of CH0 and CH1. Min. 6Hz, default: 100Hz.

6. D1343 and D1353 store the ramp up/down time of CH0 and CH1. If the ramp up/down time is
shorter than 20ms, ELC will operate in 20ms. Dafault: 100ms.
7. Ramp-down time of CH0 and CH1 can be specified by the setting (M1534, D1348) and (M1535,
D1349). When M1534 / M1535 is ON, ramp-down time of CH0 and CH1 is set with D1348 and
D1349.

8. D1131 and D1132 are the output/input ratio(%) of the close loop control in CH0 and CH1. K1
refers to 1 output pulse out of 100 feedback pulses; K200 refers to 200 output pulses out of

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-693
3. Instruction Set

the 100 feedback pulses. In the general percentage equation, the value set in D1131 and
D1132 represents numerators (output pulses, available range: K1 ~ K10,000) and the
denominator (the input feedbacks) is fixed at K100.
9. M1305 and M1306 can reverse the direction of CH0, CH1 pulse output. For example, when
direction signal output (Y1/Y3) is OFF, the pulse output will operate in positive direction. If
M1305/M1306 is set ON before the execution of this instruction, the pulse output will operate in
the reverse direction.
10. When S1 designates input points X with interrupt pointers, D1244 / D1255 can be used for
setting the idle time to limited the number of pulses, in case the interrupt is not properly
triggered.
11. DCLLM instruction supports the Alignment Mark and Mask function. The Points to note below
provide more details.

 Program Example3: Immediately stop the high-speed pulse output

with an external interrupt

1. X4 is used as the input for the external interrupt and I401 (rising-edge trigger) as the interrupt
pointer. Set the target number of feedbacks = 50,000; target frequency = 100kHz; pulse output
address: Y0, Y1 (CH0); start/end frequency (D1340) = 100Hz; ramp-up time (D1343) = 100ms;
ramp-down time (D1348) = 100ms; percentage value (D1131) = 100; present value of output
pulses (D1030, D1031) = 0.

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3. Instruction Set

EI
M1002
MOV K100 D1131

MOV K100 D1343

D1340

MOV K100 D1343

MOV K100 D1348

SET M1534

DMOV K0 D1030

M0
DCLLM X4 K50000 K100000 Y0

FEND

M1000
I401 INC D0

IRET

END

2. Execution result:

Frequency

X4 = OFF --> ON
100kHz
Y0 output stops

D1340
D1340
Time
Pulse number

D1343 D1348
Specified number of output pulses: 50,000

 Actual number of output pulses (D1030, D1031) = K51000

 Program Example 4: Immediate stop the high-speed pulse output

with a high speed counter

1. C243 is used with an AB-phase input from the encoder. Set the target number of feedbacks =
50,000; target frequency = 100kHz; pulse output addresses: Y0, Y1 (CH0); start/end
frequency (D1340) = 100Hz; ramp-up time (D1343) = 100ms; ramp-down time (D1348) =

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3. Instruction Set

100ms; percentage value (D1131) = 100; present value of output pulses (D1030, D1031) = 0..

EI
M1002
MOV K100 D1131

MOV K200 D1340

MOV K300 D1343

MOV K600 D1348

SET M1534

DMOV K0 D1030

DMOV K0 C243

M0
DCNT C243 K9999

DHSCS K50000 C243 I010

DCLLM C243 K50000 K100000 Y0

FEND

M1000
I010 INC D0

IRET

END


2. Assume the first execution results are below:

Frequency

100KHz C243 =K50000

Y0 stops output

D1340
Time
Pulse number

D1343 D1348 6s

Specified number of output pulses: 50,000

 Actual number of output pulses (D1030, D1031) = K50,600

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3. Instruction Set

3. Note the results of the first execution:

a) The actual output number 50,600 – specified output number 50,000 = 600

b) 600 x (1/100Hz) = 6s (idle time)

c) 6 seconds are too long. Therefore, increase the percentage value (D1131) to K101.

4. Obtain the results of the second execution:

Frequency

100KHz C243 =K50000

Y0 output stops

D1340
Time
Pulse number

D1343 D1348 600ms

Specified number of output pulses: 50,500

 Actual number of output pulses (D1030, D1031) = K50,560

5. Note the results of the second execution:

a) The actual output number 50,560 – specified output number 50,500 = 60

b) 60 x (1/100Hz) = 600ms (idle time)

c) 600ms is an appropriate value. Therefore, set the percentage value (D1131) to K101.

 Points to note:

1. ELC-PV, ELC2-PV Flag explanations:

 When On, CH0, CH1, CH2 and CH3 will send

pulses when encountering END instruction.
Off when the output starts.

 On when CH0 pulse output is complete.

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3. Instruction Set

 On when CH1 pulse output is complete.

 On when CH2 pulse output is complete.

 On when CH3 pulse output is complete.

 When On, CH0 pulse output will is in error

 When On, CH1 pulse output will is in error.

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3. Instruction Set

 When On, CH2 pulse output will is in error.

 When On, CH3 pulse output will is in error.

 CH0 pulse output indication flag

 CH1 pulse output indication flag

 CH2 pulse output indication flag

 CH3 pulse output indication flag

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-699
3. Instruction Set

 CH0 direction signal flag

 CH1 direction signal flag

 CH2 direction signal flag

 CH3 direction signal flag

 Deceleration time of CH0 setup flag (must be

used with D1348)

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3. Instruction Set

 Deceleration time of CH1 setup flag (must be

used with D1349)

 Deceleration time of CH2 setup flag (must be

used with D1350)

 Deceleration time of CH3 setup flag (must be

used with D1351)

2. ELC-PV, ELC2-PV Special register explanations:

 D11  Close loop

98: output/input ratio of
CH0 (default: K100)

 D11  Close loop

99: output/input ratio of
CH1 (default: K100)

 D14  Close loop

78: output/input ratio of
CH2 (default: K100)

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3. Instruction Set

 D14  Close loop

79: output/input ratio of
CH3 (default: K100)

 D12  Phase setting of CH0

20: (Y0, Y1): determined
by the last 2 digits of
D1220; other digits
are invalid.

1. K0: Y0 output

2. K1: Y0, Y1 AB-phase output; A ahead of B

3. K2: Y0, Y1 AB-phase output; B ahead of A

 D12  Phase setting of CH1

21: (Y2, Y3): determined
by the last 2 digits of
D1221; other digits
are invalid.

1. K0: Y2 output

2. K1: Y2, Y3 AB-phase output; A ahead of B

3. K2: Y2, Y3 AB-phase output; B ahead of A

 D12  Phase setting of CH2

29: (Y4, Y5): determined
by the last 2 digits of
D1229; other digits
are invalid.

1. K0: Y4 output

2. K1: Y4, Y5 AB-phase output; A ahead of B

3. K2: Y4, Y5 AB-phase output; B ahead of A

 D12  Phase setting of CH3

30: (Y6, Y7): determined
by the last 2 digits of
D1230; other digits
are invalid.

1. K0: Y6 output

2. K1: Y6, Y7 AB-phase output; A ahead of B

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3. Instruction Set

3. K2: Y6, Y7 AB-phase output; B ahead of A

 D12  Time difference

22: between the
direction signal and
the pulse output of
CH0

 D12  Time difference

23: between the
direction signal and
the pulse output of
CH1

 D13  Time difference

83: between the
direction signal and
the pulse output of
CH2

 D13  Time difference

84: between the
direction signal and
the pulse output of
CH3

 D13  Low word of the

36: current number of
output pulses of CH0

 D13  High word of the

37: current number of
output pulses of CH0

 D13  Low word of the

38: current number of
output pulses of CH1

 D13  High word of the

39: current number of
output pulses of CH1

 D13  Low word of the

75: current number of
output pulses of CH2

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3. Instruction Set

 D13  High word of the

76: current number of
output pulses of CH2

 D13  Low word of the

77: current number of
output pulses of CH3

 D13  High word of the

78: current number of
output pulses of CH3

 D13  Start/end frequency

40: settings for CH0
(default: K200)

 D13  Start/end frequency

52: settings for CH1
(default: K200)

 D13  Start/end frequency

79: settings for CH2
(default: K200)

 D13  Start/end frequency

80: settings for CH3
(default: K200)

 D13  Deceleration time of

48: CH0 pulse output
when M1534 = On
(default: K100)

 D13  Deceleration time of

49: CH1 pulse output
when M1535 = On
(default: K100)

 D13  Deceleration time of

50: CH2 pulse output
when M1536 = On
(default: K100)

 D13  Deceleration time of

51: CH3 pulse output

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3. Instruction Set

when M1537 = On
(default: K100)

 D13  Acceleration/decelera
43: tion time for CH0
pulse output (default:
K100)

 D13  Acceleration/decelera
53: tion time for CH1
pulse output (default:
K100)

 D13  Acceleration/decelera
81: tion time for CH2
pulse output (default:
K100)

 D13  Acceleration/decelera
82: tion time for CH3
pulse output (default:
K100)

3. ELCM-PH/PA, ELC2-PB/PH/PA/PE Flag explanations:

M1029 CH0 (Y0, Y1) pulse output execution complete.
M1102 CH1 (Y2, Y3) pulse output execution complete.
M1078 M1078 = ON, CH0 (Y0, Y1) pulse output pause (immediate)
M1104 M1104 = ON CH1 (Y2, Y3) pulse output pause (immediate)
M1108 CH0 (Y0, Y1) pulse output pause (ramp down). M1108 = ON during ramp down.
M1110 CH1 (Y2, Y3) pulse output pause (ramp down). M1110 = ON during ramp down.
M1156 Enabling the mask and alignment mark function on I400/I401(X4)
corresponding to Y0.
M1158 Enabling the mask and alignment mark function on I600/I601(X6)
corresponding to Y2.
M1538 Indicating pause status for CH0 (Y0, Y1).M1538 = ON when output paused.
M1540 Indicating pause status for CH1 (Y2, Y3). M1540 = ON when output paused
M1305 Reverse CH0 (Y0, Y1) pulse output direction. M1305 = ON, pulse output
direction is reversed.
M1306 Reverse CH1 (Y2, Y3) pulse output direction. M1306 = ON, pulse output
direction is reversed
M1347 Auto-reset CH0 (Y0, Y1) when high speed pulse output completed. M1347 will

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3. Instruction Set

be reset after CH0 (Y0, Y1) pulse output is completed.

M1524 Auto-reset CH1 (Y2, Y3) when high speed pulse output completed. M524 will be
reset after CH1 (Y2, Y3) pulse output is completed.
M1534 Enable ramp-down time setting on Y0. Must be used with D1348
M1535 Enable ramp-down time setting on Y2. Must be used with D1349

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4. ELCM-PH/PA, ELC2-PB/PH/PA/PE Special register explanations:

D1026: Pulse number for masking Y0 when M1156 = ON (Low word). The function is
disabled when set value≦0. (Default = 0 )
D1027: Pulse number for masking Y0 when M1156 = ON (High word). The function is
disabled when set value≦0. (Default = 0 )
D1135: Pulse number for masking Y2 when M1156 = ON (Low word). The function is
disabled when set value≦0. (Default = 0 )
D1136: Pulse number for masking Y2 when M1156 = ON (High word). The function is
disabled when set value≦0. (Default = 0 )
D1030: Low word of the present value for CH0 (Y0, Y1) pulse output
D1031: High word of the present value for CH0 (Y0, Y1) pulse output
Input/output percentage value for CH0 (Y0, Y1) close loop control. Default:
D1131:
K100
Input/output percentage value for CH1 (Y2, Y3) close loop control. Default:
D1132:
K100
Idle time (pulse number) setting for CH0 (Y0, Y1) The function is disabled if set
D1244:
value≦0.
Idle time (pulse number) setting for CH2 (Y2, Y3) The function is disabled if set
D1245:
value≦0.
D1336: Low word of the present value for CH1 (Y2, Y3) pulse output
D1337: High word of the present value for CH1 (Y2, Y3) pulse output
Start/end frequency of the 1st group of pulse outputs CH0 (Y0, Y1). Default:
D1340:
K100
Start/end frequency of the 2st group of pulse outputs CH1 (Y2, Y3). Default:
D1352:
K100
Ramp up/down time of the 1st group of pulse outputs CH0 (Y0, Y1). Default:
D1343:
K100
Ramp up/down time of the 2nd group of pulse outputs CH1 (Y2, Y3). Default:
D1353:
K100
D1348: CH0(Y0, Y1) pulse output. When M1534 = ON, D1348 stores the ramp-down
time. Default: K100
D1349: d) CH1(Y2, Y3) pulse output. When M1535 = ON, D1349 stores the
ramp-down time. Default: K100

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3. Instruction Set

API Mnemonic Operands Function

198 D VSPO S1, S2, S3, D Variable Speed Pulse Output
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DVSPO: 17 steps
S1 *
S2 * * *
S3 * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

 S1: Target frequency of the output S2: Target number of pulses

S3: Gap time and gap frequency D: Pulse output address (Y0,
Y2)

 Description:
1. The Maximum frequency for S1 is 100kHz. The target frequency can be modified during the
execution of the instruction. If S1 is modified, VSPO will ramp up/down to the target frequency
according to the gap time and gap frequency set in S3.
2. S2, target number of pulses is valid only when the instruction is executed the first time. S2 can
NOT be modified during the execution of the instruction. S2 can be a negative value, however,
if the output direction is not specified in D1220/D1221, the ELC will assume this value is a
positive value.
3. S3 occupies 2 consecutive 16-bit registers. S3+0 stores the gap frequency S3+1 stores the gap
time. These parameters can be modified during the execution of the instruction. The range for
S3+0: 6Hz ~ 32767Hz; the range for S3+0: 5ms ~ 80ms. If the value exceeds the available
range, the ELC will use the upper or lower limits.
4. D, the pulse output address supports only Y0 and Y2. If Y1 and Y3 are required for output
direction control, D1220 or D1221 must be set to K1(Pulse/Dir).
5. Parameters set in S3 can only be modified when the value in S1. is modified accordingly. When
the target frequency is set to 0, the ELC will ramp down to a stop based on the parameters set
in S3. When the output is stopped, the ELC will enable the flags indicating pause status (Y0:
M1538, Y2: M1540). If the target frequency is other than 0, the pulse output will ramp up to the
target frequency and operates untill the target number of pulses are complete..

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3. Instruction Set

Function description:

Pulse output diagram:

Freq.
t2

t1
t3
Time
Pulse number

g1 g2 g3

1. Definitions:
t1  target frequency of 1st shift
t2  target frequency of 2nd shift
rd
t3  target frequency of 3 shift
g1  ramp-up time of 1st shift
g2  ramp-up time of 2nd shift
g3  ramp-down time of 3rd shift
S2  total output pulses
2. Explanations on each shift:
 1st shift:
Assume t1 = 6kHz, gap freqency = 1kHz, gap time = 10ms
st
Ramp-up steps of 1 shift:
Freq.

t1=6kHz

1kHz

0Hz Time
10ms 10ms 10ms 10ms 10ms

g1=50ms
nd
 2 shift:
Assume t2 = 11kHz, internal frequency = 2kHz, gap time = 20ms
Ramp-up steps of 2nd shift:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-709
3. Instruction Set

Freq.

t2=11kHz
1kHz

2kHz

2kHz
t1=6kHz

Time
20ms 20ms 20ms

g2=40ms

 3rd shift:
Assume t3 = 3kHz, gap frequency = 2kHz, gap time = 20ms
Ramp-down steps of 3rd shift:
Freq.
Change to t3

t2=11kHz
2kHz

t3=3kHz

Time
20ms 20ms 20ms 20ms

g3=60ms
Start to change

 For program examples please refer to API 199

 Points to note:

 Flag explanations:
M1029: CH0 (Y0, Y1) pulse output execution complete
M1102: CH1 (Y2, Y3) pulse output execution complete
M1078: Y0 pulse output pause (immediate)
M1104: Y2 pulse output pause (immediate)
M1305: Reverse Y1 pulse output direction for the high speed pulse output instructions
M1306: Reverse Y3 pulse output direction for the high speed pulse output instructions
M1538: Indicating pause status of Y0
M1540: Indicating pause status of Y2

 Special register descriptions:

D1030: Low word of the present value of Y0 pulse output

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3. Instruction Set

D1031: High word of the present value of Y0 pulse output

D1336: Low word of the present value of Y2 pulse output
D1337: High word of the present value of Y2 pulse output
D1220: Pulse output mode setting of CH0 (Y0, Y1). Please refer to PLSY instruction.
D1221: Pulse output mode setting of CH1 (Y2, Y3). Please refer to PLSY instruction

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3 - 7 11
3. Instruction Set

API Mnemonic Operands Function

199 D ICF S1, S2, D Immediately Change Frequency
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F DVSPO: 13 steps
S1 *
S2 * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

 S1: Target frequency to be changed S2: Gap time and gap

frequency D: Pulse output address (Y0, Y2)

 Description:
1. Max frequency for S1: 100kHz. When the ICF instruction executes, it will immediately start to
change the frequency with the ramp-up/down process.
2. The ICF instruction must be executed after the execution of DVSPO or DPLSY instructions.
When this instruction is used together with the DVSPO instruction, operands S1, S2, D of the
DICF instruction must be assigned the same addresses S1, S3, D as DVSPO. When the
instruction is used with DPLSY, operands S1 and D must be assigned the same addresses as
S1 and D of DPLSY.
3. If the ICF instruction is used with the DPLSY instruction, operand S2 is invalid.
4. When the ICF instruction is used with the DVSPO instruction, parameter S2 functions the same
as S3 in the DVSPO instruction, specifying the gap time and gap frequency of the ramp-up/down
process.
5. D, the pulse output address supports only Y0 and Y2.
6. It is recommended that the instruction be applied in an interrupt subroutine to obtain a better
response time and more accurate execution...
7. For associated flags and registers, please refer to Points to note for the API 198 DVSPO
instruction.

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2003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m
3. Instruction Set

Function Description:
1. If the target frequency is changed by using the DVSPO instruction, the timing change will be
delayed due to the program scan time and the gap time as shown below.

Change target freq.

Actual timing of changing
Freq.
Gap freq.

Time
Gap Gap
time time

Delayed by program scan cycle

2. If the target frequency is changed with the DICF instruction in an interrupt subroutine, the
change will be executed immediately with an approximate delay of 10us (the execution time of
the DICF instruction).
The timing diagram is as below:
Interrupt
Actual timing of changing
Freq.
Gap freq.

Time
Gap Gap
time time

approx.10us

Program Example:
1. When M0 = ON, pulse output ramps up to 100kHz. Total shifts: 100, Gap frequency: 1000Hz,
Gap time: 10ms. Calculation of total shifts: (100,000 ﹣0) ÷ 1000 = 100.
2. When the X6 external interrupt executes, the target frequency is changed and is ramped down
to 50kHz immediately. Total shifts: 150, Gap frequency: 800Hz, Gap time: 20ms. Calculation of
total shifts: (100,000 ﹣50,000) ÷ 800 = 125
3. When the X7 external interrupt executes, the target frequency is changed and is ramped down
to 100Hz immediately. Total shifts: 25, Gap frequency: 2000Hz, Gap time: 100ms. Calculation of
total shifts: (50,000 ﹣100) ÷ 2000 = 25.
4. When the pulse output reaches 100Hz, the frequency is kept constant and the pulse output
stops when 1,000,000 pulses are completed.

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-713
3. Instruction Set

1000Hz

800Hz
10ms
Freq.(Hz)

100KHz 20ms

2000Hz
50KHz

100ms
100Hz
Time(ms)

M0=ON X6=ON X7=ON

1,000,000pulse

EI
M0
DMOVP K100000 D500

MOV K1000 D502

MOV K10 D503

DVSPO D500 K1000000 D502 Y0

FEND
M1000
I601 DMOV K50000 D500

MOV K800 D502

MOV K20 D503

DICF D500 D502 Y0

IRET
M1000
I701 DMOV K0 D500

MOV K2000 D502

MOV K100 D503

DICF D500 D502 Y0

IRET

END

API Mnemonic Operands Function

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4003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m
3. Instruction Set

202 SCA L P S1, S2, S3, D Calculation of Proportional Value

Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F SCAL,SCLAP: 9 steps
S1 * * *
S2 * * *
S3 * * *
D *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Source value S2: Slope. The units of S2 are 0.001 S3: Offset D: Destination address
The range for operands S1, S2, S3 is -32767~32767.

Description:
60. Equation: D = (S1 × S2 )÷1000+ S3
61. The values for S2 and S3 must be calculated using the slope and offset equations below with
decimal rounding to get 16-bit integer values.
62. Slope equation: S2 = [(Max. destination value – Min. destination value)÷(Max. source value –
Min. source value)] ×1000
63. Offset equation: S3 =Min. destination value – (Min. source value × (S2÷1000))
64. The output curve is as follow:
Destination value

Max. Destination value

Source value
Min. 1 Max.
source value source value

Min. destination value

Program Example 1:
65. S1 is 500, S2 is 168 and S3 is –4. When X0=On, SCAL instruction executes and the scaled
value is stored in D0.
66. Equation：D0 = (500 × 168 )÷1000+ (-4)=80

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 3-715
3. Instruction Set

X0
SCAL K500 K168 K-4 D0

Destination value

D
Slope=168
Offset=-4

Source value
0 1=500

Program Example 2:
67. S1 is 500, S2 is –168 and S3 is 534. When X10=On, the SCAL instruction executes and the
scaled value is stored in D10.
68. Equation：D10 = (500 × -168 )÷1000+ 534=450
X10
SCAL K500 K-168 K534 D10

Destination value

D
Slope=-168
Offset=534

Source value
0 S 1=500

Points to notes:
69. If you do not wish to calculate the slope and offset, use the SCLP instruction.
70. When using the slope equation, the user must be aware that the Max. source value must be
larger than the Min. source value. The Max. destination value does not need to be larger than
the Min. destination value.
71. If D > 32,767, D =32,767. If D < -32,768, D =-32,768.
72. In ELCB-PB, ELC-PA, SCAL instruction support ELCB-PB V1.4(above) and ELC-PA
V1.4(above).

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3. Instruction Set

API Mnemonic Operands Function

203 D SCLP P S 1 , S2 , D Calculation of Parameter Proportional Value

Type Bit Devices Word devices Program Steps

OP X Y M S K H KnX KnY KnM KnS T C D E F SCLP, SCLPP: 9 steps
S1 * * *
DSCLP, DSCLPP: 13
S2 *
D * steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:

S1: Source value S2: Parameters D: Destination address

Description:
73. S2 Parameter settings for the 16-bit SCLP instruction are as follows

Device No. Parameter Range

S2 Max. source value -32768~32767

S2+1 Min. source value -32768~32767

S2+2 Max. destination value -32768~32767

S2+3 Min. destination value -32768~32767

74. For the 16-bit instruction, operand S2 will use 4 continuous registers.
75. S2 Parameter settings for the 32-bit SCLP instruction are as follows

Range
Device No. Parameter
Integer Floating point number

S2、S2+1 Max. source value

S2+2、3 Min. source value Range of 32-bit floating

-2,147,483,648~2,147,483,647
S2+4、5 Max. destination value point number

S2+6、7 Min. destination value

4. For the 32-bit instruction, operand S2 will use 8 continuous registers.
5. Equation used for scaling by this instruction is D = [(S1 – Min. source value) × (Max.
destination value – Min. destination value)] ÷ (Max. source value – Min. source value) + Min.
destination value
6. Equation of source value and destination value:

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-717
3. Instruction Set

y=kx+b, y=Destination value (D) , k=slope=(Max. destination value – Min. destination value)÷
(Max. source value – Min. source value) , x=Source value (S1) , b=offset=Min. destination
value – Min. source value × slope
7. If S1 > Max. source value, S1 = Max. source value. If S1 < Min. source value, S1 = Min. source
value. When the input value and parameters are set, the output curve is shown below:

Destination value

Max. Destination value

Source value
Min. 1 Max.
source value source value

Min. destination value

Program Example 1:
8. S1 is 500, the Max. source value is D0=3000, the Min. source value is D1=200, the Max.
destination value is D2=500, and the Min. destination value is D3=30. When X0=On, the SCLP
instruction executes and the scaled value is stored in D10.
9. Equation: D10 = [(500 –200) × (500–30)] ÷(3000–200) +30=80.35. Rounding off the result
into an integer, D10 =80.

X0
MOV K3000 D0

MOV K200 D1

MOV K500 D2

MOV K30 D3

X0
SCLP K500 D0 D10

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3. Instruction Set

Destination value

=500

=30
S1=500
Source value
0

Program Example 2:
10. S1 is 500, the Max. source value is D0=3000, the Min. source value is D1=200, the Max.
destination value is D2=30 and Min. destination value is D3=500. When X0=On, the SCLP
instruction executes and the scaled value is stored in D10.
11. Equation: D10 = [(500 –200) × (30–500)] ÷(3000–200) +500=449.64. Rounding off the result
into an integer, D10 =450.

X0
MOV K3000 D0

MOV K200 D1

MOV K30 D2

MOV K500 D3

X0
SCLP K500 D0 D10

Destination value

=500
D

=30
S1=500
Source value
0

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3. Instruction Set

Program Example 3:
12. The source value S1 is D100=F500, the Max. source value is D0=F3000, the Min. source value
is D2=F200, the Max. destination value is D4=F500 and the Min. destination value is D6=F30.
When X0=On, SET M1162 which means the DSCLP instruction will assume floating point
values. The scaled value will be stored in D10.
13. Equation: D10 = [(F500 –F200) × (F500–F30)] ÷(F3000–F200) +F30=F80.35. Rounding off
the result into an integer, D10 =F80.
X0
SET M1162

DMOVR F500 D100

DMOVR F3000 D0

DMOVR F200 D2

DMOVR F500 D4

DMOVR F30 D6

X0
DSCLP D100 D0 D10

Points to note:
14. The range for the 16-bit operand S1: Max. source value ≧ S1 ≧ Min. source value.
-32768~32767. If the value exceeds a boundary value, use the boundary value for the
calculation.
15. The range for the 32-bit integer operand S1: Max. source value≧S1≧Min. source value.
-2,147,483,648~2,147,483,647. If the value exceeds a boundary value, use the boundary
value for the calculation.
16. The range for 32-bit floating point operand S1: Max. source value≧S1≧Min. source value,
according to the range of 32-bit floating point number. If the value exceeds a boundary value,
use the boundary value for the calculation.
17. The Max. source value should be larger than Min. source value. The Max. destination value
does not need to be larger than Min. destination value.
18. In ELCB-PB, ELC-PA, SCLP instruction supports version 1.4 (and above).

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3. Instruction Set

API Mnemonic Operands Function

205 CMPT P S1, S2, n, D Compare Table
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F CMPT: 9 steps
S1 * * *
S2 * * * CMPTP: 9 steps
n * * *
D * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Source address 1 S2: Source address 2 n: Data length (n = 1~16) D: Destination
address

Description:
19. S1 and S2 can be T/C/D addresses. For Counters, only 16-bit addresses are applicable
(C0~C199).
20. In ELCM-PH/PA, DCMPT instruction supports ELCM-PH/PAV2.0.
21. The value in the high 16 bits of n used in the 32-bit instruction is an invalid value.
22. The value in the low 8 bits of n indicates the data length. For the 16-bit instruction, n is 1 ~ 16.
For the 32-bit instruction, n is 1 ~ 32. If n< 1, then n = 1. If n >maximum value, then n =
maximum value.
23. The 16-bit data is written into D. If the data length is less than 16 bits, the bit which does not
have a corresponding value is 0. For example, if n is K8, bit0~7 have corresponding values,
and bit8~15 are 0.
24. The value in the high 8 bits of n indicates the comparison condition. The relation between the
comparison conditions and the values are shown in the following table.

Value K0 K1 K2 K3 K4

Comparison condition S1 = S2 S1 < S2 S1 <= S2 S1 > S2 S1 >= S2

25. The example of setting n: If n used in the 16-bit instruction is H0108, eight pieces of data are
compared with eight pieces of data in terms of “larger than”. If n used in the 32-bit instruction is
H00000320, 32 pieces of data are compared with 32 pieces of data in terms of “less than”.
26. If the setting value of the comparison condition exceeds the range, or the firmware version
does not support the comparison condition, the default comparion condition “equal to” is
executed. ELCM-PH/PA V1.0(below), ELC-PV don’t support the setting of the comparison
condition.
27. The 16-bit comparison values used in the 16-bit instruction are signed values. The comparison
values used in the 32-bit instruction are 32-bit signed values (M1162=OFF), or floating-point
numbers (M1162=ON).

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3. Instruction Set

28. The 16-bit data or 32-bit data is written into D. If the data length is less than 16 bits or 32 bits,
the bit which does not have a corresponding value is 0. For example, if n is K8, bit0~7 have
corresponding values, and bit8~bit15 or bit8~bit31 are 0.
29. If the comparison result meets the comparison condition, the corresponding bit is 1. If the
comparison result does not meet the comparison condition, the corresponding bit is 0..

Program example:

When M0 = ON, compare the 16-bit values in D0~D7 with those in D20~D27 and store the result in
D100.

M0
CMPT D0 D20 K8 D100

 Contents of D0~D7:
No. D0 D1 D2 D3 D4 D5 D6 D7
Value K10 K20 K30 K40 K50 K60 K70 K80

 Contents of D20~D27:
No. D20 D21 D22 D23 D24 D25 D26 D27
Value K12 K20 K33 K44 K50 K66 K70 K88

 After the execution of the CMPT instruction, the associated bit will be 1 if two devices
have the same value, and 0 for those that are not equal. Therefore the results in D100 will
be as below:
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Bit8~15
D100 0 1 0 0 1 0 1 0 0…0
H0052 (K82)

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3. Instruction Set

API Mnemonic Operands Function

207 CSFO S, S1, D Catch Speed and Proportional Output
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F CSFO: 7 steps
S1 *
S2 *
S *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Source address of the signal input (Only X0~X3 are available) S1: Sample time setting and
the input speed information D: Output proportion setting and output speed information

Description:
1. When S specifies X0, the ELC only uses the X0 input point and its associated high speed
pulse output: Y0. When S specifies X1, the ELC uses X0 (A phase) and X1 (B phase) input
points and their associated outputs: Y0 (Pulse) / Y1 (Dir). When S specifies X2, the ELC only
uses the X2 input point and its associated high speed pulse output: Y2. When S specifies X3,
the ELC uses X2 (A phase) and X3 (B phase) input points and their associated outputs: Y2
(Pulse) / Y3 (Dir). ELC2-PV only supported X0 and X1 inputs and their associated Y0/Y1
output.
2. The execution of CSFO requires a hardware high speed counter function as well as the high
speed output function. Therefore, when program scans the CSFO instruction with high speed
counter input points (X0, X1) or (X2, X3) enabled by with the DCNT instruction, or high speed
pulse outputs (Y0, Y1) or (Y2, Y3) enabled by some other high speed output instructions, the
CSFO instruction will not be activated.
3. If S specifies X1 / X3 with 2-phase 2 inputs, the counting mode is fixed at 4-times frequency.
4. During the pulse output process of Y0 or Y2, special registers (D1031, D1330 / D1337, D1336)
for storing the current number of output pulses will be updated when program scans the
instruction.
5. S1 occupies 4 consecutive 16-bit registers. S1 +0 specifies the sample time, i.e. when S1 +0
uses K1, the ELC catches the speed every time when 1 pulse is sent. Valid range for S1 +0 in
1-phase 1-input mode: K1~K100, and in 2-phase 2-input mode: K2~K100. If the specified
value exceeds the valid range, the ELC will take the lower/upper limit value as the set value.
Sample time can be changed during ELC operation, however the modified value will not take
effect until the instruction is scanned. S1+1 indicates the latest speed sampled by the ELC
(Read-only). Units: 1Hz. Valid range: 10kHz. S1+2 and S1+3 indicate the accumulated value
of pulses as a 32-bit value (Read-only).

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-723
3. Instruction Set

6. S1 +0 specifies the sample time. The value of the sample time is recommended to be larger
when the input speed increases, so as to achieve a higher accuracy for trapping the speed.
For example, set S1 +0 to K1 for the speed range 1Hz~1KHz, K10 for the speed range
10Hz~10KHz, K100 for the speed range 100Hz~10KHz.
7. D occupies 3 consecutive 16-bit registers. D +0 specifies the output proportional value. Valid
range: K1 (1%) ~ K10000 (10000%). If the specified value exceeds the valid range, the ELC
will take the lower/upper bound value as the set value. Output proportion can be changed
during ELC operation, however the modified value will not take effect until the next time the
program scans the instruction. D+2 and D+1 indicates the output speed as a 32-bit value.
Units: 1Hz. Valid range: 100kHz.
8. The speed sampled by the ELC will be multiplied with the output proportional value D+0, then
the ELC will generate the actual output speed. The ELC will take the integer of the calculated
value, i.e. if the calculated result is smaller than 1Hz, the ELC will output 0Hz. For example,
input speed: 10Hz, output proportion: K5 (5%), then the calculation result will be 10 x 0.05 =
0.5Hz. The Pulse output will be 0Hz; if output proportion is changed to K15 (15%), then the
calculation result will be 10 x 0.15 = 1.5Hz. Pulse output will be 1Hz.

Program Example:
1. If D0 is set to K2 and D10 is set to K100:

When the sampled speed is on (X0, X1) is +10Hz (D1 = K10), (Y0, Y1) pulses will be sent at
+10Hz (D12, D11 = K10); When the sampled speed is -10Hz (D1 = K-10), (Y0, Y1) pulses will
be sent at -10Hz (D12, D11 = K-10)
2. If D0 is set to K2 and D10 is set to K1000:

When the sampled speed is on (X0, X1) is +10Hz (D1 = K10), (Y0, Y1) will output pulses with
+100Hz (D12, D11 = K100); When the sampled speed is -100Hz (D1 = K-100), (Y0, Y1) pulses
will be sent at -100Hz (D12, D11 = K-100)
3. If D0 is set to K10 and D10 is set to K10:

When the sampled speed is on (X0, X1) is +10Hz (D1 = K10), (Y0, Y1) will output pulses with
+1Hz (D12, D11 = K1); When the sampled speed is -10Hz (D1 = K-10), (Y0, Y1) pulses will be
sent at -1Hz (D12, D11 = K-1)
M0
CSF O X1 D0 D10

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3. Instruction Set

API Mnemonic Operands Function

215~
D LD# S1, S2 Logic Contact Operation
217
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F LD#: 5 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DLD#: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2

Description:
30. Compare the contents of S1 and S2. For example, “LD&” a logical AND of S1 and S2, if the
comparison result is NOT 0, the instruction is true, and if it is 0, the instruction is false.
31. This instruction must be the first instruction of a rung.
16 -bit 32 -bit Instruction is Instruction is
API No.
instruction instruction true false

215 LD& DLD& S1 & S2≠0 S1 & S2=0

216 LD| DLD| S1 | S2≠0 S1 | S2=0

217 LD^ DLD^ S1 ^ S2≠0 S1 ^ S2=0

32. Operators: & : Logical “AND” operation, | : Logical “OR” operation, ^ : Logical “XOR” operation
33. If a 32-bit length counter is used with this instruction, be sure to use the 32-bit instruction
(DLD#). If the 16-bit instruction (LD#) is used with a 32-bit counter, a “Program Error”, will
occur and the red “ERROR” indicator on the ELC will blink.

Program Example:
34. The LD& (Logical “AND” operation) instruction is used to compare the contents of C0 and C10.
If the result is not equal to 0, Y20=ON.
35. Tthe LD| (Logical “OR” operation) instruction is used to compare the contents of D200 and
D300. If the result is not equal to 0 and X1=ON, set Y21=ON.

LD & C0 C10 Y20

X1
LD | D200 D300 SET Y21

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-725
3. Instruction Set

API Mnemonic Operands Function

218~
D AND# S1, S2 Series Logic Contact Operation
220
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F AND#: 5 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DAND#: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2

Description:
36. Compare the contents of S1 and of S2. For example, “AND&” compares S1 and of S2 , and if the
comparison result is NOT 0, the instruction is true, and if it is 0, the instruction is false.
37. The AND# instruction is an input instruction.
16 -bit 32 -bit Instruction is Instruction is
API No.
instruction instruction true false
218 AND& DAND& S1 & S2≠0 S1 & S2=0
219 AND| DAND| S1 | S2≠0 S1 | S2=0
220 AND^ DAND^ S1 ^ S2≠0 S1 ^ S2=0
38. Operators:
& : Logical “AND” operation, | : Logical “OR” operation, ^ : Logical “XOR” operation
39. If a 32-bit counter is used with this instruction, be sure to use the 32-bit instruction (DAND#). If
the 16-bit instruction (AND#) is used for a 32-bit counter, a “Program Error”, will occur and the
red “ERROR” indicator on the ELC panel will blink.

Program Example:
40. When X0=ON, using the AND& (Logical “AND” operation) instruction to compare the contents
of C0 and C10. If the result is not equal to 0, Y20=ON.
41. When X1=OFF, using the AND| (Logical “OR” operation) instruction to compare the contents
of D10 and D0. If the result is not equal to 0, set Y21=ON.

X0
AND & C0 C10 Y20
X1
AND | D10 D0 SET Y21

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3. Instruction Set

API Mnemonic Operands Function

221~ OR#
D S1, S2 Parallel Logic Contact Operation
223
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F OR#: 5 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DOR#: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2

Description:
42. Compare the contents of S1 and S2. For example”OR&” compares S1 and S2, if the comparison
result is NOT 0, the instruction is true, and if it is 0, the instruction is false.
43. The OR# instruction is an input instruction.
16 -bit 32 -bit Instruction is Instruction is
API No.
instruction instruction true false
221 OR& DOR& S1 & S2≠0 S1 & S2=0
222 OR| DOR| S1 | S2≠0 S1 | S2=0
223 OR^ DOR^ S1 ^ S2≠0 S1 ^ S2=0
44. Operators:
& : Logical “AND” operation, | : Logical “OR” operation, ^ : Logical “XOR” operation
45. If a 32-bit counter is used with this instruction for comparison, be sure to use the 32-bit
instruction (DOR#). If the 16-bit instruction (OR#) for a 32-bit counter is used, a “Program
Error”, will occur and the red “ERROR” indicator on the ELC panel will blink.

Program Example:

If both X2 and M30 are “ON”, or when using the OR| (Logic “OR” operation) instruction to compare
the contents of D10 and D20 and the result is not equal to 0, or when using the OR^ (Logic “XOR”
operation) instruction to compare the contents of D100 and D200 and the result is not equal to 0,
M60=ON.
X2 M30
M60

OR | D10 D20

OR ^ D100 D200

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-727
3. Instruction Set

API Mnemonic Operands Function

224~ LD*
D S1, S2 Contact Comparison
230
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F LD*: 5 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DLD*: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2

Description:
46. Compare the S1 and S2. For example, “LD=” compares S1 and S2, and if the comparison result
is “=”, the instruction is true. If they are not “=” the instruction is false.
47. This instruction must be the first instruction of a rung.
16 -bit 32 -bit Instruction is Instruction is
API No.
instruction instruction true false
224 LD＝ DLD＝ S1＝S2 S1≠S2
225 LD＞ DLD＞ S1＞S2 S1≦S2
226 LD＜ DLD＜ S1＜S2 S1≧S2
228 LD＜＞ DLD＜＞ S1≠S2 S1＝S2
229 LD＜＝ DLD＜＝ S1≦S2 S1＞S2
230 LD＞＝ DLD＞＝ S1≧S2 S1＜S2
48. If a 32-bit counter is used with this instruction for comparison, be sure to use the 32-bit
instruction (DLD*). If the 16-bit instruction (LD*) is used with a 32-bit counter, a “Program
Error”, will occur and the red “ERROR” indicator on the ELC panel will blink.

Program Example:
49. If the accumulated value of counter C10 is equal to K200, Y20=ON.
50. When the content of D200 is less than or equal to K–30, and X1=ON, set Y21=ON.

LD= K200 C10 Y20

X1
LD<= D200 K-30 SET Y21

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3. Instruction Set

API Mnemonic Operands Function

232~
D AND* S1, S2 Series Contact Comparison
238
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F AND*: 5 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DAND*: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2

Description:
51. Compare the contents of S1 and of S2. For example, “AND=”,compares S1 and of S2 and if the
comparison result is “=” , the instruction is true, and if it is “≠” , the instruction is false.
52. The AND* instruction is an input instruction
16 -bit 32 -bit Instruction is Instruction is
API No.
instruction instruction true false
232 AND＝ DAND＝ S1＝S2 S1≠S2
233 AND＞ DAND＞ S1＞S2 S1≦S2
234 AND＜ DAND＜ S1＜S2 S1≧S2
236 AND＜＞ DAND＜＞ S1≠S2 S1＝S2
237 AND＜＝ DAND＜＝ S1≦S2 S1＞S2
238 AND＞＝ DAND＞＝ S1≧S2 S1＜S2
53. If a 32-bit counter is used with this instruction for comparison, be sure to use the 32-bit
instruction (DAND*). If the 16-bit instruction (AND*) is used with a 32-bit counter, a “Program
Error”, will occur and the red “ERROR” indicator on the ELC panel will blink.

Program Example:
54. If X0=ON and the accumulated value of counter C10 equals K200, Y20=ON.
55. If X1=OFF and the contents of register D0 is not equal to K–10, set Y21=ON.
X0
AND= K200 C10 Y20

X1
AND<> K-10 D0 SET Y21

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-729
3. Instruction Set

API Mnemonic Operands Function

240~
D OR* S1, S2 Parallel Contact Comparison
246
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F OR*: 5 steps
S1 * * * * * * * * * * *
S2 * * * * * * * * * * * DOR*: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2

Description:
56. Compare the contents of S1 and of S2. For example “OR=” compares S1 and of S2 ,and if the
comparison result is “=”, the instruction is true, and if it is “≠”, the instruction is false.
57. The OR*instruction is an input instruction
16-bit 32-bit Instruction is Instruction is
API No.
instruction instruction true false
240 OR＝ DOR＝ S1＝S2 S1≠S2
241 OR＞ DOR＞ S1＞S2 S1≦S2
242 OR＜ DOR＜ S1＜S2 S1≧S2
244 OR＜＞ DOR＜＞ S1≠S2 S1＝S2
245 OR＜＝ DOR＜＝ S1≦S2 S1＞S2
246 OR＞＝ DOR＞＝ S1≧S2 S1＜S2
58. When the left most bit, MSB (the 16-bit instruction: b15, the 32-bit instruction: b31), from S1
and S2 is 1, this comparison value will be viewed as a negative value for comparison.
59. If the 32-bit length counter (C200~) is used with this instruction for comparison, be sure to use
the 32-bit instruction (DOR*). If the 16-bit instruction (OR*) is used, a “Program Error”, will
occur and the red “ERROR” indicator on the ELC panel will blink.

Program Example:
If both X2 and M30 are “ON”, or if the contents of the 32-bit registers D101 and D100 are greater or
equal to K100,000, M60=ON.

X2 M30
M60

DOR>= D100 K100000

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3. Instruction Set

API Mnemonic Operands Function

258 ATMR S1, S2 Contact type timer
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F ATMR: 5 steps
S1 *
S2 * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Timer number (T0~T255) S2: Setting value。

Description:
60. S2: Setting value is K0~K32767
61. In ELCM-PH/PA, ATMR instruction supports ELCM-PH/PA V2.0(above).
62. When the instruction ATMR is executed, the coil of the timer specified is driven. When the
timer value is equal to the setting value, the state of the normally-open contact is On, and the
normally-closed contact is Off.
Normally-open contact On
Normally-closed contact Off

Program Example:
When the normally-open contact X0 is On, the timer T5 begins to measure time intervals. If the timer
value is larger than or equal to K1000, the normally-open contact Y0 will be On.
Ladder diagram (The instruction TMR is used.)
X0
TMR T5 K1000

T5
Y0

Ladder diagram (The instruction ATMR is used.)

X0
ATMR T5 K1000 Y0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-731
3. Instruction Set

API Mnemonic Operands Function

266 D BOUT D, n Output Specified Bit of a Word
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BOUT: 5 steps
D * * * * * *
n * * * * * * * * * * * DBOUT: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Destination output address n: Address specifying the output bit

Description:
63. Available range for the value in operand n: K0~K15 for the 16-bit instruction; K0~K31 for the
32-bit instruction.
64. The BOUT instruction turns an output on/off based on the value in n.
65. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).

Status of Coils and Associated Contacts:

BOUT instruction
Evaluation result Associated Contacts
Coil
NO contact（normally open） NC contact（normally closed）
FALSE OFF Current blocked Current flows
TRUE ON Current flows Current blocked

Program Example:
X0 X1 Instruction: Operation:
BOUT K4Y0 D0
LDI X0 ; Load NC contact X0
AND X1 ; Connect NO contact
X1 in series.
BOUT K4Y0 D0 ; When D0 = k1,
executes output on Y1
; When D0 = k2,
executes output on Y2

In the program above, the outputs Y0-Y7 and Y10-Y17 are turned on and off based on the value in
D0. If D0=0, Y0 turns on. If D0=1, output Y1 turns on and so on.

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3. Instruction Set

API Mnemonic Operands Function

267 D BSET D, n Set ON Specified Bit of a Word
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BSET: 5 steps
D * * * * * *
n * * * * * * * * * * * DBSET: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Destination address to be Set ON n: Value specifying the bit to be Set ON

Description:
66. Available range for the value in operand n: K0~K15 for the 16-bit instruction; K0~K31 for the
32-bit instruction.
67. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).
68. When the BSET instruction executes, the output device specified by operand n will be turned
ON and latched. To reset the ON state of the device, BRST instruction is required.

Program Example:
X0 X1 Instruction: Operation:
BSET K4Y0 D0
LDI X0 ; Load NC contact X0
AND X1 ; Connect NO contact
X1 in series.

BSET K4Y0 D0 ; When D0 = k1,

Y1 is ON and latched
; When D0 = k2,
Y2 = ON and latched

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-733
3. Instruction Set

API Mnemonic Operands Function

268 D BRST D, n Reset Specified Bit of a Word
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BRST: 5 steps
D * * * * * *
n * * * * * * * * * * * DBRST: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
D: Destination address to be reset n: Value specifying the bit to be reset

Description:
69. Available range for the value in operand n: K0~K15 for the 16-bit instruction; K0~K31 for the
32-bit instruction.
70. When the BRST instruction executes, the output device specified by operand n will be reset
(OFF).
71. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).

Program Example:
X0 Instruction: Operation:
BRST K4Y0 D0
LD X0 ; Load NO contact X0

BRST K4Y0 D0 ; When D0 = k1, Y1 is

reset
; When D0 = k2, Y2 is
reset

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3. Instruction Set

API Mnemonic Operands Function

269 D BLD S, n Load NO Contact by Specified Bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BLD: 5 steps
S * * * * * *
n * * * * * * * * * * * DBLD: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Reference source address n: Reference bit address

Description:
72. Available range for the value in operand n: K0~K15 for the 16-bit instruction; K0~K31 for the
32-bit instruction.
73. The BLD instruction is used to evaluate the state of a bit in D0 and if that bit is ON in the
program below, the instruction will be true. If it’s OFF, the instruction will be false. n specifies
the bit in S. If bit 3 in D0 is a 1 in the program below, the instruction is true and output Y0 will
be energized..
74. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).

Program Example:
Instruction: Operation:
BLD D0 K3 Y0
; Load NO contact with bit
BLD D0 K3
status of bit3 in D0
OUT Y0 ; Drive coil Y0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-735
3. Instruction Set

API Mnemonic Operands Function

270 D BLDI S, n Load NC Contact by Specified Bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BLDI: 5 steps
S * * * * * *
n * * * * * * * * * * * DBLDI: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Reference source address n: Reference bit address

Description:
75. Available range for the value in operand n: K0~K15 for the 16-bit instruction; K0~K31 for the
32-bit instruction.
76. The BLDI instruction is used to evaluate the state of a bit in D0 in the program below and if that
bit is OFF, the instruction will be true. If it’s ON, the instruction will be false. n specifies the bit
in S. If bit 1 in D0 is a 0 in the program below, the instruction is true and output Y0 will be
energized.
77. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).

Program Example:
Instruction: ; Operation:
BLDI D0 K1 Y0
BLDI D0 K1 ; Load NC contact with bit
status of bit1 in D0
OUT Y0 ; Drive coil Y0

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3. Instruction Set

API Mnemonic Operands Function

271 D BAND S, n Connect NO Contact in Series by Specified Bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BLDI: 5 steps
S * * * * * *
n * * * * * * * * * * * DBLDI: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Reference source address n: Reference bit address

Description:
78. Available range for the value in operand n: K0~K15 for the 16-bit instruction; K0~K31 for the
32-bit instruction.
79. The BAND instruction is used to connect NO contacts in series, whose state is defined by the
reference bit n in reference device S, i.e. if the bit specified by n is ON, the instruction will be
true and if X1=0, Y0 will be energized in the program below.
80. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).

Program Example:
X1 Instruction: Operation:
BAND D0 K0 Y0
LDI X1 ; Load NC contact X1
BAND D0 K0 ; Connect NO contact in
series, whose state is
defined by bit0 of D0
OUT Y0 ; Drive coil Y0

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-737
3. Instruction Set

API Mnemonic Operands Function

272 D BANI S, n Connect NC Contact in Series by Specified Bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BANI: 5 steps
S * * * * * *
n * * * * * * * * * * * DBANI: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Reference source address n: Reference bit address

Description:
81. Available range for the value in operand n: K0~K15 for 16-bit instruction; K0~K31 for 32-bit
instruction.
82. The BANI instruction is used to connect NC contacts in series, whose state is defined by the
reference bit n in reference device S, i.e. if the bit specified by n in D is OFF, the instruction
will be true and if X1=0, Y0 will be energized.
83. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).

Program Example:
X1 Instruction: Operation:
BANI D0 K0 Y0
LDI X1 ; Load NC contact X1

BANI D0 K0 ; Connect NC contact in

series, whose state is
defined by bit0 of D0

OUT Y0 ; Drive coil Y0

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3. Instruction Set

API Mnemonic Operands Function

273 D BOR S, n Connect NO Contact in Parallel by Specified Bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BOR: 5 steps
S * * * * * *
n * * * * * * * * * * * DBOR: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Reference source address n: Reference bit address

Description:
84. Available range for the value in operand n: K0~K15 for the 16-bit instruction; K0~K31 for the
32-bit instruction.
85. The BOR instruction is used to connect NO contacts in parallel, whose state is defined by the
reference bit n in reference device S, i.e. if the bit specified by n in S is ON, the instruction will
be true and in the program below, Y1 will be energized.
86. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).

Program Example:
X0 Instruction: Operation:
Y1
LD X0 ; Load NO contact X0
BOR D0 K0
D0 K0 ; Connect NO contact in
BOR
parallel, whose state
is defined by bit0 of
D0
OUT Y1 ; Drive coil Y1

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-739
3. Instruction Set

API Mnemonic Operands Function

274 D BORI S, n Connect NC Contact in Parallel by Specified Bit
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F BORI: 5 steps
S * * * * * *
n * * * * * * * * * * * DBORI: 9 steps
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S: Reference source address n: Reference bit address

Description:
87. Available range for the value in operand n: K0~K15 for the 16-bit instruction; K0~K31 for the
32-bit instruction.
88. The BORI instruction is used to connect NC contacts in parallel, whose state is defined by the
reference bit n in reference device S, i.e. if the bit specified by n is OFF, the instruction will be
true and in the program below output Y1 will be energized.
89. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).

Program Example:
X0 Instruction: Operation:
Y1

LD X0 ; Load NO contact X0
BORI D0 K0

BORI D0 K0 ; Connect NC contact in

parallel, whose state is
defined by bit 0 of D0
OUT Y1 ; Drive coil Y1

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3. Instruction Set

API Mnemonic Operands Function

275~ FLD* S1, S2 Floating Point Number Contact Comparison
280
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F FLD*: 9 steps
S1 * * *
S2 * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2

Description:
90. Compare the S1 and S2. For example, “FLD=” compares S1 and S2, and if the comparison result
is “=”, the instruction is true. If they are not “=” the instruction is false.
91. The FLD* operands, can directly insert floating point numbers into S1 and S2 can each be 2 T,
C, D or actual floating point values (e.g. F1.2).
92. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).
93. This instruction must be the first instruction of a rung.

API No. 32 -bit instruction Instruction is true Instruction is false

275 FLD＝ S1＝S2 S1≠S2

276 FLD＞ S1＞S2 S1≦S2
277 FLD＜ S1＜S2 S1≧S2
278 FLD＜＞ S1≠S2 S1＝S2
279 FLD＜＝ S1≦S2 S1＞S2
280 FLD＞＝ S1≧S2 S1＜S2

Program Example:

When the content of floating point numbers D201, D200 is less than or equal to F1.2, and X1=ON,
set Y21=ON.

X1
FLD<= D200 F1.2 SET Y21

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : ww w. e a t o n . c o m 3-741
3. Instruction Set

API Mnemonic Operands Function

281~ Floating Point Number Series Contact
FAND* S1, S2
286 Comparison
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F FAND*: 9 steps
S1 * * *
S2 * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2

Description:
94. Compare the contents of S1 and of S2. For example, “FAND=”,compares S1 and of S2 and if the
comparison result is “=” , the instruction is true, and if it is “≠” , the instruction is false.
95. The FAND* operands, can directly insert floating point numbers into S1 and S2 can each be 2 T,
C, D or actual floating point values (e.g. F1.2).
96. In ELC-PV, BOUT instruction support ELC-PV V1.6(above).
97. The FAND* instruction is an input instruction

API No. 32 -bit instruction Instruction is true Instruction is false

232 FAND＝ S1＝S2 S1≠S2

233 FAND＞ S1＞S2 S1≦S2
234 FAND＜ S1＜S2 S1≧S2
236 FAND＜＞ S1≠S2 S1＝S2
237 FAND＜＝ S1≦S2 S1＞S2
238 FAND＞＝ S1≧S2 S1＜S2

Program Example:

If X1=OFF and the contents of floating point numbers D1, D0 is not equal to F1.2, set Y21=ON.

X1
FAND<> F1.2 D0 SET Y21

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API Mnemonic Operands Function
287~ Floating Point Number Parallel Contact
FOR* S1, S2
292 Comparison
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F FOR*: 9 steps
S1 * * *
S2 * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2

Description:
98. Compare the contents of S1 and of S2. For example “FOR=” compares S1 and of S2 ,and if the
comparison result is “=”, the instruction is true, and if it is “≠”, the instruction is false.
99. The FOR* operands, can directly insert floating point numbers into S1 and S2 can each be 2 T,
C, D or actual floating point values (e.g. F1.2)
100. In ELC-PV, BOUT instruction support ELC-PV V1.6(above)..
101. The FOR*instruction is an input instruction
32-bit
API No. Instruction is true Instruction is false
instruction
287 FOR＝ S1＝S2 S1≠S2
288 FOR＞ S1＞S2 S1≦S2
289 FOR＜ S1＜S2 S1≧S2
290 FOR＜＞ S1≠S2 S1＝S2
291 FOR＜＝ S1≦S2 S1＞S2
292 FOR＞＝ S1≧S2 S1＜S2

Program Example:
If both X2 and M30 are “ON”, or if the contents of the floating point numbers D101, D100 are greater
or equal to F1.234, M60=ON.

X2 M30
M60

FOR>= D100 F1.234

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 4-743
API Mnemonic Operands Function
296~
D LDZ※ S1, S2, S3 Comparing contact type absolute values LDZ※
301
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F LDZ※: 7 steps
S1 * * * * * * * * *
S2 * * * * * * * * * DLDZ※: 13 steps
* * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2 S3: Data source value 3

Description:
102. In ELCM-PH/PA, LDZ※ supported ELCM-PH/PAV2.0(above).
103. The absolute value of the difference between S1 and S2 is compared with the absolute value of
S3. Take LDZ= for example. If the comparison result is that the absolute value of the difference
between S1 and S2 is equal to the absolute value of S3, the condition of the instruction is met. If
the comparison result is that the absolute value of the difference between S1 and S2 is not
equal to the absolute value of S3, the condition of the instruction is not met.
104. The instruction can be connected to a busbar.
16-bit 32-bit Comparison result
API No.
instruction instruction On Off
296 LDZ＞ DLDZ＞ | S1 - S2 | ＞ | S3 | | S1 - S2 | ≦ | S3 |
297 LDZ＞＝ DLDZ＞＝ | S1 - S2 | ≧ | S3 | | S1 - S2 | ＜ | S3 |
298 LDZ＝ DLDZ＜ | S1 - S2 | ＜ | S3 | | S1 - S2 | ≧ | S3 |
299 LDZ＜＝ DLDZ＜＝ | S1 - S2 | ≦ | S3 | | S1 - S2 | ＞ | S3 |
300 LDZ＝ DLDZ＝ | S1 - S2 | ＝ | S3 | | S1 - S2 | ≠ | S3 |
301 LDZ＜＞ DLDZ＜＞ | S1 - S2 | ≠ | S 3 | | S1 - S2 | ＝ | S3 |
105. If the values of the most significant bits in S1, S2, and S3 are 1, the values in S1, S2, and S3 are
negative values.
106. A 32-bit counter (C200~) must be used with the 32-bit instruction DLDZ※. If it is used with the
16-bit instruction LDZ※, a program error will occur, and the ERROR LED indicator on the PLC
will blink.

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Program Example:
107. If the value in C10 is equal to K200 or K-200, Y20 will be On.
108. If the value in D200 is less than or equal to K230, and is larger than or equal to K170, and X1 is
On, Y21 will be On and latched.

LDZ= K400 K200 C10 Y20

X1
LDZ<= D200 K200 K-30 SET Y21

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 4-745
API Mnemonic Operands Function
302~ Comparing contact type absolute values
D ANDZ※ S1, S2, S3
307 ANDZ※
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F ANDZ※: 7 steps
S1 * * * * * * * * *
S2 * * * * * * * * * DANDZ※: 13 steps
* * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2 S3: Data source value 3

Description:
109. In ELCM-PH/PA, ANDZ※ supported ELCM-PH/PAV2.0(above).
110. The absolute value of the difference between S1 and S2 is compared with the absolute value of
S3. Take AND= for example. If the comparison result is that the absolute value of the difference
between S1 and S2 is equal to the absolute value of S3, the condition of the instruction is met. If
the comparison result is that the absolute value of the difference between S1 and S2 is not
equal to the absolute value of S3, the condition of the instruction is not met.
111. The instruction ANDZ※ is connected to a contact in series.
16-bit 32-bit Comparison result
API No.
instruction instruction On Off
302 ANDZ＞ DANDZ＞ | S1 - S2 | ＞ | S3 | | S1 - S2 | ≦ | S3 |
303 ANDZ＞＝ DANDZ＞＝ | S1 - S2 | ≧ | S3 | | S1 - S2 | ＜ | S3 |
304 ANDZ＜ DANDZ＜ | S1 - S2 | ＜ | S3 | | S1 - S2 | ≧ | S3 |
305 ANDZ＜＝ DANDZ＜＝ | S1 - S2 | ≦ | S3 | | S1 - S2 | ＞ | S3 |
306 ANDZ＝ DANDZ＝ | S1 - S2 | ＝ | S3 | | S1 - S2 | ≠ | S3 |
307 ANDZ＜＞ DANDZ＜＞ | S1 - S2 | ≠ | S3 | | S1 - S2 | ＝ | S3 |
112. If the values of the most significant bits in S1, S2, and S3 are 1, the values in S1, S2, and S3 are
negative values.
113. A 32-bit counter (C200~) must be used with the 32-bit instruction DANDZ※. If it is used with
the 16-bit instruction ANDZ※, a program error will occur, and the ERROR LED indicator on the
PLC will blink.

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Program Example:
114. If X0 is On, and the present value in C10 is equal to K200 or K-200, Y20 will be On.
115. If X1 is Off, and the value in D0 is not equal to K10 or K-10, Y21 will be On and latched.
X0
ANDZ= K200 K400 C10 Y20
X1
ANDZ<> K0 K-10 D0 SET Y21

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 4-747
API Mnemonic Operands Function
308~
D ORZ※ S1, S2, S3 Comparing contact type absolute values ORZ※
313
Type Bit Devices Word devices Program Steps
OP X Y M S K H KnX KnY KnM KnS T C D E F ORZ※: 7 steps
S1 * * * * * * * * *
S2 * * * * * * * * * DORZ※: 13 steps
* * * * * * * * *
ELCB ELC ELC2 ELCM
PB PA PV PB PH/PA/PE PV PH/PA
32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P 32 16 P

Operands:
S1: Data source value 1 S2: Data source value 2 S3: Data source value 3

Description:
116. In ELCM-PH/PA, ANDZ※ supported ELCM-PH/PAV2.0(above).
117. The absolute value of the difference between S1 and S2 is compared with the absolute value of
S3. Take ORZ= for example. If the comparison result is that the absolute value of the difference
between S1 and S2 is equal to the absolute value of S3, the condition of the instruction is met. If
the comparison result is that the absolute value of the difference between S1 and S2 is not
equal to the absolute value of S3, the condition of the instruction is not met.
118. The instruction ANDZ※ is connected to a contact in parallel.
16-bit 32-bit Comparison result
API No.
instruction instruction On Off
308 ORZ＞ DORZ＞ | S1 - S2 | ＞ | S3 | | S1 - S2 | ≦ | S3 |
309 ORZ＞＝ DORZ＞＝ | S1 - S2 | ≧ | S3 | | S1 - S2 | ＜ | S3 |
310 ORZ＜ DORZ＜ | S1 - S2 | ＜ | S3 | | S1 - S2 | ≧ | S3 |
311 ORZ＜＝ DORZ＜＝ | S1 - S2 | ≦ | S3 | | S1 - S2 | ＞ | S3 |
312 ORZ＝ DORZ＝ | S1 - S2 | ＝ | S3 | | S1 - S2 | ≠ | S3 |
313 ORZ＜＞ DORZ＜＞ | S1 - S2 | ≠ | S3 | | S1 - S2 | ＝ | S3 |
119. If the values of the most significant bits in S1, S2, and S3 are 1, the values in S1, S2, and S3 are
negative values.
120. A 32-bit counter (C200~) must be used with the 32-bit instruction DORZ※. If it is used with the
16-bit instruction ORZ※, a program error will occur, and the ERROR LED indicator on the PLC
will blink.

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Program Example:
If X2 and M30 are On, or the value in the 32-bit register (D101, D100) is larger than or equal to
K100000, or is less than or equal to K-100000, M60 will be On.

X2 M30
M60

DORZ>= D100 K0 K100000

MN05003003E F o r m o r e i n f o r m a t i o n v i s i t : w w w. e a t o n . c o m 4-749
MEMO

Sequential Function Chart

This chapter contains information in programming in SFC mode.

This Chapter Contains

4.1 Sequential Function Chart (SFC) .................................................................................. 4-751

4.2 Basic Operation.............................................................................................................. 4-751

4.3 SFC Viewed as Ladder and Instruction List ................................................................. 4-757

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4 . S e q u e n t i a l F u n c t i o n C h a r ts

4 Sequential Function Chart

4.1 Sequential Function Chart (SFC)
Sequential Function Charts are a graphical method of organizing a PLC program in which the entire
structure of the program resembles a flow chart. The two primary components of an SFC are steps
and transitions. A step is a group of logic used to accomplish a particular control task. Steps in an
SFC are very similar to the steps in a flow chart. Transitions are the mechanisms used to decide
which step should occur next and precisely when that step should become active. Transitions are
like the arrows in a flow chart.
Each step and transition contains a so-called “inner ladder” which allows the programmer to create
ladder logic that will run whenever that step or transition is active. While a given step is active its
inner ladder will execute continuously until the condition(s) for the transition are met, at which point
the next step(s) in the sequence will become active.
SFC programming is beneficial for use in applications which have a repeatable multi-step process or
series of repeatable processes. Programmers who use the State-Machine method of programming
will find SFCs to be a useful programming method. The visual nature of the SFC makes it easy to
maintain. The active step(s) are highlighted, pointing out what logic is being executed. Due to the
fact that the program is divided into steps, one “section” of the program can be viewed rather than
viewing the entire program.
4.2 Basic Operation
■ SFC Toolbar and Icons Explanation:
Icons shown
Description of
on SFC Explanation:
Icons
toolbar
Located in front of an initial SFC Step Point. Contains
Common ladder code that is run on every scan (outside of the Step
procedure). No transition point is used.
Diagram for the Initial Step Point: double-framed
Initial diagram of diagram designates the start of a Step Procedure.
SFC Available devices are only S0~S9. Only one can be used
per procedure.
Diagram for the Common Step Point: Used for all other
Common SFC step points outside of the Initial Step Point. Available
devices vary by processor.
Jump diagram: Used to move from one step point to
Jump diagram another that is not sequenced in order or not in the same
procedure.
Transition condition diagram: The condition used to
Condition diagram
transition to the next step.
Alternative divergence: Used to move from a single step
Divergence of
point to one of multiple subsequent step points, each
condition diagram
move having a different transition condition.
Alternative convergence: Used to move from multiple
Convergence of
step points to the same single step point, each move
condition diagram
having a different transition condition.
Simultaneous divergence: Used to move from a single
step point to multiple subsequent step points using a
Divergence diagram
single transition condition. The subsequent step points
will execute cyclically.
Simultaneous convergence: Used to move from multiple
Convergence
step points to a single step point using a single transition
diagram
condition.
■ SFC Editing Environment:
In SFC mode, up to 16 columns can be used for programming, whereas there is no limit to rows.

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4 . S e q u e n t i a l F u n c t i o n C h a r ts

Every dotted cell stands for one SFC symbol.

When programming in SFC, use the far left cell as the starting position and then work from left to
right, top to bottom. Each object (LAD, Step Point, and Transition) contains its own ladder logic
segment called Inner Ladder. The entire SFC diagram can be constructed first and then the inner
ladder of each SFC symbol can be created, or each SFC symbol and its internal ladder logic can be
developed simultaneously as the SFC structure diagram is constructed.

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4 . S e q u e n t i a l F u n c t i o n C h a r ts

SFC Structure
1. LAD
- Logic that is needed outside of SFC logic is put here.
- Logic is executed every scan.
- At a minimum logic to enable Initial Step Point must be located here.
2. Initial Step
- The start of the procedure
- Only one per procedure
- Available addresses are S0 – S9
- No transition condition is used between this and the LAD therefore logic must
be included in LAD to turn on Initial Step addresses.
- If more than one procedure is needed, additional Initial Steps can be added.
Place the next Initial Step in first column, but after completion of previous
procedure.

3. Transition
- Condition to move between steps
- Required between each step point

4. Common Step Point

- These compose the bulk of the SFC
- Step Points in a procedure other than the Initial Step Point
- Ladder logic is contained within the Step Points.
- Available addresses depend on the processor.
5. Convergence/Divergence
- The ways to transition to and from multi-steps
- Two types of each: Alternative and Simultaneous

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4 . S e q u e n t i a l F u n c t i o n C h a r ts

- Alternative: Each step has a unique transition condition

- Simultaneous: All steps share one transition condition
1. No divergence: 2. Alternative Divergence: 3. Simultaneous Divergence:
Move from S0 to S20 This is an OR condition. Move This is an AND condition.
according to the transition from S0 to either S20 or S21 Move from S0 to both S20
condition 0. by different transition and S21 by the single
conditions 0 and 1. transition condition 0.

Divergence moves from one step to many.

1. Alternative Convergence: 2. Simultaneous Convergence:
This is an OR condition. There is only one This is an AND condition. Move from S30,
path. Move from S20 to S30 or S21 to S31 or S31, and S32 to the step point S40 according
S22 to S32 to the step point S40 when the to the same transition condition 6. S30, S31
appropriate transition (6 or 7 or 8) is true. and S32 must all be active before
transitioning to S40.

Convergence moves from many steps to one.

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4 . S e q u e n t i a l F u n c t i o n C h a r ts

1. Alternative: 2. Simultaneous:
Move to or from multiple step points Move to or from multiple step points
according to different transition conditions. according to one transition condition.

Alternative Simultaneous
Divergence Divergence

Simultaneous
Alternative Convergence
Convergence

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4 . S e q u e n t i a l F u n c t i o n C h a r ts

6. Jumps
- Allows movement to step points outside the sequenced order or even to
different program processes
1. The step points S10, S11 and S12 are 2. To move from S20 within the procedure of S1
sequenced in order, and therefore can be to S10 within the procedure of S0, a Jump
connected by using the common SFC has to be used to complete the transition.
diagram. However, to return back to S0 from
S11 or S12, a Jump has to be used to
complete the transition.

Return to the initial step point S0 in the same Transition between SFC diagrams in two
procedure. different procedures.

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4.3 SFC Viewed as Ladder and Instruction List

■ Rules of SFC
1. Segment and Row comments cannot be used in SFC mode – only Device comments can
be used.
2. Inner Ladder mode is used to develop ladder logic in SFC mode.
3. The device number of each step point (including the initial step point) must be unique.
4. Transition numbers are automatically assigned in sequential order.
5. A RET statement is generated in the Ladder logic of the last step of a procedure when the
SFC is compiled.
6. SFC code compiles into Instruction List which can then be viewed in Ladder. If a change
made in Ladder is to also be viewed in SFC, the Ladder must be compiled into Instruction
List and then from Instruction List into SFC. It is recommended to make changes in Inner
Ladder Mode.
■ Graphical Examples
Example of the simultaneous divergence and simultaneous convergence procedures

SFC LADDER INSTRUCTION

B-757
SFC LADDER

S20 X0
S SET S21
S20
SET S22

SET S23
S21 S22 S23 S24
SET S24

Alternative Divergence
Alternative Divergence

S40 S41 S42

S40 S41 S42 X2
S S S SET S50
X2
S50

Simultaneous Convergence
Simultaneous Convergence

* This does not show the inner ladder logic of each step.
■ For additional information consult corresponding software manual.

B-758
MEMO

Setting and Using an Ethernet

ELC/Module

This Chapter Contains

5.1 Specifications for an Ethernet ELC/Module ................................................................. 5-760

5.2 Ethernet Control Registers............................................................................................ 5-760

5.2.1 ELC2-PE Series ELC (Ethernet ELC).................................................................. 5-761

5.2.2 ELC-COENETM (Ethernet Communication Module) ........................................... 5-762

5.3 Searching for an Ethernet ELC ..................................................................................... 5-764

5.3.1 Communication setting ........................................................................................ 5-764

5.3.2 Broadcast Search ................................................................................................ 5-765

5.3.3 Searching for a Model Specified .......................................................................... 5-767

5.3.4 Searching by an IP Address ................................................................................ 5-768

5.4 Data Exchange ............................................................................................................... 5-769

5.5 EtherNet/IP List .............................................................................................................. 5-770

5.5.1 EtherNet/IP Information Supported by ELC2-PE series ELCs ............................. 5-770

5.5.2 EtherNet/IP Objects Supported by ELC2-PE series ELCs ................................... 5-771

B-759
A. C o m m u n i c a t i o n s

4.4 Specifications for an Ethernet ELC/Module

The specifications for an ELC series Ethernet port and the functions of an ELC series Ethernet port
are listed below.
Specifications for an Ethernet interface:
Item Specifications
Interface RJ-45 with Auto MDI/MDIX
Number of ports 1 Port
Transmission method IEEE802.3, IEEE802.3u
Transmission cable Category 5e
Transmission rate 10/100 Mbps Auto-Defect
Protocol ICMP, IP, TCP, UDP, DHCP, SMTP, NTP, MODBUS TCP

Ethernet functions:
Function Item ELC2-PE Series ELC-COENETM
MODBUS/TCP Master & Slave Master & Slave
Connection number of servers 16 16
Connection number of clients 8 16
Connection number of data exchanged 8 24
RTU mapping - 4
E-mail - 4
SNMP - 2
IP filter 4 8

4.5 Ethernet Control Registers

In order to control and monitor Ethernet communication, users can read the data in the control
registers listed below by means of the instruction FROM, and write data into the control registers
listed below by means of the instruction TO. (Please refer to the explanation of API 78 and that of
API 79 in chapter 3 for more information about FROM/TO.)
[Note 1] Please refer to ELC-COENETM Manual for more information about control registers.
[Note 2] The ELC2-PE Built-in Ethernet port, it always is like a 9th left side module. For example:
read IP address(CR88, CR89) to D100/D101, the command will be “FROM K108 K88
D100 K2”.
[Note 3] The ELC-COENETM can be connected to left side of ELC. For example: it is 1st module at
left side of ELC MPU module, and it read model name(CR0) to D0, the command will be
“FROM K100 K0 D0 K1”

A-760
A. C o m m u n i c a t i o n s

4.5.1 ELC2-PE SERIES ELC (ETHERNET ELC)

CR number
Attribute Register name Description
HW LW
#12 #0 - Reserved
Enabling the data Users can set CR#13 to “sending the data” or “not
#13 R/W
exchange sending the data”.
Writing function of the 0: The ELC writes data continually.
#14 R/W
RTU mapping 1: The ELC writes data when the input changes.
Enabling flag for RTU
#15 R/W 1: Enable; 0: Disable. Default = 1
mapping
b0: Status of RTU slave 1
Connection status of b1: Status of RTU slave 2
#16 R/W
RTU mapping slave b2: Status of RTU slave 3
b3: Status of RTU slave 4
Execution cycle of the
#17 R/W Time unit: ms
data exchange
#18 - Reserved
If the value of a bit is 1, an error occurs in the slave
States of the slaves
corresponding to the bit.
#19 R involved in the data
b[0:7] indicate the states of the slaves 1~8 involved
exchange
in the data exchange.
#86 ~ #20 - Reserved
IP address setting 0: Static IP
#87 R/W
mode 1: DHCP
When the IP address is 192.168.1.5, the data in
#89 #88 R/W IP address
CR#89 is 192.168, and the data in CR#88 is 1.5.
When the mask address is 255.255.255.0 the data
#91 #90 R/W Mask address in CR#91 is 255.255, and the data in CR#90 is
255.0.
When the GIP address is 192.168.1.1, the data in
#93 #92 R/W Gateway IP address
CR#89 is 192.168, and the data in CR#88 is 1.1.
Enabling the IP address 0: The setting of the IP address is not executed.
#94 R/W
setting 1: The setting of the IP address is executed.
0: The setting is unfinished.
IP address setting
#95 R 1: The setting is being executed.
status
2: The setting is complete.
#113 ~ #96 - Reserved

A-761
A. C o m m u n i c a t i o n s

CR number
Attribute Register name Description
HW LW
Setting up MODBUS TCP time-out (in ms)
#114 R/W MPDBUS TCP time-out
Default: 3000
Setting up whether to send out data in MODBUS
#115 R/W MODBUS TCP trigger
TCP mode
#116 R/W MODBUS TCP status Displaying current status of MODBUS TCP mode
MODBUS TCP Setting up destination IP address for MODBUS
#118 #117 R/W
destination IP TCP transaction
MODBUS TCP data Setting up the data length for MODBUS TCP
#119 R/W
length transaction
MODBUS TCP data Data buffer of MODBUS TCP for storing
#219~#120 R/W
buffer sending/receiving data
#248~#220 - Reserved
#249 R Sub-version
#250 R Update date 0xC820 (April 8, 2012)
Displaying the errors. See the error code table for
#251 R Error code
more information.
#255~#252 - Reserved
Symbols “R” refers to “able to read data by FROM instrcution”; “W” refers to “able to write data by
TO instrcution”.

4.5.2 ELC-COENETM (ETHERNET

COMMUNICATION MODULE)
ELC-COENETM Ethernet communication module
CR number
Attribute Register name Description
HW LW
Set up by the system; read only. Model code of
#0 R Model name
ELC-COENETM = H’4050
#1 R Firmware version Displaying the current firmware version in hex.
b0: MODBUS TCP mode
#2 R Communication mode
b1: data exchange mode
#3 W E-Mail Event 1 trigger Set up whether to send E-Mail 1
#4 W E-Mail Event 2 trigger Set up whether to send E-Mail 2
#5 W E-Mail Event 3 trigger Set up whether to send E-Mail 3
#6 W E-Mail Event 4 trigger Set up whether to send E-Mail 4
b0 ~ b7: Current status of E-Mail 2
#7 R Status of E-Mail 1, 2
b8 ~ b15: Current status of E-Mail 1

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A. C o m m u n i c a t i o n s

ELC-COENETM Ethernet communication module

CR number
Attribute Register name Description
HW LW
b0 ~ b7: Current status of E-Mail 4
#8 R Status of E-Mail 3, 4
b8 ~ b15: Current status of E-Mail 3
E-Mail 1 additional
#9 R/W Filled in by the user, and it will be sent by E-mail.
message
E-Mail 2 additional
#10 R/W Filled in by the user, and it will be sent by E-mail.
message
E-Mail 3 additional
#11 R/W Filled in by the user, and it will be sent by E-mail.
message
E-Mail 4 additional
#12 R/W Filled in by the user, and it will be sent by E-mail.
message
Set up whether to send out data in data exchange
#13 R/W Data exchange trigger
mode
#14 R Status of data exchange Displaying current status of data exchange.
Enabling flag for RTU
#15 R/W 1: Enable; 0: Disable. Default = 0
mapping
b0: Status of RTU slave 1
Connection status of b1: Status of RTU slave 2
#16 R/W
RTU mapping slave b2: Status of RTU slave 3
b3: Status of RTU slave 4
#24 ~ #17 - Reserved
#26 #25 R/W Destination IP Destination IP address for data exchange
#27 - Reserved
#28 R/W Destination Slave ID Destination Slave ID for data exchange
#48 ~ #29 R/W Data transmission buffer Buffer for transmitted data in data exchange
#68 ~ #49 R Data receiving buffer Buffer for received data in data exchange
#69~#80 - Reserved
Read address for data Slave transmission buffer address for data
#81 R/W
exchange exchange
Read length for data
#82 R/W Number of registers for read data
exchange
Received address for Buffer address for the receiving Master in data
#83 R/W
data exchange exchange
Written-in address for Buffer address for the receiving Slave in data
#84 R/W
data exchange exchange
Written-in length for
#85 R/W Number of registers for data transmission
data exchange
Transmission address Master transmission buffer address for data
#86 R/W
for data exchange exchange
#110 ~ #87 - Reserved
Setting up MODBUS TCP Master control as 8-bit
#111 R/W 8-bit processing mode
mode
MODBUS TCP
#112 R/W MODBUS TCP Keep-Alive Time-out (s)
Keep-Alive Time-out
#113 - Reserved
#114 R/W MODBUS TCP time-out Setting up MODBUS TCP time-out (in ms)

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ELC-COENETM Ethernet communication module

CR number
Attribute Register name Description
HW LW
Setting up whether to send out data in MODBUS
#115 R/W MODBUS TCP trigger
TCP mode
#116 R/W MODBUS TCP status Displaying current status of MODBUS TCP mode
MODBUS TCP Setting up destination IP address for MODBUS
#118 #117 R/W
destination IP TCP transaction
MODBUS TCP data Setting up the data length for MODBUS TCP
#119 R/W
length transaction
#219 ~ MODBUS TCP data Data buffer of MODBUS TCP for storing
R/W
#120 buffer sending/receiving data

#248 ~
- Reserved
#220
Displaying the errors. See the error code table for
#251 R Error code
more information.
#255 ~
- Reserved
#252

4.6 Searching for an Ethernet ELC

This section introduces how to search for and set an Ethernet ELC by ECISoft. Before you start a
setup page, you have to select Ethernet in the Communication Setting window. Next, you can
search by a broadcast, or an IP address. An Ethernet ELC is set up by UDP port 20006; therefore,
you have to be aware of the relevant settings of the firewall.

4.6.1 COMMUNICATION SETTING

(1) Start ECISoft in your PC, and click Communication Setting on the Tools menu.

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A. C o m m u n i c a t i o n s

(2) Select Ethernet in the Type drop-down list box.

4.6.2 BROADCAST SEARCH

(1) Click Search on the toolbar in ECISoft to search for all Eaton Ethernet products on the network.
The window on the left hand side shows the models found, and the window on the right hand
side displays the device list of all models.

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A. C o m m u n i c a t i o n s

(2) Click a model on the left hand side, and you will see the device list of the model selected on the
right hand side. Click the device to be set up to enter the setup page.

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4.6.3 SEARCHING FOR A MODEL SPECIFIED

(1) Right-click Ethernet in the left hand side window, and click Configure to designate a model to be
searched for.

(2) After users select a model which will be searched for, they can click OK to auto-search for the
model on the network. In the window shown below, the ELC-COENETM checkbox is selected.

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(3) A list of specified devices is in the window. If the users have selected several models, they can
view these models.

4.6.4 SEARCHING BY AN IP ADDRESS

(1) Select Ethernet in the Type drop-down list box, type an IP address in the IP Address box, and
click OK.

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A. C o m m u n i c a t i o n s

(2) Click Search on the toolbar to start searching for the designated IP address.

(3) The model found will be displayed in the right hand side window. Double-click the device to enter
the setup page.

4.7 Data Exchange

An Eaton Ethernet master can read/write data from/into a slave by means of instructions. It can also
read/write data from/into a slave by means of tables. The number of data exchanges that models
provide is different. Please refer to section B.1 for more information about the number of data
exchanged.
(1) Enable:
Users can enable or disable a data exchange. After a data exchange is enabled, the data will be
exchanged.
(2) Enable Condition:
You can select Always Enable or Program Control. If Always Enable is selected,
ELC-COENETM will execute data exchange continuously until the setting in ECISoft is changed.
If Program Control is selected, ELC-COENETM will execute data exchange according to the
program setting. The internal registers in different models used to enable data exchanges are
different. Please refer to section B.2 for more information.
(In ELC-COENETM, the data exchange is executed if CR#13=2, and the data exchanged is not
executed if CR#13=0.)
(3) Station Address-IP Address:
You have to type the IP address of a slave. If the IP address of a slave is 192.168.0.1, and the
station number of the slave is 1, you can type 1 in the first Station Address cell, select the box
in the first Enable cell, and type 192.168.0.1 in the first IP Address cell.

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A. C o m m u n i c a t i o n s

(4) Master Device, Slave Device, and Quantity:

Reading (): Initial reception register in a masterInitial transmission register in a slave
Writing (): Initial transmission register in a master Initial reception register in a slave
If a data exchange is enabled, the Ethernet ELC will write data, and then read data.
Quantity: A slave station can send 100 pieces of data at most and receive 100 pieces of data at
most simultaneously.
※ If a device which is not an Eaton ELC is connected, users can type a hexadecimal four-digit
MODBUS absolute position in the Slave Device cell.

4.8 EtherNet/IP List

EtherNet/IP is a communication protocol defined by ODVA, and is different from the Ethernet
mentioned in the previous sections. ELC2-PE series ELCs supports the EtherNet/IP slave
communication protocol. The EtherNet/IP objects which are supported are described below.

4.8.1 ETHERNET/IP INFORMATION

SUPPORTED BY ELC2-PE SERIES
ELCS
(1) Object list
Object Name Class Code # of Instance
Identity 0x01 7
Message Router 0x02 NA
Assembly 0x04 7
Connection 0x06 NA
Manager
X input 0x64 256
Y output 0x65 256
T Timer 0x66 256
M Relay 0x67 4096
C Counter 0x68 256
D Register 0x69 12000
TCP/IP Interface 0xF5 6
Ethernet Link 0xF6 3

(2) Data types

8-bit 16-bit 32-bit 64-bit
USINT WORD UDINT ULINT

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A. C o m m u n i c a t i o n s

SINT UINT DWORD LINT

BYTE INT DINT

(3) Error codes

Value Name Description
0 Success Success
0x01 Connection Failure The forwarding function can not be enabled.
The segment type is not supported.
0x04 Path Segment Error
(ref. V1 C-1.4)
0x05 Path Destination Unknown The instance is not supported.
0x08 Service Not Supported The service (Get or Set) is not supported.
0x09 Invalid Attribute Value The value written is incorrect.
0x0E Attribute Not Settable The setting of the attribute is not allowed.
0x13 Not Enough Data The length of the data written is too short.
0x14 Attribute Not Supported The attribute is not supported.
0x15 Too Much Data The length of the data written is too long.
0x16 Object Not Exist The object is not supported.
The service parameter is not supported.
0x20 Invalid Parameter
(ref. V1 5-2.3.1)
0x26 Path Size Invalid Incorrect item length

4.8.2 ETHERNET/IP OBJECTS SUPPORTED BY

ELC2-PE SERIES ELCS
(1) Identity Object (0x01)
Instance: 0x01
Attribute Name Access Data Type Value
0x01 Vendor ID Get UINT 68
0x02 Device Type 14
Get UINT
(Programmable Logic Controller )
0x03 Product Code Get UINT 0x8013
0x04 Revision STRUCT of: 1.00
Major Get USINT 0x01
Minor USINT 0x00
0x05 Status Get WORD 0 ( Owned )
0x06 Serial Number Get UDINT
0x07 Product Name Get SHORT_STRING ELC2-PE

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A. C o m m u n i c a t i o n s

(2) Message Router (0x02)

Instance: 0x01
Attribute Name Access Data Type Value
0x01 Not Support NA NA NA

(3) Assembly (0x04)

Explicit message
Conformance Test is not supported.
Instance Attribute Name Access Data Type Data
0x65 D Block 1 Set 10 words D500~D509
0x66 D Block 2 Set 30 words D510~D539
0x67 D Block 3 Set 60 words D540~D599
0x68 0x03 D Block 4 Set 100 words D600~D699
0x69 D Block 5 Set 100 words D700~D799
0x6A D Block 6 Set 100 words D800~D899
0x6B D Block 7 Set 100 words D900~D999

(4) X input (0x64)

Instance Attribute Name Access Data Type
1 0x64 X0 Get BYTE
2 0x64 X1 Get BYTE
……
256 0x64 X377 Get BYTE

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(5) Y output (0x65)

Instance Attribute Name Access Data Type
1 0x64 Y0 Set BYTE ( 0x00 or 0x01 )
2 0x64 Y1 Set BYTE ( 0x00 or 0x01 )
……
256 0x64 Y377 Set BYTE ( 0x00 or 0x01 )

(6) T timer (0x66)

Instance Attribute Name Access Data Type
1 0x64 T0 Set INT
2 0x64 T1 Set INT
……
256 0x64 T255 Set INT

Instance Attribute Name Access Data Type

1 0x65 T0 Set BYTE ( 0x00 or 0x01 )
2 0x65 T1 Set BYTE ( 0x00 or 0x01 )
……
256 0x65 T255 Set BYTE ( 0x00 or 0x01 )

(7) M Relay (0x67)

Instance Attribute Name Access Data Type
1 0x64 M0 Set BYTE
2 0x64 M1 Set BYTE
……
4096 0x64 M4095 Set BYTE

(8) C counter (0x68)

Instance Attribute Name Access Data Type
1 0x64 C0 Set INT
2 0x64 C1 Set INT
……
200 0x64 C199 Set INT

Instance Attribute Name Access Data Type

201 0x64 C200 Set DINT
202 0x64 C201 Set DINT

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A. C o m m u n i c a t i o n s

……
256 0x64 C255 Set DINT

Instance Attribute Name Access Data Type

1 0x65 C0 Set BYTE ( 0x00 or 0x01 )
2 0x65 C1 Set BYTE ( 0x00 or 0x01 )
……
256 0x65 C255 Set BYTE ( 0x00 or 0x01 )

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(9) D Register (0x69)

Instance Attribute Name Access Data Type
1 0x64 D0 Set INT
2 0x64 D1 Set INT
……
12000 0x64 D11999 Set INT

(10) TCP/IP Interface Object (0xF5)

Instance: 0x01
Attribute Name Access Data Type Value
0x01 Status Get DWORD 0x00000001UL
0x02 0x00000014UL
Configuration
Get DWORD (DHCP client,
Capability
Configuration Settable)
0x03 Configuration Static IP: 0U
Get DWORD
Control DHCP: 0x02U
0x04 Physical Link
STRUCT of:
Object:
Get
Path Size UINT
Path Padded EPATH
0x05 Interface
STRUCT of:
Configuration:
IP Address UDINT
Network Mask UDINT
Set
Gateway Address UDINT
Name Server UDINT

Name Server 2 UDINT

Domain Name STRING

0x06 Host Name Get STRING ELC2-PE

(11) Ethernet Link Object (0xF6)

Instance: 0x01
Attribute Name Access Data Type Value
0x01 Interface Speed Get UDINT 10 or 100 Mbps
Bit 0: Link Status
0x02 Interface Flag Get UDINT
Bit 1: Half/Full Duplex
0x03 MAC Address Get USINT[6]

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Communications

This chapter contains information regarding the built-in communications ports of

the ELC processors.

This Chapter Contains

A.1 Communication Ports ................................................................................................... A-778

A.2 Configuration of the communication ports ................................................................. A-778

Selecting master or slave operation. ................................................................................ A-779

Selecting transmission mode. .......................................................................................... A-780

Selecting data packet format. ........................................................................................... A-780

A.3 Communication Protocol ASCII transmission mode .................................................. A-781

ADR (Modbus Address) ................................................................................................... A-781

CMD (Function code) and DATA (data characters) ........................................................... A-781

LRC CHK (check sum) ..................................................................................................... A-782

A.4 Communication Protocol RTU transmission mode .................................................... A-783

Address (Modbus Address) .............................................................................................. A-783

CMD (Function code) and DATA ...................................................................................... A-783

CRC CHK (check sum) .................................................................................................... A-784

A.5 ELC Modbus Address mapping ................................................................................... A-785

A.6 Function Code support (Slave Mode) .......................................................................... A-787

Command Code：01, Read Coil Status of Contact (Input point X is not included) ........... A-788

Command Code：02, Read Input Status ......................................................................... A-789

Command Code：03, Read Content of Register (T, C, D) ............................................... A-790

Command Code：05, Force Single Coil .......................................................................... A-791

Command Code：06, Preset Single Register .................................................................. A-792

Command Code：15, Force Multiple Coils ...................................................................... A-793

Command Code：16, Preset Multiple Register ................................................................ A-794

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A. C o m m u n i c a t i o n s

Command Code：17, Report Slave ID ............................................................................ A-795

A.7 Function Code Support (Master mode) ......................................................................... A-797

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5 ELC processor communications

This chapter describes the communications capabilities that are built in to the ELC processor
modules.
A.1 Communication Ports
The communication interfaces which are supported are listed below. (All the ports can carry out
communication simultaneously.):
COM port COM1 COM2 COM3
ELC-PA/PV
ELCB-PB RS-232 RS-485 -
ELC2-PB/PV
ELCM-PH/PA
RS-232 RS-485 RS-485
ELC2-PH
ELC2-PE USB RS-485 RS-485
ELC2-PA RS-232 RS-485 USB

Slave/Master mode (Both support ASCII/RTU):

COM port COM1 COM2 COM3
ELC-PA/PV
Slave Slave/Master -
ELCB-PB
ELCM-PH/PA
Slave/Master Slave/Master Slave/Master
ELC2-PH
ELC2-PB/PV Slave/Master Slave/Master -
ELC2-PE Slave Slave/Master Slave/Master
ELC2-PA Slave/Master Slave/Master Slave

Communication port summary:

COM
COM1 COM2 COM3)
Parameter
ELCB-PB, ELC-PA/PV, ELC2-PV:110~115200 bps
Baud rate In ELCM-PH/PA, ELC2-PB/PH/PA/PE, COM1: 110~115200
bps, COM2/COM3: 110~921,000 bps.
Data length 7~8bits
Parity Even/Odd/None parity check
Stop bits length 1~2 bits
Configuration Register D1036 D1120 D1109
communication mode ASCII/RTU Mode
Data length for access 100 registers (Both of ASCII/RTU)
A.2 Configuration of the communication ports
Configuring the operational mode for the ports includes
 Selecting master or slave operation
 Selecting ASCII or RTU transmission mode
 Selecting data packet format: Data Length, Parity, and stop bit length
Note: For a Modbus serial network to operate properly, only one device can be a master and all
devices must use the same transmission mode and data packet format.

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A. C o m m u n i c a t i o n s

SELECTING MASTER OR SLAVE

OPERATION.
For the ELC-PA and the ELCB-PB models COM1 is always a slave port. COM2 is automatically set
to master functionality if a message instruction is entered in the program, otherwise COM2 will
function as a slave port.

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SELECTING TRANSMISSION MODE.

The transmission mode for the ports is set using dedicated M bits as described in the chart below
Bit \ Value 0 1
M1139 COM1 = ASCII COM1 = RTU
M1143 COM2 = ASCII COM2 = RTU
M1320 COM3 = ASCII COM3 = RTU

Default for all ports is ASCII transmission mode. If RTU transmission mode is desired for a port, the
corresponding M bit should be set at the beginning of the program.

SELECTING DATA PACKET FORMAT.

The data packet format for the ports is set using dedicated D registers as described in the chart
below
Register Contents
D1036 COM1 data packet format
D1120 COM2 data packet format
D1109 COM3 data packet format

The table below defines the bit fields in these D registers:

CONTENT
b0 Data Length 0: 7 data bits, 1: 8 data bits
00:None
b1
Parity 01:Odd
b2
11: Even
b3 Stop bits 0: 1 bit, 1: 2 bits
0001 (H1): 110
0010 (H2): 150
0011 (H3): 300
0100 (H4): 600
0101 (H5): 1200
0110 (H6): 2400
b4
0111 (H7): 4800
b5
Baud rate 1000 (H8): 9600
b6
1001 (H9): 19200
b7
1010 (HA): 38400
1011 (HB): 57600
1100 (HC): 115200
1101 (HD): 500000(COM2/COM3)
1110 (HE): 312500(COM2/COM3)
1111 (HF): 921000(COM2/COM3)
b8 Select start bit 0: None 1: D1124(COM2)
b9 Select the 1st end bit 0: None 1: D1125(COM2)
b10 Select the 2nd end bit 0: None 1: D1126(COM2)
b11~b15 Reserved (leave at 0)
Default data packet format for all ports is: 7 data bits, 1 stop bit, Even parity, 9600 baud. If a different
data packet format is desired, the appropriate D register value should be loaded at the start of the
user program.

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A.3 Communication Protocol ASCII transmission mode

This section describes the messaging for a port that has been configured to support Modbus
ASCII Transmission mode.
An ASCII transmission message Frame is shown below
Field name Content Explanation
Start bit STX Start bit ‘:’ (3AH)
ADR 1
Slave address Address consists of 2 ASCII codes
ADR 0
CMD 1 Command code consists of 2 ASCII
Function code
CMD 0 codes
DATA (0)
DATA (1) Data content consist of 2n ASCII
Data
………. codes, n205
DATA (n-1)
LRC CHK 1 LRC checksum consists of 2 ASCII
LRC checksum
LRC CHK 0 codes
END1 Stop bit consists of 2 ASCII codes
Stop bit END1 = CR (0DH),
END0
END0 = LF (0AH)

Corresponding table for Hexadecimal value and ASCII codes

ASCII “0“ “1“ “2“ “3“ “4“ “5“ “6“ “7“
Hex 30H 31H 32H 33H 34H 35H 36H 37H
ASCII “8“ “9“ “A“ “B“ “C“ “D“ “E“ “F“
Hex 38H 39H 41H 42H 43H 44H 45H 46H

ADR（MODBUS ADDRESS）
The target address for the Modbus message. Valid addresses are in the range of 0…31. An address
of 0 indicates a broadcast to all devices.
For Example, if the target address is 16 Decimal (10 Hex) the ADR values are:
(ADR 1, ADR 0)=’1’,’0’’1’=31H, ‘0’ = 30H

CMD (FUNCTION CODE) AND DATA (DATA

CHARACTERS)
The content of access data depends on the function code. For descriptions of supported function codes, please
refer to A.6 in this chapter.
For example, the following two messages demonstrate reading the 8 timer words T20~T27 from an ELC at
Modbus address 1
The values of T20~T27 are mapped to Modbus Registers: H0614~H061B
Command message:
“: 01 03 06 14 00 08 DA CR LF”
Field name ASCII Hex
STX : 3A
Slave Address 01 30 31
Function code 03 30 33
Starting Address High 06 30 36
Starting Address Low 14 31 34
Number of Points High 00 30 30
Number of Points Low 08 30 38
LRC checksum DA 44 41
END CR LF 0D 0A

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A. C o m m u n i c a t i o n s

Response message:
“: 01 03 10 00 01 00 02 00 03 00 04 00 05 00 06 00 07 00 08 C8 CR LF”
Field name ASCII Hex
STX : 3A
Slave Address 01 30 31
Command code 03 30 33
Bytes Count 10 31 30
Data Hi (T20) 00 30 30
Data Lo (T20) 01 30 31
Data Hi (T21) 00 30 30
Data Lo (T21) 02 30 32
Data Hi (T22) 00 30 30
Data Lo (T22) 03 30 33
Data Hi (T23) 00 30 30
Data Lo (T23) 04 30 34
Data Hi (T24) 00 30 30
Data Lo (T24) 05 30 35
Data Hi (T25) 00 30 30
Data Lo (T25) 06 30 36
Data Hi (T26) 00 30 30
Data Lo (T26) 07 30 37
Data Hi (T27) 00 30 30
Data Lo (T27) 08 30 38
Check sum(LRC) C8 43 38
END CR LF 0D 0A

LRC CHK（CHECK SUM）

The LRC (Longitudinal Redundancy Check) is calculated by summing up, module 256, the values of
the bytes from ADR1 to the last data character, then calculating the hexadecimal representation of
the 2’s-complement negation of the sum. The ELC supports LRC CHK per the Modbus Serial
specification

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A.4 Communication Protocol RTU transmission mode

This section describes the messaging for a port that has been configured to support Modbus RTU
Transmission mode
An RTU transmission message Frame is shown below
START No data input ≥ 10 ms (refer to end time list)
Slave Address Slave Address: the 8-bit binary Modbus address
Function code Command Code: the 8-bit binary Modbus function code
DATA (n-1)
Data Contents:
…….
n × 8-bit BIN data, n≦202
DATA 0
CRC CHK Low CRC Checksum:
CRC CHK High The 16-bit CRC checksum is composed of 2 8-bit binary codes
END No data input ≥ 10 ms (refer to end time list)

ADDRESS (SLAVE ADDRESS)

The target address for the Modbus message. Valid addresses are in the range of 0~254. An address
of 0 indicates a broadcast to all devices.

CMD (FUNCTION CODE) AND DATA

The content of access data depends on the function code. For descriptions of supported function codes, please
refer to A.6 in this chapter.
For example, the following two messages demonstrate reading the 8 timer words T20~T27 from an ELC at
Modbus address 1
The values of T20~T27 are mapped to Modbus Registers: H0614~H061B
Command message:
“ 01 03 06 14 00 08 04 80”
Sent message:
Field Name Example (Hex)
START No data input ≥ end time
Slave Address 01
Function code 03
06
Starting Address
14
00
Number of Points
08
CRC CHK Low 04
CRC CHK High 80
END No data input ≥ end time

ELC→PC
“ 01 03 10 00 01 00 02 00 03 00 04 00 05 00 06 00 07 00 08 72 98”
Feedback message:
Field Name Example (Hex)
START No data input ≥ end time
Slave Address 01
Function code 03
Bytes Count 10
Data Hi (T20) 00
Data Lo (T20) 01
Data Hi (T21) 00
Data Lo (T21) 02
Data Hi (T22) 00
Data Lo (T22) 03

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Field Name Example (Hex)

Data Hi (T23) 00
Data Lo (T23) 04
Data Hi (T24) 00
Data Lo (T24) 05
Data Hi (T25) 00
Data Lo (T25) 06
Data Hi (T26) 00
Data Lo (T26) 07
Data Hi (T27) 00
Data Lo (T27) 08
CRC CHK Low 72
CRC CHK High 98
END No data input ≥ end time

CRC CHK (CHECK SUM)

The CRC Check starts from “Slave Address” and ends in “The last data content.” Calculation of the
CRC is performed per the Modbus serial specification

END TIME LIST

Bau 110 150 300 60 120 240 480 960 1920
d 0 0 0 0 0 0
rate
End 381 280 140 70 35 18 9 5 3
time
(ms
)
Bau 3840 5760 3250 115200 or
d 0 0 0 more
rate
End 2 1 2 1
time
(ms
)

A-784
A.5 ELC Modbus Address mapping

This section describes how the native ELC data elements map to Modbus addresses
 Internal Device Communication Address
ELC communication Modbus communication
Device Range Type
address (Hex) address (Dec)
S 000~255 bit 0000~00FF 000001~000256
S 246~511 bit 0100~01FF 000247~000512
S 512~767 bit 0200~02FF 000513~000768
S 768~1023 bit 0300~03FF 000769~001024
X 000~377 (Octal) bit 0400~04FF 101025~101280
Y 000~377 (Octal) bit 0500~05FF 001281~001536
bit 0600~06FF 001537~001792
T 000~255
word 0600~06FF 401537~401792
M 000~255 bit 0800~08FF 002049~002304
M 256~511 bit 0900~09FF 002305~002560
M 512~767 bit 0A00~0AFF 002561~002816
M 768~1023 bit 0B00~0BFF 002817~003072
M 1024~1279 bit 0C00~0CFF 003073~003328
M 1280~1535 bit 0D00~0DFF 003329~003584
M 1536~1791 bit B000~B0FF 045057~045312
M 1792~2047 bit B100~B1FF 045313~045568
M 2048~2303 bit B200~B2FF 045569~045824
M 2304~2559 bit B300~B3FF 045825~046080
M 2560~2815 bit B400~B4FF 046081~046336
M 2816~3071 bit B500~B5FF 046337~046592
M 3072~3327 bit B600~B6FF 046593~046848
M 3328~3583 bit B700~B7FF 046849~047104
M 3584~3839 bit B800~B8FF 047105~047360
M 3840~4095 bit B900~B9FF 047361~047616
bit 0E00~0EC7 003585~003784
0~199 16-bit
word 0E00~0EC7 403585~403784
C
bit 0EC8~0EFF 003785~003840
200~255 32-bit
Dword 0EC8~0EFF 403785~403840
D 000~256 word 1000~10FF 404097~404352
D 256~511 word 1100~11FF 404353~404608
D 512~767 word 1200~12FF 404609~404864
D 768~1023 word 1300~13FF 404865~405120

C-785
ELC communication Modbus communication
Device Range Type
address (Hex) address (Dec)
D 1024~1279 word 1400~14FF 405121~405376
D 1280~1535 word 1500~15FF 405377~405632
D 1536~1791 word 1600~16FF 405633~405888
D 1792~2047 word 1700~17FF 405889~406144
D 2048~2303 word 1800~18FF 406145~406400
D 2304~2559 word 1900~19FF 406401~406656
D 2560~2815 word 1A00~1AFF 406657~406912
D 2816~3071 word 1B00~1BFF 406913~407168
D 3072~3327 word 1C00~1CFF 407169~407424
D 3328~3583 word 1D00~1DFF 407425~407680
D 3584~3839 word 1E00~1EFF 407681~407936
D 3840~4095 word 1F00~1FFF 407937~408192
D 4096~4351 word 9000~90FF 436865~437120
D 4352~4607 word 9100~91FF 437121~437376
D 4608~4863 word 9200~92FF 437377~437632
D 4864~5119 word 9300~93FF 437633~437888
D 5120~5375 word 9400~94FF 437889~438144
D 5376~5631 word 9500~95FF 438145~438400
D 5632~5887 word 9600~96FF 438401~438656
D 5888~6143 word 9700~97FF 438657~438912
D 6144~6399 word 9800~98FF 438913~439168
D 6400~6655 word 9900~99FF 439169~439424
D 6656~6911 word 9A00~9AFF 439425~439680
D 6912~7167 word 9B00~9BFF 439681~439936
D 7168~7423 word 9C00~9CFF 439937~440192
D 7424~7679 word 9D00~9DFF 440193~440448
D 7680~7935 word 9E00~9EFF 440449~440704
D 7936~8191 word 9F00~9FFF 440705~440960
D 8192~8447 word A000~A0FF 440961~441216
D 8448~8703 word A100~A1FF 441217~441472
D 8704~8959 word A200~A2FF 441473~441728
D 8960~9215 word A300~A3FF 441729~441984
D 9216~9471 word A400~A4FF 441985~442240
D 9472~9727 word A500~A5FF 442241~442496
D 9728~9983 word A600~A6FF 442497~442752

C-786
ELC communication Modbus communication
Device Range Type
address (Hex) address (Dec)
D 9984~10239 word A700~A7FF 442753~443008
D 10234~10495 word A800~A8FF 443009~443246
D 10496~10751 word A900~A9FF 443247~443502
D 10752~11007 word AA00~AAFF 443503~443758
D 11008~11263 word AB00~ABFF 443759~444014
D 11264~11519 word AC00~ACFF 444015~444270
D 11520~11775 word AD00~ADFF 444271~444526
D 11776~11999 word AE00~AEDF 444527~444750
R 0 ~ 9999 word C000~E70F 449153~459152

 Devices which are supported are listed below.

Device
X Y M S T C D
Model
C0~C127, D0~D599,
ELCB-PB X0~X177 Y0~Y177 M0~M1535 S0~S127 T0~T127
C232~C255 D1000~D1999
ELC-PA X0~X177 Y0~Y177 M0~M4095 S0~S1023 T0~T255 C0~C255 D0~D4999
ELC-PV X0~X377 Y0~X377 M0~M4095 S0~S1023 T0~T255 C0~C255 D0~D9999
ELCM-PH
ELCM-PA
X0~X377 Y0~X377 M0~M4095 S0~S1023 T0~T255 C0~C255 D0~D9999
ELC2-PH
ELC2-PA
ELC2-PB X0~X377 Y0~X377 M0~M4095 S0~S1023 T0~T255 C0~C255 D0~D4999
ELC2-PV
X0~X377 Y0~X377 M0~M4095 S0~S1023 T0~T255 C0~C255 D0~D11999
ELC2-PE

A.6 Function Code support (Slave Mode)

The following function codes are supported by the ELC in slave mode:
CMD(Hex) Explanation Device
01 (01 H) Read Coil Status of Contact S, Y, M, T, C
02 (02 H) Read Input Status S, X, Y, M,T, C
03 (03 H) Read content of register T, C, D
05 (05 H) Force single Coils S, Y, M, T, C
06 (06 H) Preset single register T, C, D
15 (0F H) Force Multiple Coils S, Y, M, T, C
16 (10 H) Preset Multiple Register T, C, D

C-787
17 (11 H) Retrieve information of Slave None
Simultaneous data read/write in a
23 (17 H) None
polling of EASY ELC LINK

COMMAND CODE：01, READ COIL STATUS OF

CONTACT
Number of Points (max) = 255 (Decimal) = FF (Hex)
Example：Read contacts T20~T56 from Slave ID#1
Master→ELC “:01 01 06 14 00 25 BF CR LF”
Sent message:
Field Name ASCII
STX 3A (Hex)
Slave Address 01
Command code 01
Bytes Count 05
Data（Coils T27…T20） CD
Data（Coils T35…T38） 6B
Data（Coils T43…T36） B2
Data（Coils T51…T44） 0E
Data（Coils T56…T52） 1B
Error Check（LRC） E6
ETX 1 0D (Hex)
ETX 0 0A (Hex)

Assume Number of Points in sent message is n (Dec), quotient of n/8 is M and the remainder is N.
When N = 0, Bytes Count in feedback message will be M; when N≠0, Bytes Count will be M+1.
ELC→Master “:01 01 05 CD 6B B2 0E 1B D6 CR LF”
Feedback message:
Field Name ASCII
STX 3A (Hex)
Slave Address 01
Command code 01
Bytes Count 05
Data (Coils T27…T20) CD
Data (Coils T35…T38) 6B

C-788
Field Name ASCII
Data (Coils T43…T36) B2
Data (Coils T51…T44) 0E
Data (Coils T56…T52) 1B
Error Check (LRC) E6
END 1 0D (Hex)
END 0 0A (Hex)

COMMAND CODE：02, READ INPUT STATUS

Example: Read status of contact Y024~Y070 from Slave ID#01
Master→ELC “: 01 02 05 14 00 25 BF CR LF”
Sent message:
Field Name ASCII
STX 3A (Hex)
Slave Address 01
Command code 02
Starting Address Hi 05
Starting Address Lo 14
Number of Points Hi 00
Number of Points Lo 25
Error Check (LRC) BF
END 1 0D (Hex)
END 0 0A (Hex)

Assume Number of Points in sent message is n (Dec), quotient of n/8 is M and the remainder is N.
When N = 0, Bytes Count in feedback message will be M; when N≠0, Bytes Count will be M+1.
ELC→Master “: 01 01 05 CD 6B B2 0E 1B E5 CR LF”
Feedback message:
Field Name ASCII
STX 3A (Hex)
Slave Address 01
Command code 02
Bytes Count 05
Data (Coils Y033…Y024) CD
Data (Coils Y043…Y034) 6B
Data (Coils Y053…Y044) B2

C-789
Field Name ASCII
Data (Coils Y063…Y054) 0E
Data (Coils Y070…Y064) 1B
Error Check (LRC) E5
END 1 0D (Hex)
END 0 0A (Hex)

COMMAND CODE：03, READ MULTIPLE

REGISTER (T, C, D)
What is the maximum number of registers that can be read?
Example: Read coils T20~T27 from Slave ID#01
Master→ELC “: 01 03 06 14 00 08 DA CR LF”
Sent message:
Field Name ASCII
STX 3A (Hex)
Slave Address 01
Command code 03
Starting Address Hi 06
Starting Address Lo 14
Number of Points Hi 00
Number of Points Lo 08
Error Check (LRC) DA
END 1 0D
END 0 0A (Hex)

ELC→Master

“:01 03 10 00 01 00 02 00 03 00 04 00 05 00 06 00 07 00 08 B8 CR LF”

Feedback message:

Field Name ASCII

STX 3A (Hex)
Slave Address 01
Command code 03
Bytes Count 10

C-790
Field Name ASCII
Data Hi (T20) 00
Data Lo (T20) 01
Data Hi (T21) 00
Data Lo (T21) 02
Data Hi (T22) 00
Data Lo (T22) 03
Data Hi (T23) 00
Data Lo (T23) 04
Data Hi (T24) 00
Data Lo (T24) 05
Data Hi (T25) 00
Data Lo (T25) 06
Data Hi (T26) 00
Data Lo (T26) 07
Data Hi (T27) 00
Data Lo (T27) 08
Error Check (LRC) C8
END 1 0D (Hex)
END 0 0A (Hex)

COMMAND CODE：05, WRITE SINGLE COIL

A data value of FF00 (Hex) turns the coil on. A data value of 0000 (Hex) turns the coil off. All other
data values are invalid and will have no effect.
Example: Force coil Y0 ON
Master→ELC “: 01 05 05 00 FF 00 F6 CR LF”
Sent message:
Field Name ASCII
Heading 3A (Hex)
Slave Address 01
Command code 05
Coil Address Hi 05
Coil Address Lo 00
Force Data Hi FF
Force Data Lo 00
Error Check ( LRC ) F6

C-791
END 1 0D (Hex)
END 0 0A (Hex)

ELC→Master “: 01 05 05 00 FF 00 F6 CR LF”
Feedback message:
Field Name ASCII
Heading 3A (Hex)
Slave Address 01
Command code 05
Coil Address Hi 05
Coil Address Lo 00
Force Data Hi FF
Force Data Lo 00
Error Check ( LRC ) F6
END 1 0D (Hex)
END 0 0A (Hex)

COMMAND CODE：06, WRITE SINGLE

REGISTER
Example 1: Setting Register T0 to 12 34
Master→ELC “: 01 06 06 00 12 34 AD CR LF”
Sent message:
Field Name ASCII
Heading 3A (Hex)
Slave Address 01
Command code 06
Register Address Hi 06
Register Address Lo 00
Preset Data Hi 12
Preset Data Lo 34
Error Check ( LRC ) AD
END 1 0D (Hex)
END 0 0A (Hex)

ELC→Master “: 01 06 06 00 12 34 AD CR LF”
Feedback message:

C-792
Field Name ASCII
Heading 3A (Hex)
Slave Address 01
Command code 06
Register T0 Address Hi 06
Register T0 Address Lo 00
Preset Data Hi 12
Preset Data Lo 34
Error Check ( LRC ) AD
END 1 0D (Hex)
END 0 0A (Hex)

Example 2:
Case 1: C0
Master→ELC : 01 06 0E 00 12 34 AF CR LF
Case 2: C232 (32bit) (This is an exception of the function code.)
Master→ELC: 01 06 0E E8 12 34 56 78 EF CR LF
Case 3: D10
Master→ELC: 01 06 10 0A 12 34 99 CR LF
Case 4: D1000
Master→ELC: 01 06 13 E8 12 34 BA CR LF

COMMAND CODE：15, WRITE MULTIPLE

COILS
Max contacts/coils: 255
Example: Set Coil Y007…Y000 = 1100 1101, Y011…Y010 = 01.
Master→ELC “: 01 0F 05 00 00 0A 02 CD 01 11 CR LF”
Sent message:
Field Name ASCII
Heading 3A (Hex)
Slave Address 01
Command code 0F
Coil Address Hi 05
Coil Address Lo 00
Quantity of Coils Hi 00
Quantity of Coils Lo 0A

C-793
Field Name ASCII
Byte Count 02
Force Data Hi CD
Force Data Lo 01
Error Check (LRC) 11
END 1 0D (Hex)
END 0 0A (Hex)

ELC→PC “: 01 0F 05 00 00 0A E1 CR LF”
Feedback message:
Field Name ASCII
Heading 3A (Hex)
Slave Address 01
Command code 0F
Register T0 Address Hi 05
Register T0 Address Lo 00
Preset Data Hi 00
Preset Data Lo 0A
Error Check ( LRC ) E1
END 1 0D (Hex)
END 0 0A (Hex)

COMMAND CODE：16, WRITE MULTIPLE

REGISTER
What is the maximum number of registers supported?
Example: Set register T0 to 00 0A, T1 to 01 02.
Master→ELC “: 01 10 06 00 00 02 04 00 0A 01 02 C6 CR LF”
Sent message:
Field Name ASCII
Heading 3A (Hex)
Slave Address 01
Command code 10
Starting Address Hi 06
Starting Address Lo 00
Number of Register Hi 00
Number of Register Lo 02

C-794
Byte Count 04
Data Hi 00
Data Lo 0A
Data Hi 01
Data Lo 02
Error Check (LRC) C6
END 1 0D (Hex)
END 0 0A (Hex)

ELC→Master “: 01 10 06 00 00 02 E7 CR LF”
Feedback message:
Field Name ASCII
Heading 3A (Hex)
Slave Address 01
Command code 10
Starting Address Hi 06
Starting Address Lo 00
Number of Registers Hi 00
Number of Registers Lo 02
Error Check ( LRC ) E7
END 1 0D (Hex)
END 0 0A (Hex)

COMMAND CODE：17, REPORT SLAVE ID

Returns a description of the ELCs present state
Sent message:
Field Name ASCII
Heading 3A (Hex)
Slave Address 01
Command code 11
Error Check (LRC) EE
END 1 0D (Hex)
END 0 0A (Hex)

C-795
Feedback message:
Field Name ASCII
Heading 3A (Hex)
Slave Address 01
Command code 11
Byte Count 04
Slave ID 01
Run Indicator Status
00 = OFF FF
FF = ON
Data 0（D1001 HI） 40
Data 1（D1001 LOW） 10
Error Check (LRC) 9A
END 1 0D (Hex)
END 0 0A (Hex)

What is the “other information” in Data 0 and Data 1?

Exception response:
If the ELC is in slave mode and is unable to execute the Modbus function, it will return one of the
following Exception codes:
Exception
Meaning:
code:
Illegal function code:
01 The function code received in the command message is not supported by
the ELC.
Illegal device address:
02 The device address received in the command message is not valid for the
ELC.
Illegal device value:
03 The device value received in the command message is not valid for the
ELC.
Check Sum Error
Check if the check Sum is correct
07 Illegal command messages
The command message is too short.
Command message length is out of range.

C-796
A.7 Function Code Support (Master mode)

The ELC can function as a Modbus master device. Modbus messages are generated by the ELC
based on the inclusion of Modbus message command. The table below describes the Modbus
message commands and the corresponding Modbus Function codes.
Command Function Code Description
MODRD
03H Read multiple registers The ELC can read up to 6 register values
API=100
MODWR
06H Write Single Register The ELC can write a single register value
API=101
The ELC can read the register values by H03/H04.
MODRW The ELC can read the coil states by H02.
Selectable in the instruction.
API=150 The ELC can write the register values by H06/H10.
The ELC can write the coil states by H05/H0F.

C-797
MEMO

Troubleshooting

This chapter provides information for troubleshooting during ELC operation.

This Chapter Contains

B.1 Common Problems and Solutions ....................................................................... B-799

B.2 Fault Code Table (Hex) .......................................................................................... B-802

B.3 Error Detection Addresses ................................................................................... B-804

B.4 Table for Self-Detecting Abnormality ................................................................... B-805

C-798
B Troubleshooting
B.1 Common Problems and Solutions

The following tables list common problems and troubleshooting procedures for the ELC system.

System Operation
Symptom Troubleshooting and Corrective Actions
All LEDs are OFF 1. Check the power supply wiring.
2. Check if the power supply output power capacity is sufficiently rated
for the ELC control units.
3. Check that the supply voltage is in the allowable range and is free
of fluctuation.
4. If the power supply is shared with other devices, disconnect the
power supply wiring to the other devices. If the LEDs on the ELC
control unit now turn ON, the capacity of the power supply is
insufficient. Add another power supply for the other devices or
increase the capacity of the power supply.
5. If the problem can not be resolved with the instructions above,
contact the Eaton support center.
ERROR LED is 1. A flashing ERROR LED potentially indicates one of the following
flashing issues:
 An invalid command,
 A communication error,
 An invalid operation, or missing instructions,
The corresponding error code and error step are stored in special
registers of the ELC.
Fault code: D1004
Fault step: D1137
The Fault code can be read using ELCSoft. The fault codes are
described in section B.2 of this document.
2. If the LED is flashing rapidly and it is not possible to connect
ELCSoft to the ELC, a low 24VDC supply voltage is indicated.
Check for possible 24VDC supply overload.
3. A steady ON LED indicates the program loop execution time is over
the preset time (D1000 preset value). Check the program and the
WDT (Watch Dog Timer).
4. If the problem can not be resolved with the instructions above,
contact the Eaton support center

C-799
Symptom Troubleshooting and Corrective Actions
Input does not turn Check the corresponding input indicator LED. If the indicator is OFF:
on. 1. Check the wiring of the input device
2. Check that power is present at the input terminals, and that the
voltage level is within the specified range for the ELC Input.
3. If the power is present at the input terminal within the specified
range but the input LED is off, a failure in the ELC’s input circuit is
indicated. Contact the Eaton support center.
If the power is NOT present at the input terminal, a failure in the input
device or input power supply is indicated.
If the input LED indicator is ON:
1. Monitor the input condition using a programming tool. If the input
monitored is OFF, a failure in the ELC’s input circuit is indicated.
Contact the Eaton support center.
If the input monitored is ON, check the program flow and input address
assignments.
Input does not turn Check the corresponding Input LED. If the indicator is ON
off 1. Check the wiring of the input device
2. If a two-wire sensor is used, check for excessive leakage current.
3. Check the voltage level at the input terminal. If it is below the input
threshold but the Input LED is ON, a failure in the ELC input circuit is
indicated. Contact the Eaton support center
If the LED indicator is OFF
1. Monitor the input condition with a programming tool. If the input
monitored is ON, a failure in the ELC’s input circuit is indicated.
Contact the Eaton support center
2. If the input monitored is off check the program flow and input
address assignment.

C-800
Symptom Troubleshooting and Corrective Actions
Output does not Check the corresponding output LED. If the indicator is ON,
turn on. 1. Check the wiring of the loads.
2. Check if power is properly supplied to the loads.
3. If the wiring is correct but power is not supplied to the load, there is
potentially a fault with the ELC’s output circuit. Contact the Eaton
support center
If the corresponding output LED is off,
1. Monitor the output condition using a programming tool. If the output
monitored is turned Off, recheck your program
2. If the output monitored is on, there is a potential duplicate output
instruction, or a potential fault in the ELC output circuit

C-801
B.2 Fault Code Table (Hex)

Errors detected in the ELC program will result in a flashing of the ERROR LED and M1004 = ON.
The corresponding fault code (hex) can be read from special register D1004. The program address
where the error occurred is stored in the data register D1137. If the error is a general loop error, the
address stored in D1137 will be invalid.
Fault Code Description Action
0001 Operand bit device S exceeds the usage range
0002 Label P exceeds the usage range or duplicated
0003 Operand KnSm exceeds the usage range
0102 Interrupt pointer I exceeds the usage range or duplicated
0202 Instruction MC exceeds the usage range
0302 Instruction MCR exceeds the usage range
0401 Operand bit device X exceeds the usage range
0403 Operand KnXm exceeds the usage range
0501 Operand bit device Y exceeds the usage range
0503 Operand KnYm exceeds the usage range
0601 Operand bit device T exceeds the usage range
0604 Operand word device T register usage exceeds limit
0801 Operand bit device M exceeds the usage range
Check the D1137
0803 Operand KnMm exceeds the usage range (Error step
0B01 Operand K, H available range error number)

0D01 DECO Misuse operand

Re-enter the
0D02 ENCO Misuse Operand
instruction
0D03 DHSCS Misuse Operand
correctly
0D04 DHSCR Misuse Operand
0D05 PLSY Misuse Operand
0D06 PWM Misuse Operand
0D07 FROM / TO Misuse Operand
0D08 PID Misuse Operand
0D09 SPD Misuse Operand
0D0A DHSZ Misuse Operand
0D0B IST Misuse Operand
0E01 Operand bit device C exceeds the usage range
0E04 Operand word device C register usage exceeds limit
0E05 DCNT misuse operand C
0E18 BCD Conversion Error
0E19 Division (divisor=0)

C-802
Fault Code Description Action
0E1A Device use is out of range (including index registers E, F)
0E1B negative number after radical expression
0E1C FROM/TO communication error
0F04 Operand word device D register usage exceeds limit
0F05 DCNT Misuse Operand D
0F06 SFTR Misuse Operand Check the D1137
0F07 SFTL Misuse Operand (Error step
number)
0F08 REF Misuse Operand
0F09 Improper use of operands of WSFR, WSFL instructions Re-enter the

0F0A Number of TTMR, STMR instruction exceed the range instruction

correctly
0F0B Number of SORT instruction exceed the range
0F0C Number of TKY instruction exceed the range
0F0D Number of HKY instruction exceed the range
1000 ZRST Misuse Operand
10EF E and F misuse operand or exceed the usage range
2000 Usage exceed limit (MTR, ARWS, TTMR, PR, HOUR)

Fault Code Description Action

C400 An unrecognized instruction code is being used

C401 Loop Error
C402 LD / LDI continuously use more than 9 times
C403 MPS continuously use more than 9 times
C404 FOR-NEXT exceed 6 levels
STL / RET used between FOR and NEXT
SRET / IRET used between FOR and NEXT Select
C405
MC / MCR used between FOR and NEXT programming
END / FEND used between FOR and NEXT mode and correct
C407 STL continuously use more than 9 times the identified error
C408 Use MC / MCR in STL, Use I / P in STL
C409 Use STL/RET in subroutine or interrupt program
C40A Use MC / MCR in subroutine or interrupt program
C40B MC / MCR does not begin from N0 or discontinuously
C40C MC / MCR corresponding value N is different
C40D Use I / P incorrectly

C-803
Fault Code Description Action

IRET does not follow by the last FEND command SRET

C40E
does not follow by the last FEND command
ELC program and data in parameters have not been
C40F
initialized
C41B Invalid RUN/STOP instruction to extension module
The number of input/output points of I/O extension unit is
C41C
larger than the specified limit
C41D Number of extension modules exceeds the range Select
C41F Failing to write data into memory programming
C430 Initializing parallel interface error mode and correct
C440 Hardware error in high-speed counter the identified error
C441 Hardware error in high-speed comparator
C442 Hardware error in MCU pulse output
C443 No response from extension unit
C4EE No END command in the program
C4FF Invalid instruction (no such instruction existing)

B.3 Error Detection Addresses

Error Check
Description Drop Latch STOP  RUN RUN  STOP
Address
M1067 Program execution error flag None Reset Latch
M1068 Execution error latch flag None Latch Latch
D1067 Algorithm error code None Reset Latch
D1068 Step value of algorithm errors None Latch Latch

D1067
Description
Error Code
0E18 BCD Conversion Error
0E19 DIVISION (divisor=0)
0E1A Floating Point exceeds the usage range
0E1B The value of square root is negative

C-804
B.4 Table for Self-Detecting Abnormality

When you encounter abnormality using the product, you can analyze the problem first by doing the
self detections below.
Abnormality Possible cause Suggested correction
Check if the removable terminal block is
Loosened terminal block
loosened.
Output point abnormality The input counting specification may not
Check if the hardware is normal by
match the pulse output frequency of the
low-frequency pulse counting.
ELC model in use.
Make sure the RS-232 cable is at least 3
The length of communication cable meters long to ensure normal
communication (specification unknown).
Communication
Broadcast from station 0 first by RS-232
abnormality
Incorrect communication protocol or to search for communication protocol and
address setting address and later confirm by RS-485
communication.
Make sure the MPU is tightly connected
Extension module unable to the extension module and compare to
Poor connection or MPU problem
to work make sure whether the problem lies in
the MPU or the extension module.
Counter (input point) The applicable frequency exceeds the The frequency should be within the
abnormality maximum bandwidth. allowed ELC specifications.
Record the error code first, and write
whether the ERROR LED should not
flash anymore by syntactically correct
program. Model with battery should be
ERROR LED flashes Incorrect program syntax
checked whether the time of RTC is
correct (not being correct means the
battery might once be unattached,
causing reset of time).
Make sure the power supply voltage is
L.V. LED On Low input power supply
normal.
RUN LED Off after There is no program inside the new
Write in the program first.
execution ELC, resulting in misjudgment.

Installing a USB Driver in the ELC

This Chapter Contains

C.1 Installing the USB Driver for ELC2-PE.......................................................................... C-806

C.2 Installing the USB Driver for ELC2-PA.......................................................................... C-810

C-805
5.1 Installing the USB Driver for ELC2-PE

This section introduces the installation of the Eaton ELC2-PE USB driver in the computer. After the
driver is installed, the USB interface can be used as the serial port (RS-232). Please use the
standard USB cable. The length of the cable should be within five meters.

Installing the driver

The personal computer and ELC2-PE are connected through a USB cable (A type) and a mini USB
(B type) cable. The steps of installing the USB driver for ELC2-PE are described below.
Step 1: After a computer and ELC2-PE are connected, users can find MGE USB UPS in the Device
Manager window.

C-806
Step 2: Right-click MGE USB UPS, and select Update Driver… on the context menu to open the
Hardware Update Wizard window.

Step 3: Click Browse to specify the folder where the USB driver is saved, and then click Next to start
the installation of the USB driver.

Step 4: After the USB driver is installed, the users can find ELC2 series PLC and the communication

C-807
port assigned to it in the Device Manger window. The usage of this device is the same as
that of RS-232.

Step 5: Click Communication Setting on the Options menu to open the Communication Setting
window. Select RS232 in the Type drop-down list box in the Connection Setup section,
select the communication port assigned by the USB in the Communication Setting section,
and click OK.

C-808
Step 6: After the communication setting is complete, the users can find that RS232 in the
communication work area is checked. They can download the program to ELC2-PE, upload
the program from ELC2-PE through the USB, and use the online mode.

C-809
5.2 Installing the USB Driver for ELC2-PA

This section introduces the installation of the Eaton ELC2-PA USB driver in the computer. After the
driver is installed, the USB interface can be used as the serial port (RS-232). Please use the
standard USB cable. The length of the cable should be within five meters.

Installing the driver

The personal computer and ELC2-PA are connected through a USB (A type) cable and a mini USB
(B type) cable. The steps of installing Silicon Laboratories CP210x VCP Drivers for Windows
2000/XP/2003 Server/Vista are described below.
Step 1: Click Next in the Silicon Laboratories CP210x VCP Drivers for Windows 2000/XP/2003
Server/Vista window.

Step 2: Click Next in the Silicon Laboratories CP210x VCP Drivers for Windows 2000/XP/2003
Server/Vista window.

C-810
Step 3: Click Finish in the Silicon Laboratories CP210x VCP Drivers for Windows 2000/XP/2003
Server/Vista window.

Step 4: Click Install in the Silicon Laboratories CP210x USB to UART Bridge Driver Installer
window which appears.

Step 5: After Installed is clicked, the Scanning window will appear.

C - 8 11
Step 6: After the system is scanned, the Success window will appear. Users can click OK.

Step 7: After the driver is installed, the users can find Silicon Labs CP210x USB to UART Bridge
and the communication port assigned to it in the Device Manger window.

C-812

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