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11 views20 pages

Memory 1 - Posted

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Sal7i
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 CO6: Analyze the levels of computer memory and

its operation (registers, main memory, cache


memory, etc.).
Computer Memory
Introduction & Cache Memory
Introduction

 We introduce the different levels of memory in a computer


system.

 Also the Cache memory will be considered in details.


Computer Structure - Top Level

Computer

Central
Processing Memory
Unit

Computer
Systems
Interconnection

Input
Output
Computer Memory

 Memory holds instructions and data.

 Speed of executing a program depends mainly on data


transfer between CPU and Memory.

 Ideally, memory should be Large, Fast, and Inexpensive.


Memory Hierarchy
 Registers
 In CPU
 Internal memory
 May include one or more levels of cache
 “Main memory
 Both are called RAM
 External memory
 Backing store (Magnetic Disks, Compact Disks)
Characteristics of the hierarchy:
As we go down the hierarchy we have:
 Decreasing cost per bit
 Increasing Capacity
 Increasing Access time
 Decreasing frequency of access
The Memory
Main Memory:

 A set of consecutive locations to store data and


instructions.

 Memory locations are accessed by


addresses.

 Execution of a program is sequential.

Address (address bus)

Data (data bus)

R/W (control bus)


Memory Performance Metrics

 Access time
 Time between presenting the address and getting the
valid data

 Memory Cycle time


 Time between two successive memory operations (two
Read operations for example).
 Time may be required for the memory to “recover”
before next access
 Cycle time = Access time+ Recovery time
The Bottom Line

 How much?
 Capacity
 How fast?
 Time
 How expensive?
 Money

 Ideally, memory should be large, Fast, and inexpensive.

 Thus a system should contain smaller, faster, more


expensive memory and larger, cheaper, slower memory.
RAM Semiconductor Memory

 RAM (Main Memory or Cache)


 (RAM) Random Access Memory
 Misnamed as all semiconductor memory is random
access
 Read/Write
 Volatile (To keep data, power must be applied)
 Temporary storage
 Static or dynamic
Memory Cell Operation
Dynamic RAM
 Bits stored as charge in capacitors
 Charges leak
 Need refreshing even when powered
 Simpler construction
 Smaller per bit
 Less expensive
 Need refresh circuits
 Slower
 Main memory
 Essentially analogue
 Level of charge determines the stored value
Dynamic RAM Structure
DRAM Operation
 Address line active when bit read or written
 Transistor switch closed (current flows)
 Write
 Set Voltage to bit line
 High for 1 low for 0
 Then activate address line
 Transfers charge to capacitor
 Read
 Address line selected
 transistor turns on
 Charge from capacitor fed via bit line to sense amplifier
 Compares with reference value to determine 0 or 1
 Capacitor charge must be restored (refreshing)
Static RAM
 Uses flip-flops
 No charges to leak
 No refreshing needed when powered
 More complex construction
 Larger per bit
 More expensive
 Does not need refresh circuits
 Faster
 Cache
 Digital (Voltages is either 0 or 5v)
Static RAM Structure
Static RAM Operation
 Transistor arrangement gives stable logic state
 C1 node represents the bit stored

 State 1
 C1 high, C2 low
 T1 T4 off, T2 T3 on

 State 0
 C2 high, C1 low
 T2 T3 off, T1 T4 on
 Address line controls transistors T5 T6
 Write – apply value to B & compliment to B and
activate address lines
 Read – activate address lines, then value is on line B
SRAM vs DRAM

 Both volatile
 Power needed to preserve data
 Dynamic cell
 Simpler to build, smaller
 More dense
 Less expensive
 Needs refresh
 Larger memory units (Main Memory)
 Static
 Faster
 Cache
Other Semiconductor Memories
 Read Only Memory (ROM)
 Programmable ROM (PROM)
 Erasable PROM (EPROM)
 Electrically EPROM (EEPROM)
 Flash

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