0% found this document useful (0 votes)
28 views7 pages

Digital Signal Processor, FPGA, ARM Processor With DSP Extension

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
28 views7 pages

Digital Signal Processor, FPGA, ARM Processor With DSP Extension

Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 7

Digital Signal Processor, FPGA, ARM Processor with DSP

Extension

Ⅰ. ARM
ARM (Advanced RISC Machines) is a well-known enterprise in the microprocessor industry,
designing a large number of high-performance, cheap and low-energy RISC processors, related
technologies, and software. ARM is also a single-chip microcomputer. The ARM architecture is
the first RISC microprocessor designed for low-budget markets. It is basically the industry
standard of 32-bit single-chip microcomputers. It provides a series of the kernel, system
expansion, microprocessor, and system chip solutions. Four functional modules can be
configured and produced by manufacturers according to the requirements of different users.
Because all products adopt a universal software system, the same software can run in all
products. At present, ARM accounts for more than 90 shares in the handheld device market,
which can effectively shorten the application development and testing time and reduce research
and development costs.

Ⅱ. DSP
DSP (digital signal processor) is a unique microprocessor with its own complete instruction
system. It is a device that processes a large amount of information with digital signals. A digital
signal processor includes control units, computing units, various registers and a certain number
of storage units in a small chip. It can also connect several memory on its periphery and
communicate with a certain number of external devices. It has comprehensive software and
hardware functions, which itself is a Microcomputer.

The DSP adopts Harvard's design, that is, the data bus and the address bus are separated, so
that programs and data are stored in two separate spaces, allowing for complete overlapping of
instructions and execution instructions. That is to say, the next instruction can be extracted and
decoded while executing the previous instruction, which greatly improves the speed of the
microprocessor.
It also allows transmission between program space and data space, because it increases the
flexibility of the device. The working principle is to receive analog signals, convert them into 0 or
1, modify, delete and strengthen the digital signals, and interpret digital data back into analog
data or actual environment formats in other system chips. It is not only programmable but also
runs at tens of millions of complex instruction programs per second in real-time, far exceeding the
general microprocessor. It is an increasingly important computer chip in the digital electronic
world.

Its strong data processing ability and high running speed are the two most praiseworthy features.
Because of its strong computing power, fast speed, small size, and high degree of flexibility in
software programming, it provides an effective way to engage in various complex applications.

Main features of DSP chip

1. One multiplication and one addition can be completed in an instruction cycle.

2. The program is separated from the data space and can access instructions and data at the
same time.

3. It has fast RAM in the chip, which can usually be accessed in both blocks through a separate
data bus.
4. Hardware support with low or no overhead loops and jumps

5. Fast interrupt handling and hardware I/O support


6. Multiple hardware address generators that operate in a single cycle

7. Multiple actions can be performed in parallel.

8. Support assembly line operations, so that finger extraction, decoding, and execution can
overlap.

Of course, compared with the universal microprocessor, other general functions of the DSP chip
are relatively weak.

Ⅲ. FPGA
FPGA (Field Programmable Gate Array) is the product of further development on the
basis of programmable devices such as PAL, GAL, PLD, etc. It is the most integrated
circuit (ASIC). A tall one. FPGA adopts a new concept of Logic Cell Array, which includes
configurable logic module CLB (Configurable Logic Block) and output input module IOB (Input
O) Utput Block) and Interconnect is three parts.
Users can reconfigure the logic modules and I/O modules within FPGA to realize the
user's logic. It also has the characteristics of static repeatable programming and dynamic system
reconstruction, so that the functions of hardware can be modified by programming like software.
As a semi-customized circuit in the field of special integrated circuits (ASIC), FPGA not only
solves the shortcomings of customized circuits but also overcomes the shortcomings of the
limited number of gate circuits of the original programmable device.
It is no exaggeration to say that FPGA can complete the functions of any digital device, from
high-performance CPU to simple 74 circuits, which can be implemented with FPGA. FPGA is like
a piece of white paper or a pile of building blocks. Engineers can freely design a digital system
through traditional schematic input methods or hardware description languages. Through
software simulation, we can verify the correctness of the design in advance.

After the PCB is completed, you can also use the online modification ability of FPGA to modify
the design at any time without changing the hardware circuit. Using FPGA to develop digital
circuits can greatly shorten the design time, reduce the PCB area and improve the reliability of
the system.
FPGA is set by programs stored in the RAM on the chip to set its working state, so the on-
chip RAM needs to be programmed when working. Users can adopt different programming
methods according to different configuration modes. When powered up, the FPGA chip reads the
data from EPROM into the in-chip programming RAM, After configuration is completed, the
FPGA enters the working state. After the power is off, FPGA is restored to the white film, and the
internal logical relationship disappears, so FPGA can be used repeatedly.
FPGA programming does not require a dedicated FPGA programmer, just a universal EPROM
and PROM programmer. When you need to modify the FPGA function, just change an EPROM.
In this way, the same FPGA and different programming data can produce different circuit
functions. Therefore, the use of FPGA is very flexible. It can be said that the FPGA chip is one of
the best choices for small batch systems to improve system integration and reliability.

Ⅳ. So what are the differences between them?


ARM has strong transaction management functions, which can be used to run interfaces and
applications. Its advantages are mainly reflected in control, while DSP is mainly used for
computing, such as encryption and decryption, modem and demodulation, etc. Its advantages are
strong data processing ability and high running speed.
FPGA can be programmed with VHDL or Verilog HDL, which is flexible. Because it can program,
debug, reprogram and repeat operations, it can fully develop and verify the design. When there
are a small number of changes in the circuit, it can show the advantages of FPGA. Its field
programming ability can extend the life of the product in the market, and this ability can be used
to upgrade or debug the system.
As a Processor, what are the advantages and disadvantages of these devices? In fact,
C51, ARM and DSP are not provided to users as chips alone, but need to be supported by some
peripheral circuits. For example: memory controller, interrupt controller, timer, UART, SPI, I2C,
etc.

Compare from the perspective of processor


C51 is 8-bit, ARM is 32-bit, DSP is 16-bit, and there are also higher.
In terms of computing power, C51 is the weakest, DSP is the strongest, and ARM is centered.
The structure varies greatly. The simplest C51 is the general Vonne Norman structure, the RISC
above ARM 9 is the Harvard structure, and the DSP generally uses the Harvard structure.
Generally, the chip area of C51 is very small, and the working frequency is very low (usually more
than 10 MHz, some are 24MHz), so the power consumption is low; DSP is very high (the height
reaches more than 300MHz), so the power consumption is large; the area of the ARM chip is
also very small, and the ARM 7 is 0.55 square millimeters. The power consumption is also
relatively small. The frequency is about (between dozens and 200MHz)
Therefore, C51 is mainly used in control systems that do not require too much computing,
generally equipped with rich peripheral modules; DSP is mainly used in high-end systems that
require complex computing, such as image processing, encryption, and decryption, navigation
systems, etc., and peripheral modules are generally less; ARM It's a compromise between C51
and DSP,
Emphasize one point: C51's performance is far inferior to that of ARM and DSP. but it still
occupies an important place because of the performance-price ratio; because it is too mature, too
small, too cheap, and DSP is also indispensable in some areas that require complex computing;
ARM's success is that he has found a compromise. Heartfelt points and establish a very flexible
business model

Ⅴ. CPLD
CPLD (Complex Programmable Logic Device) is a complex programmable logic device
developed from PAL and GAL devices. It is relatively large in scale and complex in structure and
falls within the scope of large-scale integrated circuits.
It is a digital integrated circuit that which users construct logical functions according to their
own needs. The basic design method is to generate the corresponding target file with the help of
the integrated development software platform, use a schematic diagram, hardware description
language and other methods, and transfer the code to the target chip by downloading the cable
("programming in the system") to realize the designed digital system.

Ⅵ. The difference between FPGA and CPLD


The identification and classification of FPGA and CPLD are mainly based on their structural
characteristics and working principles. The usual classification method is to call devices that form
logical behaviors by-product item structure CPLD. such as Lattice's ispLSI series, Xilinx's
XC9500 series, Altera's MAX7000S series, and Lattice (former Vanti) S) Mach series, etc.
Devices that form logical behaviors by table lookup are called FPGA, such as Xilinx's SPARTAN
series, Altera's FLEX10K or ACEX1K series.
Although FPGA and CPLD are both programmable ASIC devices and have many common
characteristics, they have their own characteristics due to differences in CPLD and FPGA
structures.

Respective characteristics
CPLD is more suitable for completing various algorithms and combination logic, and FPGA is
more suitable for completing timing logic. In other words, FPGA is more suitable for structures
rich in triggers, while CPLD is more suitable for structures with limited triggers and rich product
items.
The continuous wiring structure of CPLD determines that its timing delay is uniform and
predictable, while the segmented wiring structure of FPGA determines the unpredictability of its
delay.
FPGA is more flexible than CPLD in programming. CPLD is programmed by modifying the
logical function with fixed internal connection circuits. FPGA is mainly programmed by changing
the wiring of the internal connection; FPGA can be programmed under the logic gate,
while CPLD is programmed under the logic block.
FPGA is more integrated than CPLD. with a more complex wiring structure and logical
implementation.
CPLD is more convenient to use than FPGA. CPLD programming adopts E2PROM or
FASTFLASH technology, which is simple to use without external memory chips, while FPGA
programming information needs to be stored on external memory, and the usage method is
complicated.
CPLD is faster than FPGA and has greater time predictability. This is because FPGA is gate-level
programming, and the CLB adopts distributed interconnection, while CPLD is logical block-level
programming, and the interconnection between logical blocks is set-general.
In terms of programming methods, CPLD is mainly based on E2PROM or flash
memory programming, with up to 10,000 times. The advantage is that programming information
is not lost when the system is powered off. CPLD can be divided into two categories:
programming or the programmer and system programming; FPGA is mostly based on SRAM
programming. The program, programming information is lost when the system is powered off.
Every time it is powered on, the programming data needs to be rewritten into SRAM from the
outside of the device. Its advantage is that it can be programmed any time and quickly
programmed at work, so as to realize dynamic configuration at the board and system levels.
CPLD is confidential and FPGA is poor.

Generally speaking, CPLD consumes more power than FPGA, and the higher the integration, the
more obvious it is.

A-law & u-Law

An A-law algorithm is a standard companding algorithm, used in European 8-bit PCM digital
communications systems to optimize, i.e. modify, the dynamic range of an analog signal for
digitizing. It is one of the two companding algorithms in the G.711 standard from ITU-T, the other
being the similar μ-law, used in North America and Japan.

The μ-law algorithm provides a slightly larger dynamic range than the A-law at the cost of worse
proportional distortion for small signals. By convention, A-law is used for an international
connection if at least one country uses it.

A-law vs u-Law

A-law and u-law are two algorithms that are used in modifying an input signal for digitization.
These algorithms are implemented in telephony systems all over the world. The two algorithms
have a fairly minimal difference and most people would not know the difference. The first
difference between the two is the dynamic range of the ouput; U-law has a larger dynamic range
than a-law. Dynamic range is basically the ratio between the quietest and loudest sound that can
be represented in the signal. The downside of having a higher dynamic range is greater distortion
of small signals. This simply means that a-law would sound better than u-law when the sound
input is very soft.

The advantages and disadvantages of one over the other are fairly insignificant and both are
currently in use in different areas of the world. U-law is currently being used by companies in
North America and in Japan while A-law is being used in Europe. Other areas use a mixture of
the two depending on the country. Most countries use only one standard so there should be no
problems with local call or even with international calls between countries that use the same
standard. A problem arises when a call is made from a country that uses one standard to a
country that uses the other standard. Although it is possible to facilitate a conversion from one
algorithm to the other, this would be a lossy conversion and the result would be a degraded
signal. To avoid the problem, a-law is the algorithm that would be used whenever either side uses
a-law. Because of this, it is necessary for countries that use u-law to also have the capability of
using a-law while countries that use a-law do not necessarily have to be able to do u-law.

Summary:

U-Law has a larger dynamic range compared to A-law

U-Law has worse distortion with small signals compared to A-law

U-Law is used in North-America and Japan while A-law is commonly used in Europe

A-law takes precedence over u-law with international calls

You might also like