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EE8551 –
MICROPROCESSORS AND MICROCONTROLLERS
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AND TECHNOLOGY (AUTONOMOUS SYLLABUS UNIT III 8051 MICRO CONTROLLER Hardware Architecture, pinouts – Functional Building Blocks of Processor – Memory organization – I/O ports and data transfer concepts– Timing Diagram – Interrupts- Data Transfer, Manipulation, Control Algorithms& I/O instructions, Comparison to Programming concepts with 8085
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AND TECHNOLOGY (AUTONOMOUS INTRODUCTION • Microcontrollers as the name suggests, are small controllers. They are like single chip computers that often embedded into other systems to function as processing / controlling unit. • Microcontrollers are single - chip Microcomputers. • A microcontroller has a CPU (a microprocessor) in addition to a fixed amount of RAM, ROM and I/O parts and a timer on a single chip. • The fixed amount of on - chip RAM, ROM, timer and I/O parts in microcontrollers makes them ideal for many applications in which cost and space are less. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS • The word microprocessor means a CPU only. • The functional blocks like memory and other peripherals are to be connected externally to a microprocessor chip to make a complete microcomputer. • But the microcontrollers are having all these facilities in a single chip. • The examples for microcontrollers are Intel MCS - 51 (8051), Atmel 89 C XX, Motorola 68HC X 11XX, PIC family by microchip (PIC 16C64X).
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AND TECHNOLOGY (AUTONOMOUS Differences between microprocessors and microcontrollers • Microprocessors are intended to be general - purpose digital computers whereas microcontrollers are intended to be special - purpose digital controllers. • Microprocessors contain a CPU, memory addressing circuits and interrupt handling circuits. Microcontrollers have these features as well as timers, parallel and serial I/O and internal RAM and ROM.
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AND TECHNOLOGY (AUTONOMOUS Features of microcontrollers • High integration of functionality : Microcontrollers are called as single chip computers because they have on - chip memory and I/O circuitry and other circuitries that enable them to function as small stand - alone computers without other supporting circuitry. • Field programmability, flexibility : Microcontrollers often use EPROM or E2PROM as their storage device to allow field programmability so they are flexible to use. Once the program is tested to be correct then large quantities of microcontrollers can be programmed to be used in embedded systems. • Easy to use.
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AND TECHNOLOGY (AUTONOMOUS Advantages of microcontrollers • The overall system cost is low, as the peripherals are integrated in a single chip. • The product is of small size as compared to the microprocessor based system and is very handy. • The system is more reliable. • The system is easy to troubleshoot and maintain. • If required additional RAM, ROM and I/O ports may be interfaced.
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AND TECHNOLOGY (AUTONOMOUS Intel 8051 microcontroller • The 8 bit microcontroller 8051 family has numbers ranging from 8031 to 8751 and are available in N-channel Metal Oxide Semiconductor (NMOS) and Complementary MOS [CMOS] construction in a variety of package types. • The intel corporation introduced an 8 bit microcontroller 8051 in 1981. • This microcontroller had 128 bytes of RAM, 4k bytes of on - chip ROM, two timers, one serial port and 4 eight bit ports all on a single chip.
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AND TECHNOLOGY (AUTONOMOUS Comparison between 8051 and 8031
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AND TECHNOLOGY (AUTONOMOUS ARCHITECTURE OF 8051 The features of the 8051 are : • 8 bit CPU with registers A (the accumulator) and B • 16 bit Program Counter (PC) and Data Pointer (DPTR) • 8 bit Program Status Word (PSW) • 64K Program memory address space • 64K Data memory address space • 128 bytes of on chip data memory • 32 I/O pins for four 8 bit ports : Port 0, Port 1, Port 2, Port 3 • Two 16 bit timers / counters : T0 and T1 • Full duplex UART : SBUF • Two external and three internal interrupt sources • On chip clock oscillator. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS • The intel 8051 contains two separate buses for both program and data. So, it has two distinctive memory spaces of 64K x 8 size for both program and data. • . It is based on an 8 bit central processing unit with an 8 bit accumulator and another 8 bit B register as main processing blocks. • Other portions of the architecture include few 8 bit and 16 bit registers and 8 bit memory locations. • It has some amount of data RAM built in the device for internal processing. • 8051 is supported with on-chip peripheral functions like I/O ports, Timers / Counters, serial communication port. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Central processing unit • The CPU is the brain of the microcontrollers reading user’s programs and executing the expected task as per instructions stored there in. • It’s primary elements are an Accumulator (ACC), B register (B), Stack pointer (SP), Program counter (PC), Program status word (PSW), Data pointer register (DPTR) and few more 8 bit registers. Accumulator • The accumulator performs arithemetic and logic functions on 8 bit input variables. Arithmetic operations include basic addition, subtraction, multiplication and division. Logical operations are AND, OR XOR as well as rotate, clear, complement. • accumulator is responsible for conditional branching decisions and provides a temporary place in a data transfer operations within the device. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS B Register • B register is used in multiply and divide operations. During execution B register either keeps one of the two inputs and then retains a portion of the result. For other instructions it is used as general purpose register. Stack Pointer • Stack Pointer (SP) is an 8 bit register. This pointer keeps track of memory space where the important register information are stored when the program flow gets into executing a subroutine. • The SP is automatically incremented or decremented for all PUSH or POP instructions and for all subroutine calls and returns.
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AND TECHNOLOGY (AUTONOMOUS Program Counter • The Program Counter (PC) is the 16 bit register giving address of next instruction to be executed during program execution and it always points to the program memory space. Data Pointer Register • The Data Pointer Register (DPTR) is the 16 bit addressing register that can be used to fetch any 8 bit data from the data memory space. When it is not being used for this purpose, it can be used as two eight bit registers, DPH and DPL. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Program Status Word • The Program Status Word (PSW) keeps the current status of the arithmetic and logic operations in different bits. The 8051 has four math flags that respond automatically to the outcomes of arithmetic and logic operations and 3 general purpose user flags that can be set 1 or cleared to 0 by the programmer as desired.
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AND TECHNOLOGY (AUTONOMOUS KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Input / Output Ports • 8051 has 32 I/O pins configured as 4 eight bit parallel ports (P0, P1, P2 and P3). • Each pin can be used as an input or as an output under the software control. These I/O pins can be accessed directly by memory instructions during program execution to get require flexibility. • These port lines can be operated in different modes and all the pins can be made to do many different tasks apart from their regular I/O function executions. • Any instruction that accesses external program memory will output the higher order byte (A8 - A15) on Port 2 during read cycle. • Port 1 and Port 3 are available for standard I/O functions. • Port 3 pins has the additional functions : 2 external interrupt lines, 2 counter inputs, 2 serial port data lines and 2 timing control storbe lines.
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AND TECHNOLOGY (AUTONOMOUS Timers / Counters • 8051 has two 16 bit Timers / Counters, T0 and T1 capable of working in different modes. Each consists of a ‘HIGH’ byte and a ‘LOW’ byte which can be accessed under software. • There is a mode control register (TMOD) and a control register (TCON) to configure these timers / counters in number of ways. • These timers are used to measure time intervals, determine pulse widths or initiate events with one microsecond resolution upto a maximum 65ms. Use software to get longer delays. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Serial Port • The 8051 has a high speed full duplex serial port which is software configurable in 4 basic modes : • Shift register mode • Standard UART mode • Multiprocessor mode • 9 bit UART mode. • Full duplex means the data can go both ways at the same time. Interrupts • The 8051 has five interrupt sources : One from the serial port (RI / TI) when a transmission or reception operation is executed. • two from the timers (TF0, TF1) when overflow occurs and two come from the two input pins INT0, INT1. Each interrupt may be independently enabled or disabled to allow polling on same sources and each may be classified as high or low priority. • These operations are selected by Interrupt Enable (IE) and Interrupt Priority (IP) registers. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Oscillator and Clock • The 8051 generates the clock pulses by which all internal operations are synchronized. • Pins XTAL 1 and XTAL 2 are provided for connecting a resonant network to form an oscillator. A quartz crystal is used for oscillator. • The crystal frequency is the basic internal clock frequency of the microcontroller
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AND TECHNOLOGY (AUTONOMOUS MEMORY ORGANIZATION • The 8051 architecture provide both onchip memory expansion capabilities. It supports several distinctive ‘physical’ address spaces, functionally separated at the hardware level by different addressing mechanisms, read and write controls signals or both : • On chip Program Memory • On chip Data Memory • Off chip Program Memory • Off chip Data Memory • On chip Special Function Registers KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS • The Program Memory area (EPROM incase of external memory or Flash / EPROM incase of internal one) is extremely large and never lose information when the power is removed. • Onchip data memory is smaller and therefore quicker than Program Memory and it goes into a random state when power is removed. Onchip RAM is used for variables which are calculated when the program is executed. • Different addressing mechanisms are used to access these different memory spaces and this greatly contributes to microcomputer’s operating efficiency. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Total internal Data Memory is divided into three blocks : Lower 128 bytes Higher 128 bytes. Special Function Register Space. Higher 128 bytes are available only in 8032 / 8052 devices. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS SPECIAL FUNCTION REGISTERS (SFRS)
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AND TECHNOLOGY (AUTONOMOUS PINOUTS OF 8051
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AND TECHNOLOGY (AUTONOMOUS I/O PORTS Port 0 (P0.0 - 0.7) • Port 0 is used for both address and data bus (AD0 – AD7). When the microcontroller chip is connected to an external memory, Port 0 provides both address and data. ALE pin indicates if Port 0 has address or data. • When ALE = 0, Port 0 provides data (D0 – D7) • = 1, Port 0 provides address (A0 – A7) • ALE is used for demultiplexing address and data with the help of a latch. Port 1 (P1.0 - P1.7) • Port 1 pins are used as input or output. To make port 1 as an input port, write 1 to all its 8 bits. To make port 1 as output port, write 0 to all its 8 bits. Thus port 1 pins have no dual functions. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Port 2 (P2.0 - P2.7) • Port 2 pins are used as input / output pins similar in operation to port 1. The alternate use of port 2 is to supply a high order address byte (A8 – A15) when the microcontroller is connected to external memory. Port 3 (P3.0 - P3.7) • Port 3 pins are used as input or output. Port 3 has the additional functions
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AND TECHNOLOGY (AUTONOMOUS FUNCTIONAL BLOCK DIAGRAM OF MICROCONTROLLER
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AND TECHNOLOGY (AUTONOMOUS TIMING DIAGRAM • Port 0 is used for lower-order address for data and Port 2 is used for higher-order address for data. Program memory selection is done by PSEN (Program Store Enable) signal. • To demultiplex the lower-order address bus and the data bus, an active high signal is sent on the ALE line. This signal is used by the external latch to hold the lower-order address. • The timing waveform for external data memory read cycle is given in Fig. 3.30(a) with control signal WR replaced with RD . The data is transferred from the memory devices to the microcontroller. The active low RD signal is sent out the pin P3.7.
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AND TECHNOLOGY (AUTONOMOUS Timing waveforms for external data memory read cycle
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AND TECHNOLOGY (AUTONOMOUS Timing waveforms for external data memory write cycle
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AND TECHNOLOGY (AUTONOMOUS INTERRUPTS • An interrupt is an internal or external event that interrupts the microcontroller to inform it that a device needs its service. • Whenever any device needs its service, the device notifies the microcontroller by sending it an interrupt signal. Upon receiving an interrupt signal, the microcontroller interrupts whatever it is doing and serves the device. • The program which is associated with the interrupt is called interrupt service routine (ISR). KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Execution of an Interrupt • It finishes the instruction it is executing and saves the address of the next instruction (PC) on the stack. • It also saves the current status of all the interrupts internally. • It jumps to a fixed location in memory called the interrupt vector or table that holds the address of the Interrupt Service Routine (ISR). • The microcontroller gets the address of the ISR from the interrupt vector table and jumps to it. It starts to execute the interrupt service subroutine until it reaches the last instruction of the subroutine which is RETI. • Upon executing RETI instruction, the microcontroller returns to the place where it was interrupted. First it gets the program counter (PC) address from the stack by popping the top two bytes of the stack into the PC. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Interrupts in 8051 • Five interrupts are provided in the 8051. Three of these are generated by internal operations: • Timer flag 1 and the serial port interrupt (RI or TI). Two interrupts are triggered by external • signals provided by circuitry that is connected to pins INT0 and INT1.
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AND TECHNOLOGY (AUTONOMOUS Timer flag interrupts • When a timer / counter overflows, the corresponding timer flag TF0 or TF1 (location : 000B H or 001B H) is set to 1. The flag is cleared to 0 when the resulting interrupt generates a program call to the appropriate timer subroutine in memory. External interrupts • The external hardware interrupts INTO and INT 1 are located on pins P3.2 and P3.3. Inputs on these pins can set the interrupt flags IE0 and IE1 in the TCON register to 1 by level triggering or edge triggering. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Activation of INT0
Activation of INT1
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AND TECHNOLOGY (AUTONOMOUS Serial Port Interrupt • In SCON, if RI = 1, a data byte is received • TI = 1,a data byte has been transmitted. • The interrupt bit in the IE register is used to both send and receive data. If IE.4 [ES - Enable serial port interrupt] is enabled, when RI or TI is raised and 8051 gets interrupted and jumps to memory address location 0023 H to execute the ISR.
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AND TECHNOLOGY (AUTONOMOUS Interrupt Control • All interrupt functions are under the control of the program. The programmer is able to alter control bits in the • Interrupt Enable Register (IE) • Interrupt Priority Register (IP) and • Timer Control Register (TCON). Interrupt Enable Register (IE) •The IE register holds the programmble bits that can enable or disable all the interrupts. •Bit D7 of the IE register (EA) must be set high to allow the rest of the register to take effect. • If EA = 1, interrupts are enabled and will be responded to if their corresponding bits in IE are high. • If EA = 0, no interrupt will be responded to, even if the associated bit in the IE register is high.
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AND TECHNOLOGY (AUTONOMOUS EA • Enable interrupt bits. • Set to 1 to permit individual interrupts to be enabled by their enable bits. • Cleared to 0 by program to disable all interrupts. ES • Enable serial port interrupt. • Set to 1 to enable by program. • Cleared to 0 to disable serial port interrupt. ET1 • Enable / disable the Timer 1 overflow interrupt. EX1 • Enable external interrupt 1. • Set to 1 by program to enable INT1 interrupt. • Cleared to 0 to disable INT1 interrupt. ET0 • Enable / disable the Timer 0 overflow interrupt. EX0 • Enable / disable the external interrupt 0. • Set to 1 by program to enable INT0 interrupt. • Cleared to 0 to disable INT0 interrupt.
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AND TECHNOLOGY (AUTONOMOUS Interrupt Priority Register (IP) • IE0 • TF0 • IE1 • TF1 • RI / TI
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AND TECHNOLOGY (AUTONOMOUS INSTRUCTION SET • An instruction is a command given to the computer to perform a specified operation on given data. The instruction set is the collection of instructions that the microcontroller is designed to execute. • These instructions have been classified into the following groups. Data transfer group Arithmetic group Logical group Boolean variable manipulation Program branching
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AND TECHNOLOGY (AUTONOMOUS Data Transfer Instructions
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AND TECHNOLOGY (AUTONOMOUS KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Note : • Rn = Any of the eight registers, R0 to R7, in the selected bank. • Ri = Either of the pointing registers R0 to R1 in the selected bank. • addr = Address of the internal RAM from 00H to FFH. • L = Least significant nibble. • ^ = External memory location. • ( ) = Contents of the location inside the parentheses. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Arithmetic Instructions
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AND TECHNOLOGY (AUTONOMOUS KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Logical Instructions
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AND TECHNOLOGY (AUTONOMOUS KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Boolean Variable Manipulation Instructions
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AND TECHNOLOGY (AUTONOMOUS KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Program Branching Instructions
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AND TECHNOLOGY (AUTONOMOUS KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS COMPARISON TO PROGRAMMING CONCEPTS WITH 8085 • Even though many differences are in programming using 8085 and 8051, few are listed below. Mnemonics • 8085 has data-load type instructions like MVI, LXI, LDA, STA MVI is used for 8-bit data loading. • LXI is used for 16-bit data loading. • LDA is used for load the data in accumulator. • 8051 has only a single mnemonic, MOV carries out all these operations. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Flag Register • 8085 has five flags in flag register, namely CY, Z, S, P, AC • 8051 has CY, P and AC flags like 8085, but Z and S flags are not available in PSW register. On the other hand, OV (overflow) flag is not available in 8085. Subroutine • In 8085, conditional CALL and RETURN instructions are available. • In 8051, all CALL and RETURN instructions are unconditional. 2-byte ACALL type instruction is not available in 8085. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Stack Pointer • In 8085, SP is a 16-bit register, while in 8051 it is an 8-bit register. • The height of 8051 stack is limited to a maximum of 255 bytes, while 8085 has a maximum size of 64 KB. • SP is always incremented for storing data over stack in 8051, while it is decremented in 8085. • While storing a 16-bit return address during this execution of a long CALL instruction, first LSB and then MSB of the address is stored on stack top in 8051. In 8085, this sequence is reversed by storing MSB first and then followed by the LSB of the return address. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS Multiplication and Division • In 8051 direct multiplication and division are done by 8-bit MUL and DIV instructions, while in 8085 it is not possible. • In 8085 multiplication is done by repetitive addition and division is done by repetitive subtraction. Timer Programming • Due to the absence of Timer/Counter is 8085, timer programming and counter programming is not possible. 8051 has two timers Timer 0 and Timer 1. I/O Interfacing • In 8085 both memory-mapped I/O and I/O mapped I/O interfacing are possible, while in 8051 only memory-mapped I/O is possible. Instruction execution time • In 8085 the minimum instruction execution time is 1.2 Psec., while in 8051, 1 Psec. KONGUNADU COLLEGE OF ENGINEERING AND TECHNOLOGY (AUTONOMOUS TEXT BOOKS: • Sunil Mathur &Jeebananda Panda, “Microprocessor and Microcontrollers”, PHI Learning Pvt. Ltd, 2016. • R.S. Gaonkar, ‘Microprocessor Architecture Programming and Application’, with 8085, Wiley Eastern Ltd., New Delhi, 2013. • Muhammad Ali Mazidi & Janice Gilli Mazidi, R.D.Kinely ‘The 8051 Micro Controller and Embedded Systems’, PHI Pearson Education, 5th Indian reprint, 2003. REFERENCES: • Krishna Kant, “Microprocessor and Microcontrollers”, Eastern Company Edition, Prentice Hall of India, New Delhi, 2007. • B.RAM,” Computer Fundamentals Architecture and Organization” New age International Private Limited, Fifth edition, 2017. • Soumitra Kumar Mandal, Microprocessor & Microcontroller Architecture, Programming & Interfacing using 8085,8086,8051,McGraw Hill Edu,2013. • Ajay V.Deshmukh, ‘Microcontroller Theory &Applications’, McGraw Hill Edu,2016 • Douglas V.Hall, ‘Microprocessor and Interfacing’, McGraw Hill Edu, 2016.