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Logic Design CO-Assignment 1 and 2

important logic que

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23 views3 pages

Logic Design CO-Assignment 1 and 2

important logic que

Uploaded by

Abhishek Rawat
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Assignment-1 & 2

B.Tech. CSE -3rd Semester


Subject: Logic Design & CO (TCS-308)
Date of Submission: 27.09.23
Faculty: Dr VP Dubey

Prob1. Simplify the following Boolean function and realize using (i) Basic gates and (ii)
Universal gates.

ƒ(A,B,C,D,E) = ∑(0,2,4,6,9,11,13,15,17,21,25,27,29,31)

Prob2. For the given Boolean function


ƒ(w,x,y,z) = ∑(0,5,7,8,9,10,14,15 )
find the prime implicants and essential prime implicants

Prob3. Simplify the given Boolean function by first finding the essential prime implicants
ƒ(w,x,y,z) = ∑(0,2,3,5,7,8,10,11,14,15)

Prob4. Realize a Half Adder using inverted output Decoder and gates.
Prob5. Design a full-Subtractor using NOR gates only
Prob6. Design a 2 bit-magnitude comparator and draw its logic diagram.
Prob7. Design a combinational circuit that compares two 4-bit numbers, A and B, to check if
they are equal. The circuit has one output Y, so that Y = 1 if A = B, and Y = 0 if A ≠
B

Prob8. Design a four inputs one output combinational circuit that produces output according
to selection status given in following truth table
Selection Output
Input
S1 S0 Y
I0 0 0 I0
I1 0 1 I1
I2 1 0 I2
I3 1 1 I3

Where I0, I1, I2, I3 are input to the circuit.

Prob9. Realize a 3 x 8 inverted output decoder using basic logic gates only.
Prob10. Realize an 8 x1 multiplexer using basic logic gates only.
Prob11. Implement the following Boolean function using 4x1 multiplexer and external logic
gates, where C and D are the control inputs, A and B are the select lines.
(i) F A, B, C, D = 1,3,4,11,12,13, 14,15
(ii) F A, B, C, D = 1,2,5,7,8, 11,12, 13,15
Prob12: Realize a 64X1 multiplexer using multiple 8X1 multiplexers only.
Prob13: Design a 64X1 MUX using 4X1 MUXes only.

Prob14: Design a BCD-to-Gray code converter using 8X1 MUX.


Prob15: Construct a 16 x 1 multiplexer with two 8 x 1 multiplexers and one 2 x 1
multiplexer. Implement the following Boolean function using an 8 x 1 multiplexer
considering D as the input and A, B, C as the selection lines:
F (A, B, C , D) = A B  B D  B C D
Prob16: Define a Multiplexer. Implement the following function with 8 x 1 MUX:
F (A,B,C,D) =   0 ,1,3, 4,8,9 ,15 
Prob17: Realize a 1:16 line demultiplexer using 1:4 line demultiplexers only.

Prob18: Realize a full adder using 3:8 line decoder and OR gates.
Prob19: A combinational circuit is defined by the following three Boolean functions.
(i) Design the circuit with decoder and external basic gates
(ii)Design the circuit with decoder and NAND gates
𝐹1 = 𝑥 ′ 𝑦 ′ 𝑧 ′ + 𝑥𝑧
𝐹2 = 𝑥𝑦 ′ 𝑧 ′ + 𝑥 ′ 𝑦
𝐹3 = 𝑥 ′ 𝑦 ′ 𝑧 + 𝑥𝑦
Prob20: A combinational circuit is specified by the following three Boolean functions.
Implement the circuit using 3 x 8 decoder and NAND gates only.
𝐹1 (𝐴, 𝐵, 𝐶) = 2, 4, 7

𝐹2 (𝐴, 𝐵, 𝐶) = 0, 3,

𝐹3 (𝐴, 𝐵, 𝐶) = 0, 2, 3, 4, 7

Prob21: Obtain the characteristics equation and excitation table of the following flip flops
(i) SR flip-flop,
(ii) JK FF,
(iii) D-FF
(iv) T-FF

Prob22: What is Race-around problem in J-K Flip-Flop? How it can be eliminated? Why
the name Race-around?

Prob23: Perform following flip-flop conversion


(i) SR to JK
(ii) D to T
(iii) D to SR
(iv) T to SR
(v) T to JK
Prob24: A clocked sequential circuit with two D flip flops A and B, an input x and output y.
The next State equations for a sequential circuit is given as
A(t+1) = Ax + Bx
B(t+1) = A’x
and the present state output are given as, y= (A+B) x’
If x is an external input to the sequential circuit
(i) Draw the circuit diagram of the sequential circuit.
(ii) Obtain state diagram of the sequential circuit.

Prob25:A clocked sequential circuit with two D flip flops, A and B, two input x and y; and
output z is specified by next state equations and output equation. The next State
equations for a sequential circuit is given as
A(t+1) = x’y + xA
B(t+1) = x’B +xA
z=B
(i) Draw the circuit diagram of the sequential circuit.
(ii) Obtain state diagram of the sequential circuit.

Prob26: A sequential circuit has two JK flip flop, A and B, two input x and y; and one
output, z. The flip flop input functions and circuit output functions are as follows:

JA = Bx+B’y’ ; KA = B’xy’
JB = A’x ; KB =A + xy’
z =Axy +B x’y’

(i) Draw the circuit diagram of the circuit.


(ii) Obtain state diagram of the circuit.

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