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VLSI Unit-4 2marks

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54 views4 pages

VLSI Unit-4 2marks

Uploaded by

Anitha S
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DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING

ACADEMIC YEAR 2023-24

REGULATION 2021

SUB CODE/NAME: EC3552 – VLSI AND CHIP DESIGN

YEAR/SEM: III/V

TWO MARKS

UNIT-IV INTERCONNECT, MEMORY ARCHITECTURE AND


ARITHMETIC CIRCUITS

1. How path can be implemented in VLSI system?


A data path is best implemented in a bit –sliced fashion.
A single layout is used respectively for every bit in the data word. This regular
approach eases the design effort and results in fast and dense layouts.
2. What is meant by Carry save adder?

The basic carry save adder (CSA) is similar to the full adder but the architecture is
different. All the bits of a carry save adder work in parallel.
In Carry save adder the carry does not prorogate as in carry prorogate
adder. This is the main reason for the carry save adder is faster than
carry prorogate. A carry save adder has 3 inputs and produces two
outputs.
It adds 3 numbers and produces partial sum and carry bits.
3. What are the steps involved in Wallace tree algorithm?

The Wallace tree multiplier has three steps to be followed,


i) Multiply each bit of one of the arguments, by each bit of the other, yielding
n2 results.
ii) Reduce the number of partial products to two by layers of full and half adders.
iii) Group the wires in two numbers, and add them with a conventional adder.
4. Comment on performance of ripple carry adder.

A ripple carry adder has a performance that is linearly proportional to the


number of bits.
Circuit optimizations concentrate on reducing the delay of the carry path.
A number of circuit topologies exist providing that careful optimization of the
circuit topology and the transistor sizes helps to reduce the capacitance on the carry
bit.
5. What is the logic of adder for increasing its performance?

Other adder structures use logic optimizations to increase the performance (carry
bypass, carry select, and carry look ahead). Performance increase comes at the cost
area.
6. What is meant by Accumulator

Accumulators acts as a part of Arithmetic Logic Unit (ALU) and it is also identified
as register A. The result of an operation performed in the ALU is stored in the
accumulator. The accumulator is mainly used to hold the data for manipulation
(arithmetic, logical)
7. What is meant by Shifter?

Shifters are important element in microprocessor design for arithmetic shifting,


logical shifting, and rotation functions.
Shifters are mainly used to shift the numbers from one bit position to
other. There are several commonly used shifters are
● Logical shifter
● Arithmetic shifter
● Barrel shifter
● Funnel shifter
8. What is multiplier circuit?

A multiplier is nothing more than a collection of cascaded adders. Critical path is


far more complex and optimizations are different compared to adders.
9. Which factors dominate the performance of programmable shifter?

The performance and the area of a programmable shifter are dominated by the
wiring.
10. What is meant by data path?

A data path is a functional unit, such as arithmetic logic units or multipliers that
perform data processing operations, registers and buses.
Along with the control unit it composes the central processing unit.
11. Write down the expression for worst-case delay for RCA.
t = (n-1)tc+ts
12. Write down the expression to obtain delay for N-bit carry bypass adder.

tadder = tsetup +Mtcarry +(N/M-1)tbypass +(M-1)tcarry + tsum

13. Define Braun multiplier.

The simplest multiplier is the Braun multiplier.


All the partial products are computed in Parallel, and then collected through a
cascade of Carry Save Adders.
The completion time is limited by the depth of the carry save array, and by the carry
propagation in the adder. This multiplier is suitable for positive operands.
14. What is transmission gate?
The circuit constructed with the parallel connection of PMOS and NMOS with
shorted drain and source terminals. The gate terminal uses two select signals s and sˉ,
when s is high than the transmission gates pass the signal on the input.
The main advantage of transmission gate is that it eliminates the threshold
voltage drop.
15. Why low power has become an important issue in the present day VLSI circuit
realization?
The power dissipation is proportional to clock frequency Greater device leakage
current; In nanometer technology the leakage component become a significant
percentage of the total power and the leakage current increases at a faster rate than
dynamic power in technology generations.
16. What are the various ways to reduce the delay time of a CMOS inverter?
Various ways for reducing the delay time are given below:
a)The width of the MOS transistor can be increased to reduce delay. This is known
as gate sizing.
b) The load capacitance can be reduced to reduce delay. This is achieved by using
transistor of smaller and smaller dimension by feature generation technology.
c)Delay can also be reduced by increasing the supply voltage Vdd and/or reducing
the threshold voltage Vt of the MOS transistors
17. What is the basic operation of a 2- phase dynamic circuit?
The operation of the circuit can be explained using precharge logic in which the out-
put is precharged to HIGH level during Φ2 clock and the output is evaluated during
Φ1 clock.
18. What are parameters which impacts the design of a VLSI chip?
The important parameters which impact the successful design of a VLSI
chip are: Area → Size of the die, which relates to cost and profit
Speed → how fast the transistors can switch
Power → How much energy does it take to get the work done
19. Why we go to Booth’s algorithm?

Booth algorithm is a method that will reduce the number of multiplicand multiples.
For a given number of ranges to be represented, a higher representation radix leads
to fewer digits.

20. List the different types of shifter.


● Array shifter
● Barrel shifter
● Logarithm shifter

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