Lab Report # 10

Electronic Circuits and Devices Lab

Submitted to:
Mr Mir Hamza

Submitted by:
Name Registration
M. Raza Madni 210401034
Batch-section: EE-20-A
Implement digital to analog conversion using operational amplifier
Objectives:
1. To build basic 4-bit DA converter using op-amp.
2. To make measurements for variety of inputs.
3. To relate digital inputs to various analog outputs.

Equipment:
1. Function generator
2. Oscilloscope
3. Digital multimeter (DMM)
4. Op-Amp IC, Resistors, Power supply

Theory:

Scaling adder or Weighted binary Type DAC: The D/A converter circuit shown in fig.1is Scaling adder or
Weighted binary Type DAC. The method shown here is useful only for small DACs. The resistors are inversely
proportional to the binary column weights (The lowest-value resistor R corresponds to the highest weighted
binary input (23 ). All of the other resistors are multiples of R and correspond to the binary weights 22 , 21 , and
20 . The inverting input is at virtual ground, and so the output voltage is proportional to the current through the
feedback resistor Rf (sum of input currents)  Vout = -IRf

Applications:
Digital to analogue convertor (DAC):
Example Determine the output voltage of the DAC for the four-digit sequence binary codes shown, that are
applied to the inputs. A high level is binary 1, and a low level is a binary 0. The least significant binary digit is
D0.
Example – continued from previous.

 Hence for any given digital value, the output will be the sum of corresponding digit output voltage: Output voltage
versus input digital binary data.

R/2R ladder type DAC

A more widely used method for D/A conversion is the R/2R ladder. It overcomes one of the disadvantages of the binary-
weighted-input DAC because it requires only two resistor values. Assume that the D3 input is HIGH (+5 V) and the others
are LOW (ground, 0 V). This condition represents the binary number 1000. A circuit analysis will show that this reduces
to the equivalent form shown in Figure 2(a). Essentially no current goes through the 2R equivalent resistance because
the inverting input is at virtual ground. Thus, all of the current (I = 5 V/2R) through R7 is also through Rf, and the output
voltage is -5 V. The operational amplifier keeps the inverting input near zero volts because of negative feedback.
Therefore, all current is through Rf rather than from the inverting input.

Figure shows the equivalent circuit when the D2 input is at +5 V and the others are at ground. This condition represents
0100. If we thevenize looking from R8, we get 2.5 V in series with R, as shown. This results in a current through Rf of I=
2.5 V/2R, which gives an output voltage of -2.5 V. Keep in mind that there is no current from the op-amp inverting input
and that there is no current through R7 because it has 0 V across it, due to the virtual ground. Figure 2(c) shows the
equivalent circuit when the D1 input is at +5 V and the others are at ground. This condition represents 0010. Again,
thevenizing looking from R8, you get 1.25 V in series with R as shown. This results in a current through Rf of I = 1.25
V/2R, which gives an output voltage of -1.25 V.

In part (d) of Figure 2, the equivalent circuit representing the case where D0 is at +5 V and the other inputs are at ground
is shown. This condition represents 0001. Thevenizing from R8 gives an equivalent of 0.625 V in series with R as shown.
The resulting current through Rf is I = 0.625 V/2R, which gives an output voltage of -0.625 V. Notice that each
successively lower-weighted input produces an output voltage that is halved, so that the output voltage is proportional
to the binary weight of the input bits.
Task# 01
Weighted resistor DAC

Note: You may use single resistor for series combination, in simulation. Such as 5K instead of 4.7k & 300

Circuit diagram:

Procedure:

Results:

Binary input Output voltage

A B C D
 S1 S2 S3 S4
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1

Task# 02
Construct an active limiter.
Circuit diagram:

Procedure:
1. Construct the circuit in circuit diagram. Initially adjust the voltage divider resistor R2 for zero
output.
2. Set the generator to provide a 2 vpp sinewave at 1k Hz. Apply dc power to the circuit.
3. Sketch the input and the output waveform.
4. Adjust the voltage divider to 0.75 volts to the op amp noninverting input. Sketch the output
waveform in graph, noticing the 0 V reference level and peak signal values.
5. Vary the setting of the variable resistor and notice the change in the signal.
6. Turn off the power supply and reverse the diode polarity.
7. Reapply the DC supply and repeat the process.
Results:

Binary input Output voltage

A B C D Measured Calculated
D0 D1 D2 D3 values values
0 0 0 0 0.00 0
0 0 0 1 0.18 0.125
0 0 1 0 0.27 0.25
0 0 1 1 0.35 0.375
0 1 0 0 0.40 0.5
0 1 0 1 0.51 0.625
0 1 1 0 0.56 0.75
0 1 1 1 0.62 0.875
1 0 0 0 0.71 1
1 0 0 1 0.88 1.125
1 0 1 0 0.97 1.25
1 0 1 1 1.06 1.375
1 1 0 0 1.11 1.5
1 1 0 1 1.22 1.625
1 1 1 0 1.27 1.75
1 1 1 1 1.33 1.87

Task# 03
Construct an active clamper.
Circuit diagram:

Procedure:
1. Construct the circuit in circuit diagram.
2. Connect your oscilloscope to monitor the input signal and the output signal across the loas
resistor.
3. Set the generator to provide a 2 Vp-p sinewave at 1k Hz. Apply dc power to the circuit.
4. Sketch the input and the output waveform.
5. Turn off the power supply and reverse the diode polarity.
6. Reapply the DC supply and sketch the input and output graph.
Results:

A
C11(1)
B

C11 C

D
0.01u
U6
C13
4
1
2 5 D5
6
0.33u 3
DIODE
R15
7

741 220k
V5
VSINE

C12
C12(1)
0.01u

Scale
Yellow signal Input signal
Blue signal Output signal

Voltage Values
Vin 2 vp-p
Vout (positive clamped peak value) 3.50 Vp
Vout (negative clamped peak value) -750 mVp

Changing diodes polarity:

A
C7(1)
B

C7 C

D
0.01u
U4
C14
4
1
5

2 D6
6
0.33u 3
DIODE
7

V6 C8 741

VSINE R16
220k
C8(1) 0.01u

Scale
Yellow signal Input signal
Blue signal Output signal

Voltage Values
Vin 2 vp-p
Vout (positive clamped peak value) 1.75 Vp
Vout (negative clamped peak value) -2.25 Vp
Task# 04
Construct an active limiter.
Circuit diagram:

Procedure:
 1. Construct the circuit in circuit diagram. Initially adjust the voltage divider resistor R2 for zero
output.
2. Set the generator to provide a 2 vpp sinewave at 1k Hz. Apply dc power to the circuit.
3. Sketch the input and the output waveform.
4. Vary the setting of the variable resistor and notice the change in the signal.
5. Turn off the power supply and reverse the diode polarity.
6. Reapply the DC supply and repeat the process.
Results:
For resistance ≈ 0k
C15(1)
A
C15
B

C
0.01u
D

U7
C17
4
1
5

2 D7
6
0.33u 3
DIODE
V7
7

VSINE 741
RV3(2)
C16
RV3
R17
0.01u 220k
C16(1)
0%

1k

For resistance = 0.5k

C15(1)
A
C15
B

C
0.01u
D

U7
C17
4
1
5

2 D7
6
0.33u 3
DIODE
V7
7

VSINE 741
RV3(2)
C16
RV3
R17
0.01u 220k
C16(1)
50%

1k

For resistance = 1k
C15(1)
A
C15
B

C
0.01u
D

U7
C17
4
1
5

2 D7
6
0.33u 3
DIODE
V7
7

VSINE 741
RV3(2)
C16
RV3
R17
0.01u 220k
C16(1)
100%

1k

Scale
Yellow signal Input signal
Blue signal Output signal

Vin (Vp-p) Resistance (variable / R2) Ω Voltage (positive peak) Voltage (negative peak)
2 0.1 1.75 -2.00
2 500 7.25 3.00
2 1000 10.50 7.00
Changing diodes polarity:
For resistance ≈ 0k

A
C18(1)

C18 B

C
0.01u U8 D

4
1
5
C20 2 D8
6
3
0.33u DIODE
RV4(2)
C19

7
741

RV4 0.01u R18

V8 C19(1) 220k
VSINE

0%

1k

For resistance = 0.5k

A
C18(1)

C18 B

C
0.01u U8 D
4
1
5

C20 2 D8
6
3
0.33u DIODE
RV4(2)
C19
7

741

RV4 0.01u R18

V8 C19(1) 220k
VSINE
50%

1k

For resistance = 1k

A
C18(1)

C18 B

C
0.01u U8 D
4
1
5

C20 2 D8
6
3
0.33u DIODE
RV4(2)
C19
7

741

RV4 0.01u R18

V8 C19(1) 220k
VSINE
100%

1k

Scale
Yellow signal Input signal
blue signal Output signal

Vin (Vp-p) Resistance (variable / R2) Ω Voltage (positive peak) Voltage (negative peak)
2 0 250 m -3.50
2 500 2.50 -1.25
2 1000 2.75 -1.25