Scribd
Upload
15 views

Microprocessors and Microcontrollers 7

Uploaded by

harrymainah9
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
15 views

Microprocessors and Microcontrollers 7

Uploaded by

harrymainah9
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 1

Microprocessor and Microcontroller

Control Signals: RD’, WR’, ALE


 ALE is used for provide control signal to synchronize the
components of microprocessor and timing for instruction to
perform the operation.
 RD (Active low) and WR (Active low) are used to indicate whether
the operation is reading the data from memory or writing the data
into memory respectively.

Status Signals: S0, S1, IO/M’


 IO/M (Active low) is used to indicate whether the operation belongs
to the memory or peripherals.

Table 1.1 Status signals and the status of data bus


IO/M’ (Active Low) S1 S2 Data Bus Status (Output)
0 0 0 Halt
0 0 1 Memory WRITE
0 1 0 Memory READ
1 0 1 IO WRITE
1 1 0 IO READ
0 1 1 Op code fetch
1 1 1 Interrupt acknowledge

DMA Signals: HOLD, HLDA, READY


 HOLD: Indicates that another master is requesting the use of the
address and data buses. The CPU, upon receiving the hold request,
will relinquish the use of the bus as soon as the completion of the
current bus transfer. Internal processing can continue. The
processor can regain the bus only after the HOLD is removed. When
the HOLD is acknowledged, the Address, Data RD, WR and IO/M’
lines are tri-stated.
 HLDA: Hold Acknowledge: Indicates that the CPU has received the
HOLD request and that it will relinquish the bus in the next clock
cycle HLDA goes low after the Hold request is removed. The CPU
takes the bus one half-clock cycle after HLDA goes low.
 READY: This signal synchronizes the fast CPU and the slow memory,
peripherals. If READY is high during a read or write cycle, it
indicates that the memory or peripheral is ready to send or receive

You might also like