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Module 3

Digital Electronics Fundamentals:

Difference between analog and digital signals, Number Systems-Binary, Hexadecimal,
Conversion - Decimal to Binary, Hexadecimal to Decimal and vice versa. Boolean Algebra, Basic
and Universal gates, Half adder and Full adder, Multiplexer, Decoder,

Difference between analog and digital signals

 Analog or Continuous Signal: The signal may acquire any value in a range of the independent
variable (time). Example: Analog Signal
 Discrete or Digital Signal: The signal can have any value but it would remain constant over periods
of time called sampling period. Digital signals or numbers are processed by digital system using the
concept of binary numbers and Boolean algebra.

Number Systems: There are four number systems that are used in the digital systems.

1. Decimal Number System: It is the most commonly used numbering system in day-to-day life to
count, measure and label. Combination of ten digits from 0 to 9 are used to represent any number.
In this system the next position to the left from the decimal point represents units, tens, hundreds,
thousands etc. and the next position to the right after the decimal point represents ’s,

’s, ’s, etc.

Digits are: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 and Base value: 10

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Example: 123.34 = 1 x 102 + 2 x 101 + 3 x 100 + 3 x 10-1 + 4 x 10-2 =100 + 20 + 3 + 0.3 + 0.04 =
123.43

2. Binary Number System: In binary numbering systems only two digits 0 and 1 are used to represent
any number. It will go like 0, 1, 10, 11, 100, 101, 110, 111, 1000 and so on. It is the numbering
system used in computers. In this system the next position to the left from the binary point represents
units, 2’s, 4’s, 8’s etc. and the next position to the right after the binary point
represents ’s, ( ’s, ’s etc.
Digits are: 0, 1 and Base value: 2
Example: 1010.101 = 1 x 23 + 0 x 22 + 1 x 21 + 0 x 20 + 1 x 2-1 + 0 x 2-2 + 1 x 2-3
= 8 + 0 + 2 + 0 + 0.5 + 0 + 0.125 = 10.625

3. Octal Number System: In octal numbering system combination of eight digits from 0 to 7 are used
to represent a number. It will go from 0…7, a two digit sequence is from 10..77 and a three digit
sequence is from 100…777 and so on. It is used to shorten the binary numbers.
Digits are: 0, 1, 2, 3, 4, 5, 6, 7 and Base value: 8
Example: 376 = 3 x 82 + 7 x 81 + 6 x 80 = 192 + 56 + 6 = 254

4. Hexadecimal Number System: In hexadecimal numbering system combination of 16 digits from

0 to 9 and A to F are used to represent a number. It will go from 0…F, a two digit sequence is from
10…FF and a three digit sequence from 100…FFF and so on. It is used to represent data’s and
memory addresses.
Digits are: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F and Base value: 16
Example: 2A3B = 2 x 163 + 10 x 162 + 3 x 161 + 11 x 160 = 8192 + 2560 + 48 + 11 = 10811

Conversions:

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Decimal to Binary:

Integer Part: To convert the decimal integer to binary, divide the number by 2 and the successive
quotients by 2. The successive remainders (which can be only 0 or 1) written in reverse order form the
equivalent binary number.

Fractional Part: To convert decimal fractions to binary, multiply the number by 2 repeatedly until the
fraction product is 0 (or until the desired number of binary places). The whole digits of the multiplication
results produce the answer, with first as MSB and the last as LSB.

Example 1: Convert 156.188 decimal to binary.

Example 2: Convert 12.125 decimal to binary.

(12)10 = (?)2
12 ÷ 2 ⟹ Q = 6, R = 0
6 ÷ 2 ⟹ Q = 3, R = 0
3 ÷ 2 ⟹ Q = 1, R = 1
(12)10 = (1100)2

0.125 x 2 = 0.25 ⟹ Carry 0

0.25 x 2 = 0.5 ⟹ Carry 0
0.5 x 2 = 1.0 ⟹ Carry 1
(0.122)10 = (0.001)2

Therefore, (12.125)10 = (1100.001)2

Assignment Problems:
1. Convert the following decimal number to binary up to four binary places.
(a) (47.8125)10 = ( )2
(b) (100.974)10 = ( )2
(c) (29.3749)10 = ( )2
(d) (105.202)10 = ( )2
(e) (1024.625)10 = ( )2
(f) (555)10 = ( )2
(g) (0.825)10 = ( )2

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Binary to Decimal Conversion:

 To convert the binary number to its equivalent decimal, multiply the binary digits by its
corresponding weights, and then add them.
Weights from the left of binary point are: , , , , etc
Weights from the right of binary point are: , , , , etc

Example: Convert the binary decimal

Example: Convert (1100.001)2 to decimal

Assignment:
1. Convert the following binary number to equivalent decimal number.
(a) (1101)2 = ( )10
(b) (10101)2 = ( )10
(c) (11001.011)2 = ( )10
(d) (11001.110)2 = ( )10

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Hexadecimal to Decimal Conversion:

 To convert the hexadecimal number to its equivalent decimal, multiply the hexadecimal digits by
its corresponding weights, and then add them.
Weights from the left of hexadecimal point are: , , , , etc
Weights from the right of hexadecimal point are: , , , , etc

Example: Convert the octal number (A37E.5C2)16 to decimal.

Example: Convert the hexadecimal number (3A1.4)16 to decimal.

Assignment:
2. Convert the following hexadecimal number to equivalent decimal number.
(a) (AF)16 = ( )10
(b) (B6A)16 = ( )10
(c) (ABC.CD)16 = ( )10
(d) (9FC1)16 = ( )10

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Decimal to Hexadecimal Conversion:

Integer Part: To convert a decimal integer to hexadecimal, divide the number by 16 and the successive
quotients by 16. The successive remainders (which can be only 0 to 9 or A to F) written in reverse order
form the equivalent octal number.
Fractional Part: To convert decimal fractions to octal, multiply the number by 8 repeatedly until the
fraction product is 0 (or until the desired number of octal places). The whole digits of the multiplication
results produce the answer, with first as MSD and the last as LSD.

Example: Convert (10766.342)10 to hexadecimal.

Example: Convert (5386.345)10 to hexadecimal.

5386 ÷ 16 ⟹ Q =336, R = 10 (A)
336 ÷ 16 ⟹ Q =21, R = 0
21 ÷ 16 ⟹ Q =1, R = 5
(5386)10 = (150A)16

0.345 x 16 = 5.52 ⟹ Carry 5

0.52 x 16 = 8.32 ⟹ Carry 8
0.32 x 16 = 5.12 ⟹ Carry 5
0.12 x 16 = 1.92 ⟹ Carry 1
(0.345)10 = (0.5851)16
Therefore, (5386.345)10 = (150A.5851)16

Assignment Problems:
3. Convert the following decimal number to hexadecimal.
(a) (57345)10 = ( )16
(b) (342.56)10 = ( )16

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Relationship between Decimal, Binary, Octal, Hexadecimal number:

Hexadecimal Decimal Octal Binary

0 0 0 0000
1 1 1 0001
2 2 2 0010
3 3 3 0011
4 4 4 0100
5 5 5 0101
6 6 6 0110
7 7 7 0111
8 8 10 1000
9 9 11 1001
A 10 12 1010
B 11 13 1011
C 12 14 1100
D 13 15 1101
E 14 16 1110
F 15 17 1111

Complement of Binary Numbers:

 There are two types of complements for binary numbers and are used to perform subtraction using
addition.
i. 1’s complement: Obtained by changing all 0’s to 1’s and all 1’s to 0’s.
ii. 2’s complement: Obtained by adding 1 to 1’s complement of a number.

Binary Addition:
The rules of binary addition are:
0+0=0
0+1=1
1+0=1
1 + 1 = 0 (with carry 1)
Example 1: Perform addition of (11001100)2 and (11011010)2
1 1 1 ⟵ Carry
1 1 0 0 1 1 0 0
1 1 0 1 1 0 1 0
1 1 0 1 0 0 1 1 0

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Example 2: Add (28)10 and (15)10 by converting them into binary.

1 1 ⟵ Carry
(28)10 = 1 1 1 0 0
(15)10 = 0 1 1 1 1
1 0 1 0 1 1
Binary Subtraction:
The rules of binary subtraction are:
0–0=0
1–0=1
1–1=0
0 – 1 = 1 (Taking barrow from outside)
Examples:

Binary Subtraction Using 1’s Complement:

1. Take 1’s complement of subtrahend and add it to minuend.
2. If carry is generated, then result is positive. Add carry to the result to get final result.
3. If carry is not generated, then result is negative and in 1’s complement form.

Example 1: Perform (28)10 – (19)10 using 1’s complement.

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Example 2: Perform (15)10 – (28)10 using 1’s complement.

Binary Subtraction Using 2’s Complement:

1. Take 2’s complement of subtrahend and add it to minuend.
2. If carry is generated, then result is positive and discard the carry.
3. If carry is not generated, then result is negative and in 2’s complement form.

Example 1: Perform (28)10 – (19)10 using 2’s complement.

Example 2: Perform (15)10 – (28)10 using 2’s complement.

Perform the following:

i. Covert (57345)10 = ( )16
ii. Subtract (28)10 – (19)10 using 2’s complement method.

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(i) Covert (57345)10 = ( )16

(ii) Subtract (28)10 – (19)10 using 2’s complement method.

(28)10 = (11100)2 11100
– (19)10 = (10011)2 ⟹ 2’s Complement: 01100 +01101
+1 1)01001
01101
Discard the carry, result is positive in true form: 010001 = 9
Perform the following:
i. Subtract 10.0101 – 101.1110 using 1’s complement method.

(i) 10.0101 – 101.1110 ;using 1’s complement

(2.3125)10 ← 010.0101 010.0101
– (5.8750)10 ← 101.1110 ⟹ 1’s Complement: +010.0001
100.0110
No carry hence result is negative in 1’s complement form: 100.0110 = 11.1001 = –
3.5625d

Subtract (19)10 from (15)10 using 1s and 2s complement methods.

Solution: (15)10 – (19)10

(15)10 = (01111)2 01111
– (19)10 = (10011)2 ⟹ 1’s Complement: +01100
11011
No carry hence result is negative in 1’s complement form: 11011 = 00100 = – 4

(15)10 = (01111)2 01111

– (19)10 = (10011)2 ⟹ 2’s Complement: 01100 +01101
+1 11100
01101
No carry hence result is negative in 2’s complement form: 11100 = 00011 + 1 = 00100 = – 4
Subtract the following using 2’s complement method:
i) (101011)(2) from (111001)(2)
ii) (111001)(2) from (101011)(2)

Solution: (i) (101011)(2) from (111001)(2)

111001(57) 111001
–101011(43) ⟹ 2’s Complement: 010100 +010101
+1 1)001110
010101
Discard the carry, result is positive in true form: 001110 = 14

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(ii) (111001)(2) from (101011)(2)

101011(43) 101011
–111001(57) ⟹ 2’s Complement: 000110 +000111
+1 110010
000111
No carry hence result is negative in 2’s complement form: 110010 = 001101 + 1 = 001110 = – 14

4. Perform the subtraction

i) (11010)2 – (10000)2 using 1’s complement.
ii) (1000100)2 – (1010100)2 using 1’s complement. June/July.2016, 15ELN15/25, 04
Marks

Solution: (i) (11010)2 – (10000)2 using 1’s complement.

11010(26) 11010
–10000(16) ⟹ 1’s Complement: +01111
1)01001
+1
01010
Add carry to the result: 01010 = +10

(ii) (1000100)2 – (1010100)2 using 1’s complement.

1000100(68) 1000100
–1010100(84) ⟹ 1’s Complement: +0101011
1101111
No carry hence result is negative in 1’s complement form: 1101111 = 0010000 = –16

5. Perform the following operations using 1’s and 2’s complement technique.
i) (56)10 – (79)10 ii) (23)10 – (18)10.

Solution: (i) (56)10 – (79)10

Using 1’s complement:
(56)10 = (0111000)2 0111000
(79)10 = (1001111)2 ⟹ 1’s Complement: +0110000
1101000
No carry hence result is negative in 1’s complement form: 1101000 = 0010111 = –23

Using 2’s complement:

(56)10 = (0111000)2 0111000
(79)10 = (1001111)2 ⟹ 2’s Complement: 0110000 +0110001
+1 1101001
0110001
No carry hence result is negative in 2’s complement form: 1101001 = 0010110 + 1 = 0010111 = –
23

(ii) (23)10 – (18)10.

Using 1’s complement:
(23)10 = (10111)2 10111
(18)10 = (10010)2 ⟹ 1’s Complement: +01101
1)00100
+1
00101

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Add carry to the result: 00101 = +5

Using 2’s complement:

(23)10 = (10111)2 10111
(18)10 = (10010)2 ⟹ 2’s Complement: 01101 +01110
+1 1)00101
01110
Discard the carry, result is positive in true form: 00101 = +5

6. Subtract (111001)2 from (101011)2 using 2’s complement method.

Solution: (101011)2 – (111001)2

0111000(56) 0111000
–1001111(79) ⟹ 2’s Complement: 0110000 +0110001
+1 1101001
0110001
No carry hence result is negative in 2’s complement form: 1101001 = 0010110 + 1 = 0010111 = –
23

7. i) Subtract (1000.01)2 from (1011.10)2 using 1’s and 2’s complement method.
ii) Add (7AB.67)16 with (15C.71)16.
Solution:
i) (1011.10)2 – (1000.01)2
Using 1’s Complement:
1011.10 (11.50) 1011.10
–1000.01 (08.25) ⟹ 1’s Complement: +0111.10
0011.01 (03.25) 1)0011.00
+1
0011.01 = 3.25d

Using 2’s Complement:

1011.10 (11.50) 1011.10
–1000.01 (08.25) ⟹ 1’s Complement: 0111.10 + 0111.11
0011.01 (03.25) +1 1)10011.01 = 3.25d
0111.11

ii) (7AB.67)16 + (15C.71)16

7AB.67
+ 15C.71
907.D8
8. Subtract (111)2 from (1010)2 using 1’s and 2’s complement method.
Solution:

Using 1’s complement:

1010 (10d) 1010
–0111 (07d) ⟹ 1’s Complement: +1000
0011 (03d) 1)0010
+1
0011 = 3d

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Using 2’s Complement:

1010 (10d) 1010
–0111 (07d) ⟹ 1’s Complement: 1000 + 1001
0011 (03d) +1 1)0011 = 3d
1001
9. Use 1’s complement to perform the binary subtraction
01111 – 11010 repeat by 2’s complement method.
Solution:
Using 1’s complement:
01111 (15d) 01111
–11010 (26d) ⟹ 1’s Complement: +00101
1)10101 (–11d) 10100 ⟹ 1’s Complement: 01011 = 11d

Using 2’s Complement:

01111 (15d) 01111
–11010 (26d) ⟹ 1’s Complement: 00101 + 00110
1)10101 (–11d) +1 10101
00110
Since no carry, result is negative and represented in 2’s complement form:
10101 ⟹ 1’s Complement: 01010
+1
01011 = 11d
Perform subtraction using 2’s complement method 1101 – 1010.
Solution:
Using 2’s Complement:
1101 (13d) 1101
–1010 (10d) ⟹ 1’s Complement: 0101 + 0110
0011 (03d) +1 1)0011
0110
Discard the carry, result is positive: 0011 = 3

Perform the following operations:

a. (CAD.F1)16 + (BE1.54)16
Solution:

a. (CAD.F1)16 + (BE1.54)16

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i) Perform (FC02A)16 – (D052)16 using 16’s complement

Solution:
i. (FC02A)16 – (D052)16

Boolean Algebra

Boolean Algebra Laws:

A=A
1. Law of Identity

2. Commutative Law

3. Associative Law

4. Idempotent Law

5. Double Negative Law

6. Complementary Law

7. Law of Insertion

8. Law of Union

9. Distributive Law

10. Law of Absorption

11. Law of Common Identities

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De Morgan suggested two theorems:

1. The complement of product is equal to the sum of complements of individual.

Proof: Two variables:

A B AB
0 0 1 1 0 1 1
0 1 1 0 0 1 1
1 0 0 1 0 1 1
1 1 0 0 1 0 0

2. The complement of sum is equal to the product of complements of individual.

Proof: Two variables:

A B A+B
0 0 1 1 0 1 1
0 1 1 0 1 0 0
1 0 0 1 1 0 0
1 1 0 0 1 0 0

State and prove De Morgan’s theorem for three variables.

The complement of product is equal to the sum of complements of individual.

Proof: Three variables:

A B C ABC
0 0 0 1 1 1 0 1 1
0 0 1 1 1 0 0 1 1
0 1 0 1 0 1 0 1 1
0 1 1 1 0 0 0 1 1
1 0 0 0 1 1 0 1 1
1 0 1 0 1 0 0 1 1
1 1 0 0 0 1 0 1 1
1 1 1 0 0 0 1 0 0

The complement of sum is equal to the product of complements of individual.

Proof: Two variables:

A B C
0 0 0 1 1 1 0 1 1
0 0 1 1 1 0 1 0 0
0 1 0 1 0 1 1 0 0
0 1 1 1 0 0 1 0 0
1 0 0 0 1 1 1 0 0
1 0 1 0 1 0 1 0 0
1 1 0 0 0 1 1 0 0
1 1 1 0 0 0 1 0 0

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State De Morgan’s theorem for 4 – variables and prove them by the method of perfect induction.
Solution:

1. The complement of product is equal to the sum of complements of individual.

Proof: Four variables:

A B C D ABCD
0 0 0 0 1 1 1 1 0 1 1
0 0 0 1 1 1 1 0 0 1 1
0 0 1 0 1 1 0 1 0 1 1
0 0 1 1 1 1 0 0 0 1 1
0 1 0 0 1 0 1 1 0 1 1
0 1 0 1 1 0 1 0 0 1 1
0 1 1 0 1 0 0 1 0 1 1
0 1 1 1 1 0 0 0 0 1 1
1 0 0 0 0 1 1 1 0 1 1
1 0 0 1 0 1 1 0 0 1 1
1 0 1 0 0 1 0 1 0 1 1
1 0 1 1 0 1 0 0 0 1 1
1 1 0 0 0 0 1 1 0 1 1
1 1 0 1 0 0 1 0 0 1 1
1 1 1 0 0 0 0 1 0 1 1
1 1 1 1 0 0 0 0 1 0 0
2. The complement of sum is equal to the product of complements of individual.

Proof: Two variables:

A B C D
0 0 0 0 1 1 1 1 0 1 1
0 0 0 1 1 1 1 0 1 0 0
0 0 1 0 1 1 0 1 1 0 0
0 0 1 1 1 1 0 0 1 0 0
0 1 0 0 1 0 1 1 1 0 0
0 1 0 1 1 0 1 0 1 0 0
0 1 1 0 1 0 0 1 1 0 0
0 1 1 1 1 0 0 0 1 0 0
1 0 0 0 0 1 1 1 1 0 0
1 0 0 1 0 1 1 0 1 0 0
1 0 1 0 0 1 0 1 1 0 0
1 0 1 1 0 1 0 0 1 0 0
1 1 0 0 0 0 1 1 1 0 0
1 1 0 1 0 0 1 0 1 0 0
1 1 1 0 0 0 0 1 1 0 0
1 1 1 1 0 0 0 0 1 0 0

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1. Simplify, .
Solution:

OR:

2. Simplify
Solution:

3. Simplify using De Morgan’s theorem.

Solution:

4. Simplify the following expressions:

Solution:
(a)

(b)

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5. Show that:

Solution:

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Basic and Universal Gates

Digital Circuits:
 A digital circuit is a circuit where the signal must be one of two discrete levels. Each level is
interpreted as one of two different states (for example, on/off, 0/1, true/false). Digital circuits use
transistors to create logic gates in order to perform Boolean logic. Digital circuits are less
susceptible to noise or less degradation in quality than analog circuits. It is also easier to perform
error detection and correction with digital signals.
 Digital Circuits are classified into two major categories:
1. Combinational Circuits: The output depends on present input only.
2. Sequential Circuits: The output depend on both present inputs and past outputs. Also sequential
circuits have memory.

Logic Gates:
 Logic gates are an electronic circuit which accepts binary input and produces a binary output namely
0 and 1. They are basic building blocks of digital circuits. They are used to create digital circuits
and even complex integrated circuits.
 Combination of logic gates form circuits designed with specific tasks
Examples: Adders: to add binary numbers,
Flip-Flops: set or reset bits of memory,
 Complex integrated circuits are complete circuits ready to perform several functions.
Examples: Microprocessors and Microcontrollers
 There three categories of logic gates:
i. Basic Gates: NOT, OR & AND
ii. Derived Gates: EX-OR & EX-NOR
iii. Universal Gates: NAND & NOR

Basic gates AND, OR and NOT gates with truth tables.

NOT Gate:
 It is an electronic circuit having only one input and only one output. The output signal is always
opposite to the input signal and it is a physical realization of Boolean-Complement operation. It is
also called as inverter.

NOT Gate Using Switch:

Function Table:
A L
Open (Low) ON (High)
Close (High) OFF (low)
When Input = 0 ;Switch is Opened
When Input = 1 ;Switch is Closed

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NOT Gate Realization Using Transistor:

 When +5V is applied to A, the transistor will be fully turned ON,
drawing maximum collector current, hence the entire Vcc = 5V will
drop across R, thereby sending 0V to Z. Therefore, output Z = 0 (0V).
 When 0V is applied to A, the transistor will be cut-off, hence the
entire Vcc = 5V will be pulled to Z. Therefore, output Z = 1 (5V).
 In either cases, it is seen that output is opposite of input.

OR Gate:
 It is an electronic circuit having two or more inputs and only one output. The output is zero, when
all the inputs are zero, otherwise output is one. It is a physical realization of Boolean-Addition
operation.

3-Input Symbol:

Expression: Y = A + B + C

OR Gate Using Switches:

Function Table:
A B L
Open Open OFF
Open Close ON
Close Open ON
Close Close ON
When Input = 0 ;Switch is Opened
When Input = 1 ;Switch is Closed
Fig: Realization of OR Gate Using Switches

OR Gate Realization Using Diodes:

 When A = 0 and B = 0:
Both the diodes D1 & D2 do not conduct, since they are reverse biased, hence no current flows
through RL, and no voltage develops across RL. Therefore Z = 0 (0V).

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 When A = 0 and B = 1:
Diode D1 does not conduct, since it is reverse biased. D2 conducts, since voltage B is high (5V)
hence current flows through RL, then voltage develops across RL that is approximately equal to
voltage B. Therefore Z = 1 (5V).

A and B: Input Voltages (0 or 5V)

Z: Output Voltage (0 or 5V)

Fig: Realization of OR Gate Using Diodes

 When A = 1 and B = 0:
Diode D2 does not conduct, since it is reverse biased. D1 conducts, since voltage A is high (5V)
hence current flows through RL, then voltage develops across RL that is approximately equal to
voltage A. Therefore Z = 1 (5V).
 When A = 1 and B = 1:
Both the diodes D1 & D2 conducts, since they are forward biased, hence current flows through R L
and voltage approximately equal voltage A or B is developed across RL. Therefore Z = 1 (5V).

AND Gate:
 It is an electronic circuit having two or more inputs and only one output. The output is one, when
all the inputs are one, otherwise output is zero. It is a physical realization of Boolean-
Multiplication operation.

AND Gate Using Switches:

Function Table:
A B L
Open Open OFF
Open Close OFF
Close Open OFF
When Input = 0 ;Switch is Opened Close Close ON
When Input = 1 ;Switch is Closed
Fig: Realization of AND Gate Using Switches

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3-Input Symbol:

Expression: Y = A . B . C

AND Gate Realization Using Diodes:

A and B: Input Voltages (0 or 5V)

Z: Output Voltage (0 or 5V)

Fig: Realization of AND Gate Using Diodes

 When A = 0 and B = 0:
The cathodes of both diodes D1 & D2 are grounded. The diodes get forward biased and hence
conduct and current flows through the resistor RL, then no voltage drop across the diode. Therefore,
output Z = 0 (0V), practically Z = 0.7V ≃ 0V.
 When A = 0 and B = 1:
The cathode of diode D2 is 5V, the diode becomes reverse biased, hence it does not conducts and
no current flow through resistor RL. But the cathode of diode D1 is grounded, the diode becomes
forward biased, hence conduct and current flows through the resistor RL, then no voltage drop across
the diode. Therefore, output Z = 0 (0V), practically Z = 0.7V ≃ 0V.
 When A = 1 and B = 0:
The cathode of diode D1 is 5V, the diode becomes reverse biased, hence it does not conducts and
no current flow through resistor RL. But the cathode of diode D2 is grounded, the diode becomes
forward biased, hence conduct and current flows through the resistor RL, then no voltage drop across
the diode. Therefore, output Z = 0 (0V), practically Z = 0.7V ≃ 0V.
 When A = 1 and B = 1:
The cathodes of both diodes D1 & D2 are connected to 5V. The diodes become reverse biased, hence
both does not conduct and no current flows through the resistor RL, then output voltage pulled to
+Vcc i.e., 5V. Therefore, output Z = 1 (5V).

Exclusive – OR (EX-OR) Gate:

Design of logic circuit, symbol and truth table of exclusive – OR gate.

 It is an electronic circuit having two or more inputs and only one output. The output is zero, when
even number of inputs are one, and output is one, when odd number of inputs are one.
Application: It is used to implement magnitude comparator, gray code converter, adder/subtractor
circuits, parity generator, modulo-2 adder etc.

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2-Input Symbol:

Expression:
Logic Circuit:

3-Input Symbol:

Expression:

Expression:

Exclusive – NOR (EX-NOR) Gate:

Symbol, truth table and final expression for NAND and Ex-OR gate (For two I/Ps).

 It is an electronic circuit having two or more inputs and only one output. The output is
complement of EX-OR gate output.
2-Input Symbol:

Expression:

Logic Circuit:

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3-Input Symbol:

Expression:

Universal Gates:

NAND Gate:
 It is an electronic circuit having two or more inputs and only one output. The output is complement
of AND gate output. It is also called as universal gate, because it can be used to realize all other
gates.

2-Input Symbol:

3-Input Symbol:

NOR Gate:
 It is an electronic circuit having two or more inputs and only one output. The output is complement
of OR gate output. It is also called as universal gate, because it can be used to realize all other gates.

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2-Input Symbol:

3-Input Symbol:

Realization of Logic Gates using Universal Gates (NAND & NOR):

NOT Gate:

AND Gate:

OR Gate:

NOR Gate:

EX-OR Gate:

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EX-NOR Gate:

Realization Using NOR Gate:

1. Implement EX-NOR gate using only NOR gates. Dec.2013/Jan.2014, 10ELN15/25, 04 Marks

NOT Gate:

AND Gate:

OR Gate:

NAND Gate:

EX-NOR Gate:

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OR

EX-OR Gate:

Algebraic Simplification and Realization using Logic Gates:

1. Simplify the expression and realize using basic gates .
Solution:

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OR

2. Realize using NAND gate. Dec.2017/Jan.2018, 17ELN15/25, 06 Marks

Solution:

3. Y = A + B + AB simplify and implement using logic gates and NOR gates.

Dec.2017/Jan.2018, 17ELN15/25, 06
Marks
Solution:

Using Logic Gates: Using NOR Gates:

4. Simplify the following Boolean expressions and realize them using basic gates and universal
gates.
(a)
(b)
(c)
(d)
(e)
(f)
Solution:
(a)

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Realization:
Basic Gate: NAND Gate: NOR Gate:

(b)

Realization:
Using Basic Gate: Using NAND Gate:

Using NOR Gate:

(c)

Realization:
Using Basic Gate: Using NAND Gate:

NOR Gate:

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(d)

Realization:
Basic Gate: NAND Gate: NOR Gate:

(e)

Realization:
Basic Gate: NAND Gate:

NOR Gate:

(f)

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Realization:
Using Basic Gate: Using NAND Gate:

Using NOR Gate:

5. Simplify the following expression and realize using basic gates:

June/July.2016, 15ELN15/25, 04
Marks
Solution:

Realization using Basic Gates:

6. Simplify and realize the following expressions using only NAND and NOR.
.
Dec.2015/Jan.2016, 15ELN15/25, 10 Marks
Solution:
(i)

NAND Realization:

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NOR Realization:

(ii)
NAND Realization:

NOR Realization:

7. Simplify the given Boolean equation Y = (A + ) (CD + E) and realize using NAND gates only.
June/July 2017, 15ELN15/25,
04 Marks
Solution:

Realization using NAND gates:

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8. Simplify . Implement using 2 inputs NAND gates.

Dec.2014/Jan.2015, 10ELN15/25, 06
Marks
Solution:

Implementation Using NAND Gates:

9. Simplify and realize the Boolean expression using two inputs NAND gates only (A + + C) ( +
B + C). Dec.2017/Jan.2018, 15ELN15/25, 05 Marks
Solution:

Implementation Using NAND Gates:

10. Write logic circuit using basic gates for the simplified expression: .
Dec.2015/Jan.2016, 10ELN15/25, 04
Marks
Solution:
; Apply De Morgan’s Law
; Apply De Morgan’s Law to individual terms

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Implementation Using Basic Gates:

11. Simplify and realize using basic gates:

i) ABC + A C + AB + BC
ii) Dec.2014/Jan.2015, 14ELN15/25, 06 Marks
Solution:
i)

Implementation Using Basic Gates:

ii) ter
;Apply De Morgan’s law to 1st term and multiply 2nd & 3rd
ms

Implementation Using Basic Gates:

12. Simplify the following expressions and implement using only NAND Gates:
June/July.2014, 10ELN15/25,
08 Marks
a.
b.
c.
Solution:
a.

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Implementation Using NAND Gates:

b. ; Apply De Morgan’s law

Implementation Using NAND Gates:

c.
Implementation Using NAND Gates:

Half Adder:

 The combinational circuit that performs addition of two bits is called Half Adder. The half adder
operation needs two binary inputs: Augend & Addend and provides two binary outputs: Sum &
Carry.

Expressions:
Carry (Cout) = AB

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Circuit Diagram:

Using Logic Gates: Using Basic Gates:

Half Adder using NAND Gates:

& Carry = AB =

Sum =
Carry = AB =

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Full Adder:

 The combinational circuit that performs addition of three bits is called Full Adder. The full adder
has three binary inputs: Augend, Addend & Carry from previous operation and provides two
binary outputs: Sum and Carry.
Block Diagram:

A & B :Represents the two significant bits to be added.

:Represent the carry from previous lower significant position.
S :Sum bit
:Carry to next higher significant position.

Expressions:

Logic Diagram: Using Basic Gates:

and

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Realization Using NAND Gates:

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Full Adder Using Two Adders:

Expressions:

Fig: Realization Using Logic Gates

Fig: Realization Using NAND Gates

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Problems:
1. Design a combinational circuit that has 3 inputs and one output. The output is at logic 1 or logic
high only when even number of inputs are at logic 1.

Expression:

Logic Diagram Using Basic Gates:

2. Design a logic circuit using basic gates with three inputs A, B & C and one output Y that goes
low only when A is high and B and C are different.
Expression:

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Multiplexers
The objective of a multiplexer is to select one signal from a group of 2n inputs,to be an output on
a single output line. For example 8 –to-1 multiplexer (mux) is as shown in fig.Lines Do……D7 are the
data input lines and F is the output line. Lines A ,B and C are called the select lines. They are interpreted
as a three bit binary number,which is used to choose one of the D lines to be output on the line F.

Implementation

A mux can be designed with a regular pattern of AND and OR gates, as shown in fig.

Application
In all types of digital system applications, multiplexers find its immense usage. Since these allows
multiple inputs to be connected independently to a single output, these are found in variety of applications
including data routing, logic function generators, control sequencers, parallel-to-serial converters, etc.

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Decoders
The objective of the decoder is to decode an n-bit binary number producing a signal on one of 2n
output lines. Figure shows an 3-to-8 decoder.

Implementation

A Decoder is often implemented with an additional input called an ‘enable’ line. When the line is
enabled, the circuit is a decoder. when it is disabled, all the outputs are 0.The same circuit can be used as
a de-multiplexer, which directs a single data input line to one of 2n output lines, depending on the values
of n select lines. Fig shows 3 to 8 decoder implementation.

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Applications: Decoder memory address for reads and writes to random access memory.

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