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Single Event Effect Vulnerability Analysis and On-orbit Error Rate Prediction

He Wei, Wang Yueke, Xing Kefei, Deng Wei

School of Mechatronics Engineering and Automation
National University of Defense Technology
ChangSha, HuNan Province, 410073, China
e-mail: [email protected], [email protected], [email protected], [email protected]

Abstract—On-orbit single event effect error rate is predicted depended on the fault model and the accuracy is limited.
combining accelerated radiation test and space radiation In order to overcome disadvantage of these methods,
environment model for a FPGA-based signal processing some researchers estimate the error rate by combining SEE
platform. With partial TMR and reconfiguration mitigation static cross-section predictions and fault-injections [6], [7].
method, there is no single event latch is observed when the
Accelerated radiation tests is used to acquire the static
surface linear energy transfer of heavy ion is 99.8 MeV.cm2/mg,
and the error/SEU ratio is 4.7431e-004. Error rate of four single event upset (SEU) cross section of device, fault-
different orbits (400 km, 800 km, 1200 km, 35784 km) is injection method is used to acquire dynamic SEU cross
calculated, the most vulnerability orbit is the 1200 km orbit, section, the combined result is used to estimate the error
and the average first error time is 521.8 days. rate at different linear energy transfer (LET) of ions.
Several methods and software are developed to
Keywords-single event effect; vulnerability; error rate; calculate the SEU rate in space environment by different
prediction; FPGA research organization. The Cosmic Ray Effects on
MicroElectronics (CRÈME) code was first released in
I. INTRODUCTION 1986[11]. The latest version of Space Radiation 7.0 toolkit
Single-event effects (SEEs) are induced by the can be used to calculate the space radiation environment of
interaction of an ionizing particle with electronic typical satellite orbits including geostationary orbit,
components, such as single-event transients (SET), single- medium earth orbit, and low earth orbit [4]. French TRAD
event upset (SEU), and multi-bit upset (MBU)[1]. With company developed the OMERE software based on the
very-large-scale integration (VLSI) being widely used in space radiation environment model of AP8, AE8,
space-borne electronic systems and recorded as accidental CREME86, CREME96. The software can simulate the
failures of space instruments, such as Field-Programmable satellite's orbit, and make use of a variety of space particle
Gate Array (FPGA), SEEs have become the main cause of model to calculate the satellite in orbit radiation
such failures [2], [3]. The Beijing Institute of Spacecraft environment of energetic particle flux spectrum and the
System Engineering has studied 272 satellite failures since linear energy transform (LET) spectra[12].
the 20th century around the world, results of which indicate This paper studies the SEE vulnerability of a SRAM-
that 40% of the total number of failures was induced by based FPGA based signal processing platform, and study
SEEs [4]. the method to predict on-orbit error rate. It’s meaningful
It’s a hot topic to evaluate SEE vulnerability before for engineers to know the SEE characteristic before the
space-borne electronic systems is launched. Several space-borne electronic systems is launched, and the
methods have been developed to study the problem. There corresponding mitigation method can be adopted to
are four kinds of methods, on-orbit observation [5], mitigate the soft errors. Compared the above four methods,
accelerated radiation test [6], [7], fault-injection[8], and we adopt heavy ion accelerated radiation test and space
analytical method [9], [10]. These methods are suitable to radiation environment model (proton and heavy ion) to
study for different design phase of space-borne electronic predict the soft error rate for FPGA based single
systems. On-orbit observation is the most actual method to processing platform.
know the results of space-borne electronic systems in space The remainder paper is arranged as following. The
environment, but it is most time wasted and expensive. second part is heavy ion SEE vulnerability based on
Accelerated radiation test is the method to generate high accelerated radiation test, the FPGA-based signal
energy particle by accelerator to radiate the circuits and processing platform is introduced, and the experimental
system, it is also time wasted and expensive, and it’s system is set up, the experimental condition and flow is
impossible to simulate the radiation environment of space. stated. In the third part, the experimental data is explained,
Fault injection and analytical method is to evaluate the and the current of platform is analyzed, and the SEU rate
SEE performance by injecting soft error to system, it is and error rate induced by the heavy ion is calculated. In the

978-1-5090-2377-6/16/$31.00 ©2016 IEEE 

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fourth part, the on-orbit error rate prediction method is monitor for FPGA and DSP. SEE mitigation method has
proposed, and some results of typical orbit are calculated. been adopted to mitigate the platform. Partial TMR for
The last part is conclusion. designs implemented in FPGA and DSP. SEU detection and
scrub for FPGA and DSP. Reconfiguration for FPGA[13].
II. HEAVY ION SEE VULNERABILITY ANALYSIS BASED ON
ACCELERATED RADIATION EXPERIMENT B. Accelerated Radiation Experiment
In this part, the heavy ion accelerated radiation
A. Signal Processing Platform experiment is stated. The aim of the experiment is as
The signal processing platform is an important part of following:
TT&C (Telemetry, Track and Command) satellite system, it a) To test the SEE characteristic of signal processing
platform, to acquire the SEU rate of FPGA, to test the heavy
receives the uplink signal which is sent by ground control
ion LET threshold of signal processing platform, to test the
station. It detects the uplink measuring signal and forms
Single Event Latch(SEL) characteristic of signal processing
downlink measuring frame, and sends the two signals after platform.
modulation back to ground. The platform adopts SDR b) To predicate on-orbit error rate of signal processing
(Software Defined Radio) based on FPGA+DSP structure. platform.
Experimental condition, experimental system and
MU PROM experimental flow is stated respectively.
1) Experimental condition
The experimental device is SRAM-based FPGA
XC2V3000-4BG676I. After the cap of FPGA is removed by
ADC SRAM-based FPGA DAC
chemical method, the required shot range to reach the active
area of FPGA is 25.4um. Based on the ions of institute of
modern physics of Chinese Academy of Sciences, the type
of test ion to be selected is shown in Table II.
POWER CLK
DSP
TABLE II. PARAMETER OF HEAVY ION.
Figure 1. Structure of signal processing platform. Ion Energy Distance Surface LET Shot Beam Area
(MeV) (cm) (MeV.cm2/mg) Range spot (cm2)
The structure of baseband is shown in Fig. 1. Baseband (um) (cm2)
209
is the core of platform, it adopts the SDR design idea, and Bi 923.2 3 99.8 53.7 5.29 2.25
samples in IF (Intermediate Frequency). The main devices
of the platform are listed in Table I. As can be seen from TABLE II, the surface LET of 209Bi
ion is 99.8 MeV.cm2/mg. In addition, the beam spot area is
TABLE I. MAIN DEVICE OF BASEBAND larger than the area of the device, so that the ion can cover
SRAM-based DSP MU the entire exposed chip.
FPGA
2) Experimental system
Mode XC2V3000- TMS320C6415 A3pe3000-
BG767I PQ208 Fig. 2 depicts experimental system.
Specs 300 million Clk frequency 300 million
gates 600MHz gates
Grade Industry Industry Industry
MU
Technics 0.12/0.15um 0.13 CMOS 0.12/0.15um 2xDAC
CMOS CMOS
Packing BGA BGA PQ
FPGA DSP PROM

Company Xilinx Ti Actel 2xADC

Power

Signal Processing Platform NET

FPGA is Xilinx Virtex-II XC2V3000BG767I. DSP is TI
NET
TMS320C6415GLZ. Manage Unit (MU) is Actel FPGA,
A3pe3000. The processing of uplink signal in baseband is: NET Net NET Digital
Host-computer exchanger power
receiving the digital signal after ADC sampling, DDC
transforming in FPGA, forming two IQ orthogonal signals USB

Radiation Room
which will be sent to DSP. In DSP, the uplink signal is
NET >30m
capturing and doing the PLL, DLL and FLL filter
calculating. The accurate estimation of code delay and
Remote-computer
doppler frequency is done, and the remote command is
demodulated which will be sent to other satellite equipment. Figure 2. Structure of experimental system.
The downlink signal is sent to ADC. The Manage Unit is the


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 The experimental system consists of remote computer, recover. To reduce fluence rate and restart the radiation, if
host-computer, net exchanger, digital power, manage unit the fluence rate in several particles remain current continued
and signal processing platform. Remote computer is in the to increase more than 30% and trigger current protection
operating room, it is connect to the net exchanger to control currents in excess of 2A, stopping the radiation. And we can
the host-computer. Others of the testing system are in the get the conclusion that the device has single event latch
radiation room. Host-computer is used to control the process (SEL).
of the experiment, and to record the experiment, including
the video and data. Net exchanger is the exchange core, it is Set up experimental system
used to connect all others of the testing system. Digital
power is used to control the on/off of the signal processing
platform, and to detect the current of the platform. Manage Check operation state of
experimental system
unit is part of the platform, and it is used to manage and
monitor the state of FPGA and DSP. Signal processing
platform is the key equipment of the testing system, FPGA SEL test and fluence rate
determined
and DSP is the SEE vulnerability devices. When the power
of platform is turned on, the manage unit reads the NO
configuration program form PROM, and configure the
SEL is not occurred
FPGA through SelectMAP interface and configure the DSP and fluence rate
through HPI interface. After the configuration is over, the is determined
platform is running the signal processing function.
Meanwhile, the manage unit monitors the working status of Yes
the FPGA and DSP. Manage unit reads back the
configuration frame data of the device and verify with the Whether error
gold frame data stored in the PROM every 1.7 seconds. If is occurred
NO Yes
SEU is detected, the configuration data of the device will be
scrubbed and reconfigured. Meanwhile, the running state Record function NO
Whether error
signal of FPGA and DSP is monitored, the normal state parameter; is recovered
signal is quadrate signal. If state signal is not normal, the Continue
FPGA and DSP will be reloaded. radiation Yes
Send reset command
3) Experimental flow
Experimental flow is shown in Fig. 3. NO NO
a) Setting up experimental system Whether the amount Whether error
Setting up experimental system as shown in Fig. 2. of ions is reached is recovered
Connecting net wire between different equipments. Yes Yes
Connecting USB line between host computer and digital
power, setting up remote computer and host computer with stop the radiation ion
the remote desktop connection. Setting digital power output
voltage current limiting for 8V-2A. Connecting between the NO Whether error
digital power and signal processing platform. is recovered
b) Checking operation state of experimental system
Turning on digital power from the PC control interface, Yes
it is used to observe whether the working current of platform Data analysis
End
is normal, whether FPGA and DSP is successfully loaded
program; whether observation data is normal, and whether Figure 3. Experimental flow of heavy ion testing.
the function of platform is normal. Keeping the system to
run correctly for 5 minutes, includes all work modes, and (3) To observe the amount of FPGA SEU which is
collecting the raw data of the platform. Aiming at the chip of recorded by computer and displayed, adjusting the ion
FPGA by adjusting ion beam. fluence rate form small to large, so that the number of SEU
c) Accelerated radiation experiment is about 1~3 during the readback and verify cycle of FPGA
(1) Turning on the experimental system, starting the (1.7 seconds).
source of radiation after the system reached steady state. (4) After the appropriate ion fluence rate is determined
Smaller fluence rate of ion is sent at the beginning, (completed in 3 minutes) and without the existence of SEL,
observing the working state of system. restart the ion radiation.
(2) Observing whether SEL is occurred. According to (5) Recording fluence rate every 10 seconds, recording
the SEL criterion, if the current continues to increase, more the performance parameters of platform, observing and
than 30%, stop radiation to observe whether the current can judging whether the function is normal. If no error is


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occurred, continue the radiation until the amount of ions 4) Turning off the digital power, closing the beam.
reached. If error is occurred, go to step (6). Collecting the experimental data and be ready to analyse.
(6) After an error is occurring, recording error
III. RESULTS AND DISCUSSION
phenomenon, error time, the amount of ions, current value,
et al. Continuing the radiation for 10 seconds with the same
A. Experimental Data
condition, observing whether the platform can recover by
the reconfiguration itself. Experimental data includes SEU amount of FPGA,
(7) If the function of platform can recover within 10 verification amount of FPGA, state signal abnormal amount
seconds, then continue radiation until the amount of ions of FPGA, reconfiguration amount of FPGA, the time of
reached, go to step (5). Otherwise, go to step (8). radiation(s), and the total amount of heavy ion.
(8) If the platform can’t recover by detecting and The total amount configuration bit of FPGA is 6841856
reconfiguration operation itself within 10 seconds, we will bit.
send the reset command to reload the program for FPGA So, the SEU rate of device is
and DSP, observing whether the function of platform can SEU _ amount 1
V SEU u
recover. If the function of platform can recover within 10 Particle _ amount Configuration _ bit _ amount
seconds, then continue radiation until the amount of ions The error rate of device is
reached, go to step (5). Otherwise, go to step (9). Error _ amount 1
V ERROR u
(9) If the system function can’t be restored, stopping the Particle _ amount Configuration _ bit _ amount
radiation ion, and observing whether the function of The error event is a phenomenon that the system
platform can recover by detecting and reconfiguration function is disabled and can’t be recovered by detection and
operation itself. If the function of platform can recover reconfiguration (DETEC&RECONFIG) of the platform. The
within 10 seconds, then continue radiation until the amount system function can’t be recovered by restoration
of ions reached, go to step (5). Otherwise, stop the radiation. (RESTOR).
The experimental data is shown in Table III.

TABLE III. STATISTICAL RESULT OF EXPERIMENTAL DATA

No. Device tested Time/s Amount of SEU Error SEU rate Error rate
particle amount amount (cm2/bit) (cm2/device
(k/cm2) )
1 FPGA 5360 61.604 12650 6 3.0013e- 9.7396e-
8 005

variety of FPGA, the minimal current is about 1530 mA, the

B. Current Analysis
maximal current is about 16000 mA. The range variety of
1600 current is about 70 mA, it is about 4.55% of the normal
current. We can get the conclusion that no SEL is occurred.
1580
3500
Current of FPGA/mA

Reconfig-2
1560 3000

2500
SEU of FPGA

1540 Reconfig-4
2000

Power on Power off

1500 Reconfig-5
1520
1000 Reconfig-1
Reconfig-6
Reconfig-3
1500 500
0 1000 2000 3000 4000 5000 6000
0
Times/s
-500
Figure 4. Current variety of platform during radiation. 0 1000 2000 3000 4000 5000 6000
Time/s
During the radiation experiment, current of platform is Figure 5. SEU amount of FPGA during radiation.
detected. During the radiation experiment, if the current
varies 30% of the normal current, we judge the function of C. FPGA Data Analysis
the signal processing platform is failure. In the normal state
Fig. 5 indicates SEU amount of FPGA during radiation.
of the signal processing platform, the normal current is 1540
The effective time is about 5360s which is begin at time
mA, if the current is among 1078mA ~ 2002 mA, we judge
640s and end at 6000s, and the amount of ions is about
the occurrence of failure. Figure 4 indicates the current
61604, and the sum of the total SEU is about 12650, the


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average flux rate is about 7.274 particles/s. Figure 6 shows belt proton, electron, X-ray, from the sun of the proton,
the verify amount of FPGA. As we know, manage unit particles from cosmic proton, particles, and ray. By using
verifies the FPGA every 1.7s. The verify amount is smaller these spatial ion LET- flux spectra and proton E- flux
than the SEU amount of FPGA. There are six times of spectra, the SEU rate of the satellite devices can be
reconfiguration. The corresponding time is 1307s, 3300s, calculated based on the SEU cross section data of
3592s, 4824s, 5562 and 5914s. And the error amount of accelerated ground heavy ion radiation.
platform is 6. When FPGA is reconfigured, the SEU counter Error rate can be estimated by combining with the orbit
is cleared to 0. of high-energy proton and heavy ion distribution and
700
radiation experiment. In general, the calculation of SEU rate
Reconfig-2 and error rate contain two aspects, one is the space heavy
600
ions, and the other is the space proton. The former can be
500 Reconfig-4
calculated combined with orbital space heavy ions energy
Verify of FPGA

400
Reconfig-5 spectra and the heavy ion-LET curve, while the latter
300 requires space orbit proton energy spectrum and proton
200
Reconfig-1 Reconfig-6 radiation data. Due to the test conditions and the funds, the
Reconfig-3
100 heavy ion test is very limited, and proton radiation in China
0
is even more scarce.
In order to calculate the SEU rate of typical orbit, the
-100
parameter needed is heavy ion LET-flux spectrum, proton-
0 1000 2000 3000 4000 5000 6000
Time/s flux. Prediction calculation scheme can be described as,
Figure 6. Reconfiguration amount of FPGA during radiation. combined with corresponding heavy ion testing data (SEU
cross section - LET curve), the proton SEU cross section -
There are there reasons which results in the Energy curve is calculated by FOM method. LET-flux
reconfiguration of FPGA. The first reason is that the SEU spectra of ions and energy-flux spectrum of proton is
cumulation of FPGA. The corresponding time is 1307s, calculated by OMERE software for typical satellite orbit.
4824s, and 5914s. The second reason is the reset command The SEU rate can be calculated using the SEU cross section
by human, the corresponding time is 3300s. Figure 7(a) curve and space ionizing spectra, the detailed calculation
shows the four reconfiguration. The third reason is the steps as shown in Figure 8. Then, the error rate can be
abnormal state of FPGA, the corresponding time is 3592s calculated by error rate- SEU cross section.
and 5562s. Figure 7(b) shows the two reconfiguration.
Ion energy-flux SEU-LET data Proton energy-flux

Ion transportation Ion Weibull curve FOM Proton

(W,S,L0,S0) Weibull
(Qc, a, b, c) curve

Proton
Ion LET-flux
dN transportation
dL

W (L) UPSET(Qc (L), a,b, c) Proton LET-flux

(a) (b)
Figure 7. (a) Reconfiguration of FPGA. f
dN
f

(b) Reconfiguration of FPGA due to the abnormal state of FPGA. SEU _ rate ³ W ( L) dL
dL SEU _ rate ³ I ( E )V ( E )dE
E0
L0
IV. ON-ORBIT ERROR RATE PREDICTION
f

A. On-bit Error Rate Prediction Method Error _ rate ³ (SEU _ rate(heavy _ ion)  SEU _ rate( proton))dE
E0
French TRAD company developed the OMERE Figure 8. Calculation methods used to estimate SEU rate.
software based on the space radiation environment model of
AP8, AE8, CREME86, CREME96. The software can B. Results and Discussion
simulate the satellite's orbit with a variety of space particle Finland JYFL Cyclotron Laboratory has finished
model, to calculate the satellite in orbit radiation radiation experiment with several kinds of heavy ions for
environment of energetic particle flux spectrum, and the Xilinx Virtex II SRAM-based FPGAXQR2V3000.
LET spectra. Ions include the earth's Van Allen radiation


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 Orbit Altitude SEU rate Error rate
/device/day /platform/day
LEO1 800 km 98° 1.47 6.9723e-4
LEO2 400 km 98° 0.163 7.7312e-5
LEO3 1200 km 98° 4.04 1.9e-3
GEO 35784 km 98° 3.39 1.6e-3

Table IV shows the SEU rate and error rate of different

orbits. The most vulnerability orbit is the 1200 km orbit.
And the average days that the platform can work in the right
state for different orbits is 1434.2 days, 12935 days,
521.8days and 621.9 days.

Figure 9. Weibull curve of SEU-LET of FPGA XQR2V3000. V. CONCLUSION

This paper focuses on the SEE vulnerability analysis and
Fig. 9 shows the Weibull curve of SEU-LET of FPGA on-orbit error rate prediction for a FPGA-based signal
XQR2V3000. It is the data used to estimate XC2V3000. processing platform.
Based on the calculation method stated before, in the LEO SEE vulnerability is analyzed by heavy ion accelerated
orbit with 400 km, and the shielding materials is 3mm radiation test. The FPGA tested is XC2V3000 - BG767I,
aluminum, The SEU rate of FPGA induced by heavy ions is and the heavy ion is 209Bi with the surface LET of 99.8
0.118 per device per day. MeV.cm2/mg. No SEL is occurred. The SEU rate is
3.0013e-8 cm2/bit, and the error rate is 9.7396e-005
cm2/device. The error/SEU ratio is 4.7431e-004. The
highlight of the work is that we get the error/SEU ratio for a
FPGA-based signal processing platform. And we validate
that with partial TMR and reconfiguration mitigation
method, there is no single event latch is observed when the
surface linear energy transfer of heavy ion is 99.8
MeV.cm2/mg.
The error rate of different orbits estimation method is
proposed and calculated. The error rate of orbits includes
heavy ion error rate and proton error rate. The proton SEU
cross section-Energy curve is calculated by FOM method.
Figure 10. SEU-Energy curve of proton. The corresponding heavy ion testing data (SEU cross section
- LET curve) is acquired by heavy ion accelerated radiation
By using the FOM method, the proton SEU threshold is test, and the testing data of Finland JYFL Cyclotron
about 16+2=18 Mev, and L=6 MeV/mg/cm2. The SEU cross Laboratory is added. LET-flux spectra of ions and energy-
section of proton is about 1.636e-14cm2/bit, and there are flux spectrum of proton is calculated by OMERE software
9582848 configuration bits of FPGA, the SEU rate is about for typical satellite orbit. The SEU rate can be calculated
1.568e-7cm2/dev. The Weibull curve of the proton in the using the SEU cross section curve and space ionizing
LEO orbit radiation environment was calculated by the spectra. Then, the error rate can be calculated by error rate-
OMERE software. Figure 10 shows the SEU-Energy of SEU cross section. SEU rate and error rate of four different
proton. orbits (400 km, 800 km, 1200km, 35784 km) is calculated,
According to FOM calculation theory, the SEU rate of and the SEU rate for different orbits is 1.47/device/day,
proton in the LEO orbit is 0.047 per device per day. So the 0.163 /device/day, 4.04 /device/day, 3.39 /device/day, and
SEU amount per day in LEO2 orbit of a single FPGA is the corresponding error rate is 6.9723e-4 /platform/day,
0.118+0.0447=0.163 (/device/day). Based on the radiation 7.7312e-5 /platform/day, 1.9e-3 /platform/day, 1.6e-3
stated in section II, there are 6 times error corresponding to /platform/day. And the average days that the platform can
12650 SEU, it means that Error-SEU ratio is about 4.7431e- work in the right state for different orbits is 1434.2 days,
4. For the FPGA of 400 km orbit, the error rate induced by 12935 days, 521.8days and 621.9 days. The most
single particle is about 0.163 h 4.7431e-4= 7.7312e- vulnerability orbit is the 1200 km orbit.
5(/platform/day). The physical meaning is that there is Future work includes combining fault injection and
7.7312e-5 error of the platform in a single day, and the analytical method to estimate the SEU rate and error rate for
result is an average result. Error rate of four orbits is FPGA-based signal processing platform.
predicted by the method stated before.
ACKNOWLEDGMENT
TABLE IV. ERROR RATE OF PLATFORM INDUCED BY FPGA.
Orbit parameter Error rate of platform induced by FPGA This work was supported by National Natural Science
Foundation of China (No. 61171019).


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