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ECE-405

What is VLSI?
VLSI stands for Very Large Scale Integration.
 Design and manufacturing of extremely small, complex circuitry using
modified semiconductor materials

Why VLSI????

Integration improves the design

 Lower parasitic and higher speed.


 Lower power consumption.
 Physically smaller, Integrated Circuit(IC) may contain millions of
transistors, each a few mm in size.
Integration reduces manufacturing cost – (almost) no manual assembly.

VLSI applications
 VLSI is an implementation technology for electronic circuitry –analog or
digital
 It is concerned with forming a pattern of interconnected switches and gates
on the surface of a crystal of semiconductor.
 Microprocessors – Personal computers, microcontrollers.
 Memory – DRAM/SRAM
 Optical switches

Typical VLSI System

 Cell phones
 Digital camera
 Hearing aids
 Automotive
 Computers
 Biomedical
Why ICs

Integration improves

 Size(submicron)
 Speed
 Power
 Complexity

Smaller size of IC components yields higher speed and lower power


consumption.

IC classification

 Circuit tehnology(BJT, BiCMOS, NMOS, CMOS)


 Design style(Standard cell, Gate array, Full Custom, FPGA)
 Design type(Analog, Digital, or Mixed Signal)
 Circuit Size(SSI, MSI, LSI,VLSI, ULSI, GSI)

Classification of IC technologies
 Bipolar
 CMOS
 BiCMOS
 SOI
 SiGe(For RF)
 GaAs(For high speed)

VLSI technological growth based on

 Feature size
 Gate count of a chip
 Transistor count of a chip
 Operating frequency of a chip
 Power consumption of a chip
 Power density in a chip
 Size of a device used in chip
Variety of Integrated Circuits

 • More Specialized Circuits


 • Application Specific Integrated Circuits (ASICs)
 • Systems-On-Chips

Discrete vs integrated circuit design


Activity/item Discrete integrated
Component Well known Poor absolute accuracies
accuracy
Fabrication Independent Very dependent
Physical Pc layout Layout,verification and
implementation extraction
Parasitic Not important Must be included in design
Simulation Model parameters well known Model parameters vary
widely
Testing Generally complete testing is Must be considered before
possible design
Components All possible Active devices, capacitors
and resistor

Why CMOS ???


 Power dissipation only during switching.

 Higher packing density.

 Lower manufacturing cost per device.

 MOS devices could be scaled down more easily


Bipolar vs MOS transistor
Category BJT CMOS
Power dissipation Moderate to high Low but can be large
speed faster fast
Number of terminals 3 4
Cut off frequency 100GHz 50GHz
noise good poor
Switch implementation poor good
Technology improvement slower faster

Moores law

In the 1960s Gordon Moore predicted that the number of transistors that could be
manufactured on a chip would grow exponentially. His prediction, now known as
Moore’s Law.
OR
In 1965 Gordon Moore noted that the number of transistors on a chip doubled
every 18 to 24 months.

Classification of Circuit Size

Classification of ASIC design style


Design Style Comparison

Advantages of 3D IC

 Improved packing density.


 Noise immunity.
 Improved total power due to
reduced wire length/lower
capacitance.
 Superior performance.
 The ability to implement added functionality.
Design Abstraction

Figure 1-7 shows a typical design abstraction ladder for digital systems:

• Specification. The customer specifies what the chip should do, how fast it should run,etc. A
specification is almost always incomplete—it is a set of requirements, not a design.
• Behavior. The behavioral description is much more precise than the specification.Specifications
are usually written in English, while behavior is generally modeled as some sort of executable
program.
• Register-transfer. The system’s time behavior is fully-specified—we know the allowed input
and output values on every clock cycle—but the logic isn’t specified as gates. The system is
specified as Boolean functions stored in abstract memory elements. Only the vaguest delay and
area estimates can be made from the Boolean logic functions.
• Logic. The system is designed in terms of Boolean logic gates, latches, and flip-flops. We know
a lot about the structure of the system but still cannot make extremely accurate delay calculations.
• Circuit. The system is implemented as transistors.
• Layout. The final design for fabrication. Parasitic resistance and capacitance can be extracted
from the layout to add to the circuit description for more accurate simulation.

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