1

TABLE OF CONTENTS

REGULATIONS AND SAFETY RULES………………………………………………………...……......1

EXPERIMENT NO. 1 ERROR CORRECTING WITH BLOCK CODING……………..………...…3

EXPERIMENT NO. 2 LINE CODING……………………………………………………..….10

EXPERIMENT NO. 3 BIT-ERROR RATE MEASUREMENTS…………………………………….15

EXPERIMENT NO. 4 SAMPLING……………………………………………….……….….26

EXPERIMENT NO. 5 PWM AND PPM………………………………………….…..….31

EXPERIMENT NO. 6 PCM ENCODING……………………………………………….……36

EXPERIMENT NO. 7 PCM DECODING………………………………………………….…44

EXPERIMENT NO. 8 AMPLITUDE MODULATION…………………………………….….52

EXPERIMENT NO. 9 FREQUENCY SHIFT KEYING GENERATION

AND DEMODULATION…………………………………………………..….60

EXPERIMENT NO. 10 SAMPLING BINARY PHASE SHIFT KEYING……………………..……67

EXPERIMENT NO. 11 STUDENT-DESIGNED EXPERIMENT ON PERFORMANCE

COMPARISON OF DIGITAL MODULATION TECHNIQUES………..…75

COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

REGULATIONS AND SAFETY RULES

The following Regulations and Safety Rules must be observed in all concerned laboratory locations.

1. It is the duty of all concerned parties who use any electronics and communications laboratory to
take all reasonable steps to safeguard the HEALTH and SAFETY of themselves and all other users
and visitors.

2. Be sure that all equipment is properly working before using them for laboratory exercises. Any
defective equipment must be reported immediately to the Lab. Instructors or Lab. Technical Staff.

3. Students are allowed to use only the equipment provided in the experiment manual or equipment
used for senior project laboratory.

4. Power supply terminals connected to any circuit are only energized with the presence of the
Instructor or Lab. Staff.

5. Students should keep a safe distance from the circuit breakers, electric circuits or any moving
parts during the experiment.

6. Avoid any part of your body to be connected to the energized circuit and ground.

7. Switch off the equipment and disconnect the power supplies from the circuit before leaving the
laboratory.

8. Observe cleanliness and proper laboratory housekeeping of the equipment and other related
accessories.

9. Wear proper clothes and safety gloves or goggles required in working areas that involves
fabrications of printed circuit boards, chemicals process control system, antenna communication
equipment and laser facility laboratories.

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COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

10. Double check your circuit connections specifically in handling electrical power machines, AC
motors and generators before switching “ON” the power supply.

11. Make sure that the last connection to be made in your circuit is the power supply and first thing
to be disconnected is also the power supply.

12. Equipment should not be removed, transferred to any location without permission from the
laboratory staff.

13. Software installation in any computer laboratory is not allowed without the permission from the
Laboratory Staff.

14. Computer games are strictly prohibited in the computer laboratory.

15. Students are not allowed to use any equipment without proper orientation and actual hands on
equipment operation.

16. Smoking and drinking in the laboratory are not permitted.

All these rules and regulations are necessary precaution in Electronics and Communications
Laboratory to safeguard the students, laboratory staff, the equipment and other laboratory users.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Experiment No. 1
ERROR CORRECTING WITH BLOCK CODING
Course: Experiment No.:
Group No.: Section:
Group Members: Date Performed:
Date Submitted:
Instructor:

1. Objective(s):
1. To be familiar with the different kinds of error detection and correction block coding.
2. To identify the source of errors.
2. Intended Learning Outcomes (ILOs):
The students shall be able to:
2.1 determine the difference among Block/line coding for error corrections.
2.2 determine the source of errors through X-OR gate
2.3 determine the specific bit/s error using line code decoder

3. Discussion:
Block coding
Block coding adds extra bits to a digital word in order to improve the reliability of transmission. The transmitted
word consists of the message bits plus code bits. It may also, as in this experiment, contain a frame synchronization
bit. It utilizes a SEQUENCE GENERATOR with a read-only memory (ROM) type BRAMP 1.0 installed. This generates
a data stream as though derived from a ramp as the analog message. The imaginary ramp has a period of 128 clock
bits. Each sample is encoded as 4-bit PCM word.

Figure 1: A data frame of eight slots, one per clock period

This means that, if the 4-bit samples (Di) are placed in an 8-bit frame, then there remain 4 empty slots. Into one of
these the SEQUENCE GENERATOR places alternating 0s and 1s, as the frame SYNC pulse FS. The remaining three
slots (Ci) are used by the BLOCK CODE ENCODER, which follows it, for the coding bits. The scheme is illustrated in
Figure 1.
Since the imaginary ramp is sampled synchronously with the system clock, there are 16 samples during each 128
clock cycles, so successive 128 bits are identical.

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Error Correcting
Although the transmitted signal is in TTL format it will not be converted to lower-level bipolar (to make it more
appropriate for an analog channel). There will be no channel, as such. Instead, transmitter and receiver will be
connected via one input of an X-OR gate.
This is acting as the noisy (but not band-limited) channel. The ‘noise’ will be inserted via the other input (later
referred to as the ‘B’ input) of the X-OR gate. The function of the XOR gate is described below.
A block diagram of the system is shown in Figure 2. The ‘source of errors’ is a SEQUENCE GENERATOR (later
it is called the ERROR generator), clocked at the same rate as the message source. It is fitted with a PRSG ROM and
set to output a 32-bit sequence. Its SYNC pulse thus appears every 32 clock periods.

Figure 2: System Block Diagram

When SYNC is used as an input to the X-OR gate, it corrupts one bit of every fourth frame of the message.
Which bit is corrupted depends on initial conditions when the ERROR generator starts.

4. Resources:
Equipment:
TIMS Board
TIMS Modules
● Sequence generator, clock code decoder
Digital Oscilloscope
patching wires and extension cord

5. Procedure:

Part A. Block Code Encoding

1. With the BRAMP 1.0 ROM installed in the SEQUENCE GENERATOR both toggles of the on-board switch
SW2 should be set to ON. Then:

● The X output is the repeated 128-bit pattern described earlier.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

● The SYNC output (measure & calculate: 16.276 Hz) marks the end of a 128-bit pattern
● The ‘Y’ output (measure & calculate: 260.417 Hz) marks the end of each FRAME.

2. Patch up the model of Figure 3.

Figure 3: Generation model

3. Derive the 2.083 kHz TTL clock by using the DIGITAL UTILITIES (not shown) to divide the 8.333 kHz TTL
from MASTER SIGNALS.

4. Oscilloscope displays of patterns in this model are prone to flickering, due to the relatively slow clock rate. So
it is important to choose your triggering signals wisely. Display your output.

Graph:

5. Use your oscilloscope, and document your methods, for performing the following tasks. In each case record
important details, such as oscilloscope synchronizing signal, oscilloscope settings, and waveform time scales.

a. Confirm the existence of 16 8-bit frames.

b. Confirm the presence of the alternating frame SYNC (FS) pulses in each 8-bit frame

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c. Identify several 4-bit words from consecutive frames, and demonstrate that they could
represent samples of a ramp.

Do not disconnect the circuit.

Part B. Error Correcting with Block Coding

6. When a particular code has been set up, and the message successfully decode without error, the BUFFER
should be included in the transmission path. By patching it in or out it will introduce a polarity change in the
channel.

7. A model of the block diagram of Figure 2 is shown in Figure 4. Note the use of a stolen frame sync FS pulse.

8. Check operation. With no input from the ERROR SEQUENCE GENERATOR there should be no errors.

9. Compare waveforms at different points throughout the system, confirming they are as expected. Graph the
analog output from the PCM DECODER.

Graph:

10. What if a TTL HI is connected to the ‘B’ input of the X-OR gate? What happens to the output at Vout of the
PCM DECODER? Graph the output Describe and explain.

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Graph:

Bit error insertion - 1 error

11. Connect the SYNC output of the ERROR SEQUENCE GENERATOR to the ‘B’ input of the X-OR gate. What
happens? Visually compare the received data stream with that transmitted. Locate the errors. Should they be
corrected by the BLOCK CODE DECODER? Are they? Use the ERROR generator reset button to move errors
from frame to frame. What if they fall on the FS slot?

12. Observe the effect upon the recovered analog (ramp) message of uncorrected errors. Consider what the
recovered message would look like if the PCM DECODER was switched to 4-BIT COMPANDED?

Then check your predictions. Note: the recovered message from the Vout of the PCM DECODER will be in
quantized form. What would be the passband width for a suitable reconstruction filter?

Bit error insertion - 2 errors

13. What if the ERROR generator is clocked at half the system data clock rate? The ‘B’ signal from the SYNC
output is now 2-bits wide, and so the corrupted frames have two errors.

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14. Show that Hamming cannot correct this.

Bit error insertion - multi errors

15. As confirmation of your patching, use the X output from the ERROR source. In a 100,000 clock periods
Hamming passes 31251 errors, and OTHER (no block encoding) passes 34376 errors in the same time.

16. Selecting OTHER of the BLOCK CODE ENCODER/DECODER modules removes the block coding. Insert
errors (hit RESET until errors fall onto the message bits), and compare performance.

17. Remember you can (on successive, repeatable sweeps of the ERROR COUNTING
UTILITIES), record both total errors as well as detected/corrected errors. Comparison of these two measures
can be informative.

6. Observation:

7. Interpretation:

8. Conclusion:

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9. Questions and Problems:

1. How does the Hamming code correct errors?

2. Explain the need for error control in any communication system.

3. Give ways on how could we minimize the errors.

10. Assessment (Rubric for Laboratory Performance):

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Experiment No. 2
LINE CODING
Course: Experiment No.:
Group No.: Section:
Group Members: Date Performed:
Date Submitted:
Instructor:

1. Objective(s):
1. To be familiar with the properties of the line-code encoder and line-code decoder modules, and the codes
they generate.
2. To interpret the various line coding formats used by the line-code encoders and decoders.

2. Intended Learning Outcomes (ILOs):

The students shall be able to:
2.1 describe and difference among line encoding formats.
2.2 determine the importance of line encoding formats in some applications for digital transmission.
2.3 describe the error capabilities of line coding.

3. Discussion:

There are many reasons for using line coding. Each of the line codes you will be examining offers one or more
of the following advantages:
● Spectrum shaping and relocation without modulation or filtering. This is important in telephone line
applications, for example, where the transfer characteristic has heavy attenuation below 300 Hz.
● bit clock recovery can be simplified
● DC component can be eliminated; this allows AC (capacitor or transformer) coupling between stages
(as in telephone lines). Can control baseline wander (baseline wander shifts the position of the signal
waveform relative to the detector threshold and leads to severe erosion of noise margin).
● error detection capabilities
● Bandwidth usage; the possibility of transmitting at a higher rate than other schemes over the same
bandwidth.

At the very least the LINE-CODE ENCODER serves as an interface between the TTL level signals of the
transmitter and those of the analog channel. Likewise, the LINE-CODE DECODER serves as an interface between
the analog signals of the channel and the TTL level signals required by the digital receiver.
In a digital transmission system line encoding is the final digital processing performed on the signal before it
is connected to the analog channel, although there may be simultaneous bandlimiting and wave shaping.

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Figure 1: baseband transmission system

The LINE-CODE ENCODER serves as a source of the system bit clock. It is driven by a master clock at 8.333
kHz (from the TIMS MASTER SIGNALS module). It divides this by a factor of four, in order to derive some necessary
internal timing signals at a rate of 2.083 kHz. This then becomes a convenient source of a 2.083 kHz TTL signal for
use as the system bit clock.
Because the LINE-CODE DECODER has some processing to do, it introduces a time delay. To allow for this, it
provides a re-timed clock if required by any further digital processing circuits (eg, for decoding, or error counting
modules).

4. Resources
Equipment
TIMS Board
TIMS Modules
● Sequence Generator, Line-Code Encoder
● Buffer Amplifiers, Line Decoder
Digital Oscilloscope
patching wires and extension cord

5. Procedure:
Part A.
Figure 2 shows a simplified model of Figure 1. There is no source encoding or decoding, no baseband
channel, and no detection. Referring to the figure, patch the model first without the buffer.

Figure 2: simplified model of Figure 1

Note that the LINE-CODE DECODER requires, for successful decoding, an input signal of amplitude
near the TIMS ANALOG REFERENCE LEVEL (±2 volt pp). Then:
1. Select a short sequence from the transmitter message source
2. At least initially you synchronize the oscilloscope to show a snapshot of the transmitter
sequence.
3. Draw and examine each code in turn from the encoder, confirming the transformation from
TTL is as expected. Determine what the law of each transformation is.

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You should have 7 tables for the first part of the experiment including proper labels specifying the
original message, the various encoder codes, and the decoded message plus the law of each
transformation.

Part B.
When a particular code has been set up, and the message successfully decode without error, the
BUFFER should be included in the transmission path. By patching it in or out it will introduce a
polarity change in the channel.
If there is no change to the message output, then the code in use is insensitive to polarity
reversals.

Line Encoding Formats Insensitive to polarity

reversal? Yes or No

NRZ-M

NRZ-L

UNI-RZ

BP-RZ

RZ-AMI

BiΦ-L

Dicode

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6. Observation:

7. Interpretation:

8. Conclusion:

9. Questions and Problems:

1. Why introduce the complications of line encoding in a digital transmission system?

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2. An important function of many line encoders is the elimination of the DC component. When is
this desirable?

3. Give other line encoding formats and describe each.

10. Assessment (Rubric for Laboratory Performance):

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Experiment No. 3
BER MEASUREMENTS
Course: Experiment No.:
Group No.: Section:
Group Members: Date Performed:
Date Submitted:
Instructor:

1. Objective(s):
3. To set-up a digital communications system over a noisy, band limited channel, with provision for line-coding
4. To obtain BER measurement for different SNR values

2. Intended Learning Outcomes (ILOs):

The students shall be able to:
2.4 determine the probability of errors to occur upon setting up a noisy communication channel.
2.5 determine the BER of noisy band limited channel.
2.6 determine the BER measurement for different SNR values.

3. Discussion:
This experiment serves as an introduction to bit error rate (BER) measurement. It models a digital
communication system transmitting binary data over a noisy, bandlimited channel. A complete instrumentation
setup is included, that allows measurement of BER as a function of signal-to-noise ratio (SNR).
A simplified block diagram of the basic system is shown in Figure 1 below. A more detailed diagram is shown
in Figure 2.

Figure 1: Block diagram of system.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

The Transmitter
At the transmitter is the originating message sequence, from a pseudo random binary sequence (PRBS)
generator, driven by a system bit clock.

The channel
The channel has provision for changing its bandlimiting characteristic, and the addition of noise or other
sources of interference (Error! Reference source not found.).

The receiver
The receiver (detector) regenerates the transmitted (message) sequence. It uses a stolen bit clock.

The BER instrumentation

The instrumentation consists of the following elements:
1. A sequence generator identical to that used at the transmitter. It is clocked by the system bit clock
(stolen, in this case). This sequence becomes the reference against which to compare the received
sequence.
2. A means of aligning the instrumentation sequence generator with the received sequence. A sliding
window correlator is used. This was introduced in a previous experiment.
3. A means of measuring the errors, after alignment. The error signal comes from an X-OR gate. There
is one pulse per error. The counter counts these pulses, over a period set by a gate, which may be left
open for a known number of bit clock periods.

Figure 2: Detailed block system diagram.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

4. Resources:
Equipment:
TIMS Board
TIMS Modules
● Variable DC(Bulit-in), Noise Generator, Adder, Any filter Module, Adder, Channel Macro Model
● Sequence generator, Line code encoder, Decision Maker, Master signal(built-in), Line code decoder
● Counting Utilities, Wideband True RMS Meter
Digital Oscilloscope
patching wires and extension cord

5. Procedure:

Figure 3: TIMS Circuit Model.

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COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

The Transmitter
1. Patch the transmitter according to Error! Reference source not found., from a SEQUENCE
GENERATOR (set to a short sequence - both toggles of SW2, on circuit board, UP), a LINE-CODE
ENCODER (using NRZ-L), and the MASTER SIGNALS module. Note that the LINE-CODE ENCODER
accepts the master clock, which is the 8.333 kHz TTL ‘sample clock’ from the MASTER SIGNALS
module, and divides it by four to produce the 2.083 kHz system bit clock for the SEQUENCE
GENERATOR.

2. Press the reset on the SEQUENCE GENERATOR. Check on CH1-A that a short TTL sequence has
been generated by the SEQUENCE GENERATOR. Graph the output.

Graph:

3. With the previous plot held on CHA1, check the NRZ-L output of the LINE-CODE ENCODER on CHB1.
Relative to the TTL on CH1-A, it will be delayed half a bit period. This is the signal being transmitted to
the channel. Confirm the code format. Graph the output.

Graph:

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COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

The Channel Method

The macro CHANNEL MODEL module is shown modeled in Error! Reference source not found..

1. Patch up the channel according to Figure 4 and insert it into the position shown in Error! Reference
source not found.. Use the 100 KHz channel filters module as a filter.

2. Set the front panel attenuator of the NOISE GENERATOR to maximum output; but reduce the channel
noise to zero by rotating the INPUT ADDER gain control ‘g’ fully counter-clockwise.

3. Adjust the amplitude of the signal into the BASEBAND CHANNEL FILTERS module to near the TIMS
ANALOG REFERENCE LEVEL (say, 2 volt peak-to-peak) with the INPUT ADDER gain control ‘G’. This
level will need resetting when noise is added.

4. Select channel #1 of the 100 KHz CHANNEL FILTERS module. This will act as a buffer. Select DC.

5. Set the gain of the DC threshold adjustment path through the OUTPUT ADDER to zero.

6. Adjust the amplitude of the signal out of the CHANNEL MODEL to, say, 2 volt peak-to-peak with the
OUTPUT ADDER gain control ‘G’. The gain through the channel is now unity.

7. Check that output of channel matches original signal. Graph the output.

Graph:

When tracing the sequence through the system, notice that there is a polarity inversion introduced by the
INPUT ADDER of the channel and then another at the output adder.

The Receiver
The receiver consists of the DECISION MAKER and LINE-CODE DECODER modules.
8. Before plugging in the DECISION MAKER:
a) Switch the on-board switch SW2 to ‘INT’ (DECISION POINT can now be adjusted with the front panel
control).
b) Select the expected line code with the on-board rotary switch SW1 (upper rear of board). For this
experiment it is NRZ-L.
9. Patch up the DECISION MAKER.

10. Check that the reconstructed ‘analog’ output from the DECISION MAKER is a delayed version of, but
otherwise the same shape as, that at the channel input. Graph the output.

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COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Graph:

11. Patch up the LINE-CODE DECODER, selecting the NRZ-L output.

12. Press the reset on the LINE-CODE DECODER. Check that the TTL output sequence is identical, except
for a delay, with that at the transmitter SEQUENCE GENERATOR TTL output. Graph the output

Graph:

The receiver consists of the DECISION MAKER and LINE-CODE DECODER modules.

BER Measurement Instrumentation

The transmission system is now fully set up. You will now proceed to verify its overall operation. The BER
measurement instrumentation system is used to generate an identical sequence to that transmitted, and
aligned with that from the receiver detector. These two sequences will be compared, bit by bit, and any
disagreements counted. The count is made over a pre-determined number of bit clock periods, and so
the bit error rate (BER) may be calculated. You will record the BER for various levels of noise, and
compare with theoretical expectations.

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13. Patch up the measurement tool according to Error! Reference source not found.. Check that the line
from the X-OR output to the instrumentation SEQUENCE GENERATOR RESET is open. Note the
instrumentation (receiver) SEQUENCE GENERATOR uses the LINE-CODE DECODER strobe as its bit
clock. Trigger the oscilloscope for a snapshot. Check that there is a short sequence coming from the
instrumentation SEQUENCE GENERATOR output.

14. Observe the two inputs to the X-OR gate simultaneously. It is unlikely that they are aligned, but they
should be synchronized.

15. Observe the two inputs to the X-OR gate simultaneously. It is unlikely that they are aligned, but they
should be synchronized.

16. Momentarily close the line from the X-OR output to the instrumentation SEQUENCE GENERATOR
RESET. Confirm that the two sequences, already synchronized, are now aligned. Graph the output.

Graph:

If you want to see the sliding window correlator at work again, press the reset on the instrumentation
SEQUENCE GENERATOR, and alignment will be lost. Re-align by repeating the last Task.

17. Set the FREQUENCY COUNTER to its COUNT mode (knob fully clockwise), and patch it into the system,
complete with the gate signal from the ERROR COUNTING UTILITIES module.

18. Make sure the TRIG switch on SW1 is set to HI (down, or left) and the GATE switch is set to LO (up, or
right). Both switches of SW2 should be set to LO (up, or right). Switch the gate of the ERROR COUNTING
UTILITIES, with the PULSE COUNT switch, to be active for 105 bit clock periods. Calculate how long you
have to wait.

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COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

19. To make an error count:

a) Reset the FREQUENCY COUNTER.

b) Start the error count by pressing the TRIG button of the ERROR COUNTING UTILITIES module. The
‘active’ LED on the ERROR COUNTING UTILITIES module will light, and remain alight until 90% of the
count is completed, when it will blink before finally extinguishing, indicating the count has concluded.
Every time a count is initiated one count will be recorded immediately. This is a ‘confidence count’, to
reassure you the system is active, especially for those cases when the actual errors are minimal. It does
not represent an error, and should always be subtracted from the final count.

Since there is no noise, you should have got a count of 1 (no errors)

Error Counting in the Presence of Noise

20. Increase the message sequence length of both SEQUENCE GENERATOR modules (both toggles of
SW2 DOWN).

21. Re-establish sequence alignment by pressing all the reset buttons, in order input to output, then
momentarily connect the X-OR output to the instrumentation SEQUENCE GENERATOR RESET input.

22. Remove both inputs from the INPUT ADDER. Using both the VARIABLE DC control and the OUTPUT
ADDER ‘g’ control, set the DC level at the input to the DECISION MAKER to +25 mV (use the WIDEBAND
TRUE RMS METER). Replace the inputs to the INPUT ADDER.

23. Reconnect the inputs to the input adder. Measure BER according to the procedure in explained above.
Record the measurement, and the conditions under which it was made.

24. Decrease the noise level by one increment of the NOISE GENERATOR front panel attenuator. Go to the
previous Task. Record measurement for new SNR value.

25. Plot BER versus SNR. Relate your results to expectations.

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COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

 2Eb 
P Q
e  N 
26. The probability of error is given by:  0 .

27. Plot this theoretical Pe versus Eb/No, for Eb/No ranging from 0 dB to 10 dB. Note that the probability of
error does not match with this theoretical expression. Why not? Are we really using Eb/No? What receiver
does the above expression assume? Are we implementing that receiver?

Plot:

Do not disconnect the circuit.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

6. Observation:

7. Interpretation:

8. Conclusion:

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

9. Questions and Problems:

1. Once sequence alignment is attained, the sliding window correlator is disabled. Explain why
alignment is not lost even if the noise level is raised until the BER increases to unacceptably high
levels.

2. Why were you advised to use a long sequence when counting errors?

3. Explain the principle of what you were doing when adjusting the DC at the input to the DECISION
MAKER

10. Assessment (Rubric for Laboratory Performance):

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Experiment No. 4
SAMPLING
Course: Experiment No.:
Group No.: Section:
Group Members: Date Performed:
Date Submitted:
Instructor:

1. Objective(s):
1. To analyze the sample and hold operation as a first step towards digitization of an analog waveform and
message reconstruction by low-pass filtering
2. To observe the effect of undersampling

2. Intended Learning Outcomes (ILOs):

The students shall be able to:
2.7 describe the role of sample and hold circuit to produce a digital signal
2.8 describe the difference between natural and flat top sampling.
2.9 determine the effect of undersampling..

3. Discussion:

Before it is possible to transmit analog information via a digital system the analog signal must first be transformed
into a digital format. The first step in such a transformation typically involves a sampling process.
Natural sampling takes a slice of the waveform, and the top of the slice preserves the shape of the waveform.
A very common and easily implemented method of sampling of an analog signal uses the sample-and-hold
operation. This produces flat top samples. Flat top sampling takes a slice of the waveform, but cuts off the top of the
slice horizontally. The top of the slice does not preserve the shape of the waveform.
Figure 1 below contrasts the two methods.

Figure 1: natural sampling (above) and flat top (below)

The sample-and-hold operation is simple to implement, and is a very commonly used method of sampling in
communications systems. In its simplest form the sample is held until the next sample is taken. So it is of maximum
width.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

This is illustrated in Figure 2.

Figure 2: sampling by sample-and-hold (for full sample width)

In the above example the sampling instant is coincident with the rising edge of the clock signal. In practice
there may be a ‘processing delay’ before the stepped waveform is presented at the output. This is the case in the
sub-system being examined in this experiment.

4. Resources:
Equipment:
TIMS Telecommunications Modeling System Modules
● audio oscillator, twin pulse generator, dual analog switch, and tunable low-pass filter
Digital Oscilloscope
connecting wires and extension cord

5. Procedure:

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

The sampling circuitry is shown modelled in Figure 3.

Figure 3: the TIMS model of Figure 1, plus reconstruction filter

A fixed sampling rate of 8.333 kHz is available from MASTER SIGNALS. The message comes from an AUDIO
OSCILLATOR.

To demonstrate the sampling theorem set:

• the message is about 1 kHz

• the TUNEABLE LPF to a cutoff frequency of 3 kHz

• the sampling duration δ (Figure 1) to about 1/10 of the sample clock period.

Endeavour to display a set of waveforms as depicted in Figure 2.

For this draw the following waveforms: information, the sampled message and the reconstructed signal and give
your observations for each table.

1. When the message is set to 2 kHz (Table 1)

2. When the message is set to 4 kHz (Table 2)

Now exceed the limitations of the sampling theorem. Variables available are the sampling width, message
frequency, and filter bandwidth. The sampling rate will be kept fixed at 8.333 kHz. Use 6kHz as your message (Table

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6. Observation:

7. Interpretation:

8. Conclusion:

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9. Questions and Problems:

1. Assuming a sine wave is accompanied by a small third harmonic component, how large would
this have to be before its presence could be detected using only an oscilloscope?

2. Define the ‘slot bandwidth’ of a lowpass filter. Redefine the Nyquist criterion in terms of practical
filter characteristics

3. Sample-and-hold (flat-top sampling) can be shown to introduce distortion of the message if it is

reconstructed by using a lowpass filter alone. From your general reading, or otherwise, is it
possible to eliminate this distortion by further message processing?

10. Assessment (Rubric for Laboratory Performance):

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Experiment No 5
PWM AND PPM
Course: Experiment No.:
Group No.: Section:
Group Members: Date Performed:
Date Submitted:
Instructor:

1. Objective(s):
1. To generate and demodulate PWM and PPM signals
2. To differentiate PWM and PPM

2. Intended Learning Outcomes (ILOs):

The students shall be able to:
2.10describe the demodulated signals of PPM and PWM.
2.11describe the difference between PWM and PPM upon generation to demodulation.
2.12describe phase relationship of the input and output signals.

3. Discussion:

Nyquist has shown that an analog signal can be recovered from a series of its samples, taken periodically. These
samples reflect the amplitude of the signal at the time of sampling.
A pulse width modulated (PWM) signal consists of a train of rectangular pulses whose width, or duration, varies
according to the instantaneous value of such samples. Note that this signal is also referred to as PDM - pulse duration
modulation.
A very simple arrangement for producing such a series of width modulated pulses is illustrated in block diagram
form in Figure 1.
Figure 1: PWM generation

Refer to Figure 1 (a). With the message amplitude zero, the comparator output consists of a series of rectangular
pulses, of width according to the DC level from the adder.
As the message amplitude is increased from zero, the pulse widths will vary according to the amount the
message is above or below the DC level. This is a pulse width modulated train.
One method of generating a saw tooth train is shown in Figure 1 (b).

PPM

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

A method of converting PWM to a pulse position modulated (PPM) signal is examined in this current Lab Sheet.
Demodulation can be performed by low-pass filtering, followed by integration. The integrator is required since the
spectrum of PPM can be shown to have a message component proportional to the derivative of the message.

The PWM generation method to be examined is illustrated in the block diagram of Figure 1.
This shows an idealised PWM generator. For no message input, suppose the DC level to the COMPARATOR
is set to ½V. This is compared with the amplitude of the triangular wave. The COMPARATOR output is a train of
rectangular pulses of width ½ T.
With the message present, the pulse width will either decrease or increase, and proportionally, with message
polarity. Depending on the configuration of the COMPARATOR, either the rising or the falling edge of the output
pulse would remain fixed (with respect to the clock which generates the triangular wave).
The conversion of the PWM to a PPM is achieved by triggering a fixed-width pulse generator with the variable
edge of the PWM signal (block diagram not shown).
In the experiment to follow demodulation of the PPM is achieved with a low-pass filter, but there is no integrator.
The need for an integrator can be shown by performing a frequency response of the overall system.
Since the shape of the triangular waveform in the experimental generator is not ideal, this will lead to other than ideal
performance.

4. Resources:
Equipment:
TIMS Board
TIMS Modules
● Adder, twin pulse generator, utilities
Digital Oscilloscope
patching wires and extension cord

5. Procedure:

Part A. PWM
The modelling of Figures 1 (a) and (b) is shown in Figure 2.

Figure 2: PWM generator

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

With the message amplitude at zero, determine, by experiment, a value for the DC voltage to give the greatest
range of pulse width variation without obvious non-linear behaviour (this can be checked later during demodulation).
Leave the DC in the centre of this range.
Then add some message and observe results. (Use 2 kHz as your message)
Draw the information and the PWM output. (Table 1)

Demodulation
Message recovery can be obtained with simple lowpass filtering. Use the TUNEABLE LPF and tune it to recover
the original message. Remember to keep the message frequency (or bandwidth, if complex) within the limits imposed
by the sampling theorem.
Draw the original message, the PWM output and the recovered message. (Table 2)
Part B. PPM
A model of the complete transmitter and receiver is shown in Figure 2.

Figure 2: model of the generator

After patching as shown, the setting up procedure is straightforward:
1. Omit any message input to the ADDER
2. Set the DC voltage to the COMPARATOR to about +2.5 volts
3. Set the width of both TWIN PULSE GENERATOR modules to mid-position (say about 20 μSec)
4. Synchronize the oscilloscope to the 8.333 kHz sampling signal. Observe the COMPARATOR output
pulse train.
5. Vary the DC to the REF input of the COMPARATOR. Observe that the width of the output pulse varies,
with the falling edge fixed, and the rising edge variable in position. This is a PWM signal.
6. The PWM signal is used to trigger a second TWIN PULSE GENERATOR. This module is triggered by
the rising edge of the PWM signal, which is connected to its CLK input. Thus it generates a new pulse
train, of fixed width, but variable position. This is a PPM signal. Draw the waveform indicating the
message, the PWM out and the PPM out.(Table 3)

The generator is now set up. Use the TUNEABLE LPF for demodulation. Replace the DC message with a
sinusoid. Using the 2 kHz message from MASTER SIGNALS will give stable displays, but an AUDIO OSCILLATOR
would reveal more.
Draw the waveforms for the message, PWM out, PPM out and the recovered message. (Table 4)

6. Observation:

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

7. Interpretation:

8. Conclusion:

9. Questions and Problems:

1. Compare and contrast PWM and PPM.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

2. Draw the model for the demodulator for PWM and PPM.

3. Give applications of PWM and PPM.

10. Assessment (Rubric for Laboratory Performance):

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Experiment No. 6
PCM ENCODING
Course: Experiment No.:
Group No.: Section:
Group Members: Date Performed:
Date Submitted:
Instructor:

1. Objective(s):
1. To be introduced with PCM and PCM Encoder Module

2. To code a message into a train of digital words in binary format

2. Intended Learning Outcomes (ILOs):

The students shall be able to:
2.13 familiarize with PCM Encoder Module
2.14 describe message output of PCM signal in binary format.
2.15 describe how covert analog signals to multilevel PAM signal to produce PCM code.

3. Discussion:
PCM Encoding
The input to the PCM ENCODER module is an analog message. This must be constrained to a defined bandwidth
and amplitude range.
A step-by-step description of the operation of the module follows:
1. The module is driven by an external TTL clock.
2. The input analog message is sampled periodically. The sample rate is determined by the external clock.
3. The sampling is a sample-and-hold operation. It is internal to the module, and cannot be viewed by the
user. What is held is the amplitude of the analog message at the sampling instant.
4. Each sample amplitude is compared with a finite set of amplitude levels. These are distributed (uniformly,
for linear sampling) within the range ± 2.0 volts (the TIMS ANALOG REFERENCE LEVEL). These are the
system quantizing levels.
5. Each quantizing level is assigned a number, starting from zero for the lowest (most negative) level, with
the highest number being (L-1), where L is the available number of levels.
6. Each sample is assigned a digital (binary) code word representing the number associated with the
quantizing level which is closest to the sample amplitude. The number of bits ‘n’ in the digital code word
will depend upon the number of quantizing levels. In fact, n = log2(L).
7. The code word is assembled into a time frame together with other bits as may be required (described
below). In the TIMS PCM ENCODER (and many commercial systems) a single extra bit is added, in the
least significant bit position. This is alternately a one or a zero. These bits are used by subsequent
decoders for frame synchronization.
8. The frames are transmitted serially. They are transmitted at the same rate as the samples are taken. The
serial bit stream appears at the output of the module.
9. Also available from the module is a synchronizing signal FS (‘frame synch’). This signals the end of each
data frame.

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The PCM Encoder Module:

Figure 1. Front panel layout of the PCM ENCODER

Note and understand the purpose of each of the input and output connections, and the three-position toggle
switch. Counting from the top, these are:
• SLAVE: not used during this experiment. Do not connect anything to this input.
• MASTER: not used during this experiment. Do not connect anything to this output.
• SYNC. MESSAGE: periodic, ‘synchronized’, message. Either sinusoidal, or sinusoidal-like (‘sinuous’), its
frequency being a sub-multiple of the MASTER CLOCK (being any one of four frequencies selected
by an on-board switch SW2). A message synchronized to the system clock is convenient for
obtaining stable oscilloscope displays. Having a recognisable shape (but being more complex than
a simple sine wave) gives a qualitative idea of distortion during the decoding process (examined in
a later experiment).
• SELECT CODING SCHEME: a three-position toggle switch which selects the 4-bit or 7-bit encoding scheme of
the analog samples; or (together with an onboard jumper connection) the companding scheme.
• FS: frame synchronization, a signal which indicates the end of each data frame.
• Vin:: the analog signal to be encoded.
• PCM DATA: the output data stream, the examination of which forms the major part of this experiment.
• CLK: this is a TTL (red) input, and serves as the MASTER CLOCK for the module. Clock rate must be 10 kHz
or less. For this experiment you will use the 8.333 kHz TTL signal from the MASTER SIGNALS
module.

4. Resources:
Equipment:
TIMS Telecommunications Modeling System Modules
● PCM Encoder
Digital Oscilloscope
Miscellaneous: connecting wires and extension cord
5. Procedure:

1. A Select the TIMS companding A4-law with the on-board COMP jumper (in preparation for a later part of the
experiment). (PCM Encoder Module)

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

2. Locate the on-board switch SW2. Put the LEFT HAND toggle DOWN and the RIGHT HAND toggle UP. This
sets the frequency of a message from the module at SYNC. MESSAGE. This message is synchronized to a
sub-multiple of the MASTER CLOCK frequency.

Patching Up
To determine some of the properties of the analog to digital conversion process it is best to start with a DC
message. This ensures completely stable oscilloscope displays, and enables easy identification of the
quantizing levels.
Selecting the 4-bit encoding scheme reduces the number of levels (24) to be examined.
3. Insert the module into the TIMS frame. Switch the front panel toggle switch to 4-BIT LINEAR (ie., no
companding).
4. Patch the 8.333 kHz TTL SAMPLE CLOCK from the MASTER SIGNALS module to the CLK input of the PCM
ENCODER module.
5. Connect the Vin input socket to ground of the variable DC module.
6. Connect the frame synchronization signal FS to the oscilloscope ext. synch input.
7. On CH1-A display the frame synchronization signal FS. Adjust the sweep speed to show three frame markers.
These mark the end of each frame.
8. On CH2-A display the CLK signal.
9. Record the number of clock periods per frame.

Currently the analog input signal is zero volts (Vin is grounded). Before checking with the oscilloscope,
consider what the PCM output signal might look like. Make a sketch of this signal. Then:
10. On CH2-B display the PCM DATA from the PCM DATA output socket.

Except for the alternating pattern of ‘1’ and ‘0’ in the frame marker slot, you might have expected nothing
else in the frame (all zeros), because the input analog signal is at zero volts. But you do not now the coding
scheme.
There is an analog input signal to the encoder. It is of zero volts. This will have been coded into a 4-bit binary
output number, which will appear in each frame. It need not be ‘0000’. The same number appears in each
frame because the analog input is constant.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Figure 2. 5 frames of 4-bit PCM output for zero amplitude input

Knowing:
1. the number of slots per frame is 8
2. the location of the least significant bit is coincident with the end of the frame
3. the binary word length is four bits
4. the first three slots are ‘empty’ (in fact filled with zeros, but these remain unchanged under
all conditions of the 4-bit coding scheme)

11. Identify the binary word in slots 4, 3, 2, and 1.

Quantizing levels for 4-bit linear encoding

You will now proceed to determine the quantizing/encoding scheme for the 4-bit linear case.
12. Remove the ground connection, and connect the output of the VARIABLE DC module to Vin. Sweep the DC
voltage slowly backwards and forwards over its complete range, and note how the data pattern changes in
discrete jumps.
13. Use the oscilloscope (CH1-B) to monitor the DC amplitude at Vin. Adjust Vin to its maximum negative value.
Record the DC voltage and the pattern of the 4-bit binary number.
,
14. Slowly increase the amplitude of the DC input signal until there is a sudden change to the PCM output signal
format. Record the format of the new digital word, and the input amplitude at which the change occurred.
15. Continue this process over the full range of the DC supply.
16. Fill the table below

Voltage Sequence

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Table 1: Quantizing Scheme for 4-bit PCM

4-bit data format

From measurements made so far you should be able to answer the questions:
• What is the sampling rate?
• What is the frame width?
• What is the width of a data bit?
• What is the width of a data word?
• How many quantizing levels are there?
• Are the quantizing levels uniformly (linearly) spaced

7-bit linear encoding

17. Change to 7-bit linear encoding by use of the front panel toggle switch.
18. Make sufficient measurements so that you can answer all of the above questions in the section titled 4-bit
data format above. (for 7-bit data format)

From measurements made so far you should be able to answer the questions:
• What is the sampling rate?
• What is the frame width?
• What is the width of a data bit?
• What is the width of a data word?
• How many quantizing levels are there?
• Are the quantizing levels uniformly (linearly) spaced
Companding

19. Change to 4-bit companding by use of the front panel toggle switch.
20. Repeat the same procedure as 14 and 15. Fill Error! Reference source not found. below. What is the
main difference between the two quantization strategies? What might be the advantage of PCM
COMPAND?

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Voltage Sequence

Table 1: Quantization Scheme for 4-bit Compand PCM

21. Remove the DC input, and replace it with a sinusoidal input of your choice. The wave should respect the
bandwidth and amplitude limits mentioned at the start of the experiment. Clearly state how you got the sine
wave, and how you made sure it complies with the restrictions. Now, observe the PCM output. Is the output
stable? Why? Why not?

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

6. Observation:

7. Interpretation:

8. Conclusion:

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

9. Questions and Problems:

1. From your knowledge of the PCM ENCODER module, obtained during preparation for the experiment,
calculate the sampling rate of the analog input signal. Show that it is the same for both the 4-bit and the 7-bit
coding schemes. What can you say about the bandwidth of an input analog signal to be encoded?

3. Define what is meant by the data ‘frame’ in this experiment. Draw diagram showing the composition of a frame
for
a. the 4-bt coding scheme
b. the 7-bit coding scheme

4. Explain why a DC message gives a stable oscilloscope display of the PCMDATA output. Why is the display
‘unstable’ when a sine wave (for example) is the message?

5. For the 4-bit encoder draw a diagram showing the amplitude quantization levels and the corresponding binary
numbers used to encode them. Describe how this information was obtained experimentally.

10. Assessment (Rubric for Laboratory Performance):

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Experiment No. 7
PCM DECODING
Course: Experiment No.:
Group No.: Section:
Group Members: Date Performed:
Date Submitted:
Instructor:

1. Objective(s):
1. To analyze the PCM Decoder
2. To decode PCM signals

2. Intended Learning Outcomes (ILOs):

The students shall be able to:
2.16familiarize with PCM decoder Module
2.17describe the decoded PCM signal

3. Discussion:
PCM DECODER
Clock Synchronization
A clock synchronization signal will be stolen from the encoder.
Frame Synchronization
In the PCM DECODER module there is circuitry which automatically identifies the location of each frame in
the serial data stream. To do this it collects groups of eight data bits and looks for the repeating pattern of alternate
ones and zeros placed there (embedded) by the PCM ENCODER in the LSB position.
PCM Decoding
The PCM DECODER module is driven by an external clock. This clock signal is synchronized to that of the
transmitter. For this experiment a ‘stolen’ clock will be used.
Upon reception, the PCM DECODER:
1. Extracts a frame synchronization signal FS from the data itself (from the embedded alternate
ones and zeros in the LSB position), or uses an FS signal stolen from the transmitter.
2. Extracts the binary number, which is the coded (and quantized) amplitude of the sample from
which it was derived, from the frame.
3. Identifies the quantization level which this number represents.
4. Generates a voltage proportional to this amplitude level.
5. Presents this voltage to the output Vout. The voltage appears at Vout for the duration of the
frame under examination.
6. Message reconstruction can be achieved, albeit with some distortion, by lowpass filtering. A
built-in reconstruction filter is provided in the module.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

For the PCM decoding, you will use the PCM decoder module.

Figure 3: front panel layout of the PCM DECODER

Note and understand the purpose of the input and output connections, and the toggle switches. Counting
from the top, these are:
● SLAVE: not used during this experiment. Do not connect anything to this input.
● MASTER: not used during this experiment. Do not connect anything to this output.
● SELECT CODING SCHEME: a three position toggle which selects the coding scheme
used by the signal to be decoded
● FS SELECT: a two-position toggle switch which selects the method of obtaining the
frame synchronization signal (FS) either external at (EXT.FS), or derived internally from
the embedded information in the received PCM itself (EMBED FS).
● EXT. FS: connect an external frame sync. signal here if this method of frame
synchronization is to be used.
● EMBED FS: if the frame synch. signal is derived internally from the embedded
information, it is available for inspection at this output.
● PCM DATA: the PCM signal to be decoded is connected here.
● VOUT:: the decoded PCM signal.
● CLK: this is a TTL (red) input, and serves as the MASTER CLOCK for the module.
Clock rate must be 10 kHz or less. For this experiment you will use the 8.333 kHz TTL
signal from the MASTER SIGNALS module.

4. Resources:
Equipment:
TIMS Telecommunications Modeling System Modules
● PCM Decoder
Digital Oscilloscope
Miscellaneous: connecting wires and extension cord

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

5. Procedure:
A suitable source of PCM signal will be generated using a PCM ENCODER module.
1. Before plugging in PCM ENCODER module, set the toggles of the on-board SYNC MESSAGE switch SW2.
Set the left hand toggle DOWN, and the right hand toggle UP. This selects a 130 Hz sinusoidal message,
which will be used later. Now insert the module into the TIMS system.
2. Use the 8.333 kHz TTL signal from the MASTER SIGNALS module for the CLK.
3. Select, with the front panel toggle switch, the 4-bit LINEAR coding scheme.
4. Synchronize the oscilloscope ‘externally’ to the frame synchronization signal at FS.
5. Connect CH1-A of the SCOPE SELECTOR to the PCM OUTPUT of the PCM ENCODER.
6. We would like to recognise the PCM DATA out signal. So choose a ‘large’ negative DC for the message
(from the VARIABLE DC module). From previous work we know the corresponding code word is ‘0000’, so
only the embedded alternating ‘0’ and ‘1’ bits (for remote FS) in the LSB position should be seen. Confirm
this. They should be 1920 ms apart.
7. Vary the DC output and show the appearance of new patterns on CH1-A. When finished, return the DC to
its maximum negative value (control fully anti-clockwise).

The PCM signal is now ready for transmission.

The Receiver (Decoder)
8. Use the front panel toggle switch to select the 4-bit LINEAR decoding scheme (to match that of the
transmitter)
9. ‘Steal’ an 8.333 kHz TTL clock signal from the transmitter and connect it to the CLK input.
10. In the first instance ‘steal’ the frame synchronization signal FS from the transmitter by connecting it to the
frame synchronization input FS of the receiver. At the same time ensure that the FS SELECT toggle switch
on the receiver is set to EXT. FS.
11. Ensure both channels of the oscilloscope are set to accept DC;
12. Connect CH2-A to the sample-and-hold output of the PCM DECODER.

A DC message
You are now ready to check the overall transmission from transmitter input to decoder output. The message
is a DC signal.
13. Connect the PCM DATA output signal from the transmitter to the PCM DATA input of the receiver.
14. Slowly vary the DC output from the VARIABLE DC module back and forth over its complete range. Observe
the behaviour of the two traces. The input to the encoder moves continuously. The output from the decoder
moves in discrete steps. These are the 16 amplitude quantizing steps of the PCM ENCODER.

15. Draw up a table relating input to output voltages.

Input Voltage Output Voltage

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Table 1. Input-Output Voltages

16. Compare the quantizing levels just measured with those determined in the PCM encoding.

17. Reset the coding scheme on both modules to 7-bit. Sweep the input DC signal over the complete range
as before.
18. Change to a periodic message 3 by connecting the SYNC MESSAGE of the PCM ENCODER, via a
BUFFER AMPLIFIER, to its input Vin. An amplitude of 2 Vpp is suitable. Observe and record the signal at
CH2-A.

Observation:

Graph:

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

19. Currently the encoding scheme is generating a 4-bit digital word for each sample. What would be the change
to the waveform, now displaying on CH2-A, if, at the encoder, the coding scheme was changed from 4-bit
to 7-bit?

20. Change the coding scheme from 4-bit to 7-bit. That is, change the front panel toggle switch of both the PCM
ENCODER and the PCM DECODER from 4-bit to 7-bit. Observe, record, and explain the change to the
waveform on CH2-A.

Graph:

Message Reconstruction:
You can see, qualitatively, that the output is related to the input. The message could probably be recovered
from this waveform. But it would be difficult to predict with what accuracy. Low-pass filtering of the waveform at
the output of the decoder will reconstruct the message, although theory shows that it will not be perfect. It will
improve with the number of quantizing levels.
If any distortion components are present they would most likely include harmonics of the message. If these
are to be measurable (visible on the oscilloscope, in the present case), then they must not be removed by the
filter and so give a false indication of performance.
So we could look for harmonics in the output of the filter. But we do not have conveniently available a
spectrum analyzer.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

An alternative is to use a two-tone test message. Changes to its shape (especially its envelope) are an
indication of distortion, and are more easily observed (with an oscilloscope) than when a pure sinewave is used.
It will be difficult to make one of these for this experiment, because our messages have been restricted to rather
low frequencies, which are outside the range of most TIMS modules.
But there is provided in the PCM ENCODER a message with a shape slightly more complex than a
sinewave. It can be selected with the switch SW2 on the encoder circuit board. Set the left hand toggle UP, and
the right hand toggle DOWN.
A message reconstruction LPF is installed in the PCM DECODER module.
21. Include the built-in LPF in the output of the PCM DECODER, and observe the reconstructed message.
Make comparisons between the 4-bit linear and the 7-bit linear coding schemes.

Companding
22. Use the front panel toggle switches (on both modules) to select 4-bit companding. Use both ‘low’ and ‘high’
level messages into the PCM ENCODER. Check the quantizing characteristic. Record your observations
and comment upon them.

6. Observation:

7. Interpretation:

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

8. Conclusion:

9. Questions and Problems:

1. Sketch the waveforms at the output Vout from the decoder, for the 4-bit and the7-bit linear encoding scheme
(and a ‘large amplitude’ sinusoidal, synchronous message at the encoder). A ‘sketch’ might show these as
being the same, but a more accurate drawing would show more clearly the difference. Explain.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

2. Two sources of distortion of the reconstructed message have been identified; they were called sampling
distortion and quantizing distortion.
● Assuming a sample-and-hold type sampler, what can be done about minimizing sampling distortion?
● What can be done about minimizing quantizing distortion?

a. Quantizing distortion decreases with the number of quantizing levels available. There is usually a
price to be paid for such an option. What would this be? Was that apparent in the present
experiment? Explain.

b. Companding is claimed to offer certain advantages. What are they? Were you able to demonstrate
any of these during the experiment? Explain.

10. Assessment (Rubric for Laboratory Performance):

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Experiment No. 8
AMPLITUDE MODULATION
Course: Experiment No.:
Group No.: Section:
Group Members: Date Performed:
Date Submitted:
Instructor:

1. Objective(s):
1. To illustrate modulation and demodulation techniques using amplitude shift keying.
2. To generate and demodulate amplitude keyed signal.

2. Intended Learning Outcomes (ILOs):

The students shall be able to:
2.18describe the difference between modulated and demodulated signal using ASK.
2.2 determine the demodulated signal using different types of detectors.
3. Discussion:
Generation
Amplitude shift keying – ASK – in the context of digital communications is a process which imparts to a sinusoid
two or more discrete levels. These are related to the number of levels adopted by the digital message. For a binary
message sequence there are two levels, one of which is typically zero. Thus the modulated waveform consists of
bursts of a sinusoid.
Figure-1 illustrates a binary ASK signal (lower), together with the binary sequence which initiated it (upper).
Neither signal has been bandlimited.

Figure-1: an ASK signal

Block diagram of two methods of ASK generator are shown in Figure-2 (a) and (b). Method (b) shows two
methods of bandlimiting.

Figure-2: (a) and (b) ASK generation methods.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Demodulation
ASK is an amplitude modulated signal, and can be demodulated with either an envelope detector or a product
detector. Block diagram of suitable arrangements are shown in the figure below. The demodulator (b) will require a
local carrier synchronized to the transmitted carrier. The phase will need to be adjusted for maximum output
amplitude.

Figure-3: ASK
demodulation methods.

4. Resources:
Equipment:
TIMS Board
TIMS Modules
● Audio Oscillator, sequence generator, dual analog switch, utilities, Tunable Low-Pass Filter.
Digital Oscilloscope
patching wires and extension cord

5. Procedure:
Part A. ASK Modulation/Demodulation using Dual Analog Switch
ASK Modulation
We first introduce a simple modulator based on switching. The switch can be modeled by the DUAL ANALOG
SWITCH module, as shown in 2-a. The TTL output from the SEQUENCE GENERATOR is connected directly to the
CONTROL input of the DUAL ANALOG SWITCH.
Figure-4

1. Explain how the above circuit performs ASK modulation.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

2. Connect the system. Set the audio oscillator frequency to 8 KHz.

3. Observe the message sequence and the modulated signal. Is ASK modulation achieved? Graph the output

Graph:

4. Observe the two signals in the frequency domain. How does the modulated bandwidth relate to the message
bandwidth? Graph the spectrum.

Graph:

ASK Demodulation
We will investigate two simple ASK demodulators. The first demodulator is displayed in Error! Reference
source not found.3-a. Since ASK possesses a very definite envelope, an envelope detector can be used as the
first step in recovering the original sequence. Further processing can be employed to regenerate the true binary
waveform. Error! Reference source not found.is a model for envelope recovery from a bandpass ASK signal.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Figure-5 Envelope demodulation of baseband ASK

5. What is the role of the LPF?

6. Revert to the modulator of 4. Obtain the 2 KHz bit clock from the VCO, instead of the built-in sine wave.
Connect the above demodulator. Observe the output of the LPF. Study the effect of varying the LPF
bandwidth and VCO frequency, respectively. What should the bandwidth of LPF be set to in theory? Graph
the output.

Graph:

The output from the above demodulator will not be a copy of the binary sequence TTL waveform, because
bandlimiting will have shaped it. Some sort of decision device is required to regenerate the original binary sequence.
The DECISION MAKER module could be employed, with associated processing, if required. This is illustrated in
block diagram in Error! Reference source not found. 6. The objective of this circuit is to convert the unipolar,
bandlimited output of the envelope detector to bi-polar (using the ADDER), to suit the DECISION MAKER.

Part B. ASK Modulation/Demodulation using Multiplier

ASK Modulation
Refer to the block diagram for the ASK generation of figure 2-b. Create a model for that block diagram and set-
up to produce ASK.

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7. The message sequence toggles between a positive and negative voltage level. If we multiply this sequence
by the sine wave directly, what kind of modulation do we achieve? We achieve ASK by adding a DC offset
to the message first. What value of the DC offset should you choose? Why?

8. Instead of using the master signals, obtain the message and carrier frequencies using two separate VCO
modules. We should have enough VCO modules to accomplish this. Set the carrier frequency to 8 KHz. Vary
the DC value (or and its corresponding adder input) until you get ASK modulation. Graph the ASK output.

Graph:

9. Observe spectrum of original message and modulated ASK message. Graph t spectrum, and make sure
what you see matches what you theoretically expect.

Graph:

ASK Demodulation
Refer to the block diagram for the ASK demodulation of figure 3-b. Create a model for that block diagram and
set-up to produce ASK.

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10. This demodulator assumes synchronization between transmitter and receiver. We will “steal” the carrier to
achieve perfect timing. Note that, if do not have another multiplier available, you may use the multiplier sub-
module on the quadrature utilities module.

11. Try to explain how the circuit demodulates the ASK signal.

12. Observe the spectrum of the output of the multiplier at the demodulator. Graph the spectrum plot. Can you
distinguish two components in the spectrum? What are they?

Graph:

13. What is the role of LPF? What should be the bandwidth of this filter in your opinion?

14. The output of the LPF is an analog signal, which is distorted by bandlimiting. We will restore the original
digital message signal using the decision maker.

15. We should be careful with the decision maker setup. The bit clock input to the decision maker should be
the TTL output of the VCO that is used to drive the sequence generator. This is because the decisions
maker needs to be synchronized to the message rate. Make sure that the output of the LPF is set to
between + and – 2V by adjusting the gain of the LPF. Also make sure the LPF is set so that the output
most closely resembles a square wave output.

16. Pass the LPF output through the decision maker. You might have to slowly change the LPF bandwidth
and decision point before getting the correct output. Once you have the correct output, paste your plot,
showing original and reconstructed signals. Also compare the spectrums, and graph.

Graph:

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17. What could be a(n) advantage/disadvantage of using the second demodulator instead of the first
demodulator?

6. Observation:

7. Interpretation:

8. Conclusion:

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9. Questions and Problems:

1. Suggest an advantage of making the data rate a sub-multiple of the carrier rate.

2. Explain the purpose of the comparator in the envelope demodulator set-up.

3. The ASK waveform of figure-1 is ‘special’ in that:

a. the bit rate is sub-multiple of the carrier
b. the phasing of a message ensures that each ‘ burst’ of carrier starts and ends at zero amplitude
If these special conditions are changed, consider the shape of the waveform at the beginning and
end of each burst of carrier. What effect, if any will this have on the bandwidth of the ASK signal.

10. Assessment (Rubric for Laboratory Performance):

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Experiment No. 9
FREQUENCY SHIFT KEYING GENERATION AND DEMODULATION
Course: Experiment No.:
Group No.: Section:
Group Members: Date Performed:
Date Submitted:
Instructor:

1. Objective(s):
1. To illustrate modulation and demodulation techniques using frequency shift keying
2. To generate and demodulate a frequency keyed signal using two types

2. Intended Learning Outcomes (ILOs):

The students shall be able to:
2.19describe the difference between modulated and demodulated signal using FSK.
2.20determine the demodulated signal using different types of demodulating FSK.

3. Discussion:
Generation
As its name suggest, a frequency shift keyed transmitter has its frequency shifted by the message. Although
there could be more than two frequencies involved in an FSK signal, in this experiment the message will be a binary
bit stream, and so only two frequencies will be involved. The word ‘keyed’ suggests that the message is of the ‘on-off’
(mark-space) variety such as one (historically) generated by a Morse key or more likely in the present context, a binary
sequence. The output from such a generator is illustrated in the figure below. Before it is possible to transmit analog
information via a digital system the analog signal must first be transformed into a digital format. The first step in such
a transformation typically involves a sampling process.

Figure-1: an FSK waveform, derived from a binary message

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Conceptually, and in fact, the transmitter cold consist of two oscillators (on frequencies f1 and f2), with only
one being connected to the output at any one time. This is shown in the block diagram from Figure-2 below.

Figure-2: an FSK transmitter

Unless there are special relationships between the two oscillator frequencies and the bit clock there will be
abrupt phase discontinuities of the output waveform during transitions of the message.

Demodulation
There are different methods of demodulating FSK. A natural classification is into synchronous (coherent) and
asynchronous (non-coherent). A third method called phase-locked loop (PLL) demodulator is a well-known method
of demodulating an FM signal as well as FSK signal.

(a) asynchronous (b) synchronous

Figure-3: FSK demodulator

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Figure-4: PLL FSK demodulator

4. Resources:
Equipment:
TIMS Board
TIMS Modules
● master signals, signal generator, VCO, audio oscillator, Bit Clock regen., adder, dual analog switch.
Digital Oscilloscope
patching wires and extension cord

5. Procedure:

Part A. FSK Generation

A simple Binary FSK modulator is shown in figure 5. In FSK mode the VCO is keyed by the message TTL
sequence. Internal circuitry results in a TTL HI switching the VCO to frequency f1, while a TTL LO switches it to
frequency f2. These two frequencies may be in the audio range (front panel toggle switch LO), or in the 100 kHz range
(front panel toggle switch HI). The frequencies f1 and f2 are set by the on-board variable resistors RV8 and RV7
respectively, while a continuous TTL HI or a TTL LO is connected to the DATA input socket.
1. Connect the modulator circuit. Make sure the VCO is operating in the FSK mode.

Figure-5: CPFSK generation

2. Set the VCO f0 switch to the LO position. Observe the original message sequence and the modulated
sequence. Trigger the oscilloscope with the SYNCC output from the sequence generator. Modify the
frequencies f1 and f2 so that they are not too close to each other. Can you check if FSK modulation is

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correctly achieved by looking at the plot? Graph your plot. Then, set the VCO switch to HI, repeat the
procedure, and paste the new plot. Also observe the signals in frequency, and note how FSK modulation
modifies the spectrum.

Graph:

3. Another BFSK modulator is shown in Figure 6.

4. The binary sequence is shown clocked by a divided-by-8 version of the output of an Audio oscillator. This
oscillator cannot itself be tuned to this relatively low (for TIMS) frequency. The DIVIDE-BY-8 sub-system
is in the BIT CLOCK REGEN module (set the on-board switch SW2 with both toggles DOWN). The signals
at f1 and f2 are provided by the 2.083 kHz(2 kHz) MESSAGE from the MASTER SIGNALS module, and
a VCO, respectively. The dual analog switch module is used to switch between them. One of the two
ANALOG SWITCHES is driven directly by the TTL binary message sequence. The other ANALOG
SWITCH is driven by the same TTL sequence, but passed through the adder.

Figure-6: Alternative FSK Generator

5. Let’s try to understand the operation of this circuit. How is this module’s output related to its four inputs?

6. Why is the sequence passed through the adder before being connected to the switch control input? What
does the adder do to an analog input?

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7. Based on 5 and 6, explain how this circuit achieves FSK modulation.

8. Connect the circuit. You are free to select an adequate value for the VCO and audio oscillator frequencies.
Remember to set the VCO back to VCO mode. One possibility is 8 KHz for the oscillator, 15 KHz for the
first VCO, and 8 KHz for the other VCO. The objective is to get a plot that clearly shows FSK in action.
View the original and modulated signals. Is FSK achieved? Graph the output.
Graph:

Do not disconnect the circuit. You will use it in demodulation.

Part A. FSK Generation

9. Let’s apply the idea of envelope demodulation (of ASK) to FSK demodulation. Multiply the FSK signal
by the sine wave corresponding to one of the two FSK frequencies. Pass the multiplier output through
a LPF.

10. Very carefully explain what signal components exist at the output of the multiplier. What signal
components would you get if you use the other FSK frequency? Does the output depend on the message
bit? You are required to mathematically show where these components come from.

11. Set the bandpass filter bandwidth to a value you consider appropriate. View the original signal and the
signal at the output of the LPF. Graph output.
Graph:
12. Complete the FSK demodulator circuit. What you should get eventually is a reconstructed digital
message. Carefully explain what you did. Graph the output showing original and reconstructed waves.
You are free to use any modules available to you.

Graph:

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6. Observation:

7. Interpretation:

8. Conclusion:

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9. Questions and Problems:

1. What advantage is there in making the frequencies of the two tones of an FSK signal, and the bit rate, sub-
multiples of some reference frequency?

2. What are the some of the factors which might determine the choice of either a synchronous or asynchronous
FSK demodulator? Describe also the difference between the two.

3. Where can one find a convenient TTL HI, and a convenient TTL LO, in TIMS?

10. Assessment (Rubric for Laboratory Performance):

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Experiment No. 10
SAMPLING BINARY PHASE SHIFT KEYING
Course: Experiment No.:
Group No.: Section:
Group Members: Date Performed:
Date Submitted:
Instructor:

1. Objective(s):
3. To illustrate modulation and demodulation techniques using phase shift keying.
4. To generate and demodulate a phase-keyed signal

2. Intended Learning Outcomes (ILOs):

The students shall be able to:
2.21describe the difference between modulated and demodulated signal using BPSK.
2.2 determine the demodulated signal using different process of demodulation of a BPSK.
3. Discussion:
Generation
Consider a sinusoidal carrier. If it is modulated by a bi-polar bit stream according to the scheme illustrated in
Figure-1, its polarity will be reversed every time the bit stream changes polarity. This for a sine wave is equivalent to
a phase reversal (shift). The multiplier output is a BPSK signal.

Figure 1: generation of BPSK

Figure 2: a BPSK signal in the time domain.

The information about the bit stream is contained in the changes of phase of the transmitted signal. A
synchronous demodulator would be sensitive to these phase reversals. A snap-shot of a BPSK signal is shown in
Figure-2. The wave shape is ‘symmetrical’ at each phase transition. This is because the bit rate is a sub-multiple of
the carrier frequency ω/(2π). In addition, the message transitions have been timed to occur at a zero-crossing of the
carrier. This offers the advantage of simplifying the bit-clock recovery from a received signal. Once the carrier has
been acquired then the bit clock can be derived b division.

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Demodulation
Demodulation of a BPSK signal can be considered a two-stage process.
1. Translation back to baseband with recovery of the bandlimited message waveform.
2. Regeneration from the bandlimited waveform back to the binary message stream.

Translation back to baseband requires a local, synchronized carrier.

Figure 3: synchronous demodulation of BPSK

Demodulation of this signal is possible with a demodulator of the synchronous, product-type. But there will be phase
ambiguity between the sent and received signal. One way of overcoming this is to use a digital line code which is
impervious to phase ambiguity s differential phase shift keying (DPSK).

4. Resources:
Equipment:
TIMS Board
TIMS Modules
● Audio oscillator, phase shifter, sequence generator, line code encoder, multiplier
Digital Oscilloscope
patching wires and extension cord

5. Procedure:

Part A. BPSK Generation

The BPSK generator of Figure 1 is shown in expanded form in Figure 4, and modelled in Figure 5

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Figure 4: block diagram of BPSK generator to be modelled

Note that the carrier will be four times the bit clock rate. The low-pass filter is included as a band limiter if
required. Alternatively a band-pass filter could have been inserted at the output of the generator. Being a linear
system, the effect would be the same.
Figure 5: model of the BPSK generator

The AUDIO OSCILLATOR supplies a TTL signal for the bit clock digital DIVIDEBY-FOUR sub-system in the
LINE-CODE ENCODER, and a sinusoidal signal for the carrier. The PHASE SHIFTER (set to the LO range with the
on-board switch SW1) allows relative phase shifts. Watch the phase transitions in the BPSK output signal as this
phase is altered. This PHASE SHIFTER can be considered optional.
The digital DIVIDE-BY-FOUR sub-system within the LINE-CODE ENCODER is used for deriving the bit clock
as a sub-multiple of the BPSK carrier. Because the DECISION MAKER, used in the receiver, needs to operate in
the range about 2 to 4 kHz, the BPSK carrier will be in the range about 8 to 16 kHz.
The NRZ-L code is selected from LINE-CODE ENCODER.
Viewing of the phase reversals of the carrier is simplified because the carrier and binary clock frequencies are
harmonically related.
1. Before patching up the system, explain the role of the multiplier. What are two inputs to the multiplier?
How does the multiplication achieve PSK modulation?

2. Patch up the system. The audio oscillator frequency should be 8 KHz.

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3. Observe the output of the sequence generator and the output of the multiplier simultaneously. Can you
see the phase shift? Does it occur immediately when the sequence changes polarity? Why is that? Graph
the output.

Graph:

4. Toggle the switch of the phase shifter. Observe the difference in the modulated output. Is one position
better than the other, or would they yield similar performance? Explain.

5. Observe the frequency spectrum of the original data sequence and the BPSK output. Graph the spectrum.
How does the BPSK bandwidth relate to the message bandwidth?

Graph:

6. Pass the output of the multiplier through the tunable LPF. Set the LPF to WIDE, and select the largest
bandwidth. Slowly decrease the bandwidth, while observing the message and the modulated filtered
output. At which frequency do the phase jumps become unnoticeable? Record that frequency.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

Now, reset the LPF bandwidth to maximum, and observe the message and filtered output in the frequency
domain. Decrease the LPF bandwidth, and note what effect it has on the modulated spectrum. What
happens at the frequency you noted?

7. Remove the tunable LPF. You will use it in the demodulator.

Part B. BPSK Demodulation

The diagram for the BPSK demodulator is shown in 6.

Figure 6: BPSK Demodulation

The phase of the carrier is adjustable with the PHASE SHIFTER for maximum output from the lowpass filter.
Phase reversals of 1800 can be introduced with the front panel toggle switch. Select the NRZ-L input to the LINE-
CODE DECODER. The LINE-CODE ENCODER and LINE-CODE DECODER modules are not essential in terms of
the coding they introduce (since a bi-polar sequence is already available from the SEQUENCE GENERATOR) but
they are useful in that they contain the DIVIDE-BYFOUR sub-systems, which are used to derive the sub-multiple bit
clock.

8. Explain the role of the multiplier in this circuit. Why are we multiplying the modulated message with the
carrier again?

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9. What is the role of the LPF?

10. Patch up the demodulator. Another multiplier is available on the QUADRATURE UTILITIES module.

11. Observe the modulated BPSK signal and the output of the demodulator’s multiplier module in the time
domain. Graph your plot. Mathematically prove that the multiplier’s output is the sum of a DC component,
plus a sine wave. What is the frequency of this sine wave? Does this theoretical result agree with the plot
you got?

Graph:

12. Observe the input and output spectrums of the LPF. Based on 11, which component must the LPF
remove? The LPF filter must remove this component, while preserving the message. Reset the LPF to
maximum bandwidth.

13. Observe the output of the Line-decoder. You might have to press the reset button if all you see is noise.
Compare this output to the original message signal. There will be a delay between the two signals. Graph
the output. Modify the decision point in the decision maker, and describe what happens.

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

6. Observation:

7. Interpretation:

8. Conclusion:

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 COMMUNICATIONS 2: MODULATION AND CODING TECHNIQUES

9. Questions and Problems:

1. Do you think BPSK is an analog signal? Any comments?

2. In the model of figure-5, is it necessary that the multiplier be switched to DC as shown?

3. How can we eliminate phase ambiguities aside from what is stated in the experiment?

4. What is the purpose of the low-pass filter in the BPSK demodulator model?
What determines its bandwidth?

10. Assessment (Rubric for Laboratory Performance):

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Experiment No. 11
STUDENT-DESIGNED EXPERIMENT ON PERFORMANCE COMPARISON OF DIGITAL MODULATION TECHNIQUES
Course: Section:
Group No.: Date Performed:
Group Members: Date Submitted:
Instructor:

1. Objective(s):
The activity aims to empower the students to actively participate in the process of experiment. Students will design and conduct experiment to
compare the performance of digital modulation techniques.

2. Intended Learning Outcomes (ILOs):

The students shall be able to:
1) Design and conduct the experiment.
2) Create a clear and detailed experimental procedures.
3) Analyze and interpret gathered data to draw conclusion.
3. Discussion:

This activity encourages students to take an active role in both designing and conducting an experiment. Participants will have the
chance to compare the performance of different modulation techniques. This hands-on experience empowers students to take the lead in
designing and conducting experimental procedures.

4. Equipment:

Students should identify the required equipment, components, or software tools essential in the conduct of the experiment.

5. Procedure:

1) Propose an experiment to analyze the respective performances of different communication systems. Each proposal should
include a clear objective, intended learning outcomes, equipment and components to be used, and the experimental procedures.
2) The assigned faculty reviews and approves the experiment proposals. He then provides feedback and guidance to ensure it is
doable and aligned with the course objectives. Once approved, the students can proceed to the conduct of the experiments, data
gathering, analysis and interpretation of gathered data, and draw a conclusion.

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6. Observation:

7. Interpretation:

8. Conclusion:

9. Assessment (Rubric for Laboratory Performance):

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