UNIT – I: 8086 ARCHITECTURE; INSTRUCTION SET AND ASSEMBLY LANGUAGE

PROGRAMMING OF 8086

S.No. Question Marks CO PO BT

a. What is a Microprocessor? Write some examples of
microprocessor. 2 1 1,2 1
b. Demonstrate how physical address is generated in 8086. 3 1 1,2 1
c. Explain about the minimum mode pin diagram of 8086
microprocessor. 5 1 1,2 2
d. Describe the assembler directives of 8086 microprocessor.
(i) ASSUME (ii) EQU (iii) LABEL (iv) OFFSET
1. (v) LENGTH 5 1 1,2 2
a. Define ISR. 2 1 1,2 1
b. Expand BIU and EU. 3 1 1,2 2
c. Write an ALP to insert a character “L” in the string “REPUBIC”
after the character “B” using string manipulation instructions. 5 1 1,2 2
2. d. Describe the programming model of 8086. 5 1 1,2 2
a. What are Macros? 2 1 1,2 1
b. Draw the flag structure of 8086. 3 1 1,2 2
3. c. Explain the architecture of 8086 microprocessor. 10 1 1,2 2
a. Classify the registers of 8086 and write their names. 2 1 1, 2, 3 2
b. What is meant physical memory organization in 8086
microprocessor? 3 1 1, 2, 3 1
c. Explain the following instructions: (i) IMUL (ii) DAA (iii)
SBB (iv) ROR 5 1 1, 2, 3 2
4. d. Write some features of microprocessor 8086. 5 1 1, 2, 3 2
a. List the addressing modes of 8086 assembly language
programming. 2 1 1, 2, 3 2
b. Classify the instruction set of 8086 assembly language
programming. 3 1 1, 2, 3 2
c. Explain the following instructions (i) MOV AX, [SI] (ii) MOV
AX,50H[SI] (iii)MOV AX,50H[BX][SI].
Identify the addressing modes for the same. 5 1 1, 2, 3 2
d. Explain interrupt structure of 8086 and explain Interrupt Vector
5. Table (IVT) placement in the memory. 5 1 1, 2, 3 2
a. What is interrupt? 2 1 1, 2, 3 1
b. What are types of Interrupts in 8086? 3 1 1, 2, 3 1
c. Evaluate the physical address, if segment base address is 5200H &
offset address is 4510H. 5 1 1, 2, 3 5
6. d. Demonstrate register to register instruction formats. 5 1 1, 2, 3 3
a. Describe op-code, operands in regard with 8086 assembly language
7. programming. 10 1 3, 4 3
a. Evaluate the physical address of the top of the stack? If the stack
segment register contains 3000H and SP=1005H. 5 1 3, 4 5
8. b. List the advantages of memory segmentation. 5 1 3, 4 1
9. a. Explain in detail about the signal description of 8086. 10 1 3, 4 2
a. Explain how the BIU and EU of 8086 functions parallelly. 5 1 2, 5 2
b. Demonstrate the use of SHIFT and ROTATE instructions of 8086
10. assembly language programming. 5 1 2,4,5,6 3
 UNIT – II: INTRODUCTION TO MICROCONTROLLERS; 8051 REAL TIME

CONTROL

S.No. Question Marks CO PO BT

a. Write an overview of 8051 microcontroller. 2 2 1,2 1
b. Describe about the memory organization in 8051 microcontroller. 3 2 1,2 2
c. Explain various addressing modes of 8051 with examples. 5 2 1,2 2
d. Explain about TCON special function register with a diagram in
1. 8051 microcontroller. 5 2 1,2 2
a. What is Instruction set? 2 2 1,2 1
b. What is the size of PSW in 8051? Draw structure. 3 2 1,2 1
c. Describe about the timer mode 0 with a neat sketch in 8051
microcontroller. 5 2 1,2 3
d. Discuss the advantages of microcontroller based system over
2. microprocessor based systems. 5 2 1,2 3
a. Calculate SCON value for configuring serial communication with
8-bit variable baud rate. 2 2 1,2 3
b. Name and classify the interrupts of 8051 microcontroller. 3 2 1,2 1
c. Mention about the programming of timer interrupts. 5 2 1,2 2
d. Discuss the advantages of microcontroller based system over
3. microprocessor based systems. 5 2 1, 2, 3 3
a. Draw the T0 and T1 registers of 8051 microcontroller. 2 2 1, 2, 3 3
b. Write an ALP to Transmit character ‘A’ serially using 8051? 3 2 1, 2, 3 3
c. Briefly discuss the data addressing modes in 8051 system. 5 2 1, 2, 3 3
d. Write short notes on external hardware interrupts of 8051
4. microcontroller. 5 2 1, 2, 3 2
a. Calculate TMOD value for configuring T0 in mode0 timer and T1
in mode1 counter. 2 2 1, 2, 3 3
b. Draw the IE special function register in 8051 microcontroller. 3 2 1, 2, 3 3
c. Explain in detail about the functions of Port 0, Port1, Port 2 and
5. Port 3 of 8051. 10 2 1, 2, 3 2
a. Calculate TMOD value for configuring T1 in mode1 timer and T0
in mode1 counter. 2 2 1, 2, 3 3
b. Draw the IP special function register in 8051 microcontroller. 3 2 1, 2, 3 3
c. Explain the architecture of 8051 controller with a neat block
6. diagram. 10 2 1, 2, 3 2
a. List the various Instructions set groups of 8051 and explain each
7. group with and example. 10 2 1, 2, 3 2
a. Write an ALP to find 1’s and 2’s complement of a number using
8051 microcontroller. 5 2 3, 4 3
b. Draw the SCON register frame format and explain serial
8. communication in 8051. 5 2 3, 4 3
a. Explain the alternate functions of Port-3. 5 2 3, 4 2
b. Discuss details of the Timer block, Serial port block and Interrupt
9. control block in the architecture of 8051. 5 2 3, 4 3
a. Discuss details of the internal 128 byte space and SFRs of 8051. 5 2 2, 5 3
b. Draw the PCON register of 8051 microcontroller and explain each
10. bit. 5 2 2,4,5,6 3
 UNIT – III: I/O AND MEMORY INTERFACE; SERIAL
COMMUNICATION AND BUS INTERFACE
S.No. Question Marks CO PO BT
a. Explain about the architecture of UART to be connected to 8051
microcontroller.
5 3 3 1
1. b. List the features of USB 5 3 2 1
a. Write short notes on serial communication standards. 5 3 1 1
b. Explain about memory interfacing for external RAM and ROM
2. interface to 8051.
5 3 2 1
a. Explain in detail about USB communication interface. 5 3 1 1
3. b. Explain the transfer of data using byte format on the I2C Bus. 5 3 1 1
a. Sketch the block diagram of key Board Interfacing and Write a
assembly language program to interface keyboard using 8051.
5 3 3 2
4. b. With neat sketch explain RS232 DB- 9 Connector 5 3 3 2
a. Sketch the block diagram of DAC converter and Write a assembly
language program to generate square wave.
5 3 2 1
b. Explain the daisy chained connection of SPI multi slave
5. configuration 5 3 2 1
a. Sketch the block diagram of LCD and Write an assembly language
6. program to interface LCD using 8051. 10 3 1 2
a. Sketch the block diagram for ADC0804 chip interfaced with 8051
7. and explain. 10 3 1 2
a. Explain in detail about USB.
8. 10 3 1 1
a. Indicate when RD and WR are used. Are they used in accessing
external data memory?
5 3 2 1
b. In an 8051 based system, what is the difference in the connection to
9. the program ROM and data ROM?
5 3 1 1
a. What are the control pins of the LCD? What are their functions?
10. 10 3 1 1
 UNIT – IV: ARM ARCHITECTURE
Mark
S.No. Question CO PO BT
s
a. Mention the advantages and the drawbacks of RISC. 5 4 1 2
1. b. List the feature of ARM processor. 5 4 1 2
a. Explain the different modes of ARM Processor. 5 4 1 2
2. a. Explain register file of ARM processor with neat sketch. 5 4 1 2
a. With the neat block diagram, explain data flow model of ARM core. 5 4 1 2
3. b. Write about ARM CPSR format. 5 4 1 2
a. Explain interrupts and interrupt vector table in ARM processor 5 4 1 1
4. b. Draw and explain the 3-stage pipelined instruction execution 5 4 1 2
a. Mention the details about the data processing instructions in ARM
processor.
5 4 1 1
5. b. List the applications of ARM processors 5 4 1 2
a. Draw and explain the architecture of ARM processor. 5 4 1 2
6. b. Explain the conditional execution in ARM. 5 4 1 1
a. Describe the Thumb instructions in ARM. 5 4 1 2
7. b. Mention about the program status register instructions in ARM processor. 5 4 1 1
a. Describe the Software Interrupt instructions in ARM 5 4 1 2
8. b. Explain the load store instructions in ARM 5 4 1 2
a. Give the details of the branching instructions in ARM 5 4 1 1
9. b. Describe about loading constants in ARM 5 4 1 2
10. a. Mention details of exceptions in ARM. 10 4 1 1
 UNIT – V: ADVANCED ARM PROCESSORS
S.No. Question Marks CO PO BT
a. What is the primary difference between ARM and 8086
processors?
2 5 1 1
b. Mention the features of low cost debug solution in CORTEX. 3 5 2 1
1. c. Explain the architecture of CORTEX processor. 10 5 1 3
a. OMAP is an abbreviation for? 2 5 1 1
b. Mention external interface on CORTEX processor. 3 5 1 2
2. c. Draw and explain the architecture of OMAP processor. 10 5 2 3
a. What is SOC? 2 5 1 1
b. What is meant by advanced ARM processors? 3 5 2 1
3. c. Explain the different applications of CORTEX processor in detail. 10 5 2 2
a. Expand OMPA processor and its memory capacity. 2 5 1 1
b. What is difference between Cortex A, Cortex M and Cortex R
series of ARM?
3 5 1 1
c. List out different classifications of OMPA processor and explain
4. each one type in detail.
10 5 1 2
a. Explain the different applications of OMPA processor 2 5 1 1
b. Draw internal architecture of OMPA processor. 3 5 1 1
c. Explain the concept of super scalar pipeline of CORTEX
5. processor along with circuit diagram
10 5 2 3

6. a. Explain how OMAP processor differs from CORTEX processor. 10 5 2 3

7. a. Draw the register organization of CORTEX processor 10 5 2 2

a. Explain the different applications of CORTEX processor in
8. present generations 10 5 2 3
 BIT BANK

UNIT 1
Multiple Choice Questions
1. One of these is an index register [ ]
(a) BP (b) SI (c) DX (d) PC
2. Which of these is an 8 bit register? [ ]
(a) DX (b) CX (c) BX (d) AH
3. The flag which indicates whether the numbers of 1s are odd or even in the lower 8 bits is [ ]
(a) CY (b) Z (c) PF (d) SF
4. Which of these bits is used specially in packed BCD arithmetic? [ ]
(a) DF (b) CY (c) AC (d) OF
5. EA is used to represent Effective address then what addressing mode does EA = [2000H]
Represent [ ]
(a) Register Direct (b) Register indirect (c)Directing Addressing (d)
immediate addressing
6. The width of the SP register in 8086 is [ ]
(a) 32 bits (b) 8 bits (c) 24 bits (d) 16 bits
7. The flags used for masking the interrupts is [ ]
(a) TF (b) AC (c) DF (d) IF
8. Which of these flags indicates a carry from a nibble? [ ]
(a) CY (b) Z (c) DF (d) AC
9. The size of the 8086 flag register is [ ]
(a) 32 bits (b) 16 bits (c) 8 bits (d) 64 bits
10. One of the following is wrong combination of registers [ ]
(a) ES:DS (b) DS:SP (c) DS:SS (d) CS:IP

Answers
1. B 2. D 3. C 4. C 5. C 6. D 7. D 8. D 9. B 10. A

FILL IN THE BLANKS

11. The first operation done by PUSH instruction is
12. When a CMP instruction executes and the source and destination operands are not equal, what will be condition
of Zero and carry flag when source is greater than destination
13. What is the instructions used to writes a string byte to memory
14. The following program will loop how many times

MOV AX, 2
MOV DX, 0FH
AGAI N: MOV CX, 0FFH DEC DX
LOOP AGAIN
15. The instruction, MOV AX, 0005H belongs to address mode
16. What is the 8086 instruction format OPCODE ,

17. In the following program what is the value of CX after the loop is executed
 MOV AX,2

MOV DX,0FFFh

MOV CX,10

AGAIN:DEC DX

JNZ AGAIN
18. EA is used to represent Effective address then what addressing mode does EA=[Reg] Represent

19. What is the stack operation performed when POP instruction is executed
20. What is the instruction used for searching a byte in a string

ANSWERS:

11 12 13 14 15 16 17 18 19 20
Decrement the ZF=0 STOSB FFH Immidiate Destination 0AH Register Read the dataSCASB
SP by 2 and and or 255 Operand, or 10 Indirect from SS:SP
Write the data CF=1 Source and Increment
to SS:SP Operand the SP by 2
and

UNIT 2
Multiple Choice Questions
1. Which one of the following is the 8051 architecture based upon? [ ]
(a) Princeton Architecture (b) Param Architecture
(c) Harvard Architecture (d) Von Neumann Architecture
2. General purpose registers R0 to R7 can be referred as sets of four banks (0to3) and also by
memory location. If a register R3 in Bank2 is referred, what is its internal ram location address?
[ ]
(a) 14H (b) 10H (c) 12H (d) 13H
3. Timer0 is functional as two 8 bit timers while Timer1 is stopped in which of the following
modes? [ ]
(a) Mode2 (b) Mode1 (c) Mode3 (d) Mode0
4. Which of the following is the correct order of priority in decreasing order from left to right? [
]
(a) EX0,EX1,ET0,ET1,ES, (b) ES,EX1,ET0,E01,ET1
(c) ET0,EX0,ET1,EX1,ES (d) EX0,ET0,EX1,ET1,ES
5. One of these signals indicates that address is available on Port0? [ ]
(a) EA (b) RESET (c) ALE (d) PSEN
6. The 8051 microcontroller does not have one of the following as it’s built in peripheral?
[ ]
(a) Timers (b) Counters (c) UART (d) DMA controller
7. One of these registers is loaded with the upper byte of the terminal count? [ ]
(a) THx (b) TMOD (c) TLx (d) TCON
8. The bit which disables reception of serial data is which one of the following? [ ]
(a) RB8 (b) TB8 (c) RI (d) REN
9. The upper 128 bytes of an internal data memory from 80H through FFH usually represent[ ]
(a) General-purpose registers (b) Special function registers
(c) Stack pointers (d) Program counter
10. How are the bits of the register PSW affected if we select Bank2 of 8051? [ ]
(a) PSW.5=0 and PSW.4=1 (b) PSW.2=0 and PSW.3=1
(c) PSW.3=1 and PSW.4=1 (d) PSW.3=0 and PSW.4=1 ANSWERS
1. C 2. D 3. C 4. D 5. C 6. D 7. A 8. D 9. B 10. D

FILL IN THE BLANKS

11. 8051 series has how many 16 bit registers?
12. The instruction used to access internal RAM is
13. The 8051 microcontroller built in timer is of how many bits
14. What is the size of PSW Register
15. number of bytes of Bit Addressable Memory is present in 8051 based
microcontrollers.
16. If we say microcontroller is 8-bit then here 8-bit denotes size of
17. is a port of 8051which needs a pull-up resistor for using it is as an input or an output
port.
18. Which bit of TMOD will exactly configure timer / counter as a timer or counter.

19. Counter or timer operation is chosen in which of these registers

20. The upper 8 bits of address bus are generated on which of these ports

ANSWERS:
11 12 13 14 15 16 17 18 19 20
(2) MOV 16 8 16 ALU PORT0 TMOD.6 of C/T for TMOD PORT2
PC and bits bits bytes timer1 and TMOD.2 of
DPTR C/T for timer0
 UNIT 3
Multiple Choice Questions

1. What changes are to be made to send data to an LCD? [ ]

a) set the R/W bit b) set the E bit c) set the RS bit d) all of the
mentioned
2. The RS pin of LCD is an pin? [ ]
a) input b) output c) input & output d) none of the mentioned
3. How many data lines are there in a 16*2 alphanumeric LCD? [ ]
a) 16 b) 8 c) 1 d) 0
4. Which of the following steps detects the key in a 4*4 keyboard matrix about the key that is
being pressed? [ ]
a) masking of bits b) ensuring that initially, all keys are open
c) checking that whether the key is actually pressed or not d) all of the mentioned
5. If we need to operate a key of a keyboard in an interrupt mode, then it will generate what kind
of interrupt? [ ]
a) ES b) EX0/EX1c) T0/T1 d) RESET
6. In I2C bus standard, signal is indicated by high-to-low transition of the
SDA line while SCL is high. [ ]
a) start condition (S)
b) stop condition (P)
c) transfer in progress
d) none of the mentioned
7. Each slave has its unique address in I2C. [ ]
a) true
b) false
c) can’t be said
d) depends on the conditions
8. In I2C bus standard, signal is indicated by low-to-high transition of the
SDA line while SCL is high. [ ]
a) start condition (S)
b) stop condition (P)
c) transfer in progress
d) none of the mentioned
9. The concept of SPI is based on [ ]
a) two counters
b) four flip flops
c) two shift registers
d) four steady state machines
10. Is SPI a full duplex technique? [ ]
a) yes
b) no
c) can’t be said
d) depends on the conditions

ANSWERS
1. D 2. A 3. B 4. D 5. B
6.b 7. a 8. b 9. c 10. a

FILL IN THE BLANKS

11. Which pin of the LCD is used for adjusting its contrast
12. How many rows and columns are present in a 16*2 alphanumeric LCD
13. What is the maximum delay that can be generated with the crystal frequency of 22MHz
14. In the instruction “MOV TH1,#-3”, what is the value that is being loaded in the TH1 register
15. For writing commands on an LCD, RS bit is
16. I2C-bus stands for
17. UART stands for
18. USB stands for
19. SPI-bus stands for
20. In serial communication transmitters and receivers are not synchronized by clock.

ANSWERS:
11 12 13 14 15
Pin 3 rows=2, 2.97 msec 0xFDH reset
columns=16 Explanation:
FFFFH/f
(65536/22MHz =
2.97 mili sec)

16.Inter Integrated 17. Universal 18. Universal Serial Bus 19. Serial 20.
Circuit bus Asynchronous Peripheral Asynchronous
Recelver- Interface
Tansmitter

UNIT 4
Multiple Choice Questions:

1. The main importance of ARM micro-processors is providing operation with [

]
a) Low cost and low power consumption
b) Higher degree of multi-tasking
c) Lower error or glitches
d) Efficient memory management

2. ARM processors where basically designed for [ ]

a) Main frame systems
b) Distributed systems
c) Mobile systems
d) Super computers

3. The address space in ARM is [ ]

a) 2^24
b) 2^64
c) 2^16
d) 2^32

4. The address system supported by ARM systems is/are

a) Little Endian
b) Big Endian
c) X-Little Endian
d) Both Little & Big Endian

5. Memory can be accessed in ARM systems by instructions. [ ]

i) Store
ii) Move
iii) Load
iv) Arithmetic
v) Logical
a) i,ii,iii b) i,iii c) i,iv,v d) iii,iv,v

6. RISC stands for [ ]

a) Restricted Instruction Sequencing Computer
b) Restricted Instruction Sequential Compiler
c) Reduced Instruction Set Computer
d) Reduced Induction Set Computer

7. The additional duplicate register used in ARM machines are called as [

]
a) Copied-registers
b) Banked registers
c) Extra registers
d) Extended registers

8. The banked registers are used for [ ]

a) Switching between supervisor and interrupt mode
b) Extended storing
c) Same as other general purpose registers
d) None of the mentioned

9. Each instruction in ARM machines is encoded into Word. [ ]

a) 2 byte
b) 3 byte
c) 4 byte
d) 8 byte

10. ARM stands for [ ]

a) Advanced Rate Machines
b) Advanced RISC Machines
c) Artificial Running Machines
d) Aviary Running Machines
Answers
1.a 2. c 3. d 4. d 5. b
6.c 7. b 8. a 9. c 10. b

Fill in the blanks

11. The ARM processors don’t support Byte addressability (True/False).

12. Most instructions in ARM are conditionally executed (True/False).
13. ARM Microcontroller supports architecture.
14. Thumb instructions are bits.
15. In the ARM, PC is implemented using
16. The ability to shift or rotate in the same instruction along with other operation is performed
with the help of
17. ARM microcontroller has and (32-bit) instruction fields.
18. ARM7 uses a simple -stage pipeline.
19. CPSR stands for .
20. The is the table that the ARM core branches to when an exception is raised.
Answers
11.False 12. True 13. load-store 14. 16 15.General – purpose
register
16. Barrel shifter 17. Uniform and 18. 3 19. Current 20. Interrupt Vector
fixed- length Program Status Table
Register

UNIT-5

Multiple Choice Questions:

1. The main importance of OMAP processors is providing operations for [ ]

a) high-performance applications b) basic multimedia applications
c) integrated modem and applications d) All the above

2. OMAP processors are developed by [ ]

a) National Instruments b) Texas Instrument c) Measurement Laboratories d) BBK
Electronics

3. What are the profiles for ARM architecture? [ ]

a) A,R b) A,M c) A,R,M d) R,M

4. Architecture implemented in Cortex processors is/are [ ]

a) Von-Neumann b) Harvard c) Both a & b d) None

5. Which of following ARM processors have longest pipeline? [ ]

a) Cortex-R processors b) Cortex-A processors
c) Cortex-M processors d) ARM9E series

6. What is/are the configuration status of control unit in RISC Processors? [ ]

a). Hardwired b). Microprogrammed
c). Both a and b d). None of the above

7. How is the nature of instruction size in CISC processors? [ ]

a). Fixed b). Variable
c). Both a and b d). None of the above
8. Architecturally, speed modes present in Cortex-M processors are [ ]
a) two b) three c) four c) five

9. Cortex-M0 processor support [ ]

a). 36 instructions b). 56 instructions c). 64 instructions d). 89 instructions
10. Which of the following is more quickly accessed? [ ]
a) RAM b) Cache memory c) DRAM d) SRAM

Answers
1.d 2. b 3. c 4. b 5. b
6.a 7. b 8. a 9. b 10. b

Fill in the blanks

11. NVIC stands for .

12. The CORTEX-M3 processor supports and modes.
13. When the CORTEX processor is running in thread mode, it can be in either the
or level.
14. When the CORTEX processor is running in Handler mode, it can only be in
level.
15. The CORTEX M3 processor can operate in one of two operating states: and
.
16. NVIC can configure maximum number of external interrupts: .
17. is the default stack pointer, used by the OS kernel and exception handlers.
18. is the stack pointer, used by application code.
19. OMAP stands for .
20. processor is introduced for mobile and multimedia applications.

Answers
11.Nested Vector 12. Handler and 13. privileged or 14. privileged 15.Thumb state and
Interrupt Controller Thread user Debug state

16. 240 17. Main Stack 18. Process Stack 19. Open 20. OMAP
Pointer(MSP) Pointer (PSP) Multimedia
Application
Platform