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DLD LAB EXP 04 (Construction of A Combinational Circuit From A Truth Table or A Given Statement.) - ACS

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0% found this document useful (0 votes)
52 views5 pages

DLD LAB EXP 04 (Construction of A Combinational Circuit From A Truth Table or A Given Statement.) - ACS

Uploaded by

Sadatur Rahman
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Title:

Construction of a combinational circuit from a truth table or a given statement.


Abstract:
A logic circuit can be constructed from a given logic statement by observing the individual logic
operations performed in the circuit and matching them with their corresponding logic gates. Then
gates required can be determined from the logic expressions by observing the sequence of the
inputs and operations performed on them. Expressions can be simplified using Boolean algebra
and De Morgan's law or Karnaugh map to reduce the number of gates used. The main objective
of this experiment is to Construct of a combinational circuit from a truth table or a given
statement.

Theory:

Combinational circuits are built with logic gates and other components. It does not include any
values to be taken from a previous state of the circuit.

Boolean algebra: In Boolean algebra, a variable is a symbol used to represent an action, a


condition, or data. A single variable can only have a value of 1 or 0.

1) Variable: A symbol used to represent a logical quantity that can have a value of 1 or 0,
usually designated by an italic letter.
2) Complement: The inverse or opposite of a number. In Boolean algebra, the inverse
function, expressed with a bar over the variable.
3) Sum term: The Boolean sum of two or more literals equivalent to an OR operation
4) Product term: The Boolean product of two or more literals equivalent to an AND
operation.
5) Sum of Products(SOP): A form of Boolean expression that is basically the ORing of
ANDed terms.
6) Product of Sums(POS):A form of Boolean expression that is basically the ANDing of
ORed terms.
7) Karnaugh map: An arrangement of cells representing combinations of literals in a
Boolean expression and used for systematic simplification of the expression.

Boolean expressions can be written in the sum-of-products form (SOP) or in the product-of-sums
form (POS). These forms can simplify the implementation of combinational logic, particularly
with PLDs. In both forms, an overbar cannot extend over more than one variable.
A 4-variable Karnaugh map has an adjacent cell on each of its four boundaries as shown. Each
cell is different only by one variable from an adjacent cell. Grouping follows the rules given in
the text. It is a four variable map using binary numbers for the variables.

Apparatus:

1. Digital trainer board


2. Integrated circuits ( ICs )
a. OR gate (IC 7432)
b. AND gate (IC 7408)
c. NOT gate (IC 7404)
3. Connecting wires

Results:

Logic expressions for problem 1


For output X, For output Y,

AB 00 01 11 10 AB 00 01 11 10
CD CD
00 1 0 0 0 00 0 1 1 0
01 0 0 0 0 01 1 0 0 1
11 0 0 1 0 11 1 0 0 1
10 0 0 0 0 10 0 1 1 0

X = ABCD + ABCD Y = BD + BD
Logic expressions for problem 2
F = AB + AB
Discussion:
Constructing a combinational logic circuit from any truth table or given statement is very
important. It helps a designer to reduce the number of gates. By analyzing theoretical and
practical data it can be said that both the data is same. The method of constructing logic circuits
from logic equations and truth table is very important and easy to learn. One can make any
combinational logic circuit of desired output by using the methods of constructing logic circuits
properly. Finally, the experiment was successful by Deriving logic equations, constructing the
circuit and by fulfilling the objectives.

Question Answer:

1. Combinational logic circuit - In digital circuit theory, combinational logic(sometimes


also referred to as time-independent logic) is a type of digital logic which is implemented
by Boolean circuits, where the output is a pure function of the present input only.

2. Truth table for Y = ABC+ABC+ABC+ABC+ABC

A B C Y
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1

3. Design for Y = ABC+ AB+ AC

Simulation:

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