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Problem To perform a quality control analysis on fifty

batches of semiconductor wafers to determine


whether the wafer thickness (measured in
microns) is within control limits
Quality Control Data

Semiconductor Thickness (microns)


Batch Wafer-1 Wafer-2 Wafer-3 Wafer-4 Wafer-5 Wafer-6 Wafer-7
Batch-1 621 615 630 625 623 624 629
Batch-2 623 632 633 619 635 629 632
Batch-3 615 623 629 634 634 617 629
Batch-4 629 622 638 624 622 629 618
Batch-5 623 626 625 621 621
Batch-6 627 623 623 617 624 626 624
Batch-7 616 627 628 622 623 626 625
Batch-8 629 623 627 623 631 625 622
Batch-9 622 612 615 618 624 634 617
Batch-10 623 626 622 629 617 626 621
Batch-11 621 626 629 632 622 629 636
Batch-12 624 635 618 630 625 627 623
Batch-13 628 633 627 633
Batch-14 627 625 627 621 621 630 625
Batch-15 619 627 618 622 622 631
Batch-16 623 626 625 628 630 622 625
Batch-17 627 630 623 627 627 632 625
Batch-18 631 623 620 621
Batch-19 612 627 627 623 616 624 625
Batch-20 615 623 624 621 631 629 629
Batch-21 626 627 622 619 627 623 620
Batch-22 626 617 635 623
Batch-23 624 623 627 631 624 623 624
Batch-24 621 630 618 626 625 624
Batch-25 629 626 615 630 621 619 616
Batch-26 614 620 630 624 622 626 627
Batch-27 632 632 632 627 626 629 631
Batch-28 618 621 625 622
Batch-29 620 625 614 628 625 625 622
Batch-30 630 625 630 621 616 622 630
Batch-31 629
Batch-32 624 626 628 631 635 624 624
Batch-33 630 629 637 637 626 628 631
Batch-34 624 624 634 621 626 622 623
Batch-35 618 617 612 619 619 621 622
Batch-36 619 628 613 622 627 625 624
Batch-37 627 628 624 620 634 627 624
Batch-38 627 622 628 625 628 619 625
Batch-39 624 630 621 618 627 628 624
Batch-40 618 623 629 623
Batch-41 624 625 629 622 619 635 633
Batch-42 621 628 630 631 622 628 630
Batch-43 629 625 628 636
Batch-44 631 627 631 621 629 626 625
Batch-45 623 626 622 628 625 615 627
Batch-46 628 613 625 625 628 630 631
Batch-47 624 631 629 623 622 630 625
Batch-48 625 623 630 621 629 617 626
Batch-49 618 611 616 615 621 620 619
Batch-50

Conclusion
Six of the 50 machines are not operating with the control limits and will have to
The following machines are creating wafers that are too thin: 9, 35, and 49. The
machines are creating wafers that are too thick: 2, 27, and 50. The remaining 4
are operating within control limits and do not have to be taken off the assembly
time.
Wafer-8 Wafer-9 Wafer-10
620 629 628 10
631 634 635 10
615 620 624 10
632 626 623 10
626 623 620 8
624 629 633 10
632 629 619 10
625 8
611 615 617 10
619 624 625 10
628 622 618 10
624 634 628 10
621 626 615 7
620 633 630 10
633 624 630 9
629 626 627 10
620 634 621 10
620 5
620 625 627 10
636 624 628 10
627 622 624 10
626 622 6
621 617 633 10
619 619 631 9
631 631 629 10
618 625 627 10
630 635 632 10
626 626 615 7
618 626 620 10
625 622 628 10
618 616 618 4
627 630 631 10
626 620 624 10
633 627 629 10
617 618 621 10
7
627 613 9
632 633 622 10
622 621 628 10
615 632 619 7
631 618 635 10
619 626 627 10
615 633 6
622 622 627 10
626 628 626 10
7
629 623 626 10
621 617 629 10
7
642 638 641 3

mits and will have to be retuned.


: 9, 35, and 49. The following
50. The remaining 44 machines
en off the assembly line at this
Quality Control Limits
Sample Size LCL UCL
2 598.45 651.61
3 610.56 639.49
4 614.72 635.34
5 616.87 633.19
6 618.20 631.86
7 619.10 630.95
8 619.75 630.30
9 620.26 629.79
10 620.67 629.38
11 621.00 629.06
12 621.27 628.79
13 621.51 628.55
14 621.71 628.35
15 621.88 628.18
16 622.03 628.03
17 622.16 627.90
18 622.29 627.77
19 622.38 627.67
20 622.48 627.57
21 622.58 627.48
22 622.67 627.39
23 622.74 627.32
24 622.81 627.25
25 622.87 627.19
Average width of the sample size should fall between LCL and UCL

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