Experiment 9
Experiment 9
APPARATUS:
THEORY:
MOSFET Structure
In our first case, let us connect the Gate terminal to the ground and apply a positive voltage at the drain
and source. On applying positive VDS, the electrons in the N channel will move towards the positive
drain terminal, and the drain current will start flowing from drain to source. On increasing VDS further,
keeping VGS 0, a time will come where ID will become constant, and that value of drain current is
called saturation current.
We can conclude from this discussion that when VGS = 0 and VDS > 0, current ID flows from drain to
source, and on increasing VDS further, ID = IS = IDSS, as shown in the figure below.
MOSFET Working
Now let us see the effect of gate voltage on N channel depletion MOSFET.
Apply VGS < 0. Holes from the P-type substrate will attract towards the negative gate terminal and
recombine with electrons in the N channel, forming electron-hole pairs. On increasing negative
potential at the gate, more electron-hole combinations will occur, decreasing the number of free
electrons in the N channel. As a result, ID decreases. A time will come when the drain current will
become zero. The negative gate voltage at which the drain current is zero is called pinch-off voltage or
VP.
We can conclude from this discussion at pinch-off, VGS = VP, VDS > 0, and ID = 0, as shown in the
figure below.
Now we will see the effect of positive gate voltage on the drain current.
On applying VGS > 0, the minority carriers in the p-type substrate, i.e. electrons, will get attracted
towards the gate terminal, thereby increasing the concentration of electrons in the N-channel. As a
result, the drain current will increase and exceed the saturation current. We can conclude from this
discussion, when VGS > 0 and VDS > 0, then ID > IDSS, as shown in the figure below.
MOSFET Working
The graph shows that the current ID will flow for both positive and negative values of VGS. You can see
from the graph that the drain current is less than the saturation current for the negative value of gate
voltage, whereas for the positive value of gate voltage, the drain current exceeds the saturation
current. VGS = VP is also represented in this graph for which drain current is zero irrespective of drain to
source voltage.
CIRCUIT DIAGRAM:
PROCEDURE:
1. All the connections are made as per the circuit diagram.
2. To plot the drain characteristics, keep VGS constant at 0V.
3. Vary the VDD and observe the values of VDS and ID.
4. Repeat the above steps 2, 3 for different values of VGS at -1V and -2V.
5. All the readings are tabulated.
6. To plot the transfer characteristics, keep VDS constant at 0.5V.
7. Vary VGG and observe the values of VGS and ID.
8. Repeat steps 6 and 7 for different values of VDS at 1V and 1.5V.
9. The readings are tabulated.
OBSERVATIONS:
VDS (V) ID (mA) VDS (V) VDS (V) VDS (V) ID (mA) VDS (V) ID (mA)
1. While doing the experiment do not exceed the ratings of the FET. This may lead
to damage the FET.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit connections
as per the circuit diagram.
4. Make sure while selecting the Source, Drain and Gate terminals of the FET.
VIVA QUESTIONS:
1. What are the advantages of FET?
2. Different between FET and BJT?
3. Explain different regions of V-I characteristics of FET?
4. What are the applications of FET?
5. What are the types of FET?
6. Draw the symbol of FET.
7. What are the disadvantages of FET?
8. What are the parameters of FET?