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Lab Report#3

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14 views13 pages

Lab Report#3

lab report 3

Uploaded by

mainpc266
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Lab Report #3

Course: Fundamentals of Digital Logic Design (EEE-240)

Submitted to: Prof Adnan Qureshi

Submitted by: Marwa Sagheer (Sp24-Bcs-058)


Laiba Laraib (Sp24-Bcs-053)
Muhammad Hashir Farooq (Sp24-bcs-066)
Muhammad Umer Afaq (Sp24-Bcs-77)

Date: September 24, 2024

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Lab 3: Design of Combinational Circuits and Logic Minimization
Using Boolean Function

Part #1
k-map with 3 inputs:
Given expression:
F= m2+m3+m4+m5
F= x’yz’ + x’yz+ xy’z’+xy’z
Truth table of un-optimized circuit:

Inputs Outputs

x y z F

0 0 0 0

1 0 0 0

0 1 0 1

1 1 0 1

0 0 1 1

1 0 1 1

0 1 1 0

1 1 1 0

Circuit diagram:
The circuit diagram drawn from the above truth table for the un-
optimized circuit is given below:
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3
K-map for 3 inputs:

y’z’ y’z yz yz’

0 0 1 1
x’
0 1 3 2

4
1 1 0 0
x

4 5 7 6

Optimized expression:
From k-map, we got this expression:
F= x’y + xy’
F= x ⊕ y
Circuit diagram:

5
6
Circuit diagram for expression involving XOR circuit:

7
8
Part #2
k –map with 4 inputs:
Truth table:

Inputs Outputs
w x y z F
0 0 0 0 0

0 0 0 1 0

0 0 1 0 1

0 0 1 1 1

0 1 0 0 0

0 1 0 1 0

0 1 1 0 1

0 1 1 1 1

1 0 0 0 0

1 0 0 1 1

1 0 1 0 0

1 0 1 1 1

1 1 0 0 0

1 1 0 1 1
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1 1 1 0 0

1 1 1 1 1
F= (m2+m3+m6+m7+m9+m11+m13+m15)
F=w’x’yz’+w’x’yz+w’xyz’+w’xyz+wx’y’z’+wx’yz+wxy’z+wxyz

K-map for 4 inputs:


y’z’ y’z yz yz’

0 0 1 1
w’x’
0 1 3 2

0 0 1 1

w’x
4 5 7 6

wx 0 1 1 0

12 13 15 14

wx’ 0 1 1 0

8 9 11 10

Simplified expression from k-map:


F= y.w’+z.w
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Circuit diagram:
The circuit diagrams for the 4 combinations of inputs are as
follows:

11
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Conclusion:
By the end of this lab, we successfully minimized logic gates using
Boolean algebra and simplified Boolean function expressions through
Karnaugh maps (K-maps), without relying on complex theorems or
intricate equation manipulation.

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