0% found this document useful (0 votes)
105 views2 pages

Btech Cse 3 Sem Digital Electronics 76435 Jan 2023

DE Previous paper

Uploaded by

Lovish jindal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
105 views2 pages

Btech Cse 3 Sem Digital Electronics 76435 Jan 2023

DE Previous paper

Uploaded by

Lovish jindal
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 2

Roll No. Total No.

of Pages : 02
Total No. of Questions : 18
B.Tech. (Artificial Intelligence & Machine Learning / Artificial
Intelligence (AI) and Data Science / Artificial Intelligence / CSE / Data
Science / IT / CSE (Internet of Things and Cyber Security including
Block Chain Technology) / Computer Engg.)
B.Tech. (CSE) (Artificial Intelligence & Machine Learning) / (CSE) (Cyber
Security) / (CSE) (Data Science) / (CSE) (IOT) (Sem.–3)
DIGITAL ELECTRONICS
Subject Code : BTES-301-18
M.Code : 76435
Date of Examination : 12-01-23
Time : 3 Hrs. Max. Marks : 60

INST RUCT IONS T O CANDIDAT ES :


1. SECTION-A is COMPULSORY cons is ting of TEN questions carrying TWO marks
each.
2. SECTION-B c ontains FIVE questions c arrying FIVE marks eac h and s tudents
have to atte mpt any FOUR ques tions.
3. SECTION-C contains THREE questions carrying TEN marks e ach and s tudents
have to atte mpt any TWO questions.

SECTION-A

Write briefly :

a) Convert binary number 11010101 into octal and hexadecimal numbers.

b) Explain ASCII codes.

c) Give the applications of Gray codes.

d) State De-Morgan’s Theorem.

e) Describe Minterms and Maxterms.

f) Draw half adder circuit diagram.

g) What do you mean by Ripple counters?

h) Draw SIPO, SISO, PISO and PIPO shift registers.

1 | M-76435 (S2)- 432


i) Enlist various memories.

j) Classify D/A conversion techniques.

SECTION-B

2. Design all other logic gates using 2 inputs NOR gates.

3. Minimize the function F = m (1,2,3,5,6,8,9) using K-Map.

4. Design Full subtracter with truth table, circuit diagrams.

5. Design mod-6 up counter.

6. Draw and explain complex programmable logic devices.

SECTION-C

7. Design BCD to 7 segment decoder.

8. Explain counter type analog to digital converters.

9. Encode Decimal number 56 into binary, octal, hexadecimal, BCD, Gray and Excess 3
codes.

NOTE : Disclosure of Identity by writing Mobile No. or Making of passing request on any
page of Answer Sheet will lead to UMC against the Student.

2 | M-76435 (S2)- 432

You might also like