IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO.

3, MAY 2008 1565

Loss Free Gate Driver Unipolar Power Supply

for High Side Power Transistors
Jean-Christophe Crébier and Nicolas Rouger

Abstract—The paper presents a simple and cost effective solution First of all, the classical operating principle is presented as an
to supply high side power electronic switch gate drivers. The solu- introduction of the powering technique. Then, focus is applied
tion can be integrated and it is demonstrated that it can be loss free, on the pulsed linear regulation operation, which takes advantage
depending on how the power switch is driven. The solution is based
on a pulsed linear regulator, only sensitive to a positive . At of power transistors parasitics and power converter switching
every main power switch’s turn OFF, it recycles the switching losses patterns. It is shown how the gate driver’s supply operates, only
in order to recharge a storage capacitor. The paper presents the at the main switch’s turn OFF, to maximize the dynamics and
global operation and focuses on interesting and important oper- the operating range while improving the efficiency. All the ap-
ating characteristics thanks to simulation and practical results.
proach is presented carefully, thanks to simulations results for
Index Terms—High-frequency (HF) transformers. the power devices with a charge location equivalent model [11].
Practical results are presented to validate the particular and in-
teresting operating modes. The end of the paper presents the
I. INTRODUCTION
remaining limitations of such an approach and the future inves-

G ATE driver powering of “high side” power transistors re-

quires an electrical insulation which can be achieved by
high-frequency (HF) transformers [1], [2], or requires charge
tigations that need to be carried out toward the monolithic inte-
gration of this powering technique.

pumps such as the bootstrap technique [3]–[5]. This specific

need hardens the practical implementation of the converters and II. GATE DRIVER SELF POWERING TECHNIQUE
often requires to design small dc–dc power supplies or charge Unlike the classical techniques (based on external supplies
pumps [6] inside the converter (such as small inverters or Fly- that are connected to the gate drivers thanks to electrical or po-
back converters [7]). In an effort to integrate and to simplify the tential isolators such as HF transformers or power diodes-boot-
implementation of the converter’s power side, the gate driver strap technique-), the topology, presented in the Fig. 1(a), stores
powering and electrical insulation is an issue. in a small capacitor tank the needed energy, coming directly
A simple solution has been presented in [8] and, as under- from the power stage. A simple linear regulator, implemented in
lined in [9], it is simple to integrate monolithically within the parallel with the power switch to be driven Tm, picks up the en-
power switch. This technique is based on the linear regulation, ergy available across it, during its OFF state. This energy is fed
connecting a regulation branch in parallel with the power switch into the storage capacitor through an auxiliary switch Ta (al-
to be driven as it is depicted on Fig. 1(a) and (b). This solution is lowing to fasten the dynamics). A polarization branch, made out
known as being limited by its power consumption, its operating of a resistor R and an avalanche controlled diode Da, generates
range (the minimum OFF time and maximum ON time dura- the regulated potential’s reference. A blocking diode Db must
tions) and its poor dynamics. In addition, as it is the case for the be used in order to prevent the capacitor from discharging
well known bootstrap technique, it is an unipolar dc source and through the main switch while it is in its ON state. The en-
it requires to switch OFF periodically the power switch to drive.
ergy stored is then used to supply the gate driver while the main
More recently, additional work has been carried out on this tech-
switch is turned ON and this until it turns OFF again. The value
nique with the view of improving its operating characteristics.
of the capacitor CS is set as a function of the gate driver’s power
Taking advantage of the converter’s switching transitions, the
consumption, the maximum ON state duration and the desired
linear regulators have been designed to be sensitive to a posi-
maximum voltage drop level. The classical and qualitative
tive [10]. This very specific operating characteristic has
time domain waveforms are shown on the Fig. 1(b). This pow-
greatly widened its operating range, offering enhanced dynamic
ering technique is a stand alone one, it doesn’t need any insu-
responses under a limited static power consumption. This paper
lation implementation, but it has several important operational
is going to present that, thanks to this pulsed linear regulation
drawbacks.
approach, the gate driver supply can be designed to be loss free
depending on the transistor switching characteristics. The most important one is probably the linear regulation tech-
nique’s efficiency, which is not very high. Indeed, the regu-
lator’s efficiency corresponds to the ratio between the regulated
Manuscript received July 6, 2007; revised October 1, 2007. Recommended
for publication by Associate Editor M. Ponce-Silva.
voltage over the power side’s voltage . For instance,
The authors are with the Electrical Engineering Lab (G2Elab), National with a dc power source 400 V and a regulated voltage
Center for Scientific Research (CNRS), Grenoble 38402, France (e-mail: level 20 V, the gate driver supply’s efficiency reaches 5%.
[email protected]; [email protected]). Furthermore, the polarization branch has not been considered in
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. the estimation of the global efficiency of the regulator. Finally,
Digital Object Identifier 10.1109/TPEL.2008.921163 depending on the desired dynamic responses of the polarization
0885-8993/$25.00 © 2008 IEEE
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1566 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 3, MAY 2008

Fig. 1. (a) Basic gate driver supply linear regulator topology. (b) Qualitative time domain waveforms.

Fig. 2. (a) Fast dynamic response integrable gate driver supply. (b) Qualitative time domain waveforms.

branch, an additional power consumption will even more reduce at a much higher efficiency level and a wider operating range,
the efficiency of the power supply. An auxiliary transistor can be while being implemented with fewer elements. It will be shown
added to the regulator in order to improve the dynamic response that thanks to this operating mode, the integration’s procedure
while keeping the polarization branch’s losses at a reasonable will be also simplified.
level. The resulting topology and the qualitative time domain
waveforms are presented in the Fig. 2(a) and (b). Then, a com- III. PULSED LINEAR REGULATOR
promise must be found between the efficiency and the dynamic
responses (and the resulting operating ranges). A. Presentation
The very interesting characteristic of such a kind of power In the view of improving the operation of the linear regulator
supply is that, as all linear regulators, it is simple to integrate for gate driver powering purposes, we will assume that the tran-
on silicon (except for the storage capacitor tank ) as it has sistor to be driven, continuously switches from the ON state to
been underlined and shown in [9]. This point is significant be- the OFF state and vice versa, at a fixed switching frequency and
cause the gate driver supply’s implementation is then summa- under variable duty-cycles (as it is the case in most power elec-
rized to the implementation of the discrete external passive com- tronic converters). In addition, not any restriction on the source
ponents: the high value resistor R and the low voltage, small voltage and the load current applied across the tran-
value storage capacitor . The integrated configuration is pre- sistor will have to be considered.
sented hereinafter on the Fig. 2(a). Nevertheless, the passive re- The impacts of the switching patterns on the linear regulator
sistor is a complex external element because it must withstand have been investigated and it can be shown that the regulation
power side’s voltage levels and besides, it can have to dis- branch is highly sensitive to the positive created period-
sipate some power (in order to comply for fast time responses). ically across the main switch Tm while it is turned OFF. This
The following sections of the paper are going to investigate positive dv/dt, applied to the regulation branch’s parasitic ele-
a modified operational mode of this regulation technique. The ments (the auxiliary switch’s Miller capacitor in partic-
work that is underlined here is going to show that, thanks to the ular), generates an additional current through the polarization
converter switching’s patterns, the linear regulator may operate branch that fastens the bias of the auxiliary switch Ta. The Fig. 3
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CRÉBIER AND ROUGER: LOSS FREE GATE DRIVER UNIPOLAR POWER SUPPLY 1567

Fig. 3. Dynamic equivalent circuits of the power switch and the linear Fig. 4. Simulation results.
regulator.

shows a dynamic equivalent circuit of the power switch (inside

a buck converter) and its gate driver supply during the turn OFF
sequence.
When the main switch is turned OFF, the auxiliary switch’s
gate charge is normally carried out thanks to the voltage rise
across the resistor R. An additional contribution comes from the
current flowing through the auxiliary switch’s Miller capacitor
. As a result, the regulation branch’s dynamic response
is increased and the recharge sequence can start shortly after
the main switch’s turn OFF beginning, completing most of the
recharge requirements before the end of the switching transition.
This particular operation has several advantages. First of all,
it improves the dynamic response without increasing the static
OFF state’s power consumption of the polarization branch.
This loosens the operational constraints on the minimum OFF
state duration. Then, it recharges the capacitor tank at
lower power side voltage levels, improving slightly the global
efficiency of the linear regulator. Finally, it simplifies the Fig. 5. Qualitative waveform during the turn OFF sequence (the scales are
integration of the regulator’s polarization branch, because the different for each voltage channel).
dissipating polarization resistor R is no longer necessary, since
its task or function is now performed by the auxiliary transistor
Ta parasitic capacitor . This is possible thanks to the switch’s Drain and Dp will take the place of R (Figs. 1 and
implementation of sensitive auxiliary transistors Ta with a well 3). Its leakage current, under a reverse polarization, will be set
designed parasitic capacitor branch . large enough to satisfy the static OFF state’s operation and small
The Fig. 4 presents a set of simulated time domain wave- enough to minimize the power consumption during the switched
forms illustrating this particular operating mode over several mode operation. This topology modification is very suitable for
switching periods. The models used in the simulator are an- a monolithic integration since this small polarization diode
alytical models based on charge locations [11], which repre- can easily be added to the other silicon elements of the regu-
sent very well the parasitic capacitor behaviors and the non lin- lator [9].
earities of metal oxide semiconductor (MOS) gated transistors This regulator does not anymore operate during the main
such as VD metal oxide semiconductor field effect transistor switch’s OFF state (as it has been presented in the first section
(MOSFET) (models are described in VHDL–AMS from [11] of the paper) but only during its turn OFF switching transitions.
and introduced in a time simulator). Taking advantage of the converter operation and switching
In fact, an another component may take the place of the po- transitions, this regulator has been named “the pulsed linear
larization resistor R in order to enable the static OFF state’s op- regulator.” The following parts of the paper are now going to
eration. A power voltage level diode called Dp will be used for focus on the precise operation description of the pulsed linear
this purpose. The Dp’s cathode will be connected to the main regulator.
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1568 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 3, MAY 2008

Fig. 6. Detailed simulated turn OFF switching waveforms (a) without and (b) with the proposed gate driver powering technique.

B. Precise Operating Principles (6). The voltage across the main switch rises quickly up
In order to understand the operating principle of the pulsed to the nominal voltage . Then, the freewheeling diode D
linear regulator, it is necessary to consider its equivalent dy- of the converter takes over the load current and the
namic circuit, depicted in the Fig. 3, with the assistance of the switching transition ends (7). During this part and until the
time domain waveforms provided in Fig. 4 (qualitative), and main switch turns ON and OFF again, the gate driver is only
Figs. 5 and 6 (simulated). All important phenomena take place powered thanks to the energy stored in the capacitor tank.
at the main switch’s turn OFF. During this turn OFF sequence, the important issues are
The switching sequence begins when the main switch gate the following ones. At the end of the switching transition, the
terminal is grounded (shorted to its source terminal) through a recharge sequence is completed (enough energy must be stored
gate resistor (used to limit the and the ). The main to supply the gate driver during the entire following switching
switch’s gate voltage level starts to decrease, leading to the period). This means that this operating principle reduces the op-
transistor de-saturation (1). This increases slightly the VDS erating range constraints. Besides, when the recharge sequence
voltage across it. When the gate and drain terminal voltages of the capacitor tank takes place, the voltage across the switch
enter in the linear region of the transistor, the voltage is naturally clamped. As a result, a better efficiency of the linear
starts to rise, thanks to the gate current sunk by the gate resistor regulator is obtained. The gate driver power supply operates as
through the Miller capacitor of the main switch (2). This a snubber circuit, picking a part of the switching energy from
positive dv/dt stimulates the pulsed linear regulator and some the main switch and dissipating it in the auxiliary one.
current flows through the auxiliary switch’s Miller capacitor During the main switch’s turn ON sequence, a negative dv/dt
and increases the auxiliary switch’s gate charge . is applied to the regulator. This compels the gate and source
At some point, the transistor Ta starts to conduct some current terminals of the auxiliary switch to be negatively biased. As a
and quickly, a large amount of (or even all of) the power side’s result, none recharge sequence can take place at this switching
load current is fed to the capacitor tank (3), fixed by transition.
the dynamics. During this recharge sequence, the voltage across The following part of this section presents practical wave-
the main switch does not rise and the switching transition is forms in order to validate this particular operating principle and
slowed down or shortly delayed. When the sum of the capacitor the conclusions that have been given.
voltage level plus the forward voltage drop across the
blocking diode plus the auxiliary switch threshold voltage C. Practical Waveforms
reaches the avalanche level of the avalanche A practical implementation has been carried out with discrete
diode , the auxiliary switch starts to regulate the capacitor devices where we take not the slightest notice of the sensitivity
voltage (4). At some point, the auxiliary transistor gate of the auxiliary switch. The Fig. 7(a) presents global switching
voltage level becomes clamped by the avalanche diode patterns for several periods. As it can be seen, the capacitor tank
(5). From now on, the voltages across the auxiliary and main is recharged only at the main switch’s turn OFF. The Fig. 7(b)
switches end rising and the gate driver supply’s voltage level presents more precise turn OFF switching waveforms. These
is clamped at the dynamic avalanche voltage level (avalanche time domain waveforms are in good accordance with the simu-
voltage level plus dynamic resistor voltage drop). Finally, lated ones. This validates the operational description discussed
the auxiliary switch turns OFF and the load current quickly earlier in the paper. Considering the storage capacitor discharge,
flows through the parasitic elements of the two power switches the difference between the Figs. 4 and 7 is the practical gate
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CRÉBIER AND ROUGER: LOSS FREE GATE DRIVER UNIPOLAR POWER SUPPLY 1569

Fig. 7. Practical results [three switching periods on (a) and turn OFF zoom on (b)].

driver’s current consumption: the current consumption of the IV. SPECIFIC OPERATING MODES
implemented gate driver depends on the state of the gate driver.
In the previous part of the paper, it has been shown how the
The computed efficiency of the gate driver pulsed linear reg-
pulsed linear regulator operates and what could be the expected
ulator gives the following elements. In these operating condi-
benefits of this operating principle. In this one, we enter into all
tions, the efficiency of the supply itself is slightly increased up
the details of this operating principle in order to show that in
to 7% (instead of 5%). This value is computed as the ratio be-
some cases, the efficiency of the pulsed linear regulator can be
tween the energy fed for the gate driver powering (1 W) over
even more improved. Then, we will present how the regulator
the total turn OFF losses. Moreover, as it can be seen in the
operates under specific operating conditions such as start up se-
Fig. 7(b), only a portion of the load current is diverted from the
quences or converter discontinuous mode.
main switch to the auxiliary one, acting as a snubber circuit. The
entire turn OFF switching losses are now in the range 13.5 W
A. Loss Free Improved Operating Principle
(almost entirely dissipated in the auxiliary branch). In this aux-
iliary branch, 1 W corresponds to the energy saved and quickly A gate driver supply loss free operating mode has been iden-
stored in capacitor and then used to supply the driver. tified when operating with the proposed solution. The only as-
If the converter gate driver were supplied thanks to an external sumption that needs to be added to the previous approach is
power supply and under the same operating conditions, the turn that the main transistor is driven with current levels that are
OFF switching losses would be around 11.8 W (measured but reasonable sections of the nominal currents (1/10 or 2/10 for
not depicted on a converter delivering 280 W). This means that example). This assumption clearly signifies that the switching
the auxiliary branch’s operation increases the global turn OFF speed is voluntary reduced (this will keep or in
switching losses while recharging the gate driver storage capac- reasonable scale in the view of limiting the EMI or switching
itor. Looking at the efficiency of the auxiliary branch and taking cell parasitic effects of diode recovery current magnitudes and
into account the increase of the switching losses and the energy durations). It also signifies that larger switching losses can be
stored at every switching cycle, the added and lost power losses expected. This is for example often the case in large power con-
are in the range of 1.7 W (total turn OFF losses (14.5 W) minus verters but also in low power converters where the transistors
regular turn OFF losses (11.8 W) minus power stored in ca- switches too fast, requiring the use of snubber circuits or re-
pacitor (1 W). In such a case, the efficiency of the pulsed duced gate driver speed [12].
linear regulator is around 37% [power stored in capacitor In this case, there is a large part of the switching losses that is
over Extra turn OFF power losses (14.5 11.8 2.7W)]. added to the transistor (dissipated either by the switch through
For all computation, a numerical product and an integration the snubber or within the switch through the channel—repre-
is applied on time domain waverforms based on the following sented by the current source in Fig. 3) and that does not
participate in the switching transitions (charges and discharges
equation: .
of parasitic capacitors). In this case, it can be shown that the
For low power gate driver consumption applications, it can be pulsed linear regulator can be set to recycle parts of these useless
seen that this powering solution does not add a large amount of switching losses, operating as a snubber-like circuit and using
power losses. Besides, the auxiliary branch helps relaxing the them to supply the gate driver of the switch. Then, without any
thermal stress on main power switches. The following section modification of the switching waveforms, a part (more or less
is going to investigate deeper these issues as well as over ones, important) of the load current ILOAD is derived from the main
important to fully present how this powering technique is suit- power switch to feed the pulsed linear regulator. Simulated re-
able for many power applications. sults are presented in Figs. 8 and 9 from here on.
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1570 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 3, MAY 2008

Fig. 8. Simulated results showing the switching transition of the main switch (a) without and (b) with the loss free pulsed linear regulator (Rg = 20 ).

Fig. 9. Practical turn OFF switching waveforms (a) without and (b) with a loss free operation of the pulsed linear regulator. (c) Overlay for effective comparisons.
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CRÉBIER AND ROUGER: LOSS FREE GATE DRIVER UNIPOLAR POWER SUPPLY 1571

Fig. 10. Simulated and estimated instantaneous turn OFF switching losses (a) without and (b) with the presented gate driver powering technique.

Fig. 11. Fast start up sequence for the pulsed linear regulator (plot b) is a zoom of (plot a).

As it can be seen, a part of the main switch current is di- Since a best gate driver supply’s operation is obtained when
verted from the main switch into the capacitor tank and this it is made sensitive to a positive dv/dt, special care must be paid
is carried out at the same switching speed and waveforms. As a to identify and to ensure that the converter will be operational
result and from a global point of view, the power losses of the no matter what the operating conditions are.
converter are not changed, and the global efficiency of the con-
verter may even be considered to be slightly improved because B. Self Supplied Start Up Sequences
an external power supply is no longer required to supply the gate As it has been underlined earlier in this paper, the start up
drivers of the converters. From another point of view, it can be sequence is an important issue. Two important case studies must
said that the pulsed linear regulator is a loss free power supply be addressed: when the power is applied to the converter while
technique for gate drivers, acting at the same time as a snubber its gate drivers are not powered (making the power switch being
circuit for the main power switch [13]. uncontrolled), and when the power source has been applied to
Fig. 9 presents practical results of this particular operation. the converter for enough time while it was not driven.
In order to validate correctly our aim, precise efficiency mea- In the first case, there is obviously the risk that when the
surements should be carried out. However, the differences are power is applied to the converter, the gate drivers are not pow-
so small compared to the converter global efficiency levels that ered enough to maintain the main power switches in their OFF
we were not able to furnish satisfactory practical results. How- states. In some cases, this can induce a short-circuit before the
ever, looking at switching transitions time domain waveforms, gate drivers take over and control the gate terminal of the power
we can see that there are no significant changes with and without switches. A practical test has been carried out in order to inves-
the implementation of the gate driver supply. As a result, we can tigate the start up sequence’s operation in a buck converter. This
state that the pulsed linear regulator doesn’t add “visible” losses is illustrated in Fig. 11.
to the converter. Fig. 10 gives a theoretical estimate of the turn Depending how the voltage source is connected and applied
OFF switching losses with (plot b) and without (plot a) the pre- to the converter (in terms of ), the capacitor tank’s first
sented gate driver powering technique. charge sequence will take place very quickly (as depicted in
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1572 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 23, NO. 3, MAY 2008

Fig. 11) or, it will follow the rise of the dc source. In all case,
the important thing is that since the gate driver supply is more
sensitive to positive dv/dt than the main power switch, the auxil-
iary branch will take over quickly and before the voltage across
the switch has increased too much. This is exactly in accordance
with the pulsed linear mode’s optimal operation, making the so-
lution fully naturally protected against hard power source con-
nections.
In the second case, no (or no large enough ) has
appeared across the switches to excite the gate driver power sup-
plies and to start a switching operation. As a result, there is a
need for a static OFF state gate driver powering. This is achieved
thanks to the leakage current of a polarization diode DP imple-
mented instead of the polarization resistor R (replacement of R
in Fig. 1 and 3, with the Dp’s cathode connected to the main
switch’s Drain). The leakage current of this high voltage diode Fig. 12. Practical waveforms of the converter operating in discontinuous mode.
is set large enough to guarantee a correct static polarization of
the avalanche diode and it is kept small enough to minimize
the power consumption of the gate driver polarization branch. main switch to drive. Permanent ON operation is also possible
Fast dynamic responses are obtained as presented earlier while thanks to capacitor charge monitoring and periodical short and
the dc operation is guarantied by the small polarization diode. small de-saturation of the main power switch [14]. Thanks to
Of course, in this particular operating mode, the linear regulator this additional functionality, the gate driver supply become a
does not operate in the pulsed mode and the efficiency of the fully generic, stand alone function, able to act on the power con-
gate driver supply is greatly reduced, making this solution, not verter in case of a non satisfactory capacitor tank charge
always well suitable for a long term non operation (even when level. This issue is interesting compared to the conventional
the converter is not operating, the gate driver power consump- bootstrap technique [3], [5] where it is not possible to act on the
tion is quite reduced). converter in order to enable or to initiate a recharge sequence
if necessary without some additional techniques [4]. Finally,
C. Converter Continuous Versus Discontinuous Operating the capacitor voltage level is not well regulated. As a re-
Modes sult, if necessary, a voltage regulator may have to be cascaded.
In continuous operating mode, the voltage waveforms ap- As it can be seen, the substitution of classical, high side power
plied to the power switch are well known and corresponds to switch gate driver power supply with our technique, may require
the duty-cycle one times power voltage levels. In the discontin- to use more complex gate drivers with monitoring, inverter and
uous mode operation, the current in the freewheeling diode will regulator functions. However, these functions are simple to im-
fall down to zero before the end of the switching period. In such plement and could easily be implemented in an integrated cir-
a case, the voltage across the switch sets in a specific manner, cuit (IC) or application-specific integrated circuit (ASIC) if this
greatly a function of switching cell parasitic elements, up to the powering technique would become widely used [15].
difference between input and output voltage levels. Since our
new powering technique is only sensitive to a turn OFF positive V. MONOLITHIC INTEGRATION OF THE IMPROVED SOLUTION
dv/dt across the main power switch, it doesn’t matter what hap- Thanks to the previous comments and investigations, it can be
pens to it after the turn OFF and until the next turn OFF. This said that this powering technique can become a good candidate
clearly widens its generic and stable operating mode no matter for most of power applications. This last section shortly presents
what are the converter operating ones. This specific issue has how this power supply can be monolithically integrated next to
been investigated in practice and results are depicted in the fol- the power switch itself in a simple manner, leading to a cost
lowing picture, Fig. 12. As it can be seen, there are no differ- effective and simple to implement solution. All needed elements
ences on the power technique behavior, no matter the converter are, the small power devices (a transistor and a diode) rated at the
operates in continuous or discontinuous modes. This makes the main switch’s power voltage level , the two low voltage
powering technique unaffected by the load type, R, LR, or LCR level diodes with identical voltage characteristics (one
types. for the avalanche and one for current blocking purposes) and the
storage capacitor.
D. Comments Considering MOS gated transistors such as VD or Trench
Several comments can be added to these specific investigated MOSFETs or insulated gate bipolar transistors (IGBTs), the
issues. First of all, the gate driver supply is an unipolar voltage power components (Ta and Dp), and the main power switch to be
source. In some case, it is desirable to implement a bipolar gate driven, share the same constraints at the same time. As a result,
driver. This operational characteristic can be obtained with the they can be all integrated in the same power die and even within
implementation of a small gate driver inverter or a switched the same voltage terminations [9], [16]. This leads to an optimal
mode capacitor converter, making possible the application of silicon surface use and a simpler implementation. In addition, in
positive and negative voltage levels to the gate terminal of the most cases, the low voltage level diodes can be implemented in
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CRÉBIER AND ROUGER: LOSS FREE GATE DRIVER UNIPOLAR POWER SUPPLY 1573

[6] G. F. W. Khoo, D. R. H. Carter, and R. A. McMahon, “Analysis of

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[8] “Power MOSFET Designer’s Manual,” International Rectifier, 1993,
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[10] R. Mitova et al., “Gate Driver Supply of Power Switches Without Gal-
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[11] L. Aubard, G. Verneau, J.-C. Crébier, and C. Schaeffer, “Power Mosfet
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[15] L. Dulau, S. Pontarollo, A. Boimond, J.-F. Garnier, N. Giraudo, and O.
It is out of the scoop of this paper to deeply detail the par- Terrasse, “A new gate driver integrated circuit for IGBT devices with
ticular technological issues related to this integration but it was advanced protections,” IEEE Trans. Power Electron., vol. 21, no. 1, pp.
important to present that this gate driver powering solution can 38–44, Jan. 2006.
[16] N. Rouger et al., “Simulation, Design and Testing of Integrated Power
be integrated and is simple to implement. Supply for Insulated Gate Transistors,” in Proc. IEEE ISPSD’06,
Napoli, Italy, Jun. 2006, pp. 4–8.
VI. CONCLUSION
In this paper, a simple and improved gate driver supply for
low side and high side power switches has been presented. This
powering technique takes advantage of the converter switching Jean-Christophe Crébier received the B.S. degree
patterns to maximize its performances in terms of dynamics, op- in electrical engineering and the Ph.D. degree in
power electronics, EMC, modeling and analysis, and
erating range, and efficiency. The topology of this power supply power factor correction from the Institut National
is simple to implement and can even be integrated within the Polytechnique de Grenoble, Grenoble, France, in
power switch to drive, leading to a cost effective solution. All 1995 and 1999, respectively.
In 1999, he was working as a Post-Doc student
specific operating modes are investigated to outline how the gate with the Center for Power Electronics Systems
driver power supply operates and how satisfactory characteris- (CPES), Blacksburg, VA, doing research in system
integration and EMI. After one year as a Faculty Re-
tics can be guaranteed. The following work consists now into the searcher at the Universite Joseph Fourier, Grenoble,
monolithic integration of this topology next to a power switch in he was hired by the National Center for Scientific Research (CNRS), Grenoble,
order to minimize inductive paths and in order to fully optimize as a Full Time Researcher in power electronics. His research fields are system
integration, silicon integrated components, and packaging.
the gate driver supply characteristics.
REFERENCES
[1] C. R. Sullivan et al., “Design of microfabricated transformers and
inductors for high frequency power conversion,” IEEE Trans. Power
Electron., vol. 11, no. 2, pp. 228–238, Mar. 1996. Nicolas Rouger was born in Marseille, France,
[2] D. Vasic, F. Costa, and E. Sarraute, “Piezoelectric transformer for inte- in 1981. He received the M.S. degree in electrical
grated MOSFET and IGBT gate driver,” IEEE Trans. Power Electron., engineering from the Institut National Polytechnique
vol. 21, no. 1, pp. 56–65, Jan. 2006. de Grenoble, Grenoble, France and is currently
[3] I. Zverrev et al., “Comparison of state of the art gate drive techniques pursuing the Ph.D. degree in monolithic integration
for high side switch,” in Proc. EPE’97, Trondheim, Norway, 1997, pp. of advanced functions for power switches at the
4.250–4.255. Grenoble Electrical Engineering Lab, Grenoble,
[4] S. Park and T. M. Jahns, “A self-boost charge pump topology for a gate France.
drive high-side power supply,” IEEE Trans. Power Electron., vol. 20, He also became a Teacher in electrical engi-
no. 2, pp. 300–307, Mar. 2005. neering, after the National Agrégation Examination
[5] C. Klumpner, P. Nielsen, I. Boldea, and F. Blaabjerg, “New solutions (high school and university Teacher in power elec-
for a low-cost power electronic building block for matrix converters,” tronics). His main research interests are in power devices and monolithic
IEEE Trans. Ind. Electron., vol. 49, no. 2, pp. 336–344, Apr. 2002. integration.

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