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Pdclab 5

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14 views11 pages

Pdclab 5

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210316
Copyright
© © All Rights Reserved
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AIR UNIVERSITY

DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING

EXPERIMENT NO. 5

Lab Title: Introduction to Parallel Programming with CudaC: Exploring CUDA C programming 2D
operations

Student Name: M.Bilal Ijaz, Agha Ammar Khan Reg. No:210316,210300

Objective: Implement and analyze various 2D array/matrix operations in CUDAC

LAB ASSESSMENT:

Attributes Excellent Good Average Satisfactory Unsatisfactory

(5) (4) (3) (2) (1)

Ability to Conduct
Experiment

Ability to assimilate the


results

Effective use of lab


equipment and follows the
lab safety rules

Total Marks: Obtained Marks:

LAB REPORT ASSESSMENT:

Attributes Excellent Good Average Satisfactory Unsatisfactory

(5) (4) (3) (2) (1)

Data Presentation

Experiment Results

Conclusion

Total Marks: Obtained Marks:

Date: 23/10/2024 Signature:


LAB#05
TITLE: Exploring CUDA C programming: 2D operations

Objective:
• Implement and analyze various 2D array/matrix operations in CUDAC

Introduction:
The aim of this lab was to explore parallel computing techniques by implementing basic
2Dmatrix operations using CUDA C. These operations include matrix addition, matrix
multiplication, matrix transposition, and scalar multiplication. CUDA (Compute Unified Device
Architecture) provides a platform for parallel computing on NVIDIA GPUs, allowing developers
to write code that exploits data-level parallelism for large datasets, such as 2D matrices.

The primary objective of this lab is to:


• Understand how to allocate and transfer memory between host (CPU) and device
(GPU).
• Use CUDA kernels to implement matrix operations using thread blocks.
• Optimize the design for thread allocation and workload distribution for 2D matrices.

This lab demonstrates the concepts of:


1. Grid and block structure for managing threads.
2. Memory handling between host and device.
3. Synchronization of threads in GPU to ensure correct computation.

Experiment Setup:
• Software: CUDA toolkit, NVIDIA CUDA Compiler (NVCC), C/C++ for code
implementation.
• Hardware: A machine with an NVIDIA GPU compatible with CUDA.
Lab Tasks:

Task1:

Code and Output:


Task2:

Code and Output:


Task3:
Code and Output:
Task4:

Code and Output:


Conclusion:
In this lab, we successfully implemented and analyzed various 2D array/matrix operations
using CUDA C. Through hands-on coding exercises, we explored the fundamental principles of
parallel programming and the power of CUDA to enhance computation speed by leveraging
the GPU. We implemented matrix operations, such as zero-padding, while learning how to
structure CUDA kernels, manage memory allocation between host and device, and optimize
thread and block configurations for efficient parallel execution. The lab provided a practical
understanding of parallel processing, showcasing its significant performance advantages in
matrix computations over traditional serial approaches.

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