Ae Lab Final 2023-24-1
Ae Lab Final 2023-24-1
ENGINEERING
OBSERVATION MANUAL
FOR
Roll No :
Academic Year 20 – 20
"To evolve into a centre of excellence in Science & Technology through creative and innovative
practices in teaching-learning, promoting academic achievement & research excellence to
produce internationally accepted competitive and world class professionals who are
psychologically strong and emotionally balanced imbued with social consciousness and ethical
values.
MISSION
"To provide high quality academic programs, training activities, research facilities and
opportunities supported by continuous industry - institute interaction aimed at employability,
entrepreneurship, leadership and research aptitude among students and contribute to the
economic and technological development of the region, state and nation."
DEPARTMENT LEVEL
VISION
MISSION
PEO I: Graduate shall be able to apply fundamentals of science in emerging areas of Electrical and
Electronics Engineering, research, employability and handle the realistic problems with ethical values.
PEO2: Graduate of Electrical and Electronics Engineering shall have communication skills, sense of
responsibility to serve the society and protect the environment
PEO3: Graduate shall have habit of innovative thinking to pursue career in core areas of electrical and
electronics engineering.
PEO4: The graduates shall have strong foundation in academics, managerial skill, leadership qualities
and to be industry ready professionals with updated technologies and soft skill.
PSO I: Ability to identify, formulate, design and investigate the solution for complex engineering
problems by applying knowledge acquired from electric circuits, electronic circuits, digital
electronics, control systems, electrical machines, power semi-conductor drives and Power systems.
PSO II: Apply modern engineering hardware, software tools and project management techniques
to design, develop and implement electrical, electronics and allied multi-disciplinary projects to
meet the demands of industry and to provide solutions to the real time engineering problems.
PSO III: To inculcate professional ethics, team work and entrepreneurial thinking to address
societal electrical issues with advanced engineering solution techniques.
Programme Outcomes
Course Objectives:
To introduce components such as diodes, BJTs and FETs their switching characteristics,
applications
Learn the concepts of high frequency analysis of transistors.
To give understanding of various types of basic and feedback amplifier circuits such as small
signal, cascaded, large signal and tuned amplifiers.
To introduce the basic building blocks of linear integrated circuits.
To introduce the concepts of waveform generation and introduce some special function ICs.
Course Outcomes:
At the end of this course, students will demonstrate the ability to
Know the characteristics, utilization of various components.
Understand the biasing techniques
Design and analyze various rectifiers, small signal amplifier circuits.
Design sinusoidal and non-sinusoidal oscillators.
Design OP-AMP based circuits with linear integrated circuits
CO – PO Mapping
List of Experiments
1 Draw the V-I Characteristics of given PN Junction Diode. Determine the static and
Dynamic Resistance of the Diode
2 Determine the Ripple factor. % of Regulation PIV and TUF of the given Rectifier With
& Without Filters
3 Obtain the I/O Characteristics of CE Configuration of BJT. Calculate H-Parameters from
Characteristics
4 Obtain the I/O Characteristics of CB Configuration of BJT. Calculate H-Parameters from
Characteristics
5 Obtain the I/O Characteristics of CC Configuration of BJT. Calculate H-Parameters from
Characteristics
6 Obtain the Drain and transfer characteristics of CD, CS configuration of JFET. Calculate
the gm, rd from the characteristics
7 Inverting And Non-Inverting Amplifiers Using Op Amps.
8 Adder And Subtractor Using Op Amp.
9 Integrator Circuit Using IC 741.
10 Differentiator Circuit Using Op Amp.
11 Current Shunt Feedback Amplifier
12 Design of RC Phase Shift Oscillator circuit and derive the gain condition for oscillations
practically for given frequency
13 Design Colpitts’s Oscillators for the given frequency and draw the output waveforms
14 Design transformer coupled Class A Power Amplifier and draw the input and output
waveforms, find efficiency
INDEX
S. Page Signature
Name of the Experiment Remarks
No. Nos.
Draw the V-I Characteristics of given PN Junction
1 Diode. Determine the static and Dynamic Resistance
of the Diode
Determine the Ripple factor. % of Regulation PIV and
2
TUF of the given Rectifier With & Without Filters
APPARATUS:
1. P-NDiode1N4007 -1No.
2. Regulated Power supply(0-30V) -1No.
3. Resistor1KΩ -1No.
4. Ammeter(0-200mA) -1No.
5. Ammeter(0-200µA) -1No.
6. Voltmeter(0-20V) -2No.
7. Breadboard
8. Connecting wires
THEORY:
A p-n junction diode conducts only in one direction. The V-I characteristics of the diode are
curve between voltage across the diode and current flowing through the diode. When external
voltage is zero, circuit is open and the potential barrier does not allow the current to flow.
Therefore, the circuit current is zero. When P-type (Anode) is connected to Positive terminal
and n- type (cathode) is connected to Negative terminal of the supply voltage is known as
forward bias. The potential barrier is reduced when diode is in the forward biased condition.
At some forward voltage, the potential barrier altogether eliminated and current starts
flowing through the diode and also in the circuit. Then diode is said to be in ON state. The
current increases with increasing forward voltage.
When N-type (cathode) is connected to Positive terminal and
P- type (Anode) is connected to Negative terminal of the supply voltage is
known as reverse bias and the potential barrier across the junction increases.
Therefore, the junction resistance becomes very high and a very small current
(reverse saturation current) flows in the circuit. Then diode is said to be in
OFF state. The reverse bias current is due to minority charge carriers.
CIRCUIT DIAGRAM:
FORWARD BIAS
REVERSE BIAS:
MODEL GRAPH:
PROCEDURE:
A) FORWARD BIAS:
B) REVERSE BIAS:
OBSERVATIONS:
FORWARD BIAS:
Sl. No. Applied Voltage(V) Forward Voltage (VF)V Forward Current (IF)mA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
REVERSE BIAS
PRECAUTIONS:
CALCULATIONS:
In Forward bias condition:
Static Resistance Rs = Vf / If =
RESULT:
AIM:
To examine the input and output waveforms of Full Wave Rectifier and also
calculate its load regulation and ripple factor.
1. With Filter
2. Without Filter
APPARATUS:
Digital millimeter - 1No.
Transformer (6V-0-6V) - 1No.
Diode 1N4007 - 2No.
Capacitor 100μf/470μf - 1No.
Decade Resistance Box - 1No.
Breadboard
CRO and CRO probes
Connecting wires
THEORY:
A Full Wave Rectifier is a circuit, which converts an ac voltage into a pulsating dc voltage using
both half cycles of the applied ac voltage. It uses two diodes of which one conducts during one
half cycle while the other conducts during the other half cycle of the applied ac voltage.
The output voltage across the resistor R is the pharos sum of the two waveforms, it is also known
as a bi-phase circuit. The spaces between each half-wave developed by each diode are now being
filled in by the other. The average DC output voltage across the load resistor is now double that of
the single half-wave rectifier circuit and is about 0.637Vmax of the peak voltage by assuming no
losses. VMAX is the maximum peak value in one half of the secondary winding and VRMS is the
rms value.
CIRCUIT DIAGRAM:
PROCEDURE:
1. Connections are made as per the circuit diagram.
2. Connect the ac mains to the primary side of the transformer and the secondary
side to the rectifier.
3. Measure the ac voltage at the input side of the rectifier.
4. Measure both ac and dc voltages at the output side of the rectifier.
5. Find the theoretical value of the dc voltage by using the formula Vdc=2Vm/П
6. Connect the filter capacitor across the load resistor and measure the values of
Vac and Vdc at the output.
7. The theoretical values of Ripple factors with and without capacitor are
calculated.
8. From the values of Vac and Vdc practical values of Ripple factors are
calculated. The practical values are compared with theoretical values.
THEORITICAL CALCULATIONS:
Vrms = Vm/ √2 Vm
=Vrms√2
Vdc=2Vm/П
With out filter:
With filter:
Ripple factor, r = 1/ (4√3 f C RL)
MODEL WAVEFORMS:
INPUT WAVEFORM
PRECAUTIONS:
1. The primary and secondary side of the transformer should be carefully identified.
2. The polarities of all the diodes should be carefully identified.
RESULT:
COMPONENTS REQUIRED:
2. Resistor 1K Ω 2No’s
EQUIPMENT REQUIRED:
5. Connecting wires
CIRCUIT DIAGRAM:
INPUT CHARACTERISTICS:
OUTPUT CHARACTERISTICS:
THEORY:
In the common Base configuration input is applied between emitter and base,
similarly output is t a k e n f r o m collector and b a s e . Here base of the transistor is
common to both input and output circuits and hence the name common base
configuration.
Input characteristics are similar to forward bias characteristics of a P-N junction diode.
The curve shifts left wi t h increase i n V C B value. Output characteristics can be obtained
by varying the outpu t voltage and noting the outpu t current. The characteristics have
been divided in to three regions namely active, saturation and cut off region. But BJT
has low input resistance and high output resistance in Common Base configuration.
PROCEDURE:
INPUT CHARACTERISTICS:
2. For obtaining input characteristics, output voltage VCB is kept constant at 0V and
for different values of VEE (supply voltage) note the corresponding values of IE
TABULAR FORM:
OUTPUT CHARACTERISTICS:
3. Repeat above procedure(step 2) for different values of I E at 10mA, 20mA and 30mA
TABULAR FORM
EXPECTED GRAPH:
1.Input resistance: To obtain input resistance find VEB and IE for a constant VCB on one of
the input characteristics.
2.Output resistance: To obtain output resistance find Ic and VCB at constant IE.
3.Current Gain
INFERENCE:
1. Input resistance is in the order of tens of ohms since emitter-base junction is forward
biased.
2. Output resistance is in the order of hundreds of kilo-ohms since collector-base junction
is reverse biased.
3. Higher is the value of VCB, smaller is the cut in voltage.
4. Increase in the value of IB causes saturation of transistor at small voltages.
PRECAUTIONS:
1. Identify the three terminals of the transistor emitter, base and collector.
2. While doing the experiment do not exceed the ratings of the transistor. This may lead to
damage of the transistor.
3. Connect voltmeter and Ammeter in correct polarities as shown in the circuit diagram.
4. Do not switch ON the power supply unless you have checked the circuit connections as per
the circuit diagram.
RESULT: Input and Output characteristics of transistor in CB configuration have been plotted
and from the characteristics input and output resistances were calculated .
1. Define transistor and mention types of transistors. Draw their symbolic diagram and
indicate terminals?
2. What are the three configurations of Transistor?
CE configuration
2. To find β of the given transistor and also its input and output Resistances
COMPONENTS REQUIRED:
EQUIPMENT REQUIRED:
THEORY:
In common emitter configuration, input voltage is applied between base and emitter
terminals and output is taken across the collector and emitter terminals. Therefore the emitter
terminal is common to both input and output.
The input characteristics of CE configuration resemble that of a forward biased diode curve,
since the Base-Emitter junction of the transistor is forward biased. As compared to CB
configuration, input current IB increases less rapidly with input voltage VBE. Therefore input
resistance of CE circuit is higher than that of CB circuit.
The output characteristics are drawn between Ic and VCE at constant IB. Collector current
varies with VCE up to few volts only. After this the collector current becomes almost constant,
and independent of VCE. The value of VCE up to which the collector current changes with V CE is
known as Knee voltage. The transistor always operated in the region above Knee voltage, IC is
always constant and is approximately equal to IB
β = ΔIC/ΔIB
CIRCUIT DIAGRAM:
INPUT CHARACTERISTICS:
OUTPUT CHARACTERISTICS:
PROCEDURE:
INPUT CHARECTERSTICS:
IB and VBE.
3. Repeat the step 2 by keeping VCE constant at 2V and 4V and tabulate all the readings.
4. Plot the graph between VBE and IB for constant VCE.
OUTPUT CHARACTERSTICS:
OBSERVATIONS:
INPUT CHARACTERISTICS:
OUTPUT CHAREACTARISTICS:
EXPECTED GRAPHS:
1. Input resistance: To obtain input resistance find VBE and IB at constant VCE on one of
the input characteristics.
Ri = VBE / IB (VCE constant)
Inference:
Precautions:
1. Identify the three terminals of the transistor emitter, base and collector.
2. While doing the experiment do not exceed the ratings of the transistor. This may lead to
damage of the transistor.
3. Connect voltmeter and Ammeter in correct polarities as shown in the circuit diagram.
4. Do not switch ON the power supply unless the circuit connections are made as per the
circuit diagram
Result: Input and Output characteristics of transistor in CE configuration have been plotted
and from the characteristics input resistance , output resistances and current gain
were calculated .
VIVA QUESTIONS:
AIM: To study and plot the family of Drain Characteristics and Transfer Characteristics of the
given FET
REQUIRED COMPONENTS:
JFET BFW11 1
Resistor 100 1
560 1
EQUIPMENT:
Digital Ammeter
SPECIFICATIONS:
THEORY:
assignment of FET:
Source Drain
Gate
Substrate
Field –effect transistors can be divided into two general types : JFET(junction Field Effect
Transistor) and MOSFET( Metal Oxide Semiconductor FET) or IGFET( Insulated Gate FET).
The three terminals of a FET are called Gate, Source and Drain. Depending on the type of
substrate chosen for fabrication, the FET is classified as N- channel or P- channel FET. FET is a
voltage controlled device and they are unipolar.
If a battery is connected with its positive terminal to the drain and negative terminal to the
source of the n-channel FET, current flows just as it flows in a semiconductor bar. If the drain
voltage is varied, the current magnitude changes. Now, we connect a voltage V GG to the Gate
terminal to reverse bias it. As the drain voltage is increased the drain side of the PN junction
between gate and channel will be more reverse biased than at the source end. As the channel is
lightly doped compared to the gate material under this reverse bias the depletion region is
penetrated more into the channel region and is more pronounced on drain side and so channel
width is not uniform. Because of this non uniformity in the channel the current starts reducing and
reaches saturation when the drain voltage is sufficient to produce enough reverse bias voltage to
keep the saturation current. If the voltage is increased further to higher values than this, then
avalanche breakdown takes place and current increases rapidly for little variation in the drain
voltage.
CIRCUIT DIAGRAM:
D ID (0–200mA) 560
100
G BFW11
VDD
(0-30V)
PROCEDURE:
DRAIN CHARACTERISTICS
TRANSFER CHARACTERISTICS:
OBSERVATIONS:
DRAIN CHARACTERISTICS
TRANSFER CHARACTERISTICS
VDS = 2V VDS = 4V
EXPECTED GRAPH:
1. Plot the drain characteristics by taking VDS on X-axis and ID on Y-axis at constant VGS.
2. Plot the Transfer characteristics by taking VGS on X-axis and ID on Y-axis at constant VDS.
It is given by the ratio of small change in drain to source voltage (VDS) to the corresponding
change in Drain current (ID) for a constant gate to source voltage (VGS), when the JFET is
operating in pinch-off or saturation region.
Trans-Conductance (gm) :
Ratio of small change in drain current (ID) to the corresponding change in gate to source voltage
(VGS) for a constant VDS.gm = ID / VGS at constant VDS . (from transfer characteristics)The
value of gm is expressed in mho’s or siemens (s).
Amplification Factor () :
It is given by the ratio of small change in drain to source voltage (VDS) to the corresponding
change in gate to source voltage (VGS) for a constant drain current.
= VDS / VGS.
= rd X gm.
INFERENCE:
1. As the gate to source voltage (VGS) is increased above zero, pinch off voltage is increased at a
smaller value of drain current as compared to that when VGS =0 V
2. The value of drain to source voltage (VDS) is decreased as compared to that when VGS =0 V
PRECAUTIONS:
1. While doing the experiment do not exceed the ratings of the FET. This may lead to
damage the FET.
2. Connect voltmeter and Ammeter in correct polarities as shown in the circuit diagram.
3. Do not switch ON the power supply unless you have checked the circuit connections as
per the circuit diagram.
4. Make sure while selecting the Source, Drain and Gate terminals of the FET.
RESULT:
REASONING QUESTIONS
AIM: To design and setup an inverting amplifier and mob- inverting amplifier circuit with OP
AMP 741C for a gain of 10, plot the waveforms, observe the phase reversal, measure the gain.
APPARATUS:
CIRCUIT DIAGRAM:
THEORY:
INVERTING AMPLIFIER:
Ii = If
That is Vin/Ri = - Vo
- Rf/ Ri,
Here the –Ve sign indicates that the output will be an amplified wave with
1800 phase shift (inverted output). By varying the Rf or Ri, the gain of the amplifier
can be varied to any desired value.
Av = Vo / Vin = 1+ Rf/ Ri ,
Here the +Ve sign indicates that the output will be an amplified wave in
phase with the input. By varying the Rf or Ri, the gain of the amplifier can be varied
to any desired value.
PROCEDURE:
OBSERVATIONS:
Inverting amplifier:
In put
Out put
In put
Out put
RESULT:
AIM: To design and setup a summing amplifier circuit with OP AMP 741C for a gain of 2 and
verify the output.
APPARATUS:
THEORY:
ADDER:
Op-amp can be used to design a circuit whose output is the sum of several input signals.
Such a circuit is called a summing amplifier or an adder. Summing amplifier can be classified
as inverting & non-inverting summer depending on the input applied to inverting & non-
inverting terminals respectively. Circuit Diagram shows an inverting summing amplifier with 2
inputs. Here the output will be amplified version of the sum of the two input voltages with 1800
phase reversal.
Vo = - ( Rf/ Ri )(V1+V2)
SUBTRACTOR:
A difference amplifier is a circuit that gives the amplified version of the difference of the
two inputs, Vo =A(V1-V2), Where V1 and V2 are the inputs and A is the voltage gain.
Here input voltage V1 is connected to non-inverting terminal and V2 to the inverting terminal.
This is also called as differential amplifier. Output of a differential amplifier can be determined
using super position theorem. When V1=0, the circuit becomes an inverting amplifier with input
V2 and the resulting output is V02= -Rf /Ri (V2). When V2=0, the circuit become a non-inverting
amplifier with input V1 and the resulting output is V01= Rf/Ri(V1).
OBSERVATIONS:
Adder:
v1(v) V2(v) V0(v)
Subtractor:
CIRCUIT DIAGRAM:
Fig: Adder
Fig: Subtractor
PROCEDURE:
RESULT:
AIM: To design and setup an integrator circuit using OP AMP 741C and plot its pulse
response.
APPARATUS:
THEORY:
CIRCUIT DIAGRAM:
Fig: integrator
OBSERVATIONS:
Amplitude(V) Time
Period(Msec)
Input
Output
Amplitude(V) Time
Period(Msec)
In Put
Out Put
PROCEDURE:
Result:
AIM: To design and setup a Differentiator circuit using OP AMP 741C and plot their pulse response.
APPARATUS:
CIRCUIT DIAGRAM:
Fig: differentiator
THEORY:
PROCEDURE:
OBSERVATIONS:
In put
Out put
In put
Out put
Result:
AIM:
APPARATUS REQUIRED:
THEORY:
Feedback plays a very important role in electronic circuits and the basic parameters,
such as input impedance, output impedance, current and voltage gain and bandwidth, may
be altered considerably by the use of feedback for a given amplifier.
A portion of the output signal is taken from the output of the amplifier and is
combined with the normal input signal and thereby the feedback is accomplished.
There are two types of feedback. They are i) Positive feedback and ii) Negative
feedback. Negative feedback helps to increase the bandwidth, decrease gain, distortion, and
noise, modify input and output resistances as desired.
A current shunt feedback amplifier circuit is illustrated in the figure. It is called a
series-derived, shunt-fed feedback. The shunt connection at the input reduces the input
resistance and the series connection at the output increases the output resistance. This is a
true current amplifier.
PROCEDURE:
2. Keep the input voltage constant at 20mV peak-peak and 1 kHz frequency. For different values of
load resistance, note down the output voltage and calculate the gain by using the expression
𝑨𝑽=𝟐𝟎𝒍𝒐𝒈(𝒗𝒐𝒖𝒕/𝒗𝒊𝒏)
3. Add the emitter bypass capacitor and repeat step 2. And observe the effect of feedback on the gain of
the amplifier.
4. For plotting the frequency the input voltage is kept constant at 20mV peak-peak and the frequency is
varied from 100Hz to 1MHz.
5. Note down the value of output voltage for each frequency. All the readings are tabulated and the
voltage gain in dB is calculated by using expression
𝑨𝑽=𝟐𝟎𝒍𝒐𝒈(𝒗𝒐𝒖𝒕/𝒗𝒊𝒏)
6. A graph is drawn by taking frequency on X-axis and gain on Y-axis on semi log graph sheet.
7. The bandwidth of the amplifier is calculated from the graph using the expression Bandwidth.
B.W=f2-f1
Where f1 is lower cut-off frequency, f2 is upper cut-off frequency.
8. The gain-bandwidth product of the amplifier is calculated by using the expression.
Gain-Bandwidth Product=(3-dB mid band gain)×(Bandwidth).
CIRCUIT DIAGRAM:
WITHOUT FEEDBACK
WITH FEEDBACK
TABULAR FORM:
V(in)=20mv
20
50
100
1K
10K
100K
200K,500K
1M
MODEL GRAPH:
APPARATUS REQUIRED:
1 Transistor BC107BP 2
4 Capacitors 100μF 1
5 Capacitor 1nF 3
6 CRO 0-20MHZ
7 RPS (0 – 30V) 1
8 Bread
Board 1
9 Connecting Required
wires
THEORY:
is return to the input of the amplifier. The values of R and C are chosen such that the phase
shift of each RC section is 60º.Thus The RC ladder network produces a total phase shift of
180º between its input and output voltage for the given frequency. Since CE Amplifier
produces 180 º phases shift. The total phase shift from the base of the transistor around the
circuit and back to the base will be exactly 360º or 0º. This satisfies the Barkhausen condition
for sustaining oscillations and total loop gain of this circuit is greater than or equal to 1, this
condition used to generate the sinusoidal oscillations.
MODEL GRAPH:
CIRCUIT DIAGRAM:
PROCEDURE:
1. Identify the pin details of BC107 Transistor (or equivalent silicon Transistor such as
BC108/547) and test it using a millimeter. Set up the circuit on breadboard as shown in
figure.
2. A 12V Supply Voltage is given by using Regulated power supply and output
is taken from collector of the Transistor.
3. By using CRO the output time period and voltage are noted.
RESULT:
AIM: Find practical frequency of HARTLEY oscillator and compare it with theoretical frequency for
L = 10mH and C = 20nF.
APPARATUS REQUIRED:
CIRCUIT DIAGRAM:
THEORY:
PROCEDURE:
TABULATIONS:
RESULT:
APPARATUS REQUIRED:
CIRCUIT DIAGRAM:
THEORY:
Oscillator is an amplifier with the positive feedback and it converts DC input signal
into AC output waveform with certain variable frequency drive and certain shape of output
waveform (like sine wave or square wave, etc) by using the positive feedback instead of input
signal. named after an American Engineer Edwin H Colpitts in 1918.
Colpitt’s Oscillator consists of a tank circuit which is an LC resonance sub circuit
made of two series capacitors connected in parallel to an inductor and frequency of
oscillations can be determined by using the values of these capacitors and inductor of the tank
circuit.
PROCEDURE:-
1. Connect the circuit as shown in the figure
2. Connect C3= 10nFand C4= 10nF in the circuit and observe the waveform.
3. Time period of the waveform is to be noted and frequency should be calculated
TABULATIONS:
RESULT:
Theoretical frequency =
Practical frequency =
APPARATUS REQUIRED:
7 Bread Board 1
CIRCUIT DIAGRAM:
THEORY:
The power amplifier is said to be Class A amplifier if the Q point and the input signal are selected
such that the output signal is obtained for a full input signal cycle.
For all values of input signal, the transistor remains in the active region and never enters into
cut-off or saturation region. When an a.c signal is applied, the collector voltage varies
sinusoidally hence the collector current also varies sinusoidally. The collector current flows for
3600 (full cycle) of the input signal. i e the angle of the collector current flow is 3600.
PROCEDURE:
TABULAR COLUMN:
RESULT:
ADDITIONAL EXPERIMENTS
15. COMPARATOR USING OP AMP.
AIM: To design and setup a zero crossing detector circuit with OP AMP 741C and plot
the waveforms.
APPARATUS:
CIRCUIT DIAGRAM:
Fig: comparator
THEORY:
It is the open loop/ saturation mode operation of op-amp. Here the signal is given the non-inverting
terminal. So the output signal is in phase with the input signal. Such a circuit is called non-inverting zero
crossing detector. In open loop configuration, the gain of the op-amp is very high, so when the input voltage
is above zero voltage, output of the circuit goes to+ Vsat which is approximately +13V. Similarly when the
input voltage is below zero voltage, the output goes to - Vsat which is approximately -13V.
PROCEDURE:
1. Check the components.
2. Setup the circuit on the breadboard and check the connections.
3. Switch on the power supply.
4. Give Vin= 2 Vpp/ 1KHz sine wave.
5. Observe input and output on the oscilloscope simultaneously.
6. Note down and draw the input and output waveforms on the graph.
7. Verify the output .
OBSERVATIONS:
In put
Out put
RESULT:
AIM: To design and set up a Wein Bridge oscillator using BJT and to observe the sinusoidal output
waveform.
APPARATUS REQUIRED:
1 Transistor BC547 2
2 Resistors 47kΩ, one from each
10kΩ,2.2kΩ,680Ω
3 Resistor 4.7kΩ 3
4 Capacitors 1μF,22μF one from each
5 Capacitor 0.01 μF 3
6 CRO
7 RPS (0 – 30V) 1
8 Bread Board
1
9 Connecting wires Required
THEORY:
𝒇=1/𝟐П𝑹𝑪
and the condition of stable oscillation is given by 𝑹𝒃=𝑹𝒇/𝟐
CIRCUIT DIAGRAM:
MODEL GRAPH:
PROCEDURE:
1. Identify the pin details of BC107 Transistor (or equivalent silicon Transistor such
as BC108/547) and test it using a millimeter. Set up the circuit on breadboard as
shown in figure.
2. A 12V Supply Voltage is given by using Regulated power supply and output is
taken from collector of the Transistor.
3. By using CRO the output time period and voltage are noted.
4. Plot all the readings curves on a single graph sheet.
RESULT:
63
Vignan Institute of Technology and Science Department of Electrical and Electronics Engineering
64