EEE201-4-Basic and Universal Logic Gates, Logic Circuits
EEE201-4-Basic and Universal Logic Gates, Logic Circuits
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OUTLINE
➢ Logic Gates
➢ Basic Logic Gates
➢ Universal Logic Gates
➢ Universal Set of Operations
➢ Level of Gates in Logic Circuits
➢ Logic Circuits
➢ Operator Precedence
➢ Examples of Logic Circuit Implementations
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TYPES OF GATES
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OR gate
X Y F=X+Y
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x
0 0 0 0
X 1
y 0 1 1
F=X+Y 0
Y F
1
1 0 1
0
t ime
1 1 1
NOT gate - Inverter
X X’ (X’)’
NOT X Y 0 1 0
X Y X X’ (X’)’=X 1 0 1
0 1
1 3 0 3
Y = X’ Buffer
NOR gate
X
X Y W Z=(X+Y)’
Z=(X+Y)’
Y 0 0 0 1
NOT-OR
0 1 1 0
X W 1 0 1 0
Z=(X+Y)’ 1 1 1 0
Y 4
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Exclusive Gates
XOR/Exclusive-OR gate
X Y XY
0 0 0
X
Z=XY 0 1 1
Y 1 0 1
1 1 0
Z=X’Y+XY’
XNOR/Exclusive-NOR gate
X Y (XY)’
0 0 1
X 0 1 0
Z=(XY)’
Y 1 0 0
1 1 1
Z=(X’Y+XY’)’=XY+X’Y’
xy=xy’+x’y=(x+y)(x’+y’)
=(xy+x’y’)’=[(x+y’)(x’+y)]’
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➢ Complete sets
{AND, NOT}
{OR, NOT}
Minimal complete sets
{NAND}
{NOR}
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Four-Level Realization of Z
This is an example of a two-level circuit. The number of levels is the maximum number of gates
through which a signal must pass from the input to the output. In this example, all signals go first
through an AND gate and then through an OR.
When inputs are available both uncomplemented and complemented, implementations of both SOP 12
and POS expressions result in two-level circuits.
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LOGIC CIRCUITS
⚫ Gates are interconnected together to form circuits that perform more complex functions → Logic Circuits
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Operator Precedence
✓ Inversions of single terms
✓ All operations with parentheses
✓ AND operation before an OR operation unless parentheses indicate otherwise
✓ If an expression has a prime sign (or bar over it), perform the operations inside the expression
first and then invert the result
F= A’BC(A+D)’
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Let’s begin inside the parentheses and build an AND gate with inputs x and z. The output of that goes
to an OR gate, the other input of which is w’. That is ANDed with v, which is ORed with the input z’
and the output of the AND gate, producing wx’y, which results in the circuit below.
This is a four-level circuit because the signals x and z pass first through an AND gate, then an OR,
then an AND, and finally through an OR—a total of four gates. 15
Example: Implement a three-input OR gate (or AND) by using only two-input gates.
Example: Implement a two-input AND gate (or OR) by using only three-input gates.
We can connect the same signal to two of the inputs (since aa = a, and a + a = a)
Also, we could connect a logic 1 (5 V) to one of the inputs of an AND or a logic 0 (ground) to one of
the inputs of an OR:
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Example: Using AND, OR and NOT gates implement the function given
with the truth table. If possible implement a minimal-cost realization for
this logic circuit.
From the truth table the function can be written in canonical SOP form,
(idempotence)
(commutativity)
(distributivity)
(identity element)
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Minimal-cost realization
Example: Implement the following Boolean function using a) AND, OR gates, b) only NAND gates.
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b) Only NAND gate implementation Minimal-cost NAND gate implementation
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Example: Implement the following Boolean function using a) NOT, OR, and AND gates, b) only NOR
gates.
Instead of using the minterms, we can specify this function as a product of maxterms
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a) POS implementation (NOT, OR, AND gates) b) Only NOR gates implementation
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