ABOUT VIT ORGANIZING COMMITTEE

Vellore Institute of Technology (VIT) was founded in Chief Patron

1984 as Vellore Engineering College by Chancellor Dr. Dr. G. Viswanathan, Chancellor
G.Viswanathan. VIT was established with the aim of
providing quality higher education on par with international Patrons
Value Added Programme standards. The credentials of VIT in academics and
research, has placed VIT in the 9th position as a University
on Shri. Sankar Viswanathan, Vice President
10th in research and 12th in Engineering in India by NIRF,
Exploring MATLAB/ Simulink Govt. of India Ranking. The QS world ranking has given 4 Dr. Sekar Viswanathan, Vice President
STAR rating to VIT, with that VIT becomes the first
institution in India to have the 4 STAR rating. In addition to Shri. G. V. Selvam, Vice President
this, the consortium of industries, FICCI has adjudged VIT as
Dr. Kanchana Baaskaran, VC
the “Excellence in Faculty”. VIT has the record of publishing
a maximum number of SCOPUS Indexed Research Journal Dr. Partha Sharathi Mallick, Pro-VC
papers, among Indian Universities, overtaking all the
Dr. T. Jayabarathi, Registrar
premier institutions. VIT has also completed 4 cycles of
NAAC accreditation and has been rated as “A++” grade
Organizing Chair
institution. VIT is No.1 private university for Innovation
(2019) as recognized by ARIIA, Government of India. VIT has Dr. Mathew Mithra Noel, Dean, SELECT
introduced many innovations in academic processes like Dr. N. Amutha Prabha, Asso. Dean, SELECT
Fully Flexible Credit System, Project Based Learning for
better learning, fully digitized academic portals that assist
students in equipping themselves for 2025 market-place. Co-organizing Chair
Dr. K. Sathish Kumar, HoD, EEE
ABOUT SELECT
Dr. P. Ponnambalam, HoD, EPE
The School of Electrical Engineering (SELECT) is a Dr. B. Jaganathapandian, HoD, C&A
part of VIT since its inception. The School has grown
Dr. G. K. Rajini, HoD, E&I
Organized by tremendously over years and is now recognized as one of
the major engineering schools in VIT. The School has 98
School of Electrical Engineering faculty members from various reputed institutes. Besides
(SELECT),VIT, Vellore – 632014 high-quality teaching and instruction at both UG and PG
Convener
levels, the faculty members of the school are actively Dr. C. Rani, Professor, EEE
involved in executing a number of R&D and consultancy Dr. Brisilla, Professor, PED
projects from government agencies including Royal
Dr. Sankardoss, Assistant Professor, PED
Academy-UK, DST, ISRO, DRDO and also from many
reputed industries.
 controllers and state observer, modelling of
TARGET GROUP electrical machines, design of control strategies
for Motors. Optimization techniques, image LAST DATE OF REGISTRATION
Research Scholars, Students and Corporate processing and machine learning applications 8 th September 2024
Practitioners can attend. using MATLAB/Simulink..
DATE & TIME
RESOURCE PERSONS
CONTACT
8th, 15th, 16th, 22nd September and 2nd
October 2024 1. Dr. Rani Chinnappa Naidu, VIT, Vellore Dr. C. Rani, Professor, EEE
Mail: [email protected]
2. Dr. R M Brisilla, VIT, Vellore Ph: 9626188555
10.00 AM -1.00 PM and 2.00 PM-5.00 PM
3. Dr. Sankardoss, VIT, Vellore

OBJECTIVES OF THE VALUE-ADDED REGISTRATION FEE

PROGRAMME
❖ Registration fee : Rs.200/-
• MATLAB/Simulink is a simulation software
specially designed for all engineering • Registration fee includes 18% GST.
disciplines. With fast simulation speed and • Prospective participants are
friendly user interface. MATLAB/Simulink is a requested to register for the VAP
powerful simulation environment to meet the through the following web link
simulation and development needs. It provides • https://events.vit.ac.in/
a complete platform from design to simulation. • The number of participants is
to hardware implementation. strictly limited to 50 based on
first come first serve.
In addition, MATLAB/Simulink provides • Certificate will be issued to all
separate toll boxes for Power Systems, Image registered and attended
Processing and Machine learning. This value- participants.
added program can provide knowledge and • Attendance is mandatory for all
hands on training for the UG/PG students and sessions
research scholars on design of feedback