Lesson 002

Transistor
A transistor is a three terminals semiconductor device used for amplifying or switching
electronic signals. The two basic type of transistor are:

(1) Bipolar Junction Transistor (BJT) and

(2) Field Effect Transistor (FET).

2.1.1 Bipolar Junction Transistor

This is a transistor that consists of two PN junctions formed by sandwiching either p-type
between n-type and n-type semiconductor between p-type. There two types of BJT are:
N-P-N (n-p-n) and P-N-P (p-n-p). An n-p-n transistor is composed of two n-type
semiconductors separated by a thin section of p-type as shown in fig. 2.1 while, a p-n-p
transistor is formed by two p-sections separated by a thin section of n-type as shown in
Fig. 2.11.
E C
E C p n p
n p n

B Fig. 2.11
B Fig. 2.1

The left section (region) in Fig. 2.1 is called emitter, the right section (region) is called
collector and the middle section (region) is called the base. The terminal attached to each of
the section bear the name of the section. Similarly, the sections in Fig.2.11 are labeled in the
same way as in Fig. 2.1. Although in reality, the base is much thinner than the emitter whiles
the collector is wider than both, however, for the sake of convenience, it is customary to
show emitter and collector as shown in Figure 2.1 and 2.11. The emitter is heavily doped so
that it can inject a large number of charge carriers (electrons or holes) into the base. The base
is lightly doped and very thin; it passes most of the emitter injected charge carriers to the
collector. The collector is moderately doped.

Although BJT transistor has three terminals, but four terminals is require when use in a
circuit, two terminals for the input and two terminals for the output. This is done by making
one terminal of the transistor common to both input and output terminals. Fig 2.12 and 2.13
shows the symbols used for n-p-n and p-n-p respectively.
E C E C

B B
Fig. 2.12: Symbol of an n-p-n Fig. 2.13: Symbol of an p-n-p

BJT can be connected in three ways: (i) Common Base (CB), Common Emitter (CE) and
Common Collector (CC). Each circuit connection has specific advantages and disadvantages.
Regardless of circuit connection, the emitter-base junction is always forward bias while the

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collector-base junction is always reversed bias. Fig. 2.14a and Fig. 2.14b shows a common
base n-p-n and common base p-n-p transistor circuit respectively. In this configuration, the
input is applied between emitter and base while the output is taken from collector and base,
the base is common to both the input and the output circuit and hence the name common
base. Therefore, in a common base configuration, input current is IE and output current is IC.

IE IC
IE IC

IB RC VO
IB RC VO

VEE VCC
VEE VCC Fig. 2.14b: A Common Base p-n-p Transistor Circuit
Fig. 2.14a: A Common Base n-p-n Transistor Circuit

From Fig. 2.14a and 2.14b, the collector current is given as:

= + = + ……………………………………………………. 2.1

Where αIE is the part of the emitter current that reaches the collector terminal and is
leakage current due to the movement of minority carrier across base-collector junction on
account of it being reversed biased. is generally smaller than αIE.

= + ……………………………………………………………………….. 2.11

Substitute 2.11 into 2.1,

= ( + )+

⇒ (1 − ) = +

∴I = I + I …………………………………….………………. 2.13

If ∆IE and ∆IC are the changes in the emitter and the collector currents due to the variation at
constant collector-base voltage (VCB), then the ratio of the change in collector current to the
change in emitter current at constant collector-base voltage VCB is defined as current
amplification factor (α). Practical values of α in commercial transistors ranges from
0.9 to 0.99 i.e. α are less than unity (1).
∆
i.e = ∆ …………………………….2.14

Example 2.1

In a common base connection, the emitter current is 1 mA. If the emitter circuit is open, the
collector current is 50 μA. Find the total collector current. Given that α = 0.92.

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 Solution

Given: =1 , = 50 , = 0.92

From = ( + )+

∴ = 0.92 × 1 × 10 + 50 × 10 = 0.97

Example 2.11

In a common base connection, α = 0.95.The voltage drop across 2 kΩ resistor which is

connected in collector is 2 V. Find the base current.

Solution

Draw the circuit diagram,

From = , = = .
= 1.05

But = +

⇒ = − = 1.05 − 1 = 0.05

Fig. 2.15a and Fig. 2.15b shows a common emitter n-p-n and common base p-n-p transistor
circuit respectively. In this configuration, the input is applied between base and emitter while
the output is taken from collector and emitter, the emitter is common to both the input and the
output circuit and hence the name common emitter. Therefore, in a common emitter
configuration, input current is IB and output current is IC. I C

IC
IB
RC VO
IB
RC VO IE

IE
VEE VCC
Fig. 2.14b: A Common emitter p-n-p Transistor
VBB VCC
Fig. 2.15a: A Common emitter n-p-n Transistor

The ratio of the change in collector current (∆IC) to the change in base current (∆IB) at
constant collector-emitter voltage (VCE) is defined as current amplification factor (β).
∆
i.e =∆ …………………………………………………………….. 2.15

In almost any BTJ transistor, less than 5% of emitter current flows as base current. Therefore,
the value of β is generally greater than 20 for common emitter configuration. Usually its

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value ranges from 20 to 500. This type of configuration is frequently used as it gives
appreciable current gain as well as voltage gain. The relationship between β and α can be
derived as follow:
∆
=∆ ……………………………………………… 2.16

∆
and =∆

But, = +

⇒∆ =∆ +∆

⇒∆ =∆ −∆ …………………………………………. 2.17

Substitute 2.17 into 2.16

∆
⇒ =∆ ∆
…………………………………………… 2.18

Divide the R.H.S of 2.18 by ∆IE, then,

∆ /∆
⇒ =∆ ∆ =
∆ ∆

∴ = ……………………………………………. 2.19

From equation 2.19, as α approaches unity (1), β approaches infinity (∞). That is the current
gain in common emitter configuration is very high and it is due to this reason that common
emitter configuration is used in about 90 to 95 percent of all BJT transistor applications.

Also from Fig.2.15a and 2.15b,

= +

= +

⇒ = ( + )+

⇒ (1 − ) = +

⇒I = + I ……………………………….………………. 2.20

If IB = 0 in equation 2.20 (i.e. base is open), the collector current will be the current to
emitter. This is abbreviated as ICEO, meaning collector-emitter current with base open.

Therefore, I = I …………………………….. 2.21

Substitute equation 2.21 into 2.20

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 α
I = +I
1−α
I =β +I …………………………………. 2.22

Exercise 2.1

An n-p-n BJT transistor has its emitter disconnected at room temperature and a voltage of 5 V
is applied between collector and base with collector positive, a current of 0.2 μA flows. When
the base is disconnected and the same voltage is applied between collector and emitter, the
current found to be 20 μA. Find α, IE and IB when collector current is 1 mA.

Fig.2.16a and Fig.2.16b shows a common collector n-p-n and common collector p-n-p
transistor circuit respectively. In this configuration, the input is applied between base and
collector while the output is taken from emitter and collector, the collector is common to both
the input and the output circuit and hence the name common collector. Therefore, in a
common collector configuration, input current is IB and output current is IE.

RC RC

VO VO

Fig. 2.16a: A Common Collector n-p-n Transistor Fig. 2.16b: A Common Collector p-n-p Transistor

The ratio of the change in emitter current (∆IE) to the change in base current (∆IB) is defined
as current amplification factor (β) in common collector configuration.
∆
i.e = …………………………………………………………….. 2.23
∆

This configuration provides about the same current gain as the common emitter configuration
as ∆IE ≈ ∆IC. However, its voltage gain is always less than unity (1).
∆ ∆
=∆ and =∆

But, = +

⇒∆ =∆ +∆

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⇒∆ =∆ −∆ …………………………………………. 2.24

Substitute 2.24 into 2.23

∆
⇒ =∆ ∆
…………………………………………… 2.25

Divide the R.H.S of 2.18 by ∆IE, then,

∆ /∆
⇒ = ∆ ∆ =
∆ ∆

∴ = ……………………………………………. 2.26

Also from Fig.2.16a and 2.16b,

= +

= +

⇒ = + = +( + )

⇒ (1 − ) = +

⇒I = + I = (β + 1) + (β + 1)I

∴ I ≈ (β + 1) + (β + 1)I ……………………………….. 2.27

Table 2.1 shows the comparison between common base, common emitter and common
collector configurations.

Table 2.1: Comparison between Common Base, Common Emitter and Common Collector Configurations
S/N Characteristic Common Base Common Emitter Common Collector

1 Input resistance Low (about 100 Ω) Low (about 750 Ω) Very high (about 750 kΩ)

Output resistance Very high (about 450 kΩ) High( about 45 kΩ) Low (about 50 Ω)
2

Voltage gain About 150 About 500 Less than 1

3

Applications For high frequency For audio frequency For impedance matching
4 applications applications

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 Output Characteristic of Common Emitter Amplifier
It is a family of curves that shows the relationship between collector-emitter voltage and
collector current at constant base current IB (i.e. each of the curve has different constant base
current). In order way, it is a family of curves that shows how IC varies with VCE at constant
base current (IB). These curves are also called collector characteristic curves.
Fig, 2.27b shows a typical common-emitter output characteristic of an n-p-n transistor
amplifier obtained from the circuit of Fig, 2.27a. To obtain the curve IB0, IB is set to IB0 and IC
is varies by varying the VCC, in this way, the obtained values of IC are plotted against the
obtained values of VCE. Similarly, the curves of IB1, IB2 and so on are plotted.

RC

IC
RB VCC
VCE
IB
VBB
IE

IC (mA) Fig. 2.27a

Active Region
IC6 IB6

IC5 IB5
Saturation Region

IC4 IB4

IC3 IB3

IC2 IB2

IC1 IB1

IC0 IB0
VCE
0
Cut- off Region
Fig. 2.17b: Output Characteristic of Common Emitter Amplifier of Fig. 2.17a

This family of curves may be divided into three regions: the active region, the cut of region
and the saturation region.
The active region is the area to the right of the ordinate VCE few tenth of a volt and above
IB = 0. In this region, the Base-Collector junction is reverse-biased and the base-emitter
junction is forward biased. Also in this region, the transistor output current responds most

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sensitively to an input signal. If the transistor is to be used as an amplifying device without
appreciable distortion, it must be restricted to operate in this region.

Saturation region: This is the region to the left of the ordinate, VCE = 0, and above IB = 0
characteristic, in which both Base-emitter and Base-Collector junctions are forward biased.

Cut-Off region: This is the region below the IB = 0 characteristic for which the Base-emitter
and Base-Collector junctions are reversed biased. Under this condition, there is a very small
amount of collector leakage current, ICEO due mainly to thermally produced carrier.

Load Line and Transistor Operating Point

From the previous discussion of transistor output characteristics curves, it is clear that the
transistor function most linearly when constrained to operate in its active (linear) region. To
establish the load line and an operating point (Q-point) in this region, it is necessary to
provide appropriate direct potential, dc (voltage) and currents using external sources. Once an
operating point is established, such as shown in Fig. 2.27d obtained from Fig.2.27c (the
practical way of drawing common emitter amplifier of Fig.2.27a), time varying excursion of
the input signal should cause an output signal of the same waveforms.
The straight line drawn on the collector characteristic curves between the cuff-off and the
saturation points of the transistor is called the LOAD LINE. Once set up, the transistor
always operates along this line. With reference to Fig.2.27c, the load line is determined as
follow: First the cut-off point on the load line: When the transistor is cut-off, there is
essentially no collector current thus, the collector-emitter voltage VCE (Cut-off) = 30 V.
Next the saturation point on the load line: When the transistor is saturated, VCE approximately
zero (VCE (SAT)). Therefore, all the VCC voltage is dropped across RC. From this we can
determine the saturation value of collector current IC(sat). This value is the maximum value for
IC. We cannot possibly increase it further without changing VCC, RC or RE.
V
From Fig. 2.27c, the value of ICQ(sat). is CC which is 93.75 mA.
RC
Next the cut-off and saturation points are plotted on the collector characteristic curves
Fig. 2.27d and a straight line which is the load line drawn between them. The value of IC and
VCE at zero signal are known as the quiescent or Q-point (Q-point). For good replicate of the
amplified input signal, it better to have the Q-point at the center of the load line.

VCC =30 V

RC= 320 Ω
RB=6.875 Ω
C2
VCE
C1 Vi
Vi

Fig. 2.27c
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 IC (mA)
Saturation Point

IC (sat) = 93.75 IBQ = IB (SAT)

ICQ = 46.86 Q Point

IBQ

Cut- off Point

IBQ = 0
VCE
0 VCE (SAT) VCE (cut-off) = 30 V
VCEQ = 15 V

Fig. 2.17d: Output Characteristic of Common Emitter Amplifier of Fig. 2.17c

From Fig. 2.17d, cut-off point can be defined as the point where the load line intersects the
IB = 0 curve. While saturation point is the point where the load line intersects the IB = IB (SAT).

Transistor Biasing
Transistor Biasing is the process of setting a transistors dc operating voltage and current
conditions to the correct level so that any a.c input signal can be amplified correctly by the
transistor. Therefore, the basic purpose of transistor biasing is to keep the base-emitter
junction properly forward bias and collector-base junction properly reverse bias during the
application of signal. The operating point established above in Fig. 2.17d shift with change in
temperature because the transistor parameters (β, ICO and VBE) are functions of temperature.
It is therefore necessary to consider different biasing circuits for quiescent point stability. In
order to achieve faithful amplification, the base-emitter voltage (VBE) should not fall below
0.3 V for germanium transistors and 0.7 V for silicone transistors at any instant, also, the
collector-emitter voltage VCE should not fall below 0.5 V for germanium transistors and 1 V
for silicone transistors. Among the transistor biasing methods are: fixed bias, fixed bias with
emitter resistor, fixed bias with collector resistor, fixed bias with both emitter and collector
resistors and universal bias.

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 Fixed Bias Circuit.
A fixed bias circuit is as shown in Fig. 2.28a, although it is connected has a common-emitter
configuration, it can also be connected has common collector or common base configuration.

VCC

RC
RB IBQ ICQ

VCEQ

VBEQ
IEQ
Fig. 2.28a

From the base-emitter loop of Fig. 2.28a,

VCC  I BQ RB  VBEQ  0
 I BQ RB  VCC  VBEQ
VCC  V BEQ
 I BQ  .......... .......... .......... .......... .......... .....2.28
RB
Since VCC and VBEQ are fixed values of voltages, the selection of a bias resistor fixed the
value of the base current (IBQ). The current IBQ is therefore constant and because of this,
Fig. 1.28a is called fixed bias circuit.
When the transistor operates in it linear region,
I CQ  I BQ .....................................................................................................................2.29
Also from the output loop (collector-emitter loop) of Fig. 2.28a,
VCC  I CQ RC  VCEQ  0
 VCEQ  VCC  I CQ RC .............................................................................................2.30

Example 2.12
Compute the dc bias voltages and currents for the n-p-n common emitter circuit of Fig. 2.28a,
VBEQ = 0.7 V, RB = 200 kΩ, RC = 2.2 kΩ, β = 50 and VCC = 9 V.

Solution
IBQ ≈ 41.5 μA, ICQ = 2.075 mA, IEQ = 2.1165 mA, VBQ = 0.7 V, VEQ = 0 V, VCEQ = 4.435 V
and VCQ = 4.565V.

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Example 2.13
Design Fig.2.28a for current gain of 75 at a collector current of 2 mA and the Q-point at the
center of the load line .The transistor is a Si type and the supply voltage is 20 V.

Solution
For Q-point at the center of the load line, select VCEQ to be ½ of VCC.
1
i.e VCEQ   10  10V
2 VCC =20V
VCC  VCEQ 20  10
 RC    5k
I CQ 2  10  3
I CQ 2  10 3 RC =723kΩ
I BQ    26.7 A
 75 RB =5kΩ
VCC  VBQ 20  0.7
RB    723k
I BQ 26.7  10  6

Fig. 2.28b

While fixed bias provides suitable gain as an amplifier, it is difficult to maintain its bias
stability. In any amplifier circuit the collector current, IC will vary with change in temperature
because of the following main factors:

(1) Reverse saturation current (leakage current), ICO, which doubles for every 10O
increase in temperature for silicon transistor.
(2) Base-emitter voltage, VBE, which decreases by 2.5 mV per OC rise in temperature for
silicon transistor.
(3) Transistor current gain β, which increases with temperature.

Any of these factors can cause the bias point to shift from the value originally set by the
circuit because of a change in temperature. The new operating point may not be satisfactory
and considerable distortion may result because of the bias point shift. A better bias circuit is
needed, one that will stabilize or maintain the dc bias initially set, so that the amplifier can be
use in a changing temperature environment. Of the three parameters affecting bias stability
the change due to β variation is more pronounced. These changes in parameters value need
not be only due to temperature, even at room temperature; β varies considerable between
transistors of the same manufacturer type. For example, the same numbered transistor may
have β = 125 for one device (transistor) and β = 300 for another. In addition, the value of β
for specific transistor will be different at different values of bias current. For all these
reasons, the design of a good bias stabilized circuit usually concentrates most on stabilizing
the effect of changes in transistor beta (β).

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 Fixed Bias Circuit with Emitter Resistor

This circuit is has shown in Fig. 2.29, although it is connected has a common-emitter
configuration, it can also be connected has common collector or common base configuration.
VCC

RC
RB IBQ ICQ

VCEQ

VBEQ

Fig. 2.29 RE IEQ

From the base-emitter loop,

VCC  I BQ RB  VBEQ  I EQ RE  0
But I E  I B  I C  I B  I B  (1   ) I B
VCC  I BQ R B  V BEQ  (1   ) I BQ R E  0
Hence,
VCC  V BEQ
I BQ  .......................................................................................2.31
R B  (1   ) R E
Also from the output loop (collector-emitter loop) of Fig. 2.29,
VCC  I CQ RC  VCEQ  I EQ RE  0.
1  
 VCC  I CQ RC  VCEQ  I CQ   RE  0
  
 1    
VCEQ  VCC  I CQ  RC    R E .......................................................................2.32
    
Also,

VCEQ  VCQ  VEQ ............................................................................................................2.33

V EQ  I EQ RE  0  I EQ R E .....................................................................................2,34
VCQ  VCC  I CQ RC ..................................................................................................2.35

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Now let us see how emitter resistor stabilizes the circuit (Fig.2.29). Suppose for some reason
the collector current IC of the transistor increase, this will cause increase in the voltage drop
across RB, i.e. VE increase. Increase in VE cause the base current, IB to be reduced. The
reduction in IB causes IC to reduce. Therefore, an inclusion of emitter resistor has
compensated for the increase in IC.

Exercise 2.11
Calculate all dc bias voltages and currents in Fig. 2.29 if the transistor used is a Ge transistor,
RB = 200 kΩ, RC = 2.2kΩ, RE = 1kΩ, β =50 and the power supply voltage is 9 V.

N.B
Although the higher the value of RE the better will be the dc stability of the circuit but the
voltage drop across RE limit the maximum possible output voltage therefore VE is made to be
one tenth (1/10) of the supply voltage when designing Fig.2.29.

Example 2.14

Design Fig.2.29 for current gain of 90 at a collector current of 5 mA and the Q-point at the
center of the load line. The transistor is a Si type and the supply voltage is 20 V.

Solution
1 1 1
V EQ  VCC   VCC   20  2V
10 10 10
1 1 1
VCEQ  VCC   VCC   20  10V
2 2 2
V EQ  0 2
RE    400k
I EQ 5  10  3
VCC  VCEQ  I EQ RE 20  10  2
RC    1.6k
I CQ 5  10 3
IC 5  10 3
I BQ    55.6 A
 90
VCC  V BEQ  I E R E 20  0.7  2
RB    331k
I BQ 55.6  10  6

Bias with Collector Feedback

Apart from the use of an emitter to produce improve bias stability, collector resistor feedback
also provides improved dc bias stability. Fig.2.30 is bias circuit with collector feedback.

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 VCC

RC I’CQ

ICQ
RB IBQ

VCEQ

VBEQ

Fig. 2.30

From the base-emitter loop of Fig. 2.30,

VCC  I 'CQ RC  I BQ R B  VBEQ  0..............................................................................2.36

But I 'C  I B  I C and I E  I B  I C  I B  I B  (1   ) I B

 VCC  I BQ RC  I BQ RC  I BQ RB  VBEQ  0
 VCC  I BQ RB  (1   ) RC   VBEQ  0
Hence,
VCC  VBEQ
I BQ  ................................................................................................2.39
RB  (1   ) RC 
Also from the output loop (collector-emitter loop) of Fig. 2.30,
VCC  I 'CQ RC  VCEQ  0
 
 VCC  I CQ  I BQ RC  VCEQ  0
1  
 VCC  I CQ   RC  VCEQ  0
  
1  
VCEQ  VCC  I CQ   RC ....................................................................................2.40
  
Also,
VCEQ  VCQ  V EQ
V EQ  0 ............................................................................................2.41
VCQ  VCC  I 'CQ RC

Suppose that IC of Fig.2.30 increase due to some reason, this will cause increase in voltage
drop across RC and reduction in collector voltage VC, which in turn cause the voltage across
the base resistor RB to reduced. Since RB is constant, base current will be reduced. This

14
reduction in IB will cause IC to reduce. Therefore the inclusion of RC has compensated for the
increase in IC.

Bias with Emitter and Collector Feedback

This biasing arrangement incorporated both the emitter and collector feedback. When IC
increase for some reason, the combined effect of both feedback biases will compensate for
drift caused by increase in IC. Fig.2.31 shows the bias with Emitter and Collector Feedback.

VCC

RC I’CQ

ICQ
RB IBQ

VCEQ

VBEQ

Fig. 2.31 RE IEQ

From the base-emitter loop of Fig.2.31,

VCC  I 'CQ RC  I BQ R B  VBEQ  I E RE  0

But I 'C  I B  I C and I E  I B  I C  I B  I B  (1   ) I B
 VCC  I CQ RC  I BQ RC  I BQ RB  VBEQ  I BQ 1   RE  0
VCC  I BQ RC  I BQ RC  I BQ RB  VBEQ  I BQ 1   RE  0
 VCC  I BQ RB  (1   )RC  RE   VBEQ  0
Hence,
VCC  VBEQ
I BQ  ...................................................................................2.42
RB  (1   )RC  RE 
Also from the output loop (collector-emitter loop) of Fig. 2.31,
VCC  I 'CQ RC  VCEQ  I E RE  0
 
VCC  I CQ  I BQ RC  VCEQ  I E RE  0
1  
 VCC  I CQ  RC  RE   VCEQ  0
  

15
 1  
VCEQ  VCC  I CQ  RC  R E ...................................................................2.43
  
Also,
VCEQ  VCQ  V EQ
VEQ  I EQ RE  0  I EQ RE ............................................................................2.44
VCQ  VCC  I 'CQ RC

Universal (Voltage Potential Divider) Bias

Fig. 2.32a shows a potential divider bias circuit, it provides a dc bias that is independent of
the transistor beta (β). +VCC

RC
RB1 I1
IC
IB

RB2
I2 RE IE

Fig.2.32a

Resistors RB1 and RB2 forms a voltage divider that provides the base bias voltage (VB). RE
allow the emitter to rise above ground potential. The resistance seen looking into the base
(1 + β) RE is much larger than that of RB2. if this so, then the current through RB1 flows
almost completely into RB2 and the two resistors may be considered effectively in series,
forming a potential divider network.

The voltage at the base of the transistor due to voltage divider network is approximately

RB2
VB   VCC ........................................................................................2.45
R B1  R B 2

where VB is the voltage measured from base to ground.

Also VB = VBE +VE

 VE  VB  VBE

From VE =IERE – 0 = IERE……………………………………………… 2.46

∴ = …………………………………………………… 2.47

16
If VBE ˂˂ V2, then ∴ = …………………………………. 2.48

Since IE ≈ IC

∴ = ………………………………………………… 2.49

From equation 2.49, IC does not depend upon β. Though IC depends upon VBE, but in practice
VBE ˂˂ V2 then, IC is practically independent of VBE. Thus IC in this circuit is almost
independent of transistor parameters and hence good stabilization is ensured..

The voltage drop across the collector resistor is

VRC =ICRC and

VC  VCC  VRC  VCC  I C RC

and finally, the voltage from collector to emitter is calculated from

VCE  VCC  I C RC  I E RE .  VCC  I C RC  RE ..................................2.50

Stabilisation provided by the universal bias can be prove as follow:

Given: VB = VBE +VE = VBE +IERE

Suppose the collector current IC increases due to rise in temperature. This will cause the
voltage drop across emitter resistor RE to increase. As voltage across RB2 (i.e VBE) is
independent of IC therefore, VBE decreases. This in turn causes IB to decrease. The reduced
value of IB tends to restore IC to the original value.

The Thevenin’s equivalent circuit of Fig.2.32a is as shown in Fig.2.32b. A more accurate

result can be obtained when desired by using Thevenin’s theorem to analyze the voltage
divider circuit as follows

RC ICQ

VOUT
RTH

IBQ
VTH
RE IEQ

Fig. 2.32b

17
From Fig.2.32b,
RB2
VTH   VCC ...........................................................................................2.51
R B1  R B 2
R  RB2
RTH  R B1 // R B 2  B1 ..................................................................................2.52
R B1  R B 2
Applying KVL to the base-emitter loop of Fig.2.32b yields:
VTH  I BQ RTH  VBEQ  I EQ RE

Since,
I E  I B 1   
The quiescent base current, IBQ is therefore:
VTH  VBEQ
I BQ  .........................................................................................2.53
RTH  1   RE
But ≪ (1 + )
∴ = ( )
Also 1 ≪ and >>
∴ = ……………………………………………………………….. 2.54
Also =
∴ = = ………………………………………………………….. 2.55

And this shows that collector current (ICQ) is independent of β

Applying KVL to the output (collector-emitter) loop of Fig.2.32b,
VCEQ  VCC  I CQ RC  I EQ RE
 1   
VCEQ  VCC  I CQ  RC    RE .................................................................2.56
    
But 1 ≪
⇒ = − ( + ) …………………………………………………. 2.57
Design Consideration for Fig.2.32
For selecting appropriate values of resistances for RB1 and RB2, from equation 2.52,
R  RB2
RTH  R B1 // R B 2  B1
R B1  R B 2
and that RTH = (RB1 * RB2) / ( RB1 + RB2) ˂˂ (1+β)RE = βRE
and since RB2 ˂ RB1, the Thevenin resistance is determined by RB2 as usual for resistance in
parallel.
(RB1 * RB2) / ( RB1 + RB2) ≈ RB2 ˂˂ βRE
As such, a useful design criterion for selecting RB2 is given by:

18
 1
RB2  R E
10
After selecting a suitable resistance value for RB2 . the value of RB2 is substituted into
equation 2.51 to determine a suitable value for RB1.
Although the higher the value of RE the better the dc stability of the circuit but, on the other
hand RE cannot be unreasonably large because the voltage drop across it limits the maximum
possible output voltage.
The voltage from emitter to ground is usually arranged to be one-tenth of the supply voltage,
VCC.
Hence,
1
VE  VCC 
10
and
V V VCC V
R E  E  CC   . CC .................................................2.58
I E 10I E  1    10 I CQ
10I CQ  
  
Example 2.15
Design a common emitter universal bias circuit for current gain of 80 at a collector current of
1 mA and VCEQ = 8 V. The transistor is a Si type and the supply voltage is 20 V.

NB: For this particular example the Q-point is not at the center of the load line.

Solution
1 1
V E  VCC   * 20  2V
10 10
V V VCC
R E  E  CC  .  1.98k
I E 10 I EQ 1   
10 I CQ  
  
VCC  VCEQ  V E
RC   10k
I CQ
1
RB 2  1   RE  1.604k
10
VB = VE + VBE = 2 + 0.7 = 2.7 V
From,
RB2
V B   VCC
R B1  R B 2
R B 2 VCC  V B 
 R B1   10.277k
VB

19
NB: In practice bias circuits do not always conform to the bias forms discussed earlier.
However, it should not be difficult to analyze the bias operation of a circuit slightly
modified.

Voltage Gain of a Common Emitter Amplifier with and without BY pass Capacitor
VCC VCC

RC RC
R1 R1

C1 C2
T T
VO
R2 R2
VS
RE RE CE

Fig. 2.33a Fig. 2.33b

Fig.2.33a is a common emitter amplifier without BY pass capacitor. C1 and C2 are coupling
capacitor and are use to pass signal into and out of the amplifier in such a way that the source
or load will have no effect on the dc bias values i.e. C1 and C2 have zero the reactance at
signal frequencies.
From Fig2.33a, the amplifier voltage gain without BY pass capacitor is
V I c RC I c RC RC
Av  c   
Vb I e (re  RE ) 1   1  
I c  re  RE   re  RE 
     
Since 1˂˂β and re ˂˂ RE
R
 Av  C ....................................................................................2.59
RE
Fig.2.33b is a common emitter amplifier with BY pass capacitor (CE). C1 and C2 performed
the same function as in Fig.2.33a. CE is called BY pass capacitor, it shorted the emitter to the
ground (i.e. the varying signal will flows through the capacitor CE and not RE) without
disturbing the dc emitter voltage. Therefore, CE makes the emitter to be at signal ground but
not dc ground thus making the circuit a common emitter. From Fig. 2.33b,
V I R I c RC RC
Av  c  c C  
Vb I e re 1   1  
I c  re  re
     
Since 1˂˂β
R
 Av  C ................................................................................................2.60
re

20
Compare equation 2.59 with 2.60, the voltage gain with BY pass capacitor is greater than
without BY pass capacitor because re ˂˂ RE, therefore, RC/re >> RC/RE.

Example 2.16
Determine the voltage gain of the amplifier shown in Fig.2.33a and Fig. 2.33b if R1 = 50kΩ,
R2 =10 kΩ, RC = 5kΩ, RE =1kΩ, VCC =10 V, T is a Si transistor and β =150.

Solution
From,
RB 2
VB   VCC  1.67V
R B1  R B 2

VE = VB – 0.7 = 0.97 V
V 0
IE  E  0.97 mA
RE
25mV
re   25.77 
IE (for silicon transistor)
voltage gain of Fig.2.33a is

RC
Av  5
1  
 re  RE 
  
voltage gain of Fig.2.33b is

RC
Av   195
1  
 re
  

Input Resistance of a Universal Bias Common Emitter Amplifier

VCC

RC
R1
RC
C1
T
C
Rin(T)
R2
Rin
T
≡ Rin(T)
R1 R2

RE CE

ac ground ac ground ac
ac ground
Fig. 2.34a Fig. 2.34b groundC

21
Viewed from the base, Rin is the ac resistance seem by the ac source at the base when the
emitter resistor is BY passed to the ground i.e. Rin ≈ βacre. It can be seen that the BY pass
capacitor effectively make the emitter appear as ground to the ac signal because the reactance
of the capacitor CE is nearly zero at the signal frequency but to dc signal, CE looks like an
open and this does not affect the dc emitter voltage.

In addition to seeing through the BY pass capacitor, the signal also sees ground through the
dc supply voltage source VCC. It does so because there is zero ac signal voltage at VCC
terminal thus, the VCC terminal effectively acts as an ac ground. As a result, the two bias
resistors R1 and R2 appear in parallel to the ac input because one end of R2 goes to actual
ground and one end of R1 goes to ac ground (VCC terminal). Also Rin at the base appears in
parallel with R1 and R2. Therefore the actual resistance seen by the source includes that of the
bias resistor (R1 and R2)

i.e. Rin(T) = R1//R2//Rin= R1//R2//βacre………………………………………… 2.61

This situation is illustrated in Fig.2.34a and Fig.2.34b.

RC has no effect because of the reverse biased of base-collector junction.

Example 2.17
Determine the voltage gain, the input resistance, the current gain and the power gain of the
amplifier shown in Fig.2.34b if R1 = 100kΩ, R2 =10 kΩ, RC = 5kΩ, RE =1kΩ, VCC =30 V, VS
= 10 mV, T is a Si transistor and β =100.

Solution
From,
RB 2
VB   VCC  2.73V
R B1  R B 2

VE = VB – 0.7 = 2.03 V

V 0
IE  E  2.03mA
RE

25mV
re   12.32
IE (for silicon transistor)

voltage gain of Fig.1.17b is

22
 RC
Av   402
1  
 re
  

Rin(T) = R1//R2//Rin= R1//R2//βacre ≈ 1.1 kΩ

Vs
Is   29.1A
Rin T 

Vc A V
Ic   v s  0.812mA
RC RC

I
Ai  c  89
Is

A p  Av Ai  36197

Voltage Gain of a Common Collector Amplifier

Common collector amplifier is also known as Emitter follower and it is as shown in Fig.2.35.
For this configuration, the circuit input is made to the base and output taken from the emitter
with the collector common to the ac input and output signals. The collector voltage is fixed at
the positive supply voltage value i.e. there is no RC, or RC = 0.

VCC

R1

C1
T

R2
VS
RE VO

Fig. 2.35

From Fig.2.35,

Vo  I e RE

Vb  I e re  RE 

23
 V V I e RE RE
Av  O  E  
Vb Vb I e re  R E  re  R E 

If RE >> re, then

RE
Av   1.......... .......... .......... .......... .......... .......... .......... .......... .......... ...... 2.62
RE

Since the output voltage is the emitter voltage, it is in phase with the base or input voltage. As
a result a result and because the voltage is close to unit (1), the output voltage follows the
input voltage, thus the term emitter follower. In order word round, the output is a replica of
the input.

Input Resistance of a Universal Bias Common Collector Amplifier

The emitter- follower is characterized by a high input resistance which makes it a very useful
circuit because of the high input resistance, the emitter-follower can be used as a buffer to
minimize loading effect when one circuit is driving another.

For common collector amplifier,

Vb I e re  R E  I b 1   re  R E 
 
Ib Ib Ib

If β >> 1,

Vb I e re  R E  I b 1   re  R E 
    re  R E .......... .......... .......... .......... .2.63
Ib Ib Ib

If RE is at least ten times larger than re, then the input resistance at the base is Rin= βacRE.

Since β is large, a very low resistance load connected across the output looks like a much
higher resistance at the base and as such it is easier to drive. This mean that common
collector circuit requires less power from the signal source to drive a load than would be the
case if the signal source were to drive the load directly, hence there use as buffer.

From Fig.1.19, Rin(T) = R1//R2//Rin…………………………………………………2.64

Current gain of a common collector amplifier is

24
 I 1
Ai  e     (1   )   .......... .......... .......... .......... .......... .......... .......... 2.65
Ib 1

Power gain of a common collector is

A p  Av Ai  Ai .......... .......... .......... .......... .......... .......... .......... .......... ..2.66

NB: The common
collector amplifier cannot be used for voltage amplification but can be used for current
amplification.

Example 2.18
Calculate all dc bias voltages and current for Fig.2.35 if R1 = 30kΩ, R2 =30 kΩ, RE 3kΩ,
VCC =15 V, T is a Si transistor and β =100.

From,
RB 2
VB   VCC  7.5V
RB1  RB 2

VE = VB – 0.7 = 6.8 V

V 0
IE  E  2.3mA
RE

VCE  VCC  I E RE  8.1V

IC = ??

IB = ??

VC = ??

Example 2.19
Design Fig.2.35 for an audio signal (20Hz to 20 kHz). VCC = +15 V. ICQ = 1mA.

Solution
VE = ½ VCC = 7.5 V
V  0 VE
RE  E   7.5k
I EQ I CQ
1
R2  1   RE  757k
10
VB = VE + VBE = 8.1 V

25
From,
RB2
V B   VCC
R B1  R B 2
R V  VB 
 RB1  B 2 CC  645k
VB
1
C1   0.124pF
2f c R in (T)
Exercise 2.12
Derive Av, Ai, Rin and Ap for a universal bias common base amplifier

Table: 2.2 Comparison of Amplifier Configurations

Characteristic Common Emitter Common Collector Common Base

Voltage gain (Av) RC/re (High) ≈ 1 (low) RC/re (High)

Current gain (Ai) βac (High) βac (High) ≈ 1 (low)

Power gain (Av) AiAV (Very High) ≈ Ai (High) ≈ AV (High)

Input resistance (Rin) βacre (High) βacRE (High) re (Very low)

Cascading transistor Amplifier (RC Coupling)

When the amplification of a single transistor is not sufficient for a particular purpose, or
when the input or output resistance is not of correct magnitude for the intended application,
two or more stages may be connected in cascade (series) i.e. the output of a give stage is
connected to the input of the next stage as shown in Fig. 2.36

R11 RC1 RC2

R12 C

C C
T T
VO
RL
R21 R22
VS
RE1 CE1 RE2 CE2

Fig. 2.36

26
From Fig.2.36,
RB 2
V B1   VCC
R B1  RB 2
VE1 = VB1 - VBE
V 0
I E1  E1
R E1
25mV
re1 
I E1 (for silicon transistor)
R'C1
Av1 
1  
 re1
  
Where R’C1 = RC1//R12//R22//Rin2
Rin2 = βacre2
R22
VB 2   VCC
R12  R22
VE2 = VB2 - VBE
V 0
I E2  E2
RE 2
25mV
re 2 
I E 2 (for silicon transistor)
R 'C 2
Av 2 
1  
 re 2
  
Where R’C2 = RC2//RL
The overall Voltage gain Avo =Av1*Av2

27