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Lab 7

This lab, "BCD Adder/Subtractor & Magnitude Comparator," involves creating and testing digital circuits for basic arithmetic and comparison operations. First, you'll design a BCD adder circuit that adds two BCD digits, handling binary sums over 9 by adding 6 to correct the output. This requires using two 4-bit binary adders and logic gates. Next, you'll implement a magnitude comparator, which determines if one binary number is greater than, less than, or equal to another by interpreting output

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0% found this document useful (0 votes)
30 views

Lab 7

This lab, "BCD Adder/Subtractor & Magnitude Comparator," involves creating and testing digital circuits for basic arithmetic and comparison operations. First, you'll design a BCD adder circuit that adds two BCD digits, handling binary sums over 9 by adding 6 to correct the output. This requires using two 4-bit binary adders and logic gates. Next, you'll implement a magnitude comparator, which determines if one binary number is greater than, less than, or equal to another by interpreting output

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© © All Rights Reserved
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Lab 7 BCD Adder/subtractor & Magnitude Comparator

ICs: Two 7483 (4-bit binary adder), 7408 (2-input AND), 7432(2-input OR), 7486 (XOR),
7404 (Inverter)

1. BCD Adder: You are to design a circuit that adds two BCD digits. The inputs to the circuit
are BCD numbers A and B, plus a carry-in, cin. The output should be a two-digit BCD sum.
Build your BCD adder using two 4-bit binary adders and possibly some other logic gates.

In the BCD representation system each digit is encoded into its binary equivalent with four (4)
bits.
For the arithmetic addition of two decimal digits in BCD, the maximum value that may be
produced as the result is 9 + 9 + 1 = 19 (two largest operands plus the carry). If we try to add two
decimal digits in BCD with a 4-bit adder we will get a binary sum ranging from 0 to 19. When
the binary sum is less than or equal to 9, it also correctly represents the sum in BCD. When the
binary sum is greater than 9, however, it does not represent the correct BCD sum. The sum in
BCD is to be obtained by adding 6 to it. Perform the steps given below:

a. Perform the following addition in BCD as explained above:

1) 7 + 4
2) 3 + 2
3) 9 + 9

The above examples should help you realize when the conversion is necessary and what should
be done to perform the conversion correctly.

b. Complete the truth table below:

Decimal
Binary Sum BCD Sum
Inputs Number
Cin X Y Cout Z Cout S
0 0000 0000 0 0000 0 0000 0
0 0000 0001 0 0001 0 0001 1
0 0001 0001
0 0101 0100
0 0101 0101
0 0101 0110
0 1000 1000 1 0000 1 0110 16
0 1000 1001
0 1001 1001
1 1001 1001
c. A block diagram of using 2 4-bit binary adders to construct a BCD adder is given below.
Construct your BCD adder based on this diagram. Verify your design using the numbers in
a).
d. In your report, describe in detail how the BCD adder works. Your answer should include the
BCD addition algorithm and how this circuit implements that algorithm. Include at least two
example additions.
2. Magnitude comparator: the comparison of two numbers is an operation that determines
whether one number is greater than, equal to, or less than the other number. Two numbers, A
and B, can be compared by first subtracting A-B. If the output in S is equal to 0, then A = B.
The output carry from C4 determines the relative magnitudes of the numbers: When C4 = 1,
A ≥ B; when C4=0, A < B; and when C4 = 1 and S≠0, A > B.
It is necessary to supplement the subtractor circuit (shown below) to provide the
comparison logic.

This is done with a combinational circuit that has five inputs: S1 through S4 and C4, and
three outputs, designed by x, y, and z, so that
x = 1 if A = B (S = 0000)
y = 1 if A < B (C4 = 0)
z = 1 if A > B (C4 = 1 and S ≠ 0000)

(a) Obtain the function for x, y and z respectively.


(b) Design this combinational logic circuit with minimum number of gates. The
combinational circuit can be implemented with the 7404 and 7408(or 7432) ICs.
(c) Construct the comparator circuit and test its operation. Use at least two sets of numbers
for A and B to check each of the outputs, x, y, and z.
3. BCD subtractor: To perform BCD subtraction in a digital circuit we normally use 10’s
complement arithmetic by finding the 10’s complement of the subtrahend and use BCD
addition. 10’s complemented is 9’s complement adding 1. Design a combination circuit that
generates the 9’s complement of a BCD digit.
(a) Based on the following truth table for 9’s complement, use K-map to obtained the
simplified function of W, X, Y, and Z, respectively, (remember to utilize x conditions).
(b) Design a 9’s complement circuit using Multisim
(c) Use Multisim to build a BCD adder/subtractor using the 9’s complement circuit in (b),
the BCD adder in Question #1 and a quadruple 2-to-1 multiplexer (consisting of four 2-
to-1 multiplexers), based on the following diagram.

B3 B2 B1 B0
ABCD WXYZ (ABCD) A3 A2 A1 A0 M=0 add
M=1 sub
0000 1001
0001 1000
0010 0111
0011 0110
0100 0101
0101 0100
0110 0011
0111 0010 S
Quadruple 2-1 MUX
1000 0001
1001 0000
1010 xxxx
1011 xxxx
1100 xxxx
1101 xxxx
1110 xxxx
1111 xxxx

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