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Assignment 05

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34 views2 pages

Assignment 05

Uploaded by

contactghezlene
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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The National Higher School of Artificial Intelligence 2023/2024

Digital systems First Year

Assignment 05
Exercise 01
Consider the state diagram shown below. Implement the corresponding synchronous sequential circuit
by using JK flip-flop then D flip-flops

Exercise 02
Design the synchronous sequential circuit (by using D Flip-Flops) that detects the following sequence:
01101 (This sequence is read bit/bit from the right to the left). The sequence detector must assert an
output 𝑧 = 1 when the sequence is detected.

Exercise 03
Draw the State Transition Diagram for a Finite State Machine that, given a sequence of binary digits,
outputs 1 if the second most recently seen digit is 1 and outputs 0 otherwise. For example, an input of
01100111 has the output 00110011.

Exercise 04
A four-state counter has states labeled as S0, S1, S2 and S3. It has two single-bit inputs : CL (clear)
and CO (count).

 When CL = 1, the next state becomes S0 irrespective of the present state and the value of CO.
 When CL = 0 and CO = 0, the next state remains the same as the present state.
 When CL = 0, on each successive application of CO = 1, states transitions as . . .
S0→S1→S2→S3→S0 . . ..

The circuit has one output, which becomes 1 only when the circuit is in state S3, otherwise the output
remains 0.

Draw the state diagram for this counter circuit.

Exercise 05
A recognizer has a single input X and two outputs (Z1 and Z2).
 The output Z1 becomes 1 each time the input sequence 101 is observed. Otherwise Z1=0.
 The output Z2=1 each time input sequence 011 is observed, otherwise Z2=0.
For example, for the input X={10101101}, the outputs are: Z1={00101001}, and Z2={00000100}.
1) Draw the Mealy style state diagram of this machine.
2) Deduce the FSM using a shift register and a minimum number of gates.
The National Higher School of Artificial Intelligence 2023/2024
Digital systems First Year

Exercise 06
The logic implementation of a state machine (FSM-Sequential circuit) is shown in the figure below. How
many states does this state machine have? (Assume that it always starts from A=0, B=0)

D1 Q1 D0 Q0

clk clk
A B

Exercise 07
Analyze the sequential circuit in the figure below.

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