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20A04503T Microprocessors and Microcontrollers

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Shaik Althaf
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50 views1 page

20A04503T Microprocessors and Microcontrollers

Uploaded by

Shaik Althaf
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Code: 20A04503T R20

B.Tech III Year I Semester (R20) Regular & Supplementary Examinations January 2024
MICROPROCESSORS AND MICROCONTROLLERS
(Electronics & Communication Engineering)
Time: 3 hours Max. Marks: 70
PART – A
(Compulsory Question)
*****
1 Answer the following: (10 X 02 = 20 Marks)
(a) Define T – state and in which T-cycle the ALE signal is activated. 2M
(b) Tabulate vectored and non-vectored interrupts. 2M
(c) Draw the format of 8086 flag register. 2M
(d) List the different types of addressing modes of 8086 instruction set. 2M
(e) Specify the bit of a control word for the 8255, which differentiates between the I/O mode and the 2M
BSR mode.
(f) What is meant by cascading in 8259? 2M
(g) List any four addressing modes of 8051. 2M
(h) What is the operation carried out when 8051 executes the instruction MOV C A, @A+DPTR? 2M
(i) List the SFR registers of PIC. 2M
(j) Write a program to perform multiplication of 2 numbers using 8051. 2M

PART – B
(Answer all the questions: 05 X 10 = 50 Marks)

2 Draw the 8086 functional block diagram and explain its architectural features. 10M
OR
3 With the help of neat block diagram, describe the functionality of Bus Interface Unit and 10M
Execution unit of 8086.

4 Develop an 8086 assembly language program to evaluate the following expression: 10M
W = 2x2 + y2 + 4z2.
OR
5 Draw the timing diagram for the execution of 8086 MOV instruction. 10M

6 Draw the circuit to show how an LED is interfaced with 8085 using 8255. Also, explain the 10M
operating modes of 8255.
OR
7 Explain in detail about the successive approximation ADC using suitable diagram. 10M

8 Illustrate the architecture of 8051 with detailed explanation. 10M


OR
9 With neat diagram, explain how 8051 is interfaced to external memory. 10M

10 Explain the three stage pipelining implemented in ARM processor. 10M


OR
2
11 Represent the I C Bus of PIC in detail. Also, explain how memory is organized in PIC. 10M

*****

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