0% found this document useful (0 votes)
58 views11 pages

FET & MOSFET - Study Notes

Uploaded by

ummersultan94
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
58 views11 pages

FET & MOSFET - Study Notes

Uploaded by

ummersultan94
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 11

FET & MOSFET

ANALOG ELECTRONICS

Copyright © 2014-2021 Testbook Edu Solutions Pvt. Ltd.: All rights reserved
Download Testbook

FET & MOSFET

 It is a transistor that relies on the electric field to control the shape of the channel and therefore on the
conductivity of the channel. Hence referred to as field-effect transistor.

 FET is a unipolar transistor that involves only one type of charge carrier in its operation.

 In the case of an N-channel JFET, the operation involves a flow of electrons.

 In the case of a p-channel JFET, the operation involves a flow of holes.

 JFET operation involves the flow of majority carriers.

 In JFET, the current flowing through channel b/w Drain in the source is controlled by the voltage applied at
the Gate terminal, which is reverse biased.

 As it is reverse biased, the Gate current is practically zero as it has high input impedance.

 A JFET is a three-terminal semiconductor device in which current conduction is by one type of carrier i.e.
electrons or holes.

 The current conduction is controlled by means of an electric field between the gate and the conducting
channel of the device. To control the conduction of current from the source to the drain, the gate voltage
must be more negative than the source voltage.

 JEFTs are further divided into two types that n-channel JEFT and p-channel JEFT. The three leads of a JEFT
are labelled source, gate and drain.

ANALOG ELECTRONICS | FET & MOSFET PAGE 2


Download Testbook

 A field-effect transistor is a voltage-controlled device i.e. the output characteristics of the device are
controlled by the input voltage. There are two basic types of field-effect transistors:

 A junction field-effect transistor (JFET)

 Metal oxide semiconductor field-effect transistor (MOSFET)

 The gate to source voltage changes the channel width between two p regions, which ultimately controls
the current flowing between drain and source terminals.

Drain characteristics of FET


Drain characteristics are the plot between Drain current (IDS) and Drain to source voltage (VDS).

The Shockley equation for the drain current ID is

IDSS = Drain saturation current

VGS = Gate-Source voltage

ANALOG ELECTRONICS | FET & MOSFET PAGE 3


Download Testbook

VP = Pinch-off voltage

Drain characteristics are divided into two regions named Ohmic region and Pinch-off region as shown below

Pinch-off Region
 If VGS made strongly negative then the depletion region is fully penetrated into the channel.

 Channel width becomes zero, then the channel said to be Pinched-off. Due to this, the Drain current
becomes zero.

 The value of the VGS at which the channel pinched-off is called Pinch-off voltage (Vp).

 In this region, FET behaves as a Constant current source w.r.t VGS means that it acts as a voltage-
controlled current source.

Pinch-off Voltage
 The voltage at which channel will be pinched off i.e. no further movement of carriers from source to drain
and the current will be practically constant is called the ‘Pinch off voltage’.

 VP = VGS (Cutoff) = VGS (OFF)

 Condition for pinch off saturation:

 VDS = VGS - VP

ANALOG ELECTRONICS | FET & MOSFET PAGE 4


Download Testbook

To operate FET as an amplifier, it is operated in the saturation region.

 Cutoff: ID = 0

 Linear: ID increases linearly

 Saturation: ID is constant

Note:

 1) In ≤ IDSS always

 2) This also can be used as a ‘Voltage variable resistor’

1. In Saturation Region

Where IDSS = Saturation current at VGS = 0

VP = pinch-off voltage

IDS = Saturation current at any VGS

2. μ = rd gm

Where μ = amplification factor

rd = Drain Resistance

gm = Trans conductance

3)

Or

4)

ANALOG ELECTRONICS | FET & MOSFET PAGE 5


Download Testbook

MOSFET
The IGFET or MOSFET is a voltage-controlled field-effect transistor.

It has a “Metal Oxide” Gate electrode which is electrically insulated from the main semiconductor n-channel
or p-channel by a very thin layer of insulating material usually silicon dioxide (SiO2), commonly known as glass.

Insulating SiO2 layer provides High input impedance.

A Metal Oxide Semiconductor Field Effect Transistor (MOSFET) has 4 terminals Gate, Drain, Source and
Substrate (Body) terminal. But in many practical circuits MOSFET is used by connecting three terminals Gate,
Drain and Source while connecting Substrate (Body) terminal to source.

Base is not a terminal for MOSFET

MOSFET is of two types


1. Enhancement MOSFET
 In this kind of MOSFET, there is no predefined channel. The channel is constructed using the gate to source
applied voltage.

 More is the voltage on the gate, the better the device can conduct.

ANALOG ELECTRONICS | FET & MOSFET PAGE 6


Download Testbook

2. Depletion mode MOSFET


 In this type of MOSFET, the channel (between drain and source) is predefined and the MOSFET conducts
without any application of the gate voltage.

 As the voltage on the gate is either positive or negative, the channel conductivity decreases.

 Depletion MOSFET can work in both depletion and enhancement mode.

Symbol Representation of MOSFET

N-channel E MOSFET
VDD → Drain to source voltage

VGG → Gate to source voltage

Case I: when VGS < (Vth)GS , no physical layer between drain and source. So, ID = 0

Case II: when VGS > (Vth)GS, physical layer between drain and source created. And hence ID ≠ 0

ANALOG ELECTRONICS | FET & MOSFET PAGE 7


Download Testbook

N Channel D MOSFET

Physical layer between source and drain are present

Case I: When gate voltage is positive

VGS is positive, it attracts electron from substrate and enhance the conductivity of electron coming from drain
and source so ID increase

Case II: When gate voltage is negative

VGS is negative, so it attract hole from substrate these recombine with hole coming from source so drain
current reduce so ID reduce.

ANALOG ELECTRONICS | FET & MOSFET PAGE 8


Download Testbook

Transfer characteristics of an n-channel depletion


MOSFET is as shown

We observe that for VGS = 0, drain current is flowing.

Transfer characteristics of p-channel depletion


MOSFET is as shown

Transfer characteristics of p-channel depletion


MOSFET is as shown

ANALOG ELECTRONICS | FET & MOSFET PAGE 9


Download Testbook

We observe that for VGS = 0, there is no drain current flowing as there is no conduction region at VGS = 0, in
enhancement mode MOSFET.

Transfer characteristics of p-channel Enhancement


MOSFET is as shown

N channel MOSFET
1) If VDS ≥ (VGS - VT) → saturation Region

, VT = Threshold voltage of N-MOS

2) If VDS < VGS - VT → linear Region

3) If VGS > VT → MOSFET is ON

VGS < VT → MOSFET is OFF

4)

P Channel MOSFET
1) If VSG > |VT| → MOSFET is ON

ANALOG ELECTRONICS | FET & MOSFET PAGE 10


Download Testbook

VSG < |VT| → MOSFET is OFF

VT = Threshold voltage of P-MOS

2) If VSD ≥ (VSG + VT) → Saturation Region

3) If VSD < VSG + VT → Linear Region

4)

ANALOG ELECTRONICS | FET & MOSFET PAGE 11

You might also like