TMP 102

参考文献
TMP102
ZHCSIX4I – AUGUST 2007 – REVISED JUNE 2024
采用 SOT563 封装、具有 SMBus 和双线制串行接口的 TMP102 低功耗数字温度

传感器
1 特性 3 说明
• SOT563 封装 (1.6mm × 1.6mm) 尺寸较 SOT-23 减 TMP102 器件是一款数字温度传感器，旨在要求高精
小 68% 度的应用中替代 NTC/PTC 热敏电阻。该器件在未经校
• 精度无需校准：准或无外部组件信号调节的情况下可提供的精度为
– -25°C 至 85°C 范围内为 2.0°C（最大值） ±0.5°C。器件温度传感器为高度线性化产品，无需复
– -40°C 至 125°C 范围内为 3.0°C（最大值）杂计算或查表即可得知温度。片上 12 位 ADC 具备最
• 低静态电流：低 0.0625°C 的分辨率。
– 工作时 7.5μA（最大值） 1.6mm × 1.6mm SOT563 封装尺寸较 SOT-23 封装减
– 关断时 0.35μA（最大值）小 68%。TMP102 器件与 SMBus™、两线制和 I2C 接
• 电源电压范围：1.4V 至 3.6V 口兼容，可与多达四个器件共用一根总线。该器件还具
• 分辨率：12 位有 SMBus 警报功能。器件的额定工作电压范围是
• 数字输出：与 SMBus、两线制和 I2C 接口兼容 1.4V 至 3.6V ，整个工作范围内最大静态电流为
• NIST 可追溯 7.5µA。
2 应用 TMP102 器件适用于在各种通信、计算机、消费类产
品、环境、工业和仪表等各种应用中进行工作温度测
• 便携式电子产品
量。器件的额定工作温度范围为 -40°C 至 125°C。
• 电源温度监控
• 联网外设和打印机 TMP102 生产单元已完全通过可追溯 NIST 的传感器测
• PC 和笔记本电脑试，并且已借助可追溯 NIST 的设备使用 ISO/IEC
• 电池管理 17025 标准认可的校准进行验证。
• 企业机器
• 恒温器封装信息
• 机电设备温度器件型号封装(1) 封装尺寸(2)
• 通用温度测量： TMP102 SOT563 (6) 1.60mm × 1.60mm
– 工厂自动化与控制 (1) 有关更多信息，请参阅节 10。
– 测试与测量 (2) 封装尺寸（长 × 宽）为标称值，并包括引脚（如适用）。
– 医疗和保健
Temperature
Supply Voltage
1.4V to 3.6V Diode
1 Control 6
SCL Temp. SDA
Supply Bypass
Logic
Sensor
Capacitor
Pullup Resistors 0.01µF
5kΩ
DS
2 Serial 5
GND A/D V+
Interface
Converter
TMP102
Two-Wire 1 6
Host Controller SCL SDA Config.
3 4
ALERT OSC and Temp. ADD0
2 5 Register
GND V+
3 4
ALERT ADD0
方框图
简化原理图
本资源的原文使用英文撰写。为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。为确认

准确性，请务必访问 ti.com 参考最新的英文版本（控制文档）。
English Data Sheet: SBOS397
TMP102
ZHCSIX4I – AUGUST 2007 – REVISED JUNE 2024 www.ti.com.cn
Table of Contents
1 特性................................................................................... 1 6.5 Programming............................................................ 16
2 应用................................................................................... 1 7 Application and Implementation.................................. 20
3 说明................................................................................... 1 7.1 Application Information............................................. 20
4 Pin Configuration and Functions...................................3 7.2 Typical Application.................................................... 20
5 Specifications.................................................................. 4 7.3 Power Supply Recommendations.............................22
5.1 Absolute Maximum Ratings........................................ 4 7.4 Layout....................................................................... 22
5.2 ESD Ratings............................................................... 4 8 Device and Documentation Support............................23
5.3 Recommended Operating Conditions.........................4 8.1 Documentation Support............................................ 23
5.4 Thermal Information....................................................4 8.2 接收文档更新通知..................................................... 23
5.5 Electrical Characteristics.............................................5 8.3 支持资源....................................................................23
5.6 Timing Requirements.................................................. 6 8.4 Trademarks............................................................... 23
5.7 Typical Characteristics................................................ 7 8.5 静电放电警告............................................................ 23
6 Detailed Description........................................................8 8.6 术语表....................................................................... 23
6.1 Overview..................................................................... 8 9 Revision History............................................................ 23
6.2 Functional Block Diagram........................................... 8 10 Mechanical, Packaging, and Orderable
6.3 Feature Description.....................................................8 Information.................................................................... 25
6.4 Device Functional Modes..........................................14
2 提交文档反馈 Copyright © 2024 Texas Instruments Incorporated
Product Folder Links: TMP102

TMP102
www.ti.com.cn ZHCSIX4I – AUGUST 2007 – REVISED JUNE 2024
4 Pin Configuration and Functions
SCL 1 6 SDA
CBZ
GND 2 5 V+
ALERT 3 4 ADD0
图 4-1. DRL Package 6-Pin SOT563 Top View
表 4-1. Pin Functions

PIN
TYPE(1) DESCRIPTION
NO. NAME
1 SCL I Serial clock
2 GND — Ground
3 ALERT O Overtemperature alert. Open-drain output; requires a pullup resistor.
4 ADD0 I Address select. Connect to GND or V+
5 V+ I Supply voltage, 1.4 V to 3.6 V
6 SDA I/O Serial data. Open-drain output; requires a pullup resistor.
(1) I = Input, O = Output, I/O = Input or Output
Copyright © 2024 Texas Instruments Incorporated 提交文档反馈 3

TMP102
5 Specifications
5.1 Absolute Maximum Ratings
Over operating free-air temperature range (unless otherwise noted)(1)
MIN MAX UNIT
Supply voltage 4 V
Voltage at SCL, SDA and ADD0(2) –0.5 4 V
((V+) + 0.3)
Voltage at ALERT V
and ≤ 4
Operating temperature –55 150 °C
Junction temperature 150 °C
Storage temperature, Tstg –60 150 °C
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute Maximum Ratings do not imply
functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions. If
used outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device may not be fully
functional, and this may affect device reliability, functionality, performance, and shorten the device lifetime.
(2) Input voltage rating applies to all TMP102 input voltages.
5.2 ESD Ratings
VALUE UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000
V(ESD) Electrostatic discharge Charged-device model (CDM), per JEDEC specification JESD22- V
±1000
C101(2)
(1) Level listed above is the passing level per ANSI, ESDA, and JEDEC JS-001. JEDEC document JEP155 states that 500-V HBM allows
safe manufacturing with a standard ESD control process.
(2) Level listed above is the passing level per EIA-JEDEC JESD22-C101. JEDEC document JEP157 states that 250-V CDM allows safe
manufacturing with a standard ESD control process
5.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
V+ Supply voltage 1.4 3.3 3.6 V
TA Operating free-air temperature –40 125 °C
5.4 Thermal Information

TMP102
THERMAL METRIC(1) DRL (SOT563) UNIT
6 PINS
RθJA Junction-to-ambient thermal resistance 240.2 °C/W
RθJC(top) Junction-to-case (top) thermal resistance 96.4 °C/W
RθJB Junction-to-board thermal resistance 124.3 °C/W
ψJT Junction-to-top characterization parameter 4.0 °C/W
ψJB Junction-to-board characterization parameter 123.1 °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
note.

TMP102
5.5 Electrical Characteristics

At TA = 25°C and V+ = 1.4 to 3.6 V, unless otherwise noted.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
TEMPERATURE SENSOR
Range –40 125 °C
-25°C to 85°C ± 0.5 ±2
Accuracy (temperature error) °C
-40°C to 125°C ±1 ±3
vs supply 0.2 0.5 °C/V
Resolution 0.0625 °C
DIGITAL INPUT/OUTPUT
Input capacitance 3 pF
VIH Input logic high 0.7 × (V+) 3.6 V
VIL Input logic low –0.5 0.3 × (V+) V
IIN Input current 0 < VIN < 3.6V 1 µA
V+ > 2 V, IOL = 3 mA 0 0.4
SDA
V+ < 2 V, IOL = 3 mA 0 0.2 × (V+)
VOL Output logic V
V+ > 2 V, IOL = 3 mA 0 0.4
ALERT
V+ < 2 V, IOL = 3 mA 0 0.2 × (V+)
Resolution 12 Bit
Conversion time 10 15 ms
CR1 = 0, CR0 = 0 0.25
CR1 = 0, CR0 = 1 1
Conversion modes Conv/s
CR1 = 1, CR0 = 0 (default) 4
CR1 = 1, CR0 = 1 8
Timeout time 30 40 ms
POWER SUPPLY
Operating supply range 1.4 3.6 V
Serial bus inactive, CR1 =
3.2 5
0, CR0 = 1
Serial bus inactive, CR1 =
4.8 7.5
1, CR0 = 0 (default)
IQ Average quiescent current µA
Serial bus active, SCL
10
frequency = 400 kHz
40
frequency = 2.85 MHz
Serial bus inactive 0.15 0.35
5.5
ISD Shutdown current frequency = 400 kHz µA
35
frequency = 2.85 MHz
TEMPERATURE
Specified range –40 125 °C
Operating range –55 150 °C

TMP102
5.6 Timing Requirements

See the Timing Diagrams section for additional information.
FAST MODE HIGH-SPEED MODE
UNIT
MIN MAX MIN MAX
f(SCL) SCL operating frequency V+ 0.001 0.4 0.001 2.85 MHz
Bus-free time between STOP and START
t(BUF) 600 160 ns
condition
Hold time after repeated START condition.
t(HDSTA) 600 160 ns
After this period, the first clock is generated.
t(SUSTA) Repeated START condition setup time See 图 6-1 600 160 ns
t(SUSTO) STOP condition setup time 600 160 ns
t(HDDAT) Data hold time 100 900 25 105 ns
t(SUDAT) Data setup time 100 25 ns
t(LOW) SCL clock low period V+, See 图 6-1 1300 210 ns
t(HIGH) SCL clock high period See 图 6-1 600 60 ns
tFD Data fall time See 图 6-1 300 80 ns
See 图 6-1 300 ns
tRD Data rise time SCLK ≤ 100 kHz,
1000 ns
See 图 6-1
tFC Clock fall time See 图 6-1 300 40 ns
tRC Clock rise time See 图 6-1 300 40 ns

TMP102
5.7 Typical Characteristics

At TA = 25°C and V+ = 3.3 V, unless otherwise noted.
8.5 3,000
1.4V Supply 1.4V Supply
8 3.6V Supply 3.6V Supply
2,500
7.5
7 2,000
ISD (nA)
6.5
IQ (A)
1,500
6
5.5 1,000
5
500
4.5
4 0
-60 -40 -20 0 20 40 60 80 100 120 140 160 -60 -40 -20 0 20 40 60 80 100 120 140 160
Te mperature (C) Te mperature (C)
Four conversions per second 图 5-2. Shutdown Current vs Temperature

图 5-1. Average Quiescent Current vs Temperature
15 50.0
1.4V Supply -55C
14 3.6V Supply 45.0 +25C
13 40.0 +125C
Conversion Time (ms)
12 35.0
11 30.0
IQ (A)
10 25.0
9 20.0
8 15.0
7 10.0
6 5.0
5 0.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 1x103 1x104 1x105 1x106 1x107
Te mperature (C) Bus Frequency (Hz)
图 5-3. Conversion Time vs Temperature 图 5-4. Quiescent Current vs Bus Frequency

(Temperature at 3.3-V Supply)
1 70
Mean
0.8 Mean + 3 V 60
0.6 Mean 3 V
Temperature Error (qC)
50
0.4
Population
0.2 40
0
30
-0.2
20
-0.4
-0.6 10
-0.8
0
-0.35
-0.25
-0.15
-0.05
0.05
0.15
0.25
0.35
-0.3
-0.2
-0.1
0.1
0.2
0.3
0.4
0
-1
-60 -40 -20 0 20 40 60 80 100 120 140 D001
Temperature (qC) D002 Temperature Error (qC)
图 5-5. Temperature Error vs Temperature 图 5-6. Temperature Error at 25°C

TMP102
6 Detailed Description
6.1 Overview
The TMP102 device is a digital temperature sensor that is designed for thermal-management and thermal-
protection applications. The TMP102 device is two-wire, SMBus and I2C interface-compatible. The device is
specified over an operating temperature range of –40°C to 125°C. See Functional Block Diagram for a block
diagram of the TMP102 device.
The TMP102 device is a temperature sensor. Thermal paths run through the package leads as well as the plastic
package. The package leads provide the primary thermal path because of the lower thermal resistance of the
metal.
An alternative version of the TMP102 device is available. The TMP112 device has highest accuracy, the same
micro-package, and is pin-to-pin compatible.
表 6-1. Advantages of TMP112 versus TMP102
SUPPLY SUPPLY SPECIFIED
COMPATIBLE SUPPLY LOCAL SENSOR ACCURACY
DEVICE PACKAGE VOLTAGE VOLTAGE RESOLUTION CALIBRATION
INTERFACES CURRENT (MAX)
(MIN) (MAX) DRIFT SLOPE
I2C SOT563 12 bit 0.5°C: (0°C to 65°C)
TMP112 7.5 µA 1.4 V 3.6 V Yes
SMBus 1.2 × 1.6 × 0.6 0.0625°C 1°C: (-40°C to 125°C)
I2C SOT563 12 bit 2°C: (25°C to 85°C)
TMP102 7.5 µA 1.4 V 3.6 V No
SMBus 1.2 × 1.6 × 0.6 0.0625°C 3°C: (-40°C to 125°C)
6.2 Functional Block Diagram

Temperature
Diode
1 Control 6
SCL Temp. SDA
Logic
Sensor
DS
2 Serial 5
GND A/D V+
Interface
Converter
Config.
3 4
ALERT OSC and Temp. ADD0
Register
6.3 Feature Description

6.3.1 Digital Temperature Output
The digital output from each temperature measurement is stored in the read-only temperature register. The
temperature register of the TMP102 device is configured as a 12-bit, read-only register (configuration register
EM bit = 0, see the Extended Mode (EM) section), or as a 13-bit, read-only register (configuration register EM bit
= 1) that stores the output of the most recent conversion. Two bytes must be read to obtain data and are listed in
表 6-8 and 表 6-9. Byte 1 is the most significant byte (MSB), followed by byte 2, the least significant byte (LSB).
The first 12 bits (13 bits in extended mode) are used to indicate temperature. The least significant byte does not
have to be read if that information is not needed. The data format for temperature is summarized in 表 6-2 and
表 6-3. One LSB equals 0.0625°C. Negative numbers are represented in binary twos-complement format.
Following power-up or reset, the temperature register reads 0°C until the first conversion is complete. Bit D0 of
byte 2 indicates normal mode (EM bit = 0) or extended mode (EM bit = 1) , and can be used to distinguish
between the two temperature register data formats. The unused bits in the temperature register always read 0.

TMP102
表 6-2. 12-Bit Temperature Data Format (1)

TEMPERATURE (°C) DIGITAL OUTPUT (BINARY) HEX
128 0111 1111 1111 7FF
127.9375 0111 1111 1111 7FF
100 0110 0100 0000 640
80 0101 0000 0000 500
75 0100 1011 0000 4B0
50 0011 0010 0000 320
25 0001 1001 0000 190
0.25 0000 0000 0100 004
0 0000 0000 0000 000
–0.25 1111 1111 1100 FFC
–25 1110 0111 0000 E70
–55 1100 1001 0000 C90
(1) The resolution for the Temp ADC in Internal Temperature mode is 0.0625°C/count.
表 6-2 does not list all temperatures. Use the following rules to obtain the digital data format for a given
temperature or the temperature for a given digital data format.
To convert positive temperatures to a digital data format:
1. Divide the temperature by the resolution
2. Convert the result to binary code with a 12-bit, left-justified format, and MSB = 0 to denote a positive sign.
Example: (50°C) / (0.0625°C / LSB) = 800 = 320h = 0011 0010 0000
To convert a positive digital data format to temperature:
1. Convert the 12-bit, left-justified binary temperature result, with the MSB = 0 to denote a positive sign, to a
decimal number.
2. Multiply the decimal number by the resolution to obtain the positive temperature.
Example: 0011 0010 0000 = 320h = 800 × (0.0625°C / LSB) = 50°C
To convert negative temperatures to a digital data format:
1. Divide the absolute value of the temperature by the resolution, and convert the result to binary code with a
12-bit, left-justified format.
2. Generate the twos complement of the result by complementing the binary number and adding one. Denote a
negative number with MSB = 1.
Example: (|–25°C|) / (0.0625°C / LSB) = 400 = 190h = 0001 1001 0000
Two's complement format: 1110 0110 1111 + 1 = 1110 0111 0000
To convert a negative digital data format to temperature:
1. Generate the twos compliment of the 12-bit, left-justified binary number of the temperature result (with MSB
= 1, denoting negative temperature result) by complementing the binary number and adding one. This
represents the binary number of the absolute value of the temperature.
2. Convert to decimal number and multiply by the resolution to get the absolute temperature, then multiply by
–1 for the negative sign.
Example: 1110 0111 0000 has twos compliment of 0001 1001 0000 = 0001 1000 1111 + 1
Convert to temperature: 0001 1001 0000 = 190h = 400; 400 × (0.0625°C / LSB) = 25°C = (|–25°C|); (|–
25°C|) × (–1) = –25°C

TMP102
表 6-3. 13-Bit Temperature Data Format

TEMPERATURE (°C) DIGITAL OUTPUT (BINARY) HEX
150 0 1001 0110 0000 0960
128 0 1000 0000 0000 0800
127.9375 0 0111 1111 1111 07FF
100 0 0110 0100 0000 0640
80 0 0101 0000 0000 0500
75 0 0100 1011 0000 04B0
50 0 0011 0010 0000 0320
25 0 0001 1001 0000 0190
0.25 0 0000 0000 0100 0004
0 0 0000 0000 0000 0000
–0.25 1 1111 1111 1100 1FFC
–25 1 1110 0111 0000 1E70
–55 1 1100 1001 0000 1C90
6.3.2 Serial Interface

The TMP102 device operates as a target device only on the two-wire bus and SMBus. Connections to the bus
are made through the open-drain I/O lines, SDA and SCL. The SDA and SCL pins feature integrated spike
suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. The TMP102
device supports the transmission protocol for both fast (1 kHz to 400 kHz) and high-speed (1 kHz to 2.85 MHz)
modes. All data bytes are transmitted MSB first.
6.3.3 Bus Overview
The device that initiates the transfer is called a controller, and the devices controlled by the controller are called
targets. The bus must be controlled by a controller device that generates the serial clock (SCL), controls the bus
access, and generates the START and STOP conditions.
To address a specific device, a START condition is initiated, indicated by pulling the data-line (SDA) from a high
to low logic level when SCL is high. All targets on the bus shift in the target address byte on the rising edge of
the clock, with the last bit indicating whether a read or write operation is intended. During the ninth clock pulse,
the target being addressed responds to the controller by generating an acknowledge and by pulling SDA pin low.
A data transfer is then initiated and sent over eight clock pulses followed by an acknowledge bit. During the data
transfer the SDA pin must remain stable when SCL is high, because any change in SDA pin when SCL pin is
high is interpreted as a START signal or STOP signal.
When all data have been transferred, the controller generates a STOP condition indicated by pulling SDA pin
from low to high, when the SCL pin is high.
6.3.4 Serial Bus Address
To communicate with the TMP102, the controller must first address target devices via a target address byte. The
target address byte consists of seven address bits, and a direction bit indicating the intent of executing a read or
write operation.
The TMP102 features an address pin to allow up to four devices to be addressed on a single bus. 表 6-4
describes the pin logic levels used to properly connect up to four devices.

TMP102
表 6-4. Address Pin and Target Addresses

DEVICE TWO-WIRE ADDRESS A0 PIN CONNECTION
1001000 Ground
1001001 V+
1001010 SDA
1001011 SCL
6.3.5 Writing and Reading Operation

Accessing a particular register on the TMP102 device is accomplished by writing the appropriate value to the
pointer register. The value for the pointer register is the first byte transferred after the target address byte with
the R/W bit low. Every write operation to the TMP102 device requires a value for the pointer register (see 图
6-2).
When reading from the TMP102 device, the last value stored in the pointer register by a write operation
determines which register is read by a read operation. To change the register pointer for a read operation, a new
value must be written to the pointer register. This action is accomplished by issuing a target address byte with
the R/W bit low, followed by the pointer register byte. No additional data are required. The controller then
generates a START condition and sends the target address byte with the R/W bit high to initiate the read
command. See 图 6-1 for details of this sequence. If repeated reads from the same register are desired,
continually sending the Pointer Register bytes is not necessary because the TMP102 remembers the Pointer
Register value until the device is changed by the next write operation.
Register bytes are sent with the most significant byte first, followed by the least significant byte.
6.3.6 Target Mode Operations
The TMP102 can operate as a target receiver or target transmitter. As a target device, the TMP102 never drives
the SCL line.
6.3.6.1 Target Receiver Mode
The first byte transmitted by the controller is the target address, with the R/W bit low. The TMP102 then
acknowledges reception of a valid address. The next byte transmitted by the controller is the pointer register.
The TMP102 then acknowledges reception of the pointer register byte. The next byte or bytes are written to the
register addressed by the pointer register. The TMP102 acknowledges reception of each data byte. The
controller can terminate data transfer by generating a START or STOP condition..
6.3.6.2 Target Transmitter Mode
The first byte transmitted by the controller is the target address, with the R/ W bit high. The target acknowledges
reception of a valid target address. The next byte is transmitted by the target and is the most significant byte of
the register indicated by the pointer register. The controller acknowledges reception of the data byte. The next
byte transmitted by the target is the least significant byte. The controller acknowledges reception of the data
byte. The controller terminates data transfer by generating a Not-Acknowledge on reception of any data byte, or
generating a START or STOP condition.
6.3.7 SMBus Alert Function
The TMP102 device supports the SMBus alert function. When the TMP102 device operates in Interrupt Mode
(TM = 1), the ALERT pin can be connected as an SMBus alert signal. When a controller senses that an ALERT
condition is present on the ALERT line, the controller sends an SMBus alert command (0001 1001) to the bus. If
the ALERT pin is active, the device acknowledges the SMBus alert command and responds by returning the
target address on the SDA line. The eighth bit (LSB) of the target address byte indicates if the ALERT condition
was caused by the temperature exceeding THIGH or falling below TLOW. For POL = 0, the LSB is low if the
temperature is greater than or equal to THIGH; this bit is high if the temperature is less than TLOW. The polarity of
this bit is inverted if POL = 1. See 图 6-4 for details of this sequence.

TMP102
If multiple devices on the bus respond to the SMBus alert command, arbitration during the target address portion
of the SMBus alert command determines which device clears the ALERT status. The device with the lowest two-
wire address wins the arbitration. If the TMP102 device wins the arbitration, the ALERT pin inactivates at the
completion of the SMBus alert command. If the TMP102 device loses the arbitration, the ALERT pin remains
active.
6.3.8 General Call
The TMP102 device responds to a two-wire general call address (000 0000) if the eighth bit is 0. The device
acknowledges the general call address and responds to commands in the second byte. If the second byte is
0000 0110, the TMP102 device internal registers are reset to power-up values. The TMP102 device does not
support the general address acquire command.
6.3.9 High-Speed (HS) Mode
For the two-wire bus to operate at frequencies above 400 kHz, the controller device must issue an HS-Mode
controller code (0000 1xxx) as the first byte after a START condition to switch the bus to high-speed operation.
The TMP102 device does not acknowledge this byte, but switches the input filters on SDA and SCL and the
output filters on SDA to operate in HS-mode, allowing transfers of up to 2.85 MHz. After sending the HS-Mode
controller code and NACK bit, user must send a repeated start before sending the target address. The bus
continues to operate in HS-Mode until a STOP condition occurs on the bus. Upon receiving the STOP condition,
the TMP102 device switches the input and output filters back to fast-mode operation.
6.3.10 Timeout Function
The TMP102 device resets the serial interface if SCL is held low for 30 ms (typ) between a start and stop
condition. The TMP102 device releases the SDA line if the SCL pin is pulled low and waits for a start condition
from the host controller. To avoid activating the time-out function, maintaining a communication speed of at least
1 kHz for SCL operating frequency is necessary..
6.3.11 Timing Diagrams
The TMP102 device is two-wire, SMBus, and I2C-interface compatible. 图 6-1, 图 6-2, 图 6-3, and 图 6-4 list the
various operations on the TMP102 device. Parameters for 图 6-1 are defined in the Timing Requirements table.
The bus definitions are defined as follows:
Acknowledge Each receiving device, when addressed, is obliged to generate an acknowledge bit. A
device that acknowledges must pull down the SDA line during the acknowledge clock pulse
in such a way that the SDA line is stable low during the high period of the Acknowledge
clock pulse. Setup and hold times must be taken into account. On a controller receive, the
termination of the data transfer can be signaled by the controller generating a not-
acknowledge (1) on the last byte that has been transmitted by the target.
Bus Idle Both SDA and SCL lines remain high.
Data Transfer The number of data bytes transferred between a START and a STOP condition is not
limited and is determined by the controller device. The TMP102 device can also be used for
single byte updates. To update only the MS byte, terminate the communication by issuing a
START or STOP communication on the bus.
Start Data A change in the state of the SDA line, from high to low, when the SCL line is high, defines a
Transfer START condition. Each data transfer is initiated with a START condition.
Stop Data A change in the state of the SDA line from low to high when the SCL line is high defines a
Transfer STOP condition. Each data transfer is terminated with a repeated START or STOP
condition.

TMP102
t(LOW)
tFC t(HDSTA)
tRC
SCL
t(HDSTA) t(HIGH) t(SUSTA) t(SUSTO)

t(HDDAT) t(SUDAT)
SDA
t(BUF)
tRD tFD
P S S P
图 6-1. Two-Wire Timing Diagram

1 9 1 9
SCL …
SDA 1 0 0 1 0
(1)
A1
(1)
A0 R/W 0 0 0 0 0 0 P1 P0 …
Start By ACK By ACK By
Host Device Device
Frame 1 Two Wire Device Address Byte Frame 2 Pointer Register Byte
1 9 1 9
SCL
(Continued)
SDA
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
(Continued)
ACK By ACK By Stop By
Device Device Host
Frame 3 Data Byte 1 Frame 4 Data Byte 2
NOTE: (1) The value of A0 and A1 are determined by the ADD0 pin.
图 6-2. Two-Wire Timing Diagram for Write Word Format

TMP102
1 9 1 9
SCL …
SDA 1 0 0 1 0 A1
(1)
A0
(1)
R /W 0 0 0 0 0 0 P1 P0 …
Start By ACK By ACK By Stop By
Host Device Device Host
Frame 1 Two-Wire Device Address Byte Frame 2 Pointer Register Byte
1 9 1 9
SCL
(Continued)
…
SDA
(Continued)
1 0 0 1 0 A1
(1)
A0
(1)
R/W D7 D6 D5 D4 D3 D2 D1 D0 …
Start By ACK By From ACK By
Host Device Device Host (2)
Frame 3 Two-Wire Device Address Byte Frame 4 Data Byte 1 Read Register
1 9
SCL
(Continued)
SDA
D7 D6 D5 D4 D3 D2 D1 D0
(Continued)
From ACK By Stop By
(3)
Device Host Host
Frame 5 Data Byte 2 Read Register
(2) Host should leave SDA high to terminate a single-byte read operation.
(3) Host should leave SDA high to terminate a two-byte read operation.
图 6-3. Two-Wire Timing Diagram for Read Word Format
ALERT
1 9 1 9
SCL
(1) (1)
SDA 0 0 0 1 1 0 0 R/W 1 0 0 1 A1 A0 Status
Start By ACK By From NACK By Stop By

Host Device Device Host Host
Frame 1 SMBus ALERT Response Address Byte Frame 2 Device Address Byte
图 6-4. Timing Diagram for SMBus Alert
6.4 Device Functional Modes

6.4.1 Continuous-Conversion Mode
The default mode of the TMP102 device is continuous conversion mode. During continuous-conversion mode,
the ADC performs continuous temperature conversions and stores each results to the temperature register,
overwriting the result from the previous conversion. The conversion rate bits, CR1 and CR0, configure the
TMP102 device for conversion rates of 0.25 Hz, 1 Hz, 4 Hz, or 8 Hz. The default rate is 4 Hz. The TMP102
device has a typical conversion time of 10 ms. To achieve different conversion rates, the TMP102 device makes
a conversion and then powers down to wait for the appropriate delay set by CR1 and CR0. 表 6-5 lists the
settings for CR1 and CR0.

TMP102
表 6-5. Conversion Rate Settings

CR1 CR0 CONVERSION RATE
0 0 0.25 Hz
0 1 1 Hz
1 0 4 Hz (default)
1 1 8 Hz
After power-up or general-call reset, the TMP102 immediately starts a conversion, as shown in 图 6-5. The first
result is available after 10 ms (typical). The active quiescent current during conversion is 55 μA (typical at
+27°C). The quiescent current during delay is 2.6 μA (typical at +27°C).
Delay(1)
10ms
10ms
Startup Start of
Conversion
A. Delay is set by CR1 and CR0.
图 6-5. Conversion Start
6.4.2 Extended Mode (EM)

The Extended-Mode bit configures the device for Normal mode operation (EM = 0) or Extended mode operation
(EM = 1). In Normal mode, the Temperature Register and high- and low-limit registers use a 12-bit data format.
Normal mode is used to make the TMP102 device compatible with the TMP75 device.
Extended mode (EM = 1) allows measurement of temperatures above 128°C by configuring the Temperature
Register, and high- and low-limit registers for 13-bit data format.
6.4.3 Shutdown Mode (SD)
The Shutdown-mode bit saves maximum power by shutting down all device circuitry other than the serial
interface, reducing current consumption to typically less than 0.15 μA. Shutdown mode enables when the SD bit
is 1; the device shuts down when current conversion is completed. When SD is equal to 0, the device maintains
a continuous conversion state.
6.4.4 One-Shot/Conversion Ready (OS)
The TMP102 device features a one-shot temperature measurement mode. When the device is in Shutdown
Mode, writing a 1 to the OS bit starts a single temperature conversion. During the conversion, the OS bit reads
'0'. The device returns to the shutdown state at the completion of the single conversion. After the conversion, the
OS bit reads 1. This feature reduces power consumption in the TMP102 device when continuous temperature
monitoring is not required.
As a result of the short conversion time, the TMP102 device achieves a higher conversion rate. A single
conversion typically takes 10 ms and a read can take place in less than 20 μs. When using One-Shot Mode, 80
or more conversions per second are possible.
6.4.5 Thermostat Mode (TM)
The thermostat-mode bit indicates to the device whether to operate in comparator mode (TM = 0) or Interrupt
mode (TM = 1).

TMP102
6.4.5.1 Comparator Mode (TM = 0)

In Comparator mode (TM = 0), the Alert pin is activated when the temperature equals or exceeds the value in
the T(HIGH) register and remains active until the temperature falls below the value in the T(LOW) register. For more
information on the comparator mode, see the High- and Low-Limit Registers .
6.4.5.2 Interrupt Mode (TM = 1)
In Interrupt mode (TM = 1), the Alert pin is activated with the conditions described in High- and Low-Limit
Registers . The Alert pin is cleared when the host controller reads the temperature register. For more information
on the interrupt mode, see the High- and Low-Limit Registers .
6.5 Programming
6.5.1 Pointer Register
图 6-6 illustrates the internal register structure of the TMP102 device. The 8-bit Pointer Register of the device is
used to address a given data register. The Pointer Register uses the two least-significant bytes (LSBs) (see 表
6-15 and 表 6-16) to identify which of the data registers must respond to a read or write command. 表 6-6
identifies the bits of the Pointer Register byte. During a write command, P2 through P7 must always be '0'. 表 6-7
describes the pointer address of the registers available in the TMP102 device. The power-up reset value of P1
and P0 is 00. By default, the TMP102 device reads the temperature on power up.
Pointer
Register
Temperature
Register
SCL
Configuration
Register
I/O
Control
Interface
TLOW
Register
SDA
THIGH
Register
图 6-6. Internal Register Structure
表 6-6. Pointer Register Byte

P7 P6 P5 P4 P3 P2 P1 P0
0 0 0 0 0 0 Register Bits
表 6-7. Pointer Addresses

P1 P0 REGISTER
0 0 Temperature Register (Read Only)
0 1 Configuration Register (Read/Write)
1 0 TLOW Register (Read/Write)
1 1 THIGH Register (Read/Write)
6.5.2 Temperature Register

The Temperature Register of the TMP102 is configured as a 12-bit, read-only register (Configuration Register
EM bit = 0, see the Extended Mode section), or as a 13-bit, read-only register (Configuration Register EM bit = 1)

TMP102
that stores the output of the most recent conversion. Two bytes must be read to obtain data, and are described
in 表 6-8 and 表 6-9. Note that byte 1 is the most significant byte, followed by byte 2, the least significant byte.
The first 12 bits (13 bits in Extended mode) are used to indicate temperature. The least significant byte does not
have to be read if that information is not needed.
表 6-8. Byte 1 of Temperature Register (1)
D7 D6 D5 D4 D3 D2 D1 D0
T11 T10 T9 T8 T7 T6 T5 T4
(T12) (T11) (T10) (T9) (T8) (T7) (T6) (T5)
(1) Extended mode 13-bit configuration shown in parenthesis.
表 6-9. Byte 2 of Temperature Register (1)

D7 D6 D5 D4 D3 D2 D1 D0
T3 T2 T1 T0 0 0 0 0
(T4) (T3) (T2) (T1) (T0) (0) (0) (1)
6.5.3 Configuration Register

The Configuration Register is a 16-bit read/write register used to store bits that control the operational modes of
the temperature sensor. Read/write operations are performed MSB first. 表 6-10 and 表 6-11 list the format and
the power-up or reset value of the configuration register. For compatibility, 表 6-10 and 表 6-11 correspond to the
configuration register in the TMP75 device and TMP275 device (for more information see the device data
sheets, SBOS288 and SBOS363, respectively). All registers are updated byte by byte.
表 6-10. Byte 1 of Configuration and Power-Up or Reset Format
D7 D6 D5 D4 D3 D2 D1 D0
OS R1 R0 F1 F0 POL TM SD
0 1 1 0 0 0 0 0
表 6-11. Byte 2 of Configuration and Power-Up or Reset Format

D7 D6 D5 D4 D3 D2 D1 D0
CR1 CR0 AL EM 0 0 0 0
1 0 1 0 0 0 0 0
6.5.3.1 Shutdown Mode (SD)

The Shutdown-mode bit saves maximum power by shutting down all device circuitry other than the serial
interface, reducing current consumption to typically less than 0.5 μA. Shutdown mode enables when the SD bit
is 1; the device shuts down when current conversion is completed. When SD is equal to 0, the device maintains
a continuous conversion state
6.5.3.2 Thermostat Mode (TM)
The Thermostat mode bit indicates to the device whether to operate in Comparator mode (TM = 0) or Interrupt
mode (TM = 1). For more information on comparator and interrupt modes, see the High- and Low-Limit Registers
section.
6.5.3.3 Polarity (POL)
The polarity bit allows the user to adjust the polarity of the ALERT pin output. If the POL bit is set to 0 (default),
the ALERT pin becomes active low. When the POL bit is set to 1, the ALERT pin becomes active high and the
state of the ALERT pin is inverted. The operation of the ALERT pin in various modes is illustrated in 图 6-7.

TMP102
THIGH
Measured
Temperature
TLOW
Device ALERT PIN

(Comparator Mode)
POL = 0
Device ALERT PIN
(Interrupt Mode)
POL = 0
Device ALERT PIN
(Comparator Mode)
POL = 1
Device ALERT PIN
(Interrupt Mode)
POL = 1
Read Read Read

Time
图 6-7. Output Transfer Function Diagrams
6.5.3.4 Fault Queue (F1/F0)

A fault condition exists when the measured temperature exceeds the user-defined limits set in the THIGH and
TLOW registers. Additionally, the number of fault conditions required to generate an alert can be programmed
using the fault queue. The fault queue is provided to prevent a false alert as a result of environmental noise. The
fault queue requires consecutive fault measurements to trigger the alert function. 表 6-12 defines the number of
measured faults that can be programmed to trigger an alert condition in the device. For THIGH and T LOW register
format and byte order, see the High- and Low-Limit Registers section.
表 6-12. TMP102 Fault Settings
F1 F0 CONSECUTIVE FAULTS
0 0 1
0 1 2
1 0 4
1 1 6
6.5.3.5 Converter Resolution (R1/R0)

The converter resolution bits, R1 and R0, are read-only bits. The TMP102 converter resolution is set at device
start-up to 11 which sets the temperature register to a 12 bit-resolution.
6.5.3.6 One-Shot (OS)
When the device is in Shutdown Mode, writing a 1 to the OS bit starts a single temperature conversion. During
the conversion, the OS bit reads '0'. The device returns to the shutdown state at the completion of the single
conversion. For more information on the one-shot conversion mode, see the One-Shot/Conversion Ready (OS)
section.

TMP102
6.5.3.7 EM Bit
The Extended-Mode bit configures the device for Normal Mode operation (EM = 0) or Extended Mode operation
(EM = 1). In normal mode, the temperature register, high-limit register, and low-limit register use a 12-bit data
format. For more information on the extended mode, see the Extended Mode (EM) section.
6.5.3.8 Alert (AL Bit)
The AL bit is a read-only function. Reading the AL bit provides information about the comparator mode status.
The state of the POL bit inverts the polarity of data returned from the AL bit. When the POL bit equals 0, the AL
bit reads as 1 until the temperature equals or exceeds T(HIGH) for the programmed number of consecutive faults,
causing the AL bit to read as 0. The AL bit continues to read as 0 until the temperature falls below T(LOW) for the
programmed number of consecutive faults, when the AL bit again reads as 1. The status of the TM bit does not
affect the status of the AL bit.
6.5.3.9 Conversion Rate (CR)
The conversion rate bits, CR1 and CR0, configure the TMP102 device for conversion rates of 0.25 Hz, 1 Hz, 4
Hz, or 8 Hz. The default rate is 4 Hz. For more information on the conversion rate bits, see 表 6-5.
6.5.4 High- and Low-Limit Registers
The temperature limits are stored in the T(LOW) and T(HIGH) registers in the same format as the temperature
result, and the values are compared to the temperature result on every conversion. The outcome of the
comparison drives the behavior of the ALERT pin, which operates as a comparator output or an interrupt, and is
set by the TM bit in the configuration register.
In Comparator mode (TM = 0), the ALERT pin becomes active when the temperature equals or exceeds the
value in THIGH and generates a consecutive number of faults according to fault bits F1 and F0. The ALERT pin
remains active until the temperature falls below the indicated TLOW value for the same number of faults.
In Interrupt mode (TM = 1), the ALERT pin becomes active when the temperature equals or exceeds the value in
T(HIGH) for a consecutive number of fault conditions (as shown in 表 6-5). The ALERT pin remains active until a
read operation of any register occurs, or the device successfully responds to the SMBus Alert Response
address. The ALERT pin will also be cleared if the device is placed in Shutdown mode. When the ALERT pin is
cleared, it becomes active again only when temperature falls below T(LOW), and remains active until cleared by a
read operation of any register or a successful response to the SMBus Alert Response address. When the
ALERT pin is cleared, the above cycle repeats, with the ALERT pin becoming active when the temperature
equals or exceeds T(HIGH). The ALERT pin can also be cleared by resetting the device with the General Call
Reset command. This action also clears the state of the internal registers in the device, returning the device to
Comparator mode (TM = 0).
Both operational modes are represented in 图 6-7. 表 6-13 through 表 6-16 describe the format for the THIGH and
TLOW registers. Note that the most significant byte is sent first, followed by the least significant byte. Power-up
reset values for THIGH and TLOW are: THIGH = 80°C and TLOW = 75°C. The format of the data for THIGH and TLOW
is the same as for the Temperature Register.
表 6-13. Byte 1 Temperature RegisterHIGH (1)
D7 D6 D5 D4 D3 D2 D1 D0
H11 H10 H9 H8 H7 H6 H5 H4
(H12) (H11) (H10) (H9) (H8) (H7) (H6) (H5)
表 6-14. Byte 2 Temperature RegisterHIGH

D7 D6 D5 D4 D3 D2 D1 D0
H3 H2 H1 H0 0 0 0 0
(H4) (H3) (H2) (H1) (H0) (0) (0) (0)

TMP102
表 6-15. Byte 1 Temperature RegisterLOW (1)

D7 D6 D5 D4 D3 D2 D1 D0
L11 L10 L9 L8 L7 L6 L5 L4
(L12) (L11) (L10) (L9) (L8) (L7) (L6) (L5)
表 6-16. Byte 2 Temperature RegisterLOW

D7 D6 D5 D4 D3 D2 D1 D0
L3 L2 L1 L0 0 0 0 0
(L4) (L3) (L2) (L1) (L0) (0) (0) (0)
7 Application and Implementation

备注
以下应用部分中的信息不属于 TI 器件规格的范围，TI 不担保其准确性和完整性。TI 的客户应负责确定
器件是否适用于其应用。客户应验证并测试其设计，以确保系统功能。
7.1 Application Information

The TMP102 device is used to measure the PCB temperature of the board location where the device is
mounted. The programmable address options allow up to four locations on the board to be monitored on a single
serial bus.
7.2 Typical Application
Supply Voltage
1.4V to 3.6V
Supply Bypass
Capacitor
Pullup Resistors 0.01µF
5kΩ
TMP102
Two-Wire 1 6
Host Controller SCL SDA
2 5
GND V+
3 4
ALERT ADD0
图 7-1. Typical Connections
7.2.1 Design Requirements

The TMP102 device requires pullup resistors on the SCL, SDA, and ALERT pins. The recommended value for
the pullup resistors is 5-kΩ. In some applications the pullup resistor can be lower or higher than 5 kΩ but must
not exceed 3 mA of current on any of those pins. A 0.01-μF bypass capacitor on the supply is recommended as
shown in 图 7-1. The SCL and SDA lines can be pulled up to a supply that is equal to or higher than V+ through

TMP102
the pullup resistors. To configure one of four different addresses on the bus, connect the ADD0 pin to either the
GND, V+, SDA, or SCL pin.
7.2.2 Detailed Design Procedure
Place the TMP102 device in close proximity to the heat source that must be monitored, with a proper layout for
good thermal coupling. This placement verifies that temperature changes are captured within the shortest
possible time interval. To maintain accuracy in applications that require air or surface temperature measurement,
care must be taken to isolate the package and leads from ambient air temperature. A thermally-conductive
adhesive is helpful in achieving accurate surface temperature measurement.
The TMP102 device is a very low-power device and generates very low noise on the supply bus. Applying an RC
filter to the V+ pin of the TMP102 device can further reduce any noise that the TMP102 device can propagate to
other components. R(F) in 图 7-2 must be less than 5 kΩ and C(F) must be greater than 10 nF.
Supply Voltage
Device R(F) ≤ 5 kΩ
SCL SDA
GND V+
C(F) ≥ 10 nF
ALERT ADD0
图 7-2. Noise Reduction Techniques
7.2.3 Application Curve

图 7-3 shows the step response of the TMP102 device to a submersion in an oil bath of 100°C from room
temperature (27°C). The time-constant, or the time for the output to reach 63% of the input step, is 0.8 s. The
time-constant result depends on the printed circuit board (PCB) that the TMP102 device is mounted. For this
test, the TMP102 device was soldered to a two-layer PCB that measured 0.375 inch × 0.437 inch.
space
100
95
90
85
80
Temperature (qC)
75
70
65
60
55
50
45
40
35
30
25
-1 1 3 5 7 9 11 13 15 17 19
Time (s)
图 7-3. Temperature Step Response

TMP102
7.3 Power Supply Recommendations

The TMP102 device operates with power supply in the range of 1.4 to 3.6 V. The device is optimized for
operation at 3.3-V supply but can measure temperature accurately in the full supply range.
A power-supply bypass capacitor is required for proper operation. Place this capacitor as close as possible to
the supply and ground pins of the device. A typical value for this supply bypass capacitor is 0.01 μF.
Applications with noisy or high-impedance power supplies can require additional decoupling capacitors to reject
power-supply noise.
7.4 Layout
7.4.1 Layout Guidelines
Place the power-supply bypass capacitor as close as possible to the supply and ground pins. The recommended
value of this bypass capacitor is 0.01 μF. Additional decoupling capacitance can be added to compensate for
noisy or high-impedance power supplies. Pull up the open-drain output pins (SDA , SCL and ALERT) through 5-
kΩ pullup resistors.
7.4.2 Layout Example
Via to Power or
Ground Plane
Pullup Resistors Via to Internal Layer
SCL SDA
Supply Voltage
GND V+
ALERT ADD0
Supply Bypass
Capacitor
Ground Plane for

Thermal Coupling
to Heat Source
Serial Bus Traces
Heat Source
图 7-4. TMP102 Layout Example

TMP102
8 Device and Documentation Support

8.1 Documentation Support
8.1.1 Related Documentation
For related documentation see the following:
• Texas Instruments, TMPx75 Temperature Sensor With I2C and SMBus Interface in Industry Standard LM75
Form Factor and Pinout , data sheet
• Texas Instruments, TMP275 ±0.5°C Temperature Sensor With I 2C and SMBus Interface in Industry Standard
LM75 Form Factor and Pinout , data sheet
• Texas Instruments, Capacitive Touch Operated Automotive LED Dome Light with Haptics Feedback, Design
Guide
8.2 接收文档更新通知
要接收文档更新通知，请导航至 ti.com 上的器件产品文件夹。点击通知进行注册，即可每周接收产品信息更改摘
要。有关更改的详细信息，请查看任何已修订文档中包含的修订历史记录。
8.3 支持资源
TI E2E™ 中文支持论坛是工程师的重要参考资料，可直接从专家处获得快速、经过验证的解答和设计帮助。搜索
现有解答或提出自己的问题，获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范，并且不一定反映 TI 的观点；请参阅
TI 的使用条款。
8.4 Trademarks
SMBus™ is a trademark of Intel, Inc.
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
8.5 静电放电警告
静电放电 (ESD) 会损坏这个集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理
和安装程序，可能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级，大至整个器件故障。精密的集成电路可能更容易受到损坏，这是因为非常细微的参
数更改都可能会导致器件与其发布的规格不相符。
8.6 术语表
TI 术语表本术语表列出并解释了术语、首字母缩略词和定义。
9 Revision History
注：以前版本的页码可能与当前版本的页码不同
Changes from Revision H (December 2018) to Revision I (June 2024) Page
• 通篇更新了表格、图和交叉参考的编号格式....................................................................................................... 1
• 将提到 I2C 的旧术语实例通篇更改为控制器和目标............................................................................................ 1
• 通篇更改了“转换时间”....................................................................................................................................1
• 通篇更改了工作电流、关断电流、平均和延迟静态电流..................................................................................... 1
• Changed the SCL pin description in Pin Functions table................................................................................... 3
• Removed machine model (MM) from ESD Ratings section............................................................................... 4
• Changed DRL package Thermal Information section.........................................................................................4
• Changed "Conversion time" in Electrical Characteristics table.......................................................................... 5
• Added Average quiescent current at 1Hz conversion mode in Electrical Characteristics table......................... 5

TMP102
• Changed Average quiescent current at 4Hz conversion mode in Electrical Characteristics table..................... 5
• Changed Average quiescent current when serial bus active, SCL frequency = 400 kHz in Electrical
Characteristics table........................................................................................................................................... 5
• Changed Average quiescent current when serial bus active, SCL frequency = 2.85MHz in Electrical
• Changed the frequency from 3.4 to 2.85 MHz in the POWER SUPPLY section of the Electrical Characteristics
table.................................................................................................................................................................... 5
• Changed shutdown current for both serial bus inactive and active, SCL frequency = 400 kHz in Electrical
• Changed shutdown current when serial bus active, SCL frequency = 2.85 MHz in Electrical Characteristics
table.................................................................................................................................................................... 5
• Changed Average Quiescent Current vs Temperature, Shutdown Current vs Temperature, Conversion Time
vs Temperature, and Quiescent Current vs Bus Frequency graphs in the Typical Characteristics section........7
• Changed the Interrupt Mode (TM=1) section....................................................................................................16
Changes from Revision G (September 2018) to Revision H (December 2018) Page

• Changed Absolute Maximum Ratings for voltage at SCL, SDA and ADD0 pin..................................................4
• Changed Absolute Maximum Ratings for voltage at ALERT pin........................................................................ 4
Changes from Revision F (September 2018) to Revision G (November 2018) Page

• Changed input voltage maximum value from: 3.6V to: 4V..................................................................................4
• Changed output voltage maximum value from: 3.6V to: ((V+) + 0.5) and ≤ 4V................................................ 4
• Changed Junction-to-ambient thermal resistance from 200 °C/W to 210.3 °C/W.............................................. 4
• Changed Junction-to-case (top) thermal resistance from 73.7 °C/W to 105.0 °C/W.......................................... 4
• Changed Junction-to-board thermal resistance from 34.4 °C/W to 87.5 °C/W...................................................4
• Changed Junction-to-top characterization parameter from 3.1 °C/W to 6.1 °C/W..............................................4
• Changed Junction-to-board characterization parameter from 34.2 °C/W to 87.0 °C/W..................................... 4
• Added the Receiving Notification of Documentation Updates section..............................................................23
Changes from Revision E (April 2015) to Revision F (December 2015) Page

• 新增了 TI 设计.................................................................................................................................................... 1
• 添加了“NIST 特性”要点..................................................................................................................................1
• 向说明部分添加了最后一段............................................................................................................................... 1
Changes from Revision D (September 2014) to Revision E (December 2014) Page

• Changed the Temperature Error vs Temperature graph in the Typical Characteristics section..........................7
• Changed the Temperature Error at 25°C graph in the Typical Characteristics section...................................... 7
Changes from Revision C (October 2012) to Revision D (September 2014) Page

• Added Handling Rating table, Feature Description section, Device Functional Modes, Application and
Implementation section, Power Supply Recommendations section, Layout section, Device and
Documentation Support section, and Mechanical, Packaging, and Orderable Information section................... 4

TMP102
• Changed parameters in Timing Requirements. .................................................................................................6
Changes from Revision B (October 2008) to Revision C (October 2012) Page

• Changed DRL package Thermal Information section.........................................................................................4
• Changed "Conversion time" in Electrical Characteristics table.......................................................................... 5
• Changed values for Data Hold Time parameter in Timing Requirements ....................................................... 12
10 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

PACKAGE OPTION ADDENDUM
www.ti.com 30-Jul-2024
PACKAGING INFORMATION
Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)
TMP102AIDRLR ACTIVE SOT-5X3 DRL 6 4000 RoHS & Green NIPDAU | NIPDAUAG Level-1-260C-UNLIM -40 to 125 CBZ Samples
TMP102AIDRLT OBSOLETE SOT-5X3 DRL 6 TBD Call TI Call TI -40 to 125 CBZ
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com 30-Jul-2024
OTHER QUALIFIED VERSIONS OF TMP102 :
• Automotive : TMP102-Q1
NOTE: Qualified Version Definitions:
• Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Sep-2024
TAPE AND REEL INFORMATION
REEL DIMENSIONS TAPE DIMENSIONS

K0 P1
B0 W
Reel
Diameter
Cavity A0
A0 Dimension designed to accommodate the component width
B0 Dimension designed to accommodate the component length
K0 Dimension designed to accommodate the component thickness
W Overall width of the carrier tape
P1 Pitch between successive cavity centers
Reel Width (W1)

QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE
Sprocket Holes
Q1 Q2 Q1 Q2
Q3 Q4 Q3 Q4 User Direction of Feed
Pocket Quadrants
*All dimensions are nominal

Device Package Package Pins SPQ Reel Reel A0 B0 K0 P1 W Pin1
Type Drawing Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TMP102AIDRLR SOT-5X3 DRL 6 4000 180.0 8.4 2.0 1.8 0.75 4.0 8.0 Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com 25-Sep-2024
TAPE AND REEL BOX DIMENSIONS
Width (mm)
H
W
*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TMP102AIDRLR SOT-5X3 DRL 6 4000 210.0 185.0 35.0
Pack Materials-Page 2
PACKAGE OUTLINE
DRL0006A SCALE 8.000
SOT - 0.6 mm max height
PLASTIC SMALL OUTLINE
1.7
1.5
PIN 1 A
ID AREA
1
6
4X 0.5
1.7
2X 1
1.5
NOTE 3
4 2X 0 -10
3
1.3 0.3 0.05

B 6X TYP
1.1 0.1 0.00
2X 4 -10
0.6 MAX
C
SEATING PLANE
0.18
6X 0.05 C
0.08
SYMM
SYMM
0.27
6X
0.15
0.1 C A B
0.4
6X 0.05 C
0.2
4223266/E 07/2024
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15 mm per side.
4. Reference JEDEC registration MO-293 Variation UAAD
www.ti.com
EXAMPLE BOARD LAYOUT
DRL0006A SOT - 0.6 mm max height
6X (0.67)
SYMM
1
6X (0.3) 6
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
LAND PATTERN EXAMPLE

SCALE:30X
0.05 MAX 0.05 MIN

AROUND AROUND
SOLDER MASK METAL METAL UNDER SOLDER MASK

OPENING SOLDER MASK OPENING
NON SOLDER MASK SOLDER MASK
DEFINED DEFINED
(PREFERRED)
SOLDERMASK DETAILS
4223266/E 07/2024
NOTES: (continued)
5. Publication IPC-7351 may have alternate designs.

6. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
7. Land pattern design aligns to IPC-610, Bottom Termination Component (BTC) solder joint inspection criteria.
www.ti.com
EXAMPLE STENCIL DESIGN
DRL0006A SOT - 0.6 mm max height
6X (0.67)
SYMM
1
6X (0.3) 6
SYMM
4X (0.5)
4
3
(R0.05) TYP
(1.48)
SOLDER PASTE EXAMPLE

BASED ON 0.1 mm THICK STENCIL
SCALE:30X
4223266/E 07/2024
NOTES: (continued)
8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
9. Board assembly site may have different recommendations for stencil design.
www.ti.com
重要声明和免责声明
TI“按原样”提供技术和可靠性数据（包括数据表）、设计资源（包括参考设计）、应用或其他设计建议、网络工具、安全信息和其他资源，
不保证没有瑕疵且不做出任何明示或暗示的担保，包括但不限于对适销性、某特定用途方面的适用性或不侵犯任何第三方知识产权的暗示担
保。
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任：(1) 针对您的应用选择合适的 TI 产品，(2) 设计、验
证并测试您的应用，(3) 确保您的应用满足相应标准以及任何其他功能安全、信息安全、监管或其他要求。
这些资源如有变更，恕不另行通知。TI 授权您仅可将这些资源用于研发本资源所述的 TI 产品的应用。严禁对这些资源进行其他复制或展示。
您无权使用任何其他 TI 知识产权或任何第三方知识产权。您应全额赔偿因在这些资源的使用中对 TI 及其代表造成的任何索赔、损害、成
本、损失和债务，TI 对此概不负责。
TI 提供的产品受 TI 的销售条款或 ti.com 上其他适用条款/TI 产品随附的其他适用条款的约束。TI 提供这些资源并不会扩展或以其他方式更改
TI 针对 TI 产品发布的适用的担保或担保免责声明。
TI 反对并拒绝您可能提出的任何其他或不同的条款。IMPORTANT NOTICE
邮寄地址：Texas Instruments, Post Office Box 655303, Dallas, Texas 75265

Copyright © 2024，德州仪器 (TI) 公司

TMP 102

Uploaded by

Copyright:

Available Formats

TMP 102

Uploaded by

Document Information

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

TMP 102

Uploaded by

Copyright:

Available Formats

参考文献

采用 SOT563 封装、具有 SMBus 和双线制串行接口的 TMP102 低功耗数字温度

本资源的原文使用英文撰写。 为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。 为确认

2 提交文档反馈 Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TMP102

4 Pin Configuration and Functions

图 4-1. DRL Package 6-Pin SOT563 Top View

表 4-1. Pin Functions

(1) I = Input, O = Output, I/O = Input or Output

Copyright © 2024 Texas Instruments Incorporated 提交文档反馈 3

5.2 ESD Ratings

5.3 Recommended Operating Conditions

5.4 Thermal Information

4 提交文档反馈 Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TMP102

5.5 Electrical Characteristics

Copyright © 2024 Texas Instruments Incorporated 提交文档反馈 5

5.6 Timing Requirements

6 提交文档反馈 Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TMP102

5.7 Typical Characteristics

Four conversions per second 图 5-2. Shutdown Current vs Temperature

图 5-3. Conversion Time vs Temperature 图 5-4. Quiescent Current vs Bus Frequency

图 5-5. Temperature Error vs Temperature 图 5-6. Temperature Error at 25°C

Copyright © 2024 Texas Instruments Incorporated 提交文档反馈 7

6.2 Functional Block Diagram

6.3 Feature Description

8 提交文档反馈 Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TMP102

表 6-2. 12-Bit Temperature Data Format (1)

Copyright © 2024 Texas Instruments Incorporated 提交文档反馈 9

表 6-3. 13-Bit Temperature Data Format

6.3.2 Serial Interface

10 提交文档反馈 Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TMP102

表 6-4. Address Pin and Target Addresses

6.3.5 Writing and Reading Operation

Copyright © 2024 Texas Instruments Incorporated 提交文档反馈 11

12 提交文档反馈 Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TMP102

t(HDSTA) t(HIGH) t(SUSTA) t(SUSTO)

图 6-1. Two-Wire Timing Diagram

Frame 3 Data Byte 1 Frame 4 Data Byte 2

图 6-2. Two-Wire Timing Diagram for Write Word Format

Copyright © 2024 Texas Instruments Incorporated 提交文档反馈 13

图 6-3. Two-Wire Timing Diagram for Read Word Format

Start By ACK By From NACK By Stop By

图 6-4. Timing Diagram for SMBus Alert

6.4 Device Functional Modes

14 提交文档反馈 Copyright © 2024 Texas Instruments Incorporated

Product Folder Links: TMP102

表 6-5. Conversion Rate Settings

图 6-5. Conversion Start

6.4.2 Extended Mode (EM)

Copyright © 2024 Texas Instruments Incorporated 提交文档反馈 15

6.4.5.1 Comparator Mode (TM = 0)

图 6-6. Internal Register Structure

表 6-6. Pointer Register Byte

表 6-7. Pointer Addresses

本资源的原文使用英文撰写。为方便起见，TI 提供了译文；由于翻译过程中可能使用了自动化工具，TI 不保证译文的准确性。为确认