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Lab 5

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16 views5 pages

Lab 5

Uploaded by

nazakatalikhoso337
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Page |1

DEPARTMENT OF SOFTWARE ENGINEERING


FACULTY OF ENGINEERING AND TECHNOLOGY JAMSHORO
UNIVERSITY OF SINDH JAMSHORO

SUBJECT: DIGITAL LOGIC DESIGN


LAB NO.5
LAB ABILITY TO DATA ANALYSIS
SUBJECT CALCULATION AND OBSERVATION/
PERFORMANCE KNOWLEDGE
CONDUCT AND
CODING RESULTS Presentation SCORE
EXPERIMENT INTERPRETATION
INDICATOR

0.5 0.5 0.5 0.5 0.5 0.5

Name: ____________________________ Roll No _______________________ Score: __________


Signature of Tutor: _______________ Date: ______________
HALF ADDER
HALF ADDER
PERFORMANCE OBJECTIVE
Upon successful completion of this experiment, the student will be able
To verify operations combinational circuits
 RIMS Advanced Trainer
 74LS 83 IC (4-bit adder IC). Or 74LS08 and 74LS86 for its combinational Circuit

EQUIPMENT

 5V Power supply unit (RIMS)

COMPONENTS
 74LS08 IC
 74LS86 IC
 Connecting hard wires.
NOTE
 Before making any connection to the circuit makes sure that, the power supply is off.
 Take care of the equipment they can be damaged by misuse.
 Before switch on the supply, get it checked by your teacher.
Page |2

INTRODUCTION

Many logic circuits must be supplied with devices, which can carry out the sum between
two numbers: on this purpose, the adder circuits are used. The basic rules for binary
addition are:
0+0=0
1+0=1
0+1=1
1 + 1 = 0 and carry 1
These operations are performed by a logic circuit called a half adder. A half adder is a
binary adder, which adds two bits. It accepts two binary digits on its inputs and produces
two binary digits on its outputs, a sum bit and a carry bit.
The logic symbol and logic diagram as shown in represents a half adder figure 5.1 (a & b).

(a) (b)
Fig: 5.1 (a) Half adder logic symbol; (b) Half adder logic diagram

74LS 83 4-bit adder IC


The 4-bit adder IC present on the module is an integrate of TTL family. Figure5.2 shows a
pin diagram of 4-bit TTL 74LS83 adder IC. This IC contains four full adder inside; carry
out of each full adder is connected to carry in of next full adder. The Co is a basically carry
input for 4-bit full adder and C4 is a carry out from 4th full adder for 4-bit full adder.
A4A3A2A1 and B4B3B2B1 are the inputs and S4S3S2S1 are outputs of 4-bit adder. This IC can
be used as half adder, 2-bit, 3-bit, and 4-bit full adder. It can be connected in cascade to
other similar circuits, to form adders with more than 4 bits.
Page |3

Fig: 5.2 Pin configuration for 74LS 83


Or

The SUM output is the least significant bit (LSB) of the result, which is the XOR of the
two inputs A and B. The XOR gate implements the addition operation for binary digits,
where a “1” is generated in the SUM output only when one of the inputs is “1”.
The CARRY output is the most significant bit (MSB) of the result, indicating whether
there was a carry-over from the addition of the two inputs. The CARRY output is the AND
of the two inputs A and B. The AND gate generates a “1” in the CARRY output only
when both inputs are “1”.
Half adder is the simplest of all adder circuits. Half adder is a combinational arithmetic
circuit that adds two numbers and produces a sum bit (s) and carry bit (c) both as output.
The addition of 2 bits is done using a combination circuit called a Half adder.
let us consider two input bits A and B, then sum bit (s) is the X-OR of A and B. it is
evident from the function of a half adder that it requires one X-OR gate and one AND gate
for its construction.

OBSERVATION TABLE:
INPUTS OUTPUTS
B A Sum() Cout
0 0

0 1

1 0

1 1
Page |4

PROCEDURE
1. Take RIMS Advanced Electronic Trainer and apply 5V power supply from power supply unit

2. Carry out the circuit of Figure 5.1 on the trainer using an AND and X-OR gates.

3. Connect inputs A and B to two switches.

4. Connect the outputs Sum and Carry to the two LEDs.

5. Analyze the circuit behavior by carrying out different combinations with the switches
and fill the observation table.

EXERCISE

1. Design the following half adder circuit using NAND gates and verify the results
Page |5

OBSERVATION TABLE:
A B S Cout

REVIEW QUESTIONS:

1. Name the inputs and outputs of a half-adder?


______________________________________________________________________
______________________________________________________________________
________________________________________
2. What input conditions to half-adder produce 1 at the carry?
______________________________________________________________________
______________________________________________________________________
________________________________________
3. What will be the sum and carry output of a half-adder for input bits 01?
______________________________________________________________________
______________________________________________________________________
________________________________________
4. Show at least one application of adders and subtractor circuits?
______________________________________________________________________
______________________________________________________________________
________________________________________

FINAL CHECK LIST:


 Clean your equipment/materials and workbenches before you leave.
 Keep all equipment and materials to their proper storage area.
 Submit your answers to questions, together with your data, calculations and results
before the next laboratory.

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