IT3030E CA Chap2 Computer System and Interconnection
IT3030E CA Chap2 Computer System and Interconnection
Ngo Lam Trung & Pham Ngoc Hung, Hoang Van Hiep
Department of Computer Engineering
School of Information and Communication Technology (SoICT)
Hanoi University of Science and Technology
E-mail: [trungnl, hungpn, hiephv]@soict.hust.edu.vn
❑ Computer
❑ Input data
❑ Execute stored programs
❑ Output result
Memory
Control Input
Datapath Output
Processor- Processor-
memory I/O
Data
Control
processing
❑ Structure:
l Interrupt handler ends with a special instruction, to restore
context and value of PC, so that CPU can continue the
interrupted program properly.