Unit 3

COMPUTER
ARITHMATIC
 The Arithmetic and Logic Unit

• The ALU is that part of the computer that actually performs

arithmetic and logical operations on data.
• All of the other elements of the computer system—control
unit, registers, memory, I/O bring data into the ALU to
process and then to take the results back.
ALU Inputs and Outputs
• Data are presented to the ALU in registers, and the results of
an operation are stored in registers.
• These registers are temporary storage locations within the
processor that are connected by signal paths to the ALU
• The ALU may also set flags as the result of an operation.
• The flag values are also stored in registers within the
processor.
• The control unit provides signals that control the operation
of the ALU and the movement of the data into and out of the
ALU.
 Integer Representation
• In the binary number system arbitrary numbers can be
represented with the digits zero and one, the minus sign, and
the radix point.
• computer storage and processing the minus signs and periods
has no effect.
• Only binary digits (0 and 1) may be used to represent Numbers.
• -1101.01012 = -13.312510
 Integer Representation
• In general, if an n-bit sequence of binary digits
a n-1,a n-2,…..a1,a0 is interpreted as an unsigned integer A, its
value is
 Sign-Magnitude Representation

• There are several alternative conventions used to represent

negative as well as positive integers.
• All of which involve treating the most significant (leftmost)
bit in the word as a sign bit.
• If the sign bit is 0, the number is positive; if the sign bit is 1,
the number is negative.
• The simplest form of representation that employs a sign bit
is the sign-magnitude representation.
• In an n-bit word, the rightmost n-1 bits hold the magnitude
of the integer.
 Sign-Magnitude Representation
For Example:
+18= 00010010
-18 = 10010010

The general case can be expressed as follows:

• Binary addition(0 and 1) • Binary subtraction
• 0+0= 0 0(Carry) • 0-0=0 0(Borrow)
• 0+1=1 0 • 0-1=0 1
• 1+0=1 0 • 1-0=1 0
• 1+1=0 1 • 1-1=0 0
• Binary no.- 1’s complement 2’s complement
• 111- 000+1= 001
• 1010- 0101+1= 0110
• 1100- 0011+1= 0100
• 110011000- 001100111 001101000

• 2’s complement= 1’s complement +1

• 0101
• + 1
• ----1----
• 0110

• 0011
• + 1
--11---
• 0100
 Two’s Complement Representation
• Two’s complement representation uses the most significant bit
as a sign bit, making it easy to test whether an integer is positive
or negative.
• Consider an n-bit integer, A,
• If A is positive, then the sign bit, a n-1 is zero.
• The remaining bits represent the magnitude of the number same
as for sign magnitude:
 Two’s Complement Representation

• For a negative number the sign bit , a n-1 is one.

• The remaining n-1 bits can take on any one of 2 n-1 values.
• Therefore, the range of negative integers that can be
represented is from -1 to - 2 n-1 .
• Following is the expression for negative numbers
 Characteristics of Two’s Complement
Representation and Arithmetic
Range -2 n-1 through 2 n-1 -1
Number of one
Representations
of Zero
Negation Take the Boolean complement of each bit of the corresponding
positive number, then add 1 to the resulting bit pattern viewed
as an unsigned integer.
Expansion of Bit Add additional bit positions to the left and fill in with the value
Length of the original sign bit (Discard carry for +ve and No carry for –ve)
Overflow Rule If two numbers with the same sign (both positive or both
negative) are added, then overflow occurs if and only if the
result has the opposite sign
Subtraction Rule To subtract B from A, take the twos complement of B and add
it to A.
Two’s Complement Representation
 1’s complement Subtraction

• 1.Subtract smaller number from larger number

• 1.Determine the 1’s complement of the smaller number
• 2.Add the 1’s complement to the larger number.
• 3.Remove the carry and add it to the result. This is called
end around carry.
 1’s complement Subtraction
• 2. Subtract larger number from smaller number
• 1.Determine the 1’s complement of the larger number
• 2.Add 1’s complement to the smaller number.
• 3.Answer is in 1’s complement form. To get the correct
answer take the 1’s complement and assign negative sign to
the answer.
 2’s complement Subtraction
• 1.Subtract smaller number from larger number
• 1.Determine the 2’s complement of the smaller number
• 2.Add the 2’s complement to the larger number.
• 3.Discard carry.
 2’s complement Subtraction
• 2. Subtract larger number from smaller number
• 1.Determine the 2’s complement of the larger number.
• 2.Add the 2’s complement to the smaller number.
• Answer is in 2’s complement form. To get correct answer
take 2’s complement and assign – ve sign to it.
 Floating-point Representation

• With a fixed-point notation (e.g., twos complement) it is

possible to represent a range of positive and negative
integers centered on 0.
• This approach has limitations.
➢ Very large numbers cannot be represented, nor can very
small fractions.
➢ The fractional part of the quotient in a division of two large
numbers could be lost.
• For decimal numbers, this limitation can be solved by using scientific
notation.
• We can dynamically slide the decimal point to a convenient location and
use the exponent of 10 to keep track of that decimal point.
• This same approach can be taken with binary numbers.
• We can represent a number in the form

±S * 𝐵±𝐸
• This number can be stored in a binary word with three fields:
• Sign: plus or minus
• Significand S
• Exponent E
• The base B is implicit and need not be stored because it is the
same for all numbers
• Typical 32-bit floating-point format.
• The leftmost bit stores the sign of the number (0= positive and 1= negative)
• The exponent value is stored in the next 8 bits.
• The representation used is known as a biased representation.
• To simplify operations on floating-point numbers, it is
typically required that they be normalized.
• A normalized number is one in which the most significant
digit of the significand is nonzero.
• Thus, a normalized nonzero number is one in the form

• where b is either binary digit (0 or 1).

• Because the most significant bit is always one, it is
unnecessary to store this bit; rather, it is implicit.
• Thus, the 23-bit field is used to store a 24-bit significand with
a value
• Given a number that is not normalized, the number may be
normalized by shifting the radix point to the right of the leftmost 1
bit and adjusting the exponent accordingly.
• Following are the features of a normalizad number:
➢ The sign is stored in the first bit of the word.
➢ The first bit of the true significand is always 1 and need not be
stored in the significand field.
➢ The value 127 is added to the true exponent to be stored in the
exponent field.
➢ The base is 2.
• We can also represent the range of numbers that can be
represented in a 32-bit word.
• Using twos complement integer representation, all of the
integers
• from -2 31 to 2 31-1 to can be represented, for a total of 2 32
different numbers.
• With the example floating-point format of Figure 9.18, the
following ranges of numbers are possible:
 IEEE Standard for Binary Floating-Point
Representation
• The most important floating-point representation is defined in
IEEE Standard 754, adopted in 1985.
• This standard was developed to facilitate the portability of
programs from one processor to another and to develop
sophisticated, numerically oriented programs.
• The IEEE standard defines both a 32-bit single and a 64-bit double
format (with 8-bit and 11-bit exponents, respectively.
• The implied base is 2.
 Floating-point Arithmetic
• For addition and subtraction, it is necessary to ensure that both
operands have the same exponent value.
• This requires shifting the radix point on one of the operands to
achieve alignment.
• Multiplication and division are more straightforward.
• A floating-point operation may produce one of these conditions:
• Exponent overflow: A positive exponent exceeds the maximum
possible exponent value.
• Exponent underflow: A negative exponent is less than the
minimum possible exponent value.
• This means that the number is too small to be represented, and it
may be reported as 0.
• Significand underflow: In the process of aligning significands,
digits may flow off the right end of the significand (rounding is
required.
• Significand overflow: The addition of two significands of the same
sign may result in a carry out of the most significant
bit(realignment is required).
 Floating-point Arithmetic
Floating Point Numbers Arithmetic Operations
• Examples:
•
• X = 0.3 * 102 = 30
• Y = 0.2 * 103 = 200
•
• X + Y = (0.3 * 10 2-3 + 0.2) * 103 = 0.23 * 103 = 230
• X - Y = (0.3 * 10 2-3 - 0.2) * 103 = (-0.17) * 103 = -170
• X * Y = (0.3 * 0.2) * 10 2+3 = 0.06 * 105 = 6000
• X / Y = (0.3 / 0.2) * 10 2-3 = 1.5 * 10-1 = 0.15
 Addition and Subtraction

• There are four basic phases of the algorithm for addition and
subtraction:

• 1. Check for zeros.

• 2. Align the significands.
• 3. Add or subtract the significands.
• 4. Normalize the result.
Floating-point Addition and subtraction
 Floating-point Addition and
subtraction
• For the addition or subtraction operation, the two operands must be
transferred to registers that will be used by the ALU.
• If the floating-point format includes an implicit significand bit, that bit
must be made explicit for the operation.
• Phase 1: Zero check
• Because addition and subtraction are identical except for a sign change,
the process begins by changing the sign of the subtrahend, if it is a
subtract operation.
• Next, if either operand is 0, the other is reported as the result.
• Phase 2: Significand alignment.
• The next phase is to manipulate the numbers so that the two exponents
are equal.
• Alignment may be achieved by shifting either the smaller number to the
right (increasing its exponent) or shifting the larger number to the left.
 Floating-point Addition and
subtraction
• The alignment is achieved by repeatedly shifting the magnitude
portion of the significand right 1 digit and incrementing the
exponent until the two exponents are equal
• Phase 3: Addition.
• The two significands are added together, taking into account their
signs.
• There is also the possibility of significand overflow by 1 digit.
• If so, the significand of the result is shifted right and the exponent
is incremented.
• An exponent overflow could occur as a result then the operation
halted.
 Floating-point Addition and
subtraction
• Phase 4: Normalization.
• Normalization consists of shifting significand digits left until the
most significant digit is nonzero.
• Each shift causes a decrement of the exponent and thus could
cause an exponent underflow.
• Finally, the result must be rounded off and then reported.
Floating-point Multiplication
 Floating-point Multiplication
• In multiplication, if either operand is 0, 0 is reported as
the result.
• The next step is to add the exponents.
• If the exponents are stored in biased form, the
exponent sum would have doubled the bias.
• Thus, the bias value must be subtracted from the sum.
• If the exponent of the product is within the proper
range, the next step is to multiply the significands,
according to their signs.
• Product is calculated and result is normalized.
Floating –point Division
 Floating –point Division
• In division If the divisor is 0, an error report is issued, or the
result is set to infinity, depending on the implementation.
• A dividend of 0 results in 0.
• Next, the divisor exponent is subtracted from the dividend
exponent.
• This removes the bias, which must be added back in.
• Tests are then made for exponent underflow or overflow.
• Then the significands and perform normalization and
rounding