03 BooleanAlgebra&LogicGates
03 BooleanAlgebra&LogicGates
Logic Gates
EE 200
Digital Logic Circuit Design
❖ Boolean Algebra
❖ DeMorgan's Theorem
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 2
Boolean Algebra
❖ Introduced by George Boole in 1854
❖ A set of two values: B = {0, 1}
❖ Three basic operations: AND, OR, and NOT
❖ The AND operator is denoted by a dot (·)
𝑥 · 𝑦 or 𝑥𝑦 is read: 𝑥 AND 𝑦
4. · is distributive over +: 𝑥 · (𝑦 + 𝑧) = (𝑥 · 𝑦) + (𝑥 · 𝑧)
+ is distributive over ·: 𝑥 + (𝑦 · 𝑧) = (𝑥 + 𝑦) · (𝑥 + 𝑧)
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 4
AND, OR, and NOT Operators
❖ The following tables define 𝑥 · 𝑦, 𝑥 + 𝑦, and 𝑥′
❖ 𝑥 · 𝑦 is the AND operator
❖ 𝑥 + 𝑦 is the OR operator
❖ 𝑥′ is the NOT operator
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 5
Boolean Functions
❖ Boolean functions are described by expressions that consist of:
Boolean variables, such as: 𝑥, 𝑦, etc.
Boolean constants: 0 and 1
Boolean operators: AND (·), OR (+), NOT (')
Parentheses, which can be nested
❖ Example: 𝑓 = 𝑥 𝑦 + 𝑤 ′ 𝑧
The dot operator is implicit and need not be written
❖ Operator precedence: to avoid ambiguity in expressions
Expressions within parentheses should be evaluated first
The NOT (') operator should be evaluated second
The AND (·) operator should be evaluated third
The OR (+) operator should be evaluated last
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 6
Truth Table
❖ A truth table can represent a Boolean function
❖ List all possible combinations of 0's and 1's assigned to variables
❖ If n variables then 2n rows
❖ Example: Truth table for 𝑓 = 𝑥𝑦 ′ + 𝑥 ′ 𝑧
x y z y' xy' x' x'z f = xy'+ x'z
0 0 0 1 0 1 0 0
0 0 1 1 0 1 1 1
0 1 0 0 0 1 0 0
0 1 1 0 0 1 1 1
1 0 0 1 1 0 0 1
1 0 1 1 1 0 0 1
1 1 0 0 0 0 0 0
1 1 1 0 0 0 0 0
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 7
DeMorgan's Theorem
❖ (𝑥 + 𝑦)′ = 𝑥′ 𝑦′ Can be verified
❖ (𝑥 𝑦)′ = 𝑥′ + 𝑦′ Using a Truth Table
Answer: 𝑓′ = (𝑥 + 𝑦 ′ + 𝑧)(𝑥 ′ + 𝑦 + 𝑧)
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 9
Algebraic Manipulation of Expressions
❖ The objective is to acquire skills in manipulating Boolean
expressions, to transform them into simpler form.
using the Demorgan theorem
❖ Proof: 𝑥 + 𝑥𝑦 = 𝑥 · 1 + 𝑥𝑦 𝑥·1=𝑥
= 𝑥 · (1 + 𝑦) Distributive · over +
=𝑥·1=𝑥 (1 + 𝑦) = 1
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 15
Next . . .
❖ Boolean Algebra
❖ DeMorgan's Theorem
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 16
Logic Gates and Symbols
𝑥 𝑥
𝑥·𝑦 𝑥+𝑦 𝑥 𝑥′
𝑦 𝑦
AND gate OR gate NOT gate (inverter)
𝑥
𝑥 𝑦 𝑥′
𝑦
Combinational
𝑛 inputs 𝑚 outputs
Circuit
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 19
Example of a Simple Combinational Circuit
𝑥
𝑦 𝑓
Truth Table
x y z f
0 0 0 0
What is the logic expression of 𝑓?
0 0 1 0
0 1 0 1
0 1 1 1 What is the gate implementation of 𝑓?
1 0 0 0
1 0 1 1 To answer these questions, we need
1 1 0 0
to define Minterms and Maxterms
1 1 1 1
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 21
Minterms and Maxterms
❖ Minterms are AND terms with every variable present in either
true or complement form
❖ Maxterms are OR terms with every variable present in either
true or complement form
Minterms and Maxterms for 2 variables 𝑥 and 𝑦
x y index Minterm Maxterm
0 0 0 𝑚0 = 𝑥′𝑦′ 𝑀0 = 𝑥 + 𝑦
0 1 1 𝑚1 = 𝑥′𝑦 𝑀1 = 𝑥 + 𝑦′
1 0 2 𝑚2 = 𝑥𝑦′ 𝑀2 = 𝑥′ + 𝑦
1 1 3 𝑚3 = 𝑥𝑦 𝑀3 = 𝑥′ + 𝑦′
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 23
Purpose of the Index
❖ Minterms and Maxterms are designated with an index
❖ For Minterms:
‘1’ means the variable is Not Complemented
❖ For Maxterms:
‘0’ means the variable is Not Complemented
𝑓 = 𝑥 ′ 𝑦𝑧 ′ + 𝑥 ′ 𝑦𝑧 + 𝑥𝑦 ′ 𝑧 + 𝑥𝑦𝑧
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 25
Examples of Sum-Of-Minterms
❖ 𝑓 𝑎, 𝑏, 𝑐, 𝑑 = 𝑚2 + 𝑚3 + 𝑚6 + 𝑚10 + 𝑚11
❖ 𝑔 𝑎, 𝑏, 𝑐, 𝑑 = 𝑚0 + 𝑚1 + 𝑚12 + 𝑚15
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 26
Product-Of-Maxterms (POM) Canonical Form
Truth Table
x y z f Maxterm
Product of Maxterm entries
0 0 0 0 𝑀0 = 𝑥 + 𝑦 + 𝑧
0 0 1 0 𝑀1 = 𝑥 + 𝑦 + 𝑧′
that evaluate to ‘0’
0 1 0 1
Focus on the ‘0’ entries
0 1 1 1
1 0 0 0 𝑀4 = 𝑥′ + 𝑦 + 𝑧
𝑓 = 𝑀0 · 𝑀1 · 𝑀4 · 𝑀6
1 0 1 1
1 1 0 0 𝑀6 = 𝑥′ + 𝑦′ + 𝑧
𝑓 = ෑ 0, 1, 4, 6
1 1 1 1
❖ 𝑓 𝑎, 𝑏, 𝑐, 𝑑 = ς(1, 3, 11)
❖ 𝑓(𝑎, 𝑏, 𝑐, 𝑑) = 𝑀1 ∙ 𝑀3 ∙ 𝑀11
❖ 𝑓(𝑎, 𝑏, 𝑐, 𝑑) = 𝑎 + 𝑏 + 𝑐 + 𝑑′ 𝑎 + 𝑏 + 𝑐 ′ + 𝑑′ (𝑎′ + 𝑏 + 𝑐 ′ + 𝑑′ )
❖ 𝑔 𝑎, 𝑏, 𝑐, 𝑑 = ς(0, 5, 13)
❖ 𝑔(𝑎, 𝑏, 𝑐, 𝑑) = 𝑀0 ∙ 𝑀5 ∙ 𝑀13
❖ 𝑓(𝑎, 𝑏, 𝑐, 𝑑) = 𝑎 + 𝑏 + 𝑐 + 𝑑 𝑎 + 𝑏 ′ + 𝑐 + 𝑑′ (𝑎′ + 𝑏′ + 𝑐 + 𝑑′ )
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 28
Conversions between Canonical Forms
❖ The same Boolean function 𝑓 can be expressed in two ways:
Sum-of-Minterms 𝑓 = 𝑚0 + 𝑚2 + 𝑚3 + 𝑚5 + 𝑚7 = σ(0, 2, 3, 5, 7)
Product-of-Maxterms 𝑓 = 𝑀1 ∙ 𝑀4 ∙ 𝑀6 = ς(1, 4, 6)
Truth Table
x y z f Minterms Maxterms
0 0 0 1 𝑚0 = 𝑥 ′ 𝑦′𝑧′
0 0 1 0 𝑀1 = 𝑥 + 𝑦 + 𝑧′ To convert from one canonical
0 1 0 1 𝑚2 = 𝑥 ′ 𝑦𝑧′ form to another, interchange
0 1 1 1 𝑚3 = 𝑥 ′ 𝑦𝑧
the symbols and and list
1 0 0 0 𝑀4 = 𝑥′ + 𝑦 + 𝑧
those numbers missing from
1 0 1 1 𝑚5 = 𝑥𝑦′𝑧
1 1 0 0 𝑀6 = 𝑥′ + 𝑦′ + 𝑧 the original form.
1 1 1 1 𝑚7 = 𝑥𝑦𝑧
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 29
Function Complement
Truth Table Given a Boolean function 𝑓
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 30
Summary of Minterms and Maxterms
❖ There are 2n Minterms and Maxterms for Boolean functions with
n variables, indexed from 0 to 2n – 1
❖ For a Boolean function, given the list of Minterm indices one can
determine the list of Maxterms indices (and vice versa)
𝑓3 = (𝑥 + 𝑧)(𝑥 ′ + 𝑦 ′ ) 𝑓4 = 𝑥(𝑥 ′ + 𝑦 ′ + 𝑧)
𝑥 𝑥
𝑧
𝑓3 𝑓4
𝑥′
𝑥′ 𝑦′
𝑦′ OR-AND 𝑧 3-input OR gate
implementations
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 33
Two-Level vs. Three-Level Implementation
❖ ℎ = 𝑎𝑏 + 𝑐𝑑 + 𝑐𝑒 (6 literals) is a sum-of-products
❖ ℎ may also be written as: ℎ = 𝑎𝑏 + 𝑐(𝑑 + 𝑒) (5 literals)
❖ However, ℎ = 𝑎𝑏 + 𝑐(𝑑 + 𝑒) is a non-standard form
ℎ = 𝑎𝑏 + 𝑐(𝑑 + 𝑒) is not a sum-of-products nor a product-of-sums
Boolean Algebra and Logic Gates EE 200 – Digital Logic Circuit Design © Muhamed Mudawar – slide 34