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(MCU) Lecture 3 - Interrupts

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30 views17 pages

(MCU) Lecture 3 - Interrupts

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phuc.phan246
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© © All Rights Reserved
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Interrupts in Microcontroller

Timer Interrupt
Interrupt in Microcontroller

What is the Interrupt?


▪ Interrupt is a signal from device attached to a computer
or from a program within a controller that causes main
program to stop and figure out what to do next.

▪ ISR (Interrupt Service Routine) is executed when an


interrupt occurs. A section of a program that takes control
when an interrupt is received and perform the operations
required to service the interrupt.

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Interrupt in Microcontroller

How Interrupt Works?


▪ Whenever any device needs service of microcontroller, the
device notifies the microcontroller by sending interrupt
signal.

▪ The microcontroller stops or interrupt main program flow and


saves the address of the next instruction (PC) on the
stack pointer (SP)

▪ MCU/MPU jumps to a fixed location in memory, called


interrupt vector table that hold the address of the ISR
(Interrupt Service Routine). Each interrupt has its own ISR.
The microcontroller gets the address of the ISR from the
interrupt vector table and jump to it

▪ It starts to execute the Interrupt Service Routine until it


reaches the last instruction of the subroutine which is RETI
(Return from Interrupt). RETI not used in C Coding. (Fig:
Interrupt and ISR Relation)

▪ MCU/MPU gets the program counter (PC) address from the stack pointer by popping the top
two bytes of the stack into the PC

▪ Then it starts to execute from that address and continue executing main program.

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Interrupt in Microcontroller

Reading a Book vs Interrupts in MCU

4
Interrupt in Microcontroller

Advantages - Disadvantages
▪ It increases the efficiency of ▪ CPU has to handle
CPU. interrupts, resume its
▪ It decreases the waiting time of previous execution of
CPU. programs
▪ Stops the wastage of instruction ▪ Overhead required to handle
cycle. the interrupt request can
▪ Enables multitasking by reduce the efficiency of the
allowing the CPU to quickly system
switch between different ▪ Nested interrupts can
processes. occur when there is high
▪ Simplifies input/output (I/O)
levels of interrupt activity
operations by allowing devices to ▪ Priority inversion can occur
communicate directly with the when a low-priority task
CPU. holds a resource needed by
a higher-priority task
▪ The keyword to build RTOS
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Interrupt in Microcontroller

Types of Interrupts
▪ Hardware interrupts:
▫ Maskable: Can be masked or disabled
▫ Non-maskable: Cannot be disabled
▫ External and Internal interrupts

▪ Software interrupts: generally used when the situation


requires stop processing and start all over:
▫ Divide by zero or stack overflow
▫ Generally, MPUs do not include software interrupts
▫ Exeptions…

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Interrupt in Microcontroller

Multiple Interrupts (Priority)


ISR1 ISR2 ISR1

main main

▪ Preemption: The execution of an interrupt handler can


be preempted by an exception having a higher priority
ISR1 ISR2

main main

▪ Tail-chaining: When an interrupt is pending on


completion of an exception handler. When the first
interrupt complete its execution, the controller transfers
immediately to the new execution
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Interrupts in STM32 Cortex M
Interrupt in Microcontroller

Interrupt handler in STM Cortex M

▪ Nested Vectored Interrupt Controller (NVIC): provides


implementation schemes for handling interrupts that occur
when other interrupts are being executed or when the CPU is
in the process of restoring its previous state and
resuming its suspended process
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Interrupt in Microcontroller

Components of NVIC
▪ Clock Security System
(CSS) interrupt is connected
to Non-Maskable Interrupt
(NMI) lines
▪ Peripheral interrupts are
connected to Interrupt
Requests (IRQ) lines
▪ GPIO interrupts are connected
to an External
Interrupt/Event Controller
(EXTI) before connecting to
the IRQ lines

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Interrupt in Microcontroller

Interrupt Request (IRQs) Table


▪ Reset: It is a special kind of
exception. When reset is
activated, the CPU goes to a
known state with all registers
loaded with the predefined
values. When the device is
coming out of reset, the ARM
loads the program counter from
memory location at 0x000.0004.
Reset has the highest priority

▪ NMI: The non-maskable interrupt


(NMI) has the second highest
priority after Reset. It cannot be
masked by software, for this
reason, it is called non-maskable
interrupt. Whenever it is
activated, the CPU will go to
address 0x0000.0008 to get the
address of its interrupt service
routine.

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Timer Interrupt
Interrupt in Microcontroller

Timer Interrupt

▪ The main program and a timer are asynchronous,


which means the timer operates independently of
program flow
▪ Main program running on the processor. A timer event
occurs and triggers an interrupt.
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Interrupt in Microcontroller

Clock Configuration

▪ HCLK is used for the timer oscillation

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Interrupt in Microcontroller

Parameter Settings
The clock source is 8MHz,
by setting the prescaller to
7999, the input clock
source to the timer is
8MHz/(7999+1) =
1000Hz

The interrupt is raised


when the timer counter is
counted from 0 to 9,
meaning that the
frequency is divided by 10,
which is 100Hz.

The frequency of the timer


interrupt is 100Hz,
meaning that the period is
1/100Hz = 10ms

15
Interrupt in Microcontroller

NVIC Settings

Timer is a maskable interrupt

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Interrupt in Microcontroller

ISR Implementation

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