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    F2018 EE223 Homework#4

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    Shubham Jaiswal

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    F2018 EE223 Homework#4

    Uploaded by

    Shubham Jaiswal
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    F2018_EE223_Homework#4

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    2 views3 pages

    F2018 EE223 Homework#4

    Uploaded by

    Shubham Jaiswal

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 3

    EE223 Homework #4 Oct.

    15, 2018
    Due: Nov. 5, 2018 6PM. 20% / day will be deducted if you miss the 6 PM deadline.
    Design of High-Swing Cascode Bias and Cascode OTA Circuit (Total 50 points scaled to 5 points)

    In this homework, you will design a cascode Beta multiplier, a high-swing cascode bias circuit, and a
    cascode OTA shown below. We will be using nmos2v and pmos2v for all circuits based on VDD=1.8V at
    TT, 27C. Assume the loading capacitance (CL) is 5 pF for dc and ac simulations, and 100 fF for transient
    simulation. Your simulation results on dc operating point should show most of the transistors are in
    saturation region except a few transistors.

    1. Draw a schematic shown above. Refer to zoomed version of the schematic in the last page. Add a
    startup circuit and run a dc simulation with VDD=1.8V, Temperature=27C in Typical corner. Provide
    the dc operating point information as well as the node voltage information in the schematic you have
    designed. Specify which transistors are not in saturation region in your design. Create a screenshot
    with white background in monochrome. The screenshot should show transistor sizes as well as
    operating point information (drain current and operating region). Report the total power dissipation of
    the circuit as well. (20 points)
    2. Run an ac simulation from 10 Hz to 1 GHz using the ac simulation test bench shown below. Create an
    ac plot like below. From the ac plot, report the DC gain (A0), -3dB bandwidth (ω-3db), and the unity
    gain bandwidth (ωu). Calculate the gain bandwidth product (A0 x ω-3db) and compare it with the unity
    gain bandwidth (ωu). Explain if there is any difference. (20 points)
    3. Assuming the loading capacitance is 100 fF, run a transient simulation in unity gain configuration to
    get a plot like below. Input signal should be 25MHz with 100mV step from 0.9V bias voltage. Create
    a plot of this! (10 points)
    Zoomed version of the schematics to be used in this homework.

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