Is31lt3948 DS

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IS31LT3948

PFM MODE BOOST LED DRIVER WITH THE EXTERNAL NMOS


February 2015

GENERAL DESCRIPTION FEATURES


The IS31LT3948 is a PFM step-up DC-DC converter  Wide input voltage range: 5V~100V
designed for driving the white LED arrays for large  Constant current output limited only by external
size LCD panel backlighting applications. It can component selection (Note)
deliver stable constant output current from a few  No loop compensation required
milliamps up to 2A, programmed via an external
 Internal over-voltage protection
resistor.
 Internal over-temperature protection
The IS31LT3948 utilizes a control scheme in which  Operating temperature range -40C to +85C
the output is automatically adjusted to the optimum (IS31LT3948-GRLS2-TR)
output voltage for the system, maximizing the
 Operating temperature range -40C to +125C
efficiency. Furthermore, the control scheme is
(IS31LT3948-GRLS4-TR)
inherently stable removing the need to provide
additional loop compensation.  SOP-8 package

The device features external PWM dimming, which Note: The maximum output current is determined by
allows the flexible control of the back-lighting VOUT/VIN ratio as well as the external components. If
luminance. output current and VOUT/VIN ratio is high, high current
components of inductor and NMOS are needed.
The IS31LT3948 has a wide input voltage range
from 5V to 100V (Note). An integrated OVP circuit APPLICATIONS
protects the chip and the system even under no-load
conditions.  TV monitor backlighting
 Notebook
The chip is assembled in SOP-8 package. It
 Automotive
operates from 5V to 100V over two temperature
ranges of -40°C to +85°C and -40°C to +125°C.  Street lamp
 LED lighting
Note: The IS31LT3948 has an internal 5V shunt
regulator connected to the VCC pin. A dropping
resistor must be connected between the VCC pin
and VIN to limit current flow. VIN voltages above
100V are allowed but care must be taken to ensure
that the output voltage remains greater than VIN,
and that the NMOS voltage rating is sufficiently
large.

TYPICAL APPLICATION CIRCUIT

Figure 1 Typical Application Circuit

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Rev. D, 01/21/2015
IS31LT3948
PIN CONFIGURATIONS
Package Pin Configuration (Top View)

SOP-8

PIN DESCRIPTIONS
No. Pin Description
1 VCC Positive power supply input pin. Internally clamped at 5V (Typ.).
Off time setting pin. An external resistor connected to this pin forms
2 TOFF an RC discharge path to generate a constant minimum off time of
the NMOS.
Enable and input peak current control pin. Pulled up to 4.5V
internally to set VCS_TH =0.24V when ADJ is floating. If VADJ<0.5V,
NMOS will always shutdown. If 0.5≤VADJ≤2.4V, VCS_TH = VADJ/10. If
3 ADJ
VADJ>2.4V, VCS_TH =0.24V.
Note: During the start up (VCC voltage is rising), ADJ must not be
connected to low (recommended floating).
4 GND Ground.
5 GATE Driver’s output for the gate of the external NMOS.
6 CS Current sense input for the boost, peak current control loop.
Feedback voltage input pin. Used to regulate the current of LEDs by
7 FB
keeping VFB=0.3V.
Overvoltage protection input pin, if the voltage of OVP exceed 1V,
8 OVP
gate will always shutdown.

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Rev. D, 01/21/2015
IS31LT3948
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No. Package QTY/Reel

IS31LT3948-GRLS2-TR SOP-8, Lead-free 2500

Part No. Rules


IS (ISSI Prefix)
31 (Product Family) - Analog and mix signal
LT (Product Type) - Lighting LED driver
3948 (Part Number) - 3948
GR (Package Code) - SOP
L (Solder Type) - Lead-free (RoHS compliant)
S2 (Temperature Grade) - Industrial temperature (-40°C ~ +85°C)
TR (Packing Option) - Tape & Reel

Industrial Range: -40°C to +125°C


Order Part No. Package QTY/Reel

IS31LT3948-GRLS4-TR SOP-8, Lead-free 2500

Part No. Rules


IS (ISSI Prefix)
31 (Product Family) - Analog and mix signal
LT (Product Type) - Lighting LED driver
3948 (Part Number) - 3948
GR (Package Code) - SOP
L (Solder Type) - Lead-free (RoHS compliant)
S4 (Temperature Grade) - Industrial temperature (-40°C ~ +125°C)
TR (Packing Option) - Tape & Reel

Copyright © 2015 Lumissil Microsystems. All rights reserved. Lumissil Microsystems reserves the right to make changes to this specification and its
products at any time without notice. Lumissil Microsystems assumes no liability arising out of the application or use of any information, products or
services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and
before placing orders for products.
Lumissil Microsystems does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can
reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use
in such applications unless Lumissil Microsystems receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Lumissil Microsystems is adequately protected under the circumstances

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Rev. D, 01/21/2015
IS31LT3948
ABSOLUTE MAXIMUM RATINGS
VCC to GND -0.3V to 6.0V
CS, ADJ,GATE,TOFF,OVP,FB -0.3V to 6.0V
VCC Max. input current 10mA
Maximum operating junction temperature, TJMAX 150°C
Storage temperature range, TSTG -65°C ~ +150°C
-40°C ~ +85°C, IS31LT3948-GRLS2-TR
Operating temperature, TA = TJ
-40°C ~ +125°C, IS31LT3948-GRLS4-TR
ESD (HBM) ±2kV
ESD (CDM) ±1kV
Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS
Unless otherwise specified, VIN=10V, RIN=10k, ADJ floating, TA= 25°C.
○ Parameter range based on TA = -40°C ~ +125°C (Note 1)
The symbol in the table means these parameters are only available in the above temperature range.
Symbol Parameter Conditions Tem. Min. Typ. Max. Unit
Supply voltage
connected to VCC via a
VIN Input voltage 5 100 V
appropriate resistor
(Note 2)
4.3 5 5.6
VCC VCC clamp voltage RIN=10k V
○ 4.1 5 5.8
2.2 2.7 3.0
VUVLO Undervoltage threshold VCC rising V
○ 2.0 2.7 3.2
VUVLO_HYS Undervoltage threshold hysteresis 300 mV
400 500
Quiescent supply current VCC= VCC clamp voltage µA
○ 400 700
ICC
Quiescent supply current when 50 75
VCC=2.5V µA
VCC undervoltage ○ 50 145
215 240 265
VCS_TH Peak current sense threshold VADJ=5V mV
○ 202 240 275
tBLANK Peak current sense blank interval VCS=VCS_TH+50mV 500 ns
tOFF Fixed turn-off interval REXT=250k 10 µs

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Rev. D, 01/21/2015
IS31LT3948
ELECTRICAL CHARACTERISTICS (CONTINUE)
Unless otherwise specified, VIN=10V, RIN=10k, ADJ floating, TA= 25°C.
○ Parameter range based on TA = -40°C ~ +125°C (Note 1)
The symbol in the table means these parameters are only available in the above temperature range.
Symbol Parameter Conditions Tem. Min. Typ. Max. Unit
Peak current control low threshold 0.5 V
VADJ Peak current control high
2.4 V
threshold
TSD Thermal shutdown threshold 150 °C
TSD_HYS Thermal shutdown hysteresis 20 °C
IS31LT3948-GRLS2-TR 290 300 310

VFB_TH Feedback voltage threshold 292 300 310 mV


IS31LT3948-GRLS4-TR
○ 285 300 315

VOVP_TH Overvoltage input threshold 0.9 1.0 1.1 V


Note 1: Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over temperature
range, are guaranteed by design, characterization and process control.
Note 2: VIN is the input voltage. When VIN≤5V, connect input voltage directly to VCC. When VIN>5V, input voltage should be connected to VCC
pin via an appropriately valued resistor.

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Rev. D, 01/21/2015
IS31LT3948
TYPICAL PERFORMANCE CHARACTERISTICS
750 400
VOUT = 40V VOUT = 40V
390
RCS = 0.06Ω RCS = 0.12Ω
725 RFB = 0.425Ω RFB = 0.857Ω
380

Output Current (mA)


Output Current (mA)

370
700
360

675 350

340
650
330

320
625
310

600 300
10 12 14 16 18 20 22 24 26 28 30 10 12 14 16 18 20 22 24 26 28 30

Supply Voltage (V) Supply Voltage (V)


Figure 2 Supply Voltage vs. Output Current Figure 3 Supply Voltage vs. Output Current

100 100
VOUT = 40V VOUT = 40V
RCS = 0.06Ω RCS = 0.12Ω
95 RFB = 0.425Ω 95 RFB = 0.857Ω

90 90
Efficiency (%)
Efficiency (%)

85 85

80 80

75 75

70 70
10 12 14 16 18 20 22 24 26 28 30 10 12 14 16 18 20 22 24 26 28 30

Supply Voltage (V) Supply Voltage (V)


Figure 4 Supply Voltage vs. Efficiency Figure 5 Supply Voltage vs. Efficiency

750 400
VIN = 12V VIN = 12V
390
RCS = 0.06Ω RCS = 0.12Ω
725 RFB = 0.425Ω RFB = 0.857Ω
380
Output Current (mA)
Output Current (mA)

370
700
360

675 350

340
650
330

320
625
310

600 300
20 25 30 35 40 45 20 25 30 35 40 45

Output Voltage (V) Output Voltage (V)


Figure 6 Output Voltage vs. Output Current Figure 7 Output Voltage vs. Output Current

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Rev. D, 01/21/2015
IS31LT3948
100 100
VIN = 12V VIN = 12V
RCS = 0.06Ω RCS = 0.12Ω
95 RFB = 0.425Ω 95 RFB = 0.857Ω

90 90
Efficiency (%)

Efficiency (%)
85 85

80 80

75 75

70 70
20 25 30 35 40 45 20 25 30 35 40 45

Output Voltage (V) Output Voltage (V)


Figure 8 Output Voltage vs. Efficiency Figure 9 Output Voltage vs. Efficiency

800 400
VIN = 12V VIN = 12V
700 RCS = 0.06Ω 350 RCS = 0.12Ω
RFB = 0.68Ω RFB = 0.32Ω
fPWM = 200Hz,500Hz,1kHz 300 fPWM = 200Hz,500Hz,1kHz
Output Current(mA)
600
Output Current(mA)

With external NMOS PWM Dimming With external NMOS PWM Dimming

500 250

400 200

300 150

200 100

100 50

0 0
0 10 20 30 40 50 60 70 80 90 100 0 10 20 30 40 50 60 70 80 90 100

PWM Duty Cycle(%) PWM Duty Cycle(%)


Figure 10 PWM Duty Cycle vs. Output Current Figure 11 PWM Duty Cycle vs. Output Current

500 5.5
VIN = 5V VIN = 12V
450 5.4
RIN = 0Ω RIN = 12kΩ
400 5.3
Supply Current (µA)

350 5.2
VCC Voltage (V)

300 5.1

250 5

200 4.9

150 4.8

100 4.7

50 4.6
0 4.5
-40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature (°C) Temperature (°C)


Figure 12 Temperature vs. Supply Current Figure 13 Temperature vs. VCC

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Rev. D, 01/21/2015
IS31LT3948
330
VIN = 24V fPWM = 500Hz
ILED = 450mA
320 With external NMOS PWM dimming
VFB Voltage (mV)

310
ILED
200mA/Div
300

290

280 VPWM
2V/Div
270
-40 -25 -10 5 20 35 50 65 80 95 110 125

Temperature (°C) Time (10µs/Div)

Figure 14 Temperature vs. VFB Figure 15 Output Current vs. VPWM on Rising Time

fPWM = 500Hz
ILED = 450mA
With external NMOS PWM dimming

ILED
200mA/Div

VPWM
2V/Div

Time (10µs/Div)

Figure 16 Output Current vs. VPWM on Falling Time

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Rev. D, 01/21/2015
IS31LT3948
FUNCTIONAL BLOCK DIAGRAM

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Rev. D, 01/21/2015
IS31LT3948
APPLICATION INFORMATION

INTERNAL 5V REGULATOR LED CURRENT CONTROL


The IS31LT3948 includes an internal shunt regulator IS31LT3948 regulates the LED current by sensing
of 5V (Typ.) connected to the VCC pin. When the the voltage across an external sense resistor in
input voltage is higher than 5V, connect VCC to VIN series with the LEDs. The voltage is sensed via the
using an appropriately valued, current limiting FB pin where the internal feedback reference
resistor. The regulator maintains a 5V power supply voltage is 0.3V (Typ.). The LED current can be set
for the internal NMOS switch gate driver and the from following equation easily.
internal control circuitry. In applications where the
input voltage is 5V, connect the input voltage directly 0.3
I OUT  (2)
to VCC. When VCC is connected directly to VIN, VIN RFB
may not exceed 5V. Bypass the VCC pin using a low
ESR capacitor (recommended 10µF ceramic In order to have an accurate LED current, precision
capacitor) to provide a high frequency path to GND. resistors are required (1% is recommended).
The current required by IS31LT3948 is 0.4mA (Typ.) SETTING THE OVER VOLTAGE PROTECTION
plus the switching current of the external switch. The
The open string protection is achieved through the
switching frequency of the external NMOS affects
over voltage protection (OVP). In some cases, an
the amount of current required, as does the NMOS’s
LED string failure results in a feedback voltage that
gate charge requirement (found on the NMOS data
is always zero. If this happens, the part then keeps
sheet).
boosting the output voltage higher and higher. If the
I IN  0.4mA  QG  f S (1) output voltage reaches the programmed OVP
threshold, the protection will be triggered and stop
Where fS is the switching frequency and QG is the the switching action. To make sure that the circuit
external NMOS gate charge. functions properly, the OVP setting resistor divider
must be set with an appropriate value. The
UNDER VOLTAGE LOCKOUT recommended VOVP point is about 1.2 times or 5V
IS31LT3948 features an under voltage lockout (choose the larger one) higher than the output
threshold of 2.7V (Typ.) with a hysteresis of 300mV. voltage for normal operation.
The chip is disabled when VCC is lower than 2.4V
R4  R5
and enabled when VCC exceeds 2.7V. VOVP  VOVP _ TH  (3)
STEP-UP CONVERTER
R5
IS31LT3948’s step-up converter uses a peak current Where, VOVP_TH is 1V, and VOVP is the output voltage
mode topology wherein the CS pin voltage OVP level.
determines the peak current in the inductor of the DIMMING CONTROL
converter and hence the duty cycle of the GATE
switching waveform. The basic loop uses a pulse There are two methods for dimming.
from an internal oscillator to set an RS flip-flop and 1) External NMOS PWM dimming:
turn on the external power NMOS. After the blanking
time, the inductor current is sensed during the GATE
on period by a sense resistor, RCS, in the source of
the external power NMOS. The current increases in
the NMOS and inductor until the voltage across the
sense resistor reaches the CS threshold, at which
time NMOS is turned off. Once the NMOS is turned
off, the inductor reverses polarity, providing the
voltage boost, and the current of inductor will
decrease until the FB pin voltage drops below
internal reference voltage and the NMOS is then
turned on again. This operation repeats each cycle.
Figure 17 External PWM Dimming
Note, in the case where the FB pin voltage does not
exceed the FB reference voltage of 0.3V, such as at When the PWM input is high (VH>2.4V), M2 is on
start-up, the NMOS will remain off for the and IS31LT3948 operates normally to regulate the
programmed minimum tOFF time, then the NMOS is output current. When PWM is low logic (VL<0.5V),
switched on again. M2 is off and IS31LT3948 is shutdown. Using a fixed
frequency PWM signal and changing the duty cycle
adjusts the average output current. The
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Rev. D, 01/21/2015
IS31LT3948
recommended 5V PWM frequency is between Generally, setting the peak inductor current to 1.5
200Hz and 1kHz. M2 is recommended to use times the average input current is sufficient to
AP2306. The rising time depends on external maintain a good regulation of the output current.
component. The minimum on time of PWM signal is
recommended to be over the rising time to achieve VCS _ TH
better dimming rate.
I PEAK _ IN  1.5  I AVG _ IN  (6)
RCS
2) RC filter PWM dimming:
VCS_TH: If 0.5<VADJ<2.4V, VCS_TH = VADJ/10. If
VADJ>2.4V, VCS_TH =0.24V. ADJ floating,
VCS_TH=0.24V.
INPUT CAPACITOR
The input capacitor of the IS31LT3948 will supply
the transient input current of the power inductor.
Value of 100μF or higher is recommended to prevent
excessive input voltage ripple.
SETTING tOFF_MIN
IS31LT3948 operates in a pulsed frequency
modulation mode. The boost control loop is a
Figure 18 RC PWM Dimming
constant off-time architecture. The off time is
A filtered PWM signal can be used as an adjustable programmable and set by an external resistor
DC voltage for LED dimming control. The filtered connected between the tOFF pin and GND. In most
PWM signal becomes DC voltage which is summed application, the recommended tOFF_MIN is 1µs. The
together with the FB voltage to regulate the output governing equation for the off time is:
current. Fix the frequency of the PWM signal and
change the duty cycle to adjust the LED current. The tOFF _ MIN  40  10 12  REXT (7)
LED current can be calculated by the following
10
equation:
VFB _ TH  R6  (VPWM  Duty  VFB _ TH ) /( R7  R8 )
I OUT  (4) 8
RFB
tOFF_MIN (µs)

The PWM duty cycle is inversely proportional to the 6

LED current. That is, when the PWM signal is 100%


duty cycle, the output current is minimum, ideally 4
zero, and when the PWM signal is 0% duty cycle,
the output current is maximum.
2
See details value in the Example section.
Note: When the VOUT/VIN ratio is less than 2, careful
0
consideration must be given to ensure that VOUT 0 50 100 150 200 250
remains greater than VIN at the minimum dimming
REXT (kΩ)
level.
Figure 19 REXT vs. tOFF_MIN
INPUT PEAK CURRENT CONTROL
Note, the minimum tOFF_MIN is 1µs.
IS31LT3948 limits the peak inductor current, and
thus peak input current through the feedback of R3 INDUCTOR SELECTION
connected from source of NMOS to ground. The
Inductor value directly determines the switching
required average input current is based on the boost
frequency of the converter. To the fixed condition
ratio, VOUT/VIN, and the designed value for average
and the larger inductor value the lower switching
LED current. The required average input current can
frequency. The higher frequency will reduce the
be calculated as:
value of inductor, but will increase the switching loss
VOUT  I OUT on NMOS.
I AVG _ IN  (5)
VIN   The switching frequency can be calculated blow.
Switching frequency:
: assumed power conversion efficiency (the
recommended value is 0.9) f  1 / tON  tOFF  (8)

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Rev. D, 01/21/2015
IS31LT3948
The current ripple in the inductor: sufficient. Proportionally lower ripple can be

I RIPPLE  2  I PEAK _ IN  I AVG _ IN 


achieved with higher capacitor values.
(9)
SCHOTTKY RECTIFIER
NMOS on time: The external diode for the IS31LT3948 must be a
I RIPPLE  L Schottky diode, with low forward voltage drop and
tON  (10) fast switching speed. The diode’s average current
VIN  I AVG _ IN  ( RL  RDS _ ON  RCS ) rating must exceed the application’s average output
current. The diode’s maximum reverse voltage rating
NMOS off time: must exceed the over voltage protection of the
application. For PWM dimming applications, be
I RIPPLE  L
tOFF  (11) aware of the reverse leakage of the Schottky diode.
VOUT  VD  VIN  I AVG _ IN  RL Lower leakage current will drain the output capacitor
less during PWM low periods, allowing for higher
Note, the selection of inductor must ensure that the PWM dimming ratios.
tOFF larger than the tOFF_MIN, or else the converter can
not output the required current. Power NMOS Selection

Where: The power NMOS selected should have a VDS rating


which exceeds the maximum over voltage protection
VIN: Input voltage (V) (OVP) level programmed for the application. The
VOUT: Output voltage (V) VGS_TH of NMOS should be not higher than 4V. The
RDS_ON of the NMOS will determine DC power loss.
IRIPPLE: Current ripple in the inductor (A) The DC power loss can be calculated by:
L: inductor value (H) 2
Ploss  I M 1  RDS _ ON
IPEAK_IN: Input peak current (A) 2
V  I  Duty  (12)
IAVG_IN: Input average current (A)   OUT OUT   RDS _ ON
RL: Inductor DCR ()  VIN   
RDS_ON: NMOS on resistance () The recommended NMOS rating current is 5 times
(or higher) to the input peak current (IPEAK_IN). Be
VD: diode forward voltage at the required load aware of the power dissipation within the NMOS and
current (V) deciding if the thermal resistance of the NMOS
The recommended switching frequency: 20kHz < f < package causes the junction temperature to exceed
200kHz (Lower than 20kHz will cause audio noice of maximum ratings.
the inductor and too high frequency will increase the PCB LAYOUT CONSIDERATION
switching loss on NMOS).
As for all switching power supplies, especially those
To the fixed VIN, VOUT, IAVG_IN, IPEAK_IN and the providing high current and using high switching
switching frequency is inversely proportional to the frequencies, layout is an important design step. If
inductor value. layout is not carefully done, the regulator could show
Select an inductor with a rating current over input instability as well as EMI problems.
average current and the saturation current over the  Wide traces should be used for connection of
calculated peak current. To calculate the worst case the high current loop to minimize the EMI and
inductor peak current, use the minimum input unnecessary loss.
voltage, maximum output voltage, and maximum  The external components ground should be
total LED current. Also ensure that the inductor has connected to IS31LT3948 ground as short as
a low DCR (copper wire resistance) to minimize I2R possible. Especially the RFB ground to
power loss. IS31LT3948 ground connection should be as
OUTPUT CAPACITOR short and wide as possible to have an accurate
LED current.
The output capacitor holds the output current during  The capacitor C1, C2, C3 should be placed as
NMOS on. The capacitor directly impacts the line close as possible to IS31LT3948 for good
regulation and the loading regulation.
filtering. Especially the output capacitor C3
Low ESR capacitors using at the IS31LT3948 connection should be as short and wide as
converter output can minimize output ripple voltage possible.
and improve output current regulation. For most  NMOS drain is a fast switching node. The
applications, a 220μF low ESR capacitor will be inductor and Schottky diode should be placed as
close as possible to the drain and the connection
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Rev. D, 01/21/2015
IS31LT3948
should be kept as short and wide as possible.  The thermal pad on the back of NMOS package
Avoid other traces crossing and routing too long must be soldered to the large ground plane for
in parallel with this node to minimize the noise ideal power dissipation.
coupling into these traces. The feedback pin (e.g.
CS, FB, OVP) should be as short as possible
and routed away from the inductor, the Schottky
diode and NMOS. The feedback pin and
feedback network should be shielded with a
ground plane or trace to minimize noise coupling
into this circuit.

Figure 20 External NMOS PWM Dimming

VIN
5V ~ 100V L1 D1

LED+
R1
1 5
VCC GATE M1 C3

C1 C2 2 6 R4
TOFF CS
R2
R3

4
IS31LT3948 8
GND OVP LED-

R5
3 7 R6 RFB
ADJ FB

C4 R7

R8
PWM
For dimming
Figure 21 RC Filter PWM Dimming

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Rev. D, 01/21/2015
IS31LT3948
EXAMPLE: 50
R8  C 4 
Input: VIN=12V~24V 2  f PWM
Output: IOUT=350mA, VOUT≈30V~40V (9~12LEDs, Assuming fPWM is 200Hz (or higher), and choosing
VFB=3.3V) C4=0.1µF, we find R8≥400kΩ.
To calculate the worst case parameter, use the Choose C4=0.1µF, R8=400kΩ.
minimum input voltage, the maximum output voltage,
Choose a nominal value for R7, then compute R6.
and maximum output current. So choose: VIN=12V,
IOUT=350mA, VOUT≈40V (12LEDs, VFB=3.3V) Choose R7=10kΩ, then R6=26.2kΩ
Take Duty=0, VPWM = 5V and IOUT=350mA into the
1. R1, C1 and C2
equation, then we have:
Assume IIN = 2.5mA,
VFB _ TH  R6  (VPWM  Duty  VFB _ TH ) /( R7  R8 )
VIN _ MIN  VCC I OUT 
12  5 RFB
R1    2.8k  3k
I IN 2 .5 0.3  26.2  (5  0%  0.3) /( 400  10)
  0.35 A
Note: The maximum VCC input current at highest RFB
input voltage must not exceed 10mA. So RFB=0.91 (With the RC filter PWM dimming, the
RFB will be different from the no dimming application.)
IIN = (VIN_MAX-VCC)/R1 <10mA
4. R3 to Set Input Peak Current
Choose C1 as 220µF/35V, C2 as 10µF/16V.
2. R2 to Set tOFF_MIN Assume I PEAK _ IN  1.5  I AVG _ IN

The recommended value is 1µs, VOUT  I OUT


I PEAK _ IN  1.5  I AVG _ IN  1.5 
tOFF _ MIN  40  10 12
 REXT  1s VIN  
40  0.35
Choose R2=24kΩ.  1 .5   1.95 A
12  0.9
3. RFB to Set Output Current and C3
: assumed power conversion efficiency (the
VFB _ TH recommended value is 0.9).
RFB   0.86
I OUT VCS _ TH
RCS   0.123
Choose C3 as 220µF/63V (Low ESR electrolytic I PEAK _ IN
capacitor).
4. R6, R7, R8 and C4 Choose R3=0.123Ω, IPEAK=1.95A

R6, R7 and R8 can be calculated by: 5. L1 to Set Frequency


Input average current is
VFB _ TH  R6  (VPWM  Duty  VFB _ TH ) /(R7  R8 )
I OUT  VOUT  I OUT
R FB I AVG _ IN   1.3 A
Take Duty=100%, VPWM=5V and IOUT=0A into the VIN  
equation, then we have:
The current ripple in the inductor:

I RIPPLY  2  I PEAK _ IN  I AVG _ IN   1.3 A


0.3  R6  (5  100%  0.3) /( R7  R8 )
0
0.86
According to tOFF >tOFF_MIN:
Which simplifies to: 15.66  R 6  R7  R8
I RIPPLE  L
The low-pass filter formed by R8 and C4 must have a tOFF   1s
corner frequency much lower than the PWM VOUT  VD  VIN  I AVG _ IN  RL
frequency. As the corner frequency of the filter
This gives L>22µH.
decreases, the response time of the LED current to
changes in PWM increases. Choose a corner Assuming L=22µH and
frequency 50 times lower than fPWM.
RL  RDS _ ON  RCS  0.4 .

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Rev. D, 01/21/2015
IS31LT3948
I RIPPLE  L 7. NMOS M1 and Diode D1
tON   2.5s
VIN  I AVG _ IN  ( RL  RDS _ ON  RCS ) I1(NMOS) >IPEAK_IN
Then the assumed switching frequency: V1(NMOS) >VOVP

f '  1 / tON  tOFF   285kHz Lower RDS_ON NMOS can improve the converter
efficiency. The recommended NMOS rating current
The recommended switching frequency: is 5 times (or higher) to the input peak current
(IPEAK_IN).
20kHz<f<200kHz, according to the switching
frequency is inversely proportional to the inductor Choose 13N10L as M1.
value, choose L=100µH. Therefore: The average and peak current of diode must exceed
22 the output average current and input peak current.
f  f '  63kHz The diode’s maximum reverse voltage rating must
100 exceed the over voltage protection of the application.
The saturation current of the inductor must exceed Choose SS310 as D1.
the input peak current (IPEAK_IN).
6. R4, R5 to Set OVP

Set VOVP  VOUT  5V  45V


R4  R5
VOVP  VOVP _ TH 
R5
Choose R5=10kΩ, then R4 = 470kΩ.

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Rev. D, 01/21/2015
IS31LT3948
CLASSIFICATION REFLOW PROFILES
Profile Feature Pb-Free Assembly

Preheat & Soak


150°C
Temperature min (Tsmin)
200°C
Temperature max (Tsmax)
60-120 seconds
Time (Tsmin to Tsmax) (ts)

Average ramp-up rate (Tsmax to Tp) 3°C/second max.


Liquidous temperature (TL) 217°C
Time at liquidous (tL) 60-150 seconds
Peak package body temperature (Tp)* Max 260°C
Time (tp)** within 5°C of the specified
Max 30 seconds
classification temperature (Tc)
Average ramp-down rate (Tp to Tsmax) 6°C/second max.
Time 25°C to peak temperature 8 minutes max.

Figure 22 Classification Profile

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Rev. D, 01/21/2015
IS31LT3948
PACKAGE INFORMATION

SOP-8

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Rev. D, 01/21/2015
IS31LT3948
LAND PATTERN

Note:
1. Land pattern complies to IPC-7351.
2. All dimensions in MM.

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Rev. D, 01/21/2015

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