High Efficiency Step-Down Switching Regulator Controller lt143233
High Efficiency Step-Down Switching Regulator Controller lt143233
3
3.3V High Efficiency Step-Down
OBSOLETE: Switching Regulator Controller
FOR INFORMATION PURPOSES ONLY
Contact Linear Technology for Potential Replacement
FEATURES DESCRIPTIO
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■ Accurate Preset 3.3V Output The LT ®1432-3.3 is a control chip designed to operate
■ Up to 87% Efficiency with the LT1171/LT1271 family of switching regulators to
■ Optional Burst ModeTM Operation for Light Loads make a very high efficiency 3.3V step-down (buck) switch-
■ Can Be Used with Many LTC Switching ICs ing regulator. A minimum of external components is
■ Accurate Ultra-Low-Loss Current Limit needed.
■ Operates with Inputs from 4.5V to 30V Included is an accurate current limit which uses only
■ Shutdown Mode Draws Only 15µA
60mV sense voltage and uses “free” PC board trace
■ Uses Small 30µH Inductor material for the sense resistor. Logic controlled electronic
shutdown mode draws only 15µA battery current. The
APPLICATI S
UO switching regulator operates down to 4.5V input.
■ Laptop and Palmtop Computers The LT1432-3.3 has a logic controlled Burst Mode operation
■ Portable Data-Gathering Instruments to achieve high efficiency at very light load currents (0mA to
100mA) such as memory keep-alive. In normal switching
mode, the standby power loss is about 30mW, limiting
efficiency at light loads. In Burst Mode operation, standby
loss is reduced to approximately 11mW. Output current in
this mode is typically in the 5mA to 100mA range.
The LT1432-3.3 is available in 8-pin SO and PDIP pack-
, LTC and LT are registered trademarks of Linear Technology Corporation.
ages. The LT1171/LT1271 is also available in surface
Burst Mode is a trademark of Linear Technology Corporation. mount DD packages.
TYPICAL APPLICATI
UO
D2
1N5818
VIN
10µH
VSW VIN
+ C1 LT1271
3A
Efficiency
330µF FB + OPTIONAL
35V 100µF 100
VC GND OUTPUT LT1271, L = 30µH
D2** 16V FILTER
C6 VIN = 7V
0.02µF D2 CONNECTED
C5†
C3 + L1
90 TO OUTPUT
10µF R2*
0.03µF 30µH
EFFICIENCY (%)
1
LT1432-3.3
W W W U U W U
ABSOLUTE AXI U RATI GS PACKAGE/ORDER I FOR ATIO
VIN Pin .................................................................... 30V TOP VIEW
ORDER PART
V + Pin ..................................................................... 40V
VLIM 1 8 MODE NUMBER
VC ........................................................................... 35V
VOUT 2 7 GND
VLIM and VOUT Pins ................................................... 7V LT1432CN8-3.3
VIN 3 6 VC
Diode Pin Voltage ................................................... 30V LT1432CS8-3.3
V+ 4 5 DIODE
Mode Pin Current (Note 2) ..................................... 1mA
N8 PACKAGE S8 PACKAGE
Operating Temperature Range .................... 0°C to 70°C 8-LEAD PDIP 8-LEAD PLASTIC SO
Storage Temperature Range ................ –65°C to 150°C TJMAX = 100°C, θJA = 150°C/W (N8)
Lead Temperature (Soldering, 10 sec)................. 300°C TJMAX = 100°C, θJA = 170°C/W (S8)
ELECTRICAL CHARACTERISTICS
VC = 4V, VIN = 4V, V + = 8V, VDIODE = Open, VLIM = VOUT, VMODE = 0V, TJ = 25°C
Device is in standard test loop unless otherwise noted.
2
LT1432-3.3
ELECTRICAL CHARACTERISTICS
Operating parameters in standard circuit configuration.
VIN = 7V, IOUT = 0, unless otherwise noted. These parameters guaranteed where indicated, but not tested.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Burst Mode Operation Quiescent Input Supply Current 1.6 2.2 mA
Burst Mode Operation Output Ripple Voltage IOUT = 0 80 mVp-p
IOUT = 50mA 120 mVp-p
Normal Mode Equivalent Input Supply Current Extrapolated from IOUT = 20mA 3.0 mA
Normal Mode Minimum Operating Input Voltage 100mA < IOUT < 1.5A 4.5 V
Burst Mode Operation Minimum Operating Input Voltage 5mA < IOUT < 50mA 4.1 V
Efficiency Normal Mode IOUT = 0.5A 86 %
Burst Mode Operation IOUT = 25mA 70 %
Load Regulation Normal Mode 50mA < IOUT < 2A 5 15 mV
Burst Mode Operation 0 < IOUT < 50mA 30 mV
The ● denotes specifications which apply over the full operating Note 3: Current limit sense voltage temperature coefficient is +0.33%/°C
temperature range. to match TC of copper trace material.
Note 1: Does not include current drawn by the power IC. See operating Note 4: VOUT pin switched from 3.6V to 3.0V.
parameters in standard circuit.
Note 2: Breakdown voltage on the Mode pin is 7V. External current must
be limited to value shown.
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EQUIVALE T SCHE ATIC
D2
60mV
+ –
VIN V+ VC DIODE
3 4 6 5
S1**
+
S3*
–
* S3 IS CLOSED ONLY DURING START-UP. S2**
** S1 AND S2 ARE SHOWN IN NORMAL
MODE. REVERSE FOR Burst Mode
OPERATION.
MODE
CONTROL
7
MODE GND
8
LT1432-3.3 F02
Figure 2
3
LT1432-3.3
U W
TYPICAL PERFOR A CE CHARACTERISTICS
Minimum Input Voltage to Start –
Efficiency vs Input Voltage Efficiency vs Load Current Normal Mode (Diode to Input)
100 95 6.5
TJ = 25°C TJ = 25°C TJ = 25°C
LT1271, L = 50µH VIN = 7V
6.0
90 90
EFFICIENCY (%)
5.5
LT1270
DIODE
80 DIODE TO INPUT 85
TO INPUT
IOUT = 1A LT1271 5.0
LT1270
70 80 LT1171
4.5 LT1271
60 75 4.0
0 5 10 15 20 25 30 0 0.5 1.0 1.5 2.0 2.5 3.0 0 1 2 3 4 5
INPUT VOLTAGE (V) LOAD CURRENT (A) OUTPUT CURRENT (A)
LT1432-3.3 G01 LT1432-3.3 G02 LT1432-3.3 G03
Minimum Input Voltage – Minimum Running Voltage – Burst Mode Operation Minimum
Normal Mode (Diode to Output) Normal Mode* Input Voltage
9.0 5.5 5.5
TJ = 25°C TJ = 25°C TJ = 25°C
8.0 5.0
LT1171 5.0
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
40
30 70
SENSE VOLTAGE (mV)
VIN = 30V
CURRENT (µA)
CURRENT (µA)
30
20 60
20 VIN = 6V
10 50
10
0 0 40
0 5 10 15 20 25 30 0 25 50 75 100 0 25 50 75 100
INPUT VOLTAGE (V) TEMPERATURE (°C) JUNCTION TEMPERATURE (°C)
LT1432-3.3 G9
LT1432-3.3 G07 LT1432-3.3 G08
* TEMPERATURE COEFFICIENT OF SENSE VOLTAGE IS
*DOES NOT INCLUDE LT1271 SWITCH LEAKAGE. DESIGNED TO TRACK COPPER RESISTANCE.
4
LT1432-3.3
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TYPICAL PERFOR A CE CHARACTERISTICS
Incremental Battery Current * in No Load Battery Current in Burst Transconductance – VOUT to VC
Burst Mode Operation Mode Operation Current
2.0 5 5000
TJ = 25°C TJ = 25°C ∆I(VC PIN)
Gm =
∆VOUT
INCREMENTAL FACTOR (mA/mA)
TRANSCONDUCTANCE (µmho)
4
3
1.0 3000
2
0.5 2000
1
0 0 1000
0 5 10 15 20 25 0 5 10 15 20 25 0 25 50 75 100
BATTERY VOLTAGE (V) BATTERY VOLTAGE (V) JUNCTION TEMPERATURE (°C)
LT1432-3.3 G10
CURRENT (µA)
20
NORMAL MODE
0 –25
0
Burst Mode OPERATION
–20 –50
–20
MODE DRIVE MUST
SINK ≈ 30µA AT 0V
–40 –75 –40
0 5 10 15 20 0 20 40 60 80 100 0 2 4 6 8 10
INPUT VOLTAGE (V) LOAD CURRENT (mA) MODE PIN VOLTAGE (V)
LT1432-3.3 G13 LT1432-3.3 G14 LT1432-3.3 G15
CHANGES AT 0,0
TIME DELAY (ms)
CURRENT (mA)
–20
20 2
–40
10 1
–60
0 0 –80
0 25 50 75 100 0 25 50 75 100 –2 –1 0 10 20 30
JUNCTION TEMPERATURE (°C) JUNCTION TEMPERATURE (°C) V + TO VIN VOLTAGE
LT1432-3.3 G16 LT1432-3.3 G16 LT1432-3.3 G18
5
LT1432-3.3
UO U W U
APPLICATI S I FOR ATIO
More applications information on the LT1432-3.3 is available current limiting, micropower shutdown, and dual mode
in the LT1432 data sheet. operation for high conversion efficiency with both heavy and
very light loads.
Basic Circuit Description
The circuit in Figure 1 is a basic 3.3V positive buck
The LT1432-3.3 is a dedicated 3.3V buck converter driver
converter which can operate with input voltage from 4.5V
chip intended to be used with an IC switcher from the LT1171/
to 30V. The power switch is located between the VSW pin
LT1271 family. This family of current mode switchers in-
and GND pin on the LT1271. Its current and duty cycle are
cludes current ratings from 1.25A to 10A, and switching
controlled by the voltage on the VC pin with respect to the
frequencies from 40kHz to 100kHz as shown in the table
GND pin. This voltage ranges from 1V to 2V as switch
below.
current increases from zero to full-scale. Correct output
SWITCH OUTPUT CURRENT IN voltage is maintained by the LT1432-3.3 which has an
DEVICE CURRENT FREQUENCY BUCK CONVERTER internal reference and error amplifier (see Equivalent
LT1270A 10A 60kHz 7.5A Schematic in Figure 2). The amplifier output is level
LT1270 8A 60kHz 6A
shifted with an internal open collector NPN to drive the VC
LT1170 5A 100kHz 3.75A
LT1070 5A 40kHz 3.75A pin of the switcher. The normal resistor divider feedback
LT1269 4A 100kHz 3A to the switcher feedback pin cannot be used because the
LT1271 4A 60kHz 3A feedback pin is referenced to the GND pin, which is
LT1171 2.5A 100kHz 1.8A
LT1071 2.5A 40kHz 1.8A
switching up and down. The Feedback pin (FB) is simply
LT1172 1.25A 100kHz 0.9A bypassed with a capacitor. This forces the switcher VC pin
LT1072 1.25A 40kHz 0.9A to swing high with about 200µA sourcing capability. The
LT1432-3.3 VC pin then sinks this current to control the
The maximum load current which can be delivered by these loop. Transconductance from the regulator output to the
chips in a buck converter is approximately 75% of their VC pin current is controlled to approximately 3600µmhos
switch current rating. This is partly due to the fact that buck by local feedback around the LT1432-3.3 error amplifier
converters must operate at very high duty cycles when input (S2 closed in Figure 2). This is done to simplify frequency
voltage is low. The current mode nature of the LT1271 family compensation of the overall loop. A word of caution about
requires an internal reduction of peak current limit at high the FB pin bypass capacitor (C6): this capacitor value is
duty cycles, so these devices are rated at only 80% of their full very non-critical, but the capacitor must be connected
current rating when duty cycle is 80%. A second factor is directly to the GND pin or tab of the switcher to avoid
inductor ripple current, half of which subtracts from maxi- differential spikes created by fast switch currents flow-
mum available load current. The LT1271 family was originally ing in the external PCB traces. This is also true for the
intended for topologies which have the negative side of the frequency compensation capacitor C5. C5 forms the
switch grounded, such as boost converters. It has an ex- dominant loop pole.
tremely efficient quasi-saturating NPN switch which mimics
A floating power supply for the switcher is generated by D2
the linear resistive nature of a MOSFET but consumes much
and C3 which peak detect the input voltage during switch off
less die area. Driver losses are kept to a minimum with a
time. This is different than the 5V version of the LT1432 which
patented adaptive antisat drive that maintains a forced beta of
connects the anode of the diode to the output rather than the
40 over a wide range of switch currents. This family is
input. The output connection is more efficient because the
attractive for high efficiency buck converters because of the
floating voltage is a constant 5V (or 3.3V), independent of
low switch loss, but to operate as a positive buck converter,
input voltage, but in the case of the 3.3V circuit, minimum
the GND pin of the IC must be floated to act as the switch
required input voltage for starting is several volts higher (see
output node. This requires a floating power supply for the
the Typical Performance Characteristics curves). When the
chip and some means for level shifting the feedback signal.
diode is connected to the input, the suggested type is a
The LT1432-3.3 performs these functions as well as adding
6
LT1432-3.3
UO U W U
APPLICATI S I FOR ATIO
Schottky 1N5818. Diode type is more critical for the output pulses. This maximizes efficiency at light load by eliminating
connection because the high capacitance of Schottky diodes quiescent current in the switching IC during the period
creates narrow output spikes. These spikes will be eliminated between bursts.
if a secondary output filter is used or if there is sufficient lead The result of pulsating currents into the output capacitor
length between the regulator output and the load bypass is that output ripple amplitude increases and ripple fre-
capacitors. Low capacitance diodes like the 1N4148 do not
quency becomes a function of load current. The typical
create large spikes, but their high forward resistance requires output ripple in Burst Mode operation is 100mVp-p, and
even higher input voltage to start. ripple frequency can vary from 50Hz to 2kHz. This is not
D1, L1 and C2 act as the conventional catch diode and normally a problem for the logic circuits which are kept
output filter of the buck converter. These components alive during sleep mode.
should be selected carefully to maintain high efficiency Some thought must be given to proper sequencing be-
and acceptable output ripple. See the original LT1432 (5V) tween normal mode and Burst Mode operation. A heavy
data sheet for detailed discussions of these parts. (>100mA) load in Burst Mode operation can cause exces-
Current limiting is performed by R2. Sense voltage is only sive output ripple, and an abnormally light load (10mA to
60mV to maintain high efficiency. This also reduces the 30mA, see Figure 3) in normal mode can cause the
value of the sense resistor enough to utilize a printed regulator to revert to a quasi-Burst Mode operation that
circuit board trace as the sense resistor. The sense voltage also has higher output ripple. The worst condition is a
has a positive temperature coefficient of 0.33%/°C to sudden, large increase in load current (>100mA) during
match the temperature coefficient of copper. this quasi-Burst Mode operation or just after a switch
from Burst Mode operation to normal mode. This can
The basic regulator has three different operating modes,
cause the output to sag badly while the regulator is
defined by the Mode pin drive. Normal operation occurs when
establishing normal mode operation (≈100µs). To avoid
the Mode pin is grounded. A low quiescent current Burst
problems, it is suggested that the power-down sequence
Mode operation can be initiated by floating the Mode pin.
consist of reducing load current to below 100mA, but
Input supply current is typically 1.3mA in this mode, and
greater than the minimum for normal mode, then switch-
output ripple voltage is 100mVp-p. Pulling the Mode pin
ing to Burst Mode operation, followed by a reduction of
above 2.5V forces the entire regulator into micropower
load current to the final sleep value. Power-up would
shutdown where it typically draws less than 20µA.
consist of increasing the load current to the minimum for
Burst Mode Operation 50
NORMAL MODE
LOAD CURRENT – mA (NORMAL MODE)
TJ = 25°C
Burst Mode operation is initiated by allowing the Mode pin to 40
float, where it will assume a DC voltage of approximately 1V.
If AC pickup from surrounding logic lines is likely, the Mode 30
pin should be bypassed with a 200pF capacitor. Burst Mode
operation is used to reduce quiescent operating current when 20
DIODE TO OUTPUT (1N5818)
the regulator output current is very low, as in sleep mode in DIODE TO INPUT (1N5818)
output capacitor in pulses of higher amplitude and low duty Figure 3. Minimum Normal Mode Load Current
cycle rather than a continuous stream of low amplitude
7
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1432-3.3
UO U W U
APPLICATI S I FOR ATIO
normal mode, then switching to normal mode, pausing for Full Shutdown
1ms, followed by return to full load. When the Mode pin is driven high, full shutdown of the
If this sequence is not possible, an alternative is to regulator occurs. Regulator input current will then consist
increase the output capacitor to > 680µF. This modifica- of the LT1432 shutdown current (≈15µA) plus the switch
tion will often allow the power-down sequence to consist leakage of the switching IC (≈1µA to 25µA). Mode input
of simultaneous turn-off of load current and switch to current (≈15µA at 5V) must also be considered. Start-up
Burst Mode operation. Power-up is accomplished by from shutdown can be in either normal or Burst Mode
switching to normal mode and simultaneously increasing operation, but one should always check start-up over-
load current to the lowest possible value (30mA to 500mA), shoot, especially if the output capacitor or frequency
followed by a short pause and return to full load current. compensation components have been changed.
U
PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead Plastic DIP
0.400*
0.300 – 0.325 0.045 – 0.065 0.130 ± 0.005
(10.160)
(7.620 – 8.255) (1.143 – 1.651) (3.302 ± 0.127) MAX
8 7 6 5
0.065
(1.651)
0.009 – 0.015 TYP 0.255 ± 0.015*
(0.229 – 0.381) 0.125 (6.477 ± 0.381)
0.005
(3.175) 0.015
(0.127)
+0.025 MIN (0.380)
0.325 –0.015 MIN
( )
MIN
+0.635 1 2 3 4
8.255
–0.381 0.100 ± 0.010 0.018 ± 0.003
(2.540 ± 0.254) (0.457 ± 0.076) N8 0695
S8 Package
8-Lead Plastic SOIC 0.189 – 0.197*
(4.801 – 5.004)
8 7 6 5
0.010 – 0.020
× 45° 0.053 – 0.069
(0.254 – 0.508)
(1.346 – 1.752)
0.004 – 0.010
0.008 – 0.010
0°– 8° TYP (0.101 – 0.254)
(0.203 – 0.254)
0.228 – 0.244 0.150 – 0.157**
(5.791 – 6.197) (3.810 – 3.988)
0.016 – 0.050
0.014 – 0.019 0.050
0.406 – 1.270
(0.355 – 0.483) (1.270)
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH BSC SO8 0695
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
1 2 3 4
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
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