8086 Questions DSE
8086 Questions DSE
Technology
An Autonomous Institute Affiliated to University of Mumbai
The Minimum Mode of the 8086 microprocessor is designed for systems wherein the processor
shares the gadget bus with different devices and does not act as the bus controller. This mode is
commonly utilized in single-processor systems or while the device calls for fewer assets and a
much less complex configuration.
Key features of the Minimum Mode encompass:
1. Bus Controller: In Minimum Mode, the microprocessor relies on an outside bus controller,
which includes the 8284 clock generator, to address bus control indicators and bus arbitration.
The bus controller coordinates the activities of various devices linked to the machine bus.
2. Single Processor: The Minimum Mode is generally used in unmarried-processor structures
wherein the microprocessor is the number one processing unit and does not require the
complexities related to multiprocessor structures.
3. Limited Address and Data Lines: In Minimum Mode, most effective 16 address traces and
16 facts lines of the 8086 microprocessor are utilized, proscribing the reminiscence
addressing skills and I/O options compared to the Maximum Mode.
4. Reduced Complexity: The Minimum Mode configuration simplifies the machine design
with the aid of offloading bus manager obligations to an external bus controller, decreasing
the overall complexity and price of the gadget.
The operand is located in a register, which is specified in the instruction for eg : MOV BX, AX ;
Move the value from AX to BX
The effective address of the operand is given explicitly in the instruction. This mode accesses a
specific memory address. MOV AX, [1234h]; Move the value from memory address 1234h into
AX
The address of the operand is held in a register (or a memory location). The effective address is
determined by the contents of the register. MOV AX, [BX]; Move the value from the memory
address pointed to by BX into AX
This mode uses a base register (such as BX or BP) along with a displacement to compute the
effective address. MOV AX, [BX + 5]; Move the value from memory address (BX + 5) into AX
In this mode, an index register (such as SI or DI) is used along with a displacement to calculate
the effective address. MOV AX, [SI + 10] ; Move the value from memory address (SI + 10) into
AX
The operand's address is given in a register. It can use segment registers in conjunction with other
registers. MOV AX, [DI] ; Move the value from the address contained in DI into AX
This mode computes the effective address by adding a displacement to the address of the next
instruction. It is commonly used for control flow instructions. JMP label ; Jump to a label, where
the address is calculated relative to the current instruction
Each addressing mode provides flexibility in how operands are accessed and manipulated in the
8086 microprocessor. Understanding these modes is crucial for effective assembly programming
and optimizing performance.
7. Draw and explain memory read and memory write machine cycle timing diagrams in maximum
mode of 8086.(10 marks)
13. Define interrupt and their two classes? Write in detail about interrupt service routine?.
Ans: An interrupt is a mechanism that allows the 8086 microprocessor to pause its current
execution to handle a specific event, typically triggered by hardware or software. After
processing the interrupt, the CPU can return to its original task. This mechanism enables efficient
multitasking and responsive system performance.
Hardware Interrupts: These are signals generated by hardware devices, indicating that they
require the CPU's attention
Software Interrupts: These interrupts are generated by programs or the operating system itself.
An Interrupt Service Routine (ISR) is a critical component of computer architecture that allows
the CPU to respond promptly to events requiring immediate attention. It is a specialized function
that handles the execution of code in response to an interrupt signal, effectively enabling
multitasking and real-time processing in a system.
An interrupt is a signal that tells the CPU to stop its current activities and execute a specific piece
of code (the ISR) to handle an event. Interrupts can come from hardware devices (e.g.,
keyboards, mice, disk drives) or be generated by software (e.g., system calls, exceptions).
1. Event Handling: The primary function of an ISR is to respond to events. For instance, when
a keyboard key is pressed, an ISR can read the keystroke and store it in a buffer for further
processing.
2. Task Management: ISRs help manage tasks by handling asynchronous events, allowing the
CPU to perform other operations without waiting for the event to complete.
3. Resource Management: ISRs often manage hardware resources, such as reading from I/O
ports or communicating with other hardware components.
MICROPROCESSR CPU
Refers specifically to a CPU that is integrated Refers to the entire processing unit of a
onto a single chip. It encapsulates all the computer, which may include multiple chips.
necessary components for processing data and The CPU encompasses not only the
executing instructions. microprocessor but also other supporting
components like cache memory and
sometimes external controllers.
Typically consists of a single silicon chip that May consist of multiple microprocessors or a
includes the ALU, control unit, and registers. combination of microprocessors and
It is designed to perform basic processing additional processing units (such as GPUs)
tasks. and memory management units (MMUs),
depending on the architecture of the system
Examples include Intel's 8086, ARM Cortex, The term can refer to a multi-core CPU,
and AMD Ryzen chips. where multiple microprocessor cores are
integrated to enhance processing power, such
as an Intel Core i7.
16. Why the program counter and stack pointer are registers of 16 bit?.
The 8086 microprocessor is designed with a 16-bit architecture, meaning it processes 16 bits of
data simultaneously. This architecture defines the size of its registers, including the PC and SP.
The 8086 has a 16-bit data bus, allowing it to read or write 16 bits of data in a single operation.
This influences the size of all internal registers, including the PC and SP.
The Program Counter is implemented as the Instruction Pointer (IP) register. It holds the
address of the next instruction to be executed.
The Stack Pointer (SP) register in the 8086 points to the top of the stack in memory, which is
used for temporary storage of data, return addresses, and local variables.
Memory Management: The stack operates in a segment-based model where the segment
address (from the stack segment register, SS) and the offset (given by the SP) form a complete
address. A 16-bit SP allows the stack to manage addresses effectively within a 64 KB segment.
17. What are the 8086 instructions used for BCD arithmetic?
ANS. BCD (Binary-Coded Decimal) arithmetic instructions in 8086 are:
1. DAA (Decimal Adjust AL after Addition): Adjusts the result of adding two packed BCD
numbers to ensure a valid BCD result.
2. DAS (Decimal Adjust AL after Subtraction): Adjusts the result of subtracting two packed
BCD numbers to ensure a valid BCD result.
3. AAA (ASCII Adjust AL after Addition): Adjusts the result of adding two unpacked BCD
numbers to ensure a valid BCD result in ASCII format.
4. AAS (ASCII Adjust AL after Subtraction): Adjusts the result of subtracting two unpacked
BCD numbers to ensure a valid BCD result in ASCII format.
5. AAM (ASCII Adjust AX after Multiplication): Adjusts the result of multiplying two
unpacked BCD numbers.
6. AAD (ASCII Adjust AX before Division): Converts two unpacked BCD digits in AX into a
binary number before division.
21. List the flags of 8086. Draw the flag register format of 8086 microprocessor.
Ans. The flags in 8086 are divided into two categories: Status Flags and Control Flags.
Status Flags:
1. Carry Flag (CF): Indicates an overflow from the most significant bit.
2. Parity Flag (PF): Set if the number of set bits in the result is even.
3. Auxiliary Carry Flag (AF): Used in BCD arithmetic.
4. Zero Flag (ZF): Set if the result is zero.
5. Sign Flag (SF): Indicates the sign of the result (0 for positive, 1 for negative).
6. Overflow Flag (OF): Indicates an overflow in signed arithmetic.
Control Flags:
Ans. The physical address in 8086 is generated by combining the segment address and the offset
address. The segment address is shifted left by 4 bits (multiplied by 16) and then added to the
offset address. The formula for physical address calculation is:
Physical Address = (Segment Address * 16) + Offset Address
For example, if the segment address is 1234H and the offset is 5678H, the physical address
would be:
Physical Address = (1234H * 10H) + 5678H
= 12340H + 5678H = 179B8H
23. List any two external hardware synchronization instruction of 8086 microprocessor?
Ans. Two external hardware synchronization instructions of the 8086 microprocessor are:
1. LOCK: This instruction is used to ensure that the bus is locked during the execution of
certain critical instructions, preventing other processors or devices from accessing shared
memory.
2. WAIT: The WAIT instruction causes the processor to halt its execution until the Test pin
(TEST#) is active, which is used for synchronization with external hardware.
24. What are the 8086 instructions used for ASCII arithmetic.
Ans. The instructions are:
AAA (ASCII Adjust after Addition): After performing an addition of two ASCII characters, this
instruction adjusts the result to ensure it is a valid unpacked BCD (Binary Coded Decimal) value.
AAS (ASCII Adjust after Subtraction): After performing a subtraction of two ASCII characters,
this instruction adjusts the result to a valid unpacked BCD value.
Other instructions used for ASCII arithmetic include:
AAM (ASCII Adjust after Multiply): Adjusts the result of a multiplication of two ASCII values.
AAD (ASCII Adjust before Division): Prepares two unpacked BCD digits in AX for division.
27. State the function of following pins of 8086. (a) TEST (b) BHE
Here are the functions of the specified pins in the 8086 microprocessor:
(a) TEST Pin: The TEST pin is an input pin used in conjunction with the WAIT instruction. It
allows the 8086 to check if an external device is ready. If the TEST pin is low, the processor
will continue execution; if high, it will wait until the TEST pin goes low.
(b) BHE (Bus High Enable): The BHE pin is used to indicate that there is a data transfer on the
upper byte (D8-D15) of the 16-bit data bus. It is used when the processor accesses a 16-bit
data word or the higher byte of an 8-bit word. It helps manage data in odd or even memory
banks.
28. State the function of following pins of 8086. (a) ALE (b) DT/R 4 Marks
Here are the functions of the following pins in the 8086 microprocessor:
(a) ALE (Address Latch Enable): This pin is used to indicate when the address is available on the
multiplexed address/data bus (AD0-AD15). ALE is high during the first clock cycle,
signalling external latches to capture the address. After this, the bus is used for data, and ALE
goes low.
(b) DT/R (Data Transmit/Receive): This pin is used to control the direction of data flow through
the data bus transceivers. When **DT/R** is high, the 8086 is transmitting data (sending);
when low, it is receiving data. It helps manage the direction of communication between the
processor and external devices.
1) Instruction Fetching: BIU fetches instruction from memory into the instruction queue
2) Address generation: It calculates physical address using segment and offset value
3) Data transfer: handles the transfer of data between the processor and memory or I\O devices
4) Instruction Queue management: Maintains a queue of perfected instruction to speed up
processing
Memory segmentation is a technique used to divide the memory into segments to improve
memory management and access .In the 8086 microprocessor the total 1mb memory is divided
into segments of up to 64kb each
How it’s done:
The 8086 uses segments register (CS,DS,SS,ES)to point to the start of a segment
An offset address is used to access a specific location within a segments
The phycial address is calucated as:Physcial address = (segment register*16) + offset
39. Identify the addressing mode of the following instructions. (a) MUL AL,BL (b) MOV
DX,0040H 40.
Ans:
(a) MUL AL, BL
Addressing Mode: Register Addressing Mode : In this instruction, both AL and BL are
registers. The operation multiplies the contents of the AL register by the contents of the BL
register. Since both operands are specified as registers, it uses the register addressing mode.
(b) MOV DX, 0040H
Addressing Mode: Immediate Addressing Mode : In this instruction, 0040H is a constant value
(immediate data) that is being moved into the DX register. The immediate value is specified
directly in the instruction, indicating that it uses immediate addressing mode.
40. Explain the following instruction of 8086 (a) XLAT (b) XCHG
Ans:
XCHG − Used to exchange the data from two locations.
Description: The XCHG instruction exchanges the values of two operands. These can be
registers, memory locations, or a combination of both.
Operation: The values of the two specified operands are swapped. For example, XCHG AX, BX
will exchange the contents of registers AX and BX.
If one of the operands is in memory, the instruction will perform a memory-to-register or
register-to-memory exchange
XLAT − Used to translate a byte in AL using a table in the memory
Description: The XLAT instruction translates a byte using a lookup table. It uses the contents of
the AL register as an index to access a byte in a table located in memory.
Operation: The effective address of the table is determined by the BX register (or EBX in 32-bit
mode) plus an optional displacement (if specified).
The byte at the effective address ([BX + AL]) is loaded into AL, effectively replacing the value
of AL with the value found at that address.
41. Explain the following instruction of 8086 (a) CALL (b) RET
(a) CALL
Description: The CALL instruction is used to call a procedure (subroutine) within a program. It
transfers control to the specified procedure and saves the address of the next instruction to return
to after the procedure finishes executing.
Operation:
When a CALL instruction is executed, the current value of the instruction pointer (IP) is pushed
onto the stack. This IP value points to the next instruction after the CALL.
The control is then transferred to the address specified by the operand (which can be an
immediate value, a direct address, or a label).
(b) RET
Description: The RET instruction is used to return control from a procedure back to the calling
point in the program. It retrieves the saved return address from the stack.
Operation:
When RET is executed, it pops the top value from the stack (which is the return address that was
pushed by the CALL instruction) into the instruction pointer (IP).
This action transfers control back to the instruction immediately following the original
42. With suitable example explain following instruction. (a) DAA (b) ADC (c ) MUL (d) AAM 4
Explain any four logical instructions of 8086 microprocessor with example.
Ans:- Arithmetic Instructions
(a) DAA (Decimal Adjust for Addition)
The DAA instruction is used after an addition operation to adjust the result for BCD (Binary-
Coded Decimal) numbers.
Example: If you add two BCD numbers 25 (0010 0101) and 35 (0011 0101):
ADD Result: 60 (0011 1100)
DAA: Adjusts the result from 60 to 25 (0010 0101) + 35 (0011 0101) = 60. DAA converts this to
the correct BCD representation.
(b) ADC (Add with Carry)
ADC adds two operands along with the carry flag (CF). This is useful for multi-byte arithmetic
operations.
Example:
MOV AL, 25h ; AL = 25h (37 decimal)
MOV BL, 35h ; BL = 35h (53 decimal)
ADD AL, BL ; AL = AL + BL = 25h + 35h = 5Ah
; Assume carry is set from a previous operation
ADC AL, 01h ; AL = AL + 01h + CF
If CF = 1, AL would become 5Bh; if CF = 0, AL remains 5Ah.
(c) MUL (Multiply)
MUL performs unsigned multiplication. The result is stored in the DX
register pair.
Example:
MOV AL, 04h ; AL = 4
MOV BL, 03h ; BL = 3
MUL BL ; DX:AX = AL * BL = 4 * 3 = 0Ch
Here, AX will contain 0Ch (12 in decimal), and DX will be 0 (since the product fits in AX).
(d) AAM (ASCII Adjust AX After Multiply)
AAM adjusts the AX register after a multiplication operation to BCD representation.
Example: After multiplying two BCD values, AAM can be used to convert the result:
MOV AL, 25h ; AL = 25 (BCD)
MOV BL, 03h ; BL = 3
MUL BL ; AX = 75 (in binary)
AAM ; Adjusts AX to BCD
This changes AX to 75h (BCD) representation.
Logical Instructions of 8086
1. AND
AND performs a bitwise AND operation between two operands.
Example:
MOV AL, 0Fh ; AL = 0000 1111
MOV BL, 0Ch ; BL = 0000 1100
AND AL, BL ; AL = AL AND BL = 0000 1100 (0Ch)
2. OR
OR performs a bitwise OR operation between two operands.
Example:
MOV AL, 0Fh ; AL = 0000 1111
MOV BL, 0Ch ; BL = 0000 1100
OR AL, BL ; AL = AL OR BL = 0000 1111 (0Fh)
3. XOR
XOR performs a bitwise exclusive OR operation between two operands.
Example:
MOV AL, 0Fh ; AL = 0000 1111
MOV BL, 0Ch ; BL = 0000 1100
XOR AL, BL ; AL = AL XOR BL = 0000 0011 (3)
4. NOT
NOT performs a bitwise NOT operation, flipping all bits of the operand.
Example:
MOV AL, 0Fh ; AL = 0000 1111
NOT AL ; AL = NOT AL = 1111 0000
These logical instructions are fundamental for manipulating binary data, allowing you to set,
clear, or toggle bits as needed in various applications.
43. List and explain any four string operation instruction.
Ans:- 1. MOVS (Move String)
The MOVS instruction is used to move a block of data from the source string to the destination
string. The direction of the operation is controlled by the Direction Flag (DF).
Usage:
MOVS BYTE PTR [DI], BYTE PTR [SI] (for byte strings)
MOVS WORD PTR [DI], WORD PTR [SI] (for word strings)
Example:
Assume DS:SI points to the source string and ES:DI points to the destination
MOV CX, 5 ; Number of bytes/words to move
CLD ; Clear direction flag (incrementing mode)
REP MOVSB ; Move CX bytes from DS:SI to ES:DI
Here, the REP MOVSB instruction will move 5 bytes from the source to the destination.
2. CMPS (Compare String)
The CMPS instruction compares two strings. The comparison is done byte by byte or word by
word, depending on whether the operand is BYTE or WORD.
Usage:
CMPS BYTE PTR [SI], BYTE PTR [DI]
CMPS WORD PTR [SI], WORD PTR [DI]
Example:
MOV CX, 5 ; Number of bytes/words to compare
CLD ; Clear direction flag (incrementing mode)
REP CMPSB ; Compare CX bytes from DS:SI and ES:DI
The result of the comparison will set the flags accordingly (ZF, CF, etc.) for further conditional
branching.
3. SCAS (Scan String)
SCAS scans a string for a specified value in the AL register. It compares the value in AL with
each byte/word of the string, starting from the address in DI.
Usage:
SCASB (for byte strings)
SCASW (for word strings)
Example:
MOV AL, 'A' ; Value to search for
MOV CX, 10 ; Number of bytes to scan
CLD ; Clear direction flag (incrementing mode)
REP SCASB ; Scan CX bytes starting at ES:DI
After execution, the status of the flags will indicate whether the value was found.
4. STOS (Store String)
STOS stores the value from AL (for bytes) or AX (for words) into a destination string pointed to
by DI. This instruction is useful for initializing or filling memory with a specific value.
Usage:
STOSB (for byte strings)
STOSW (for word strings)
Example:
MOV AL, 0FFh ; Value to store
MOV CX, 10 ; Number of bytes to store
CLD ; Clear direction flag (incrementing mode)
REP STOSB ; Store AL into ES:DI for CX times
This will fill the memory starting at ES
With the value in AL, repeating it 10 times.
44. Write assembly language instructions of 8086 microprocessor to (a) Divide the content of AX
register by 50H (b) Rotate the content of BX register by 4 bit toward left.
Ans:- (a) Divide the content of AX register by 50H
To divide the content of the AX register by 50H, we can use the DIV instruction. The result will
be stored in the AL register (quotient), and any remainder will be in the AH register.
Example Code:
Assume AX contains the dividend
MOV AX, 1234h ; Load AX with the dividend (for example)
MOV BX, 50h ; Load BX with the divisor (50H)
DIV BX ; Divide AX by BX (AX / BX)
; After the DIV instruction:
; AL = Quotient
; AH = Remainder