Basic network Concepts Network Analysis

Module 1 : BASIC NETWORK CONCEPTS

1.1. Sources :

1.1.1 D.C.Sources:

a) Independent Voltage and current sources :

The strength of the source is a constant irrespective of variation of the network to which it is connected.
An ideal source will have zero internal impedance as in figure 1.1.1(a). But all practical sources will have
their own impedances of the source. A practical voltage source consists of an ideal voltage source in series
with internal impedance as in figure 1.1.1(b). A practical current source consists of a ideal current source
in parallel with the internal impedance as in figure 1.1.1(b) ( Note: All independent sources are
represented by circles )

b) Dependent Voltage and current sources (Controlled sources):

The strength of the voltage or current sources changes for any change in the
connected network. The voltage or current from these sources depends on the
voltage or current in some other part of the circuit. The dependent voltage and
current sources are represented as in figure 1.1.2
(Note: All dependent sources are represented by Rhombus)

Types of controlled sources

(a) Voltage controlled voltage source (b)Current controlled voltage source

(c) Voltage controlled current source (d) Current controlled current source

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1.1.2 A.C sources:

When the voltage or current of the source changes with time in a definite fashion that source is called
A.C source.

1.2 Loop Analysis (Mesh current Analysis) :

Kirchhoff’s laws can be used to analyze the given network and to determine voltages or currents in
any part of the network. The loop current analysis assumes one current in one loop and uses KVL to
determine the unknowns.
Procedure for loop current analysis:
1 Identify the closed path and mark loop currents (say I1, I2, I3 …) in any arbitrary directions. (We
usually take clockwise directions).
2 Continue until all elements are traced.
3 Write KVL equations for loops identified.
4 The loop current equations are use to determine the required quantities.

1.2.1 Sign convention:

1 Whenever the current flows or (our direction of movement) through a resistor it is considered as
voltage drop.
2 If the direction of movement is from negative to positive (ie.; lower to higher potential)it is
considered as voltage rise.
3 If the direction of movement is from positive to negative (ie.; higher to lower potential)it is
considered as voltage drop.

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P.1.2.1. Consider an example shown in figure 1.2.1 Let us find I1, I2 and voltage in 2 .
(We will use KVL to find the above items: the algebraic sum of voltages around a closed circuit
loop is zero or V =  IR (i.e., sum of voltage sources = voltage drops)
(Clearly in loop 1 there are 4 elements 1, 2 resistors
and 10V , 5V sources.)
1I1+2(I1 – I2) = 10 - 5
( ie 1  current I1+ 2 current(I1 – I2) = 10 - 5
( ie I1 – I2, here I2 is negative as its direction is opposite
and I1 is main current and its 10 - 5 as 10V voltage rise
and 5V is voltage drop)
3I1 – 2I2 = 5 (1)
Similarly in loop 2: I2 is main current
2(I2 – I1) + 1 I2 = 5 -3 (its 5-3 as 5 voltage rise and 3V is voltage drop)
-2I1 + 3 I2 = 2 (2)
Solving (1) and (2) gives I1 = 3.8A and I2 = 3.2 A
And V2 = 2(I1 – I2) = 1.2V

P.1.2.2. Use mesh analysis to find power dissipated in 5 resistor shown in figure 1.2.2.
In loop 1 we see that there is a current source.
I1 = 2A (1)
Now applying KVL to loop 2
10(I2 – I1) + 1(I2 – I3) = -10
-10I1 + 11I2 – 1I3 = -10 (2)
Now applying KVL to loop 3
1(I3 – I2) + 5 I3 = -5
-I2 + 6I3 = -5 (3)

I1 = 2A I2 = 0.846A I3 = -0.692A
Power dissipated = P5 = I32 R = (-0.692)2 5 = 2.4Watts

P.1.2.3. Use mesh analysis to find i shown in figure 1.2.3.

Since loop 1 current is 11A and loop3 current is 4A then we assume i itself as loop current in loop2
Hence applying mesh analysis to loop 2
4i + 5(i+4) + 3(i – 11) = 0
(its (i + 4) in 5since both currents are in same direction
and (i -11) as 11 A flows opposite when in loop2 )
 i = 2A

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P.1.2.4. Use loop analysis to determine current in (2+j3) shown in figure 1.2.4
Loop1:
5I1 + j5( I1 – I2) = 300
(5+j5)I1 – j5I2 = 300 (1)
Loop2:
j5( I2 – I1) + (2 +j3) I2 + 6( I2 – I3) = 0
– j5I1 + (8 + j8) I2 – 6 I3 = 0 (2)
Loop3:
6( I3 – I2) + 4 I3 = -2545
-6I2 + 10 I3 = -2545 (3)

(Note we can cross check:

• We see that in equation (1) we write (5+j5)I1 i.e. sum of all impedences in loop1 as we are in
loop 1 and we write – j5I2 as it is in between the two loops(1 and 2).
• Similarly while writing equation (2) – j5I1 as it is in between the two loops (8 + j8) I2 i.e. sum of
all impedences in loop2 as we are in loop 2 and – 6 I3 as it is in between the two loops(2 and 3)
• And Similarly we write the third equation -6I2 as it is in between the two loops(2 and 3) 10 I3 i.e.
sum of all impedences in loop3 as we are in loop 3 )

Solving by Cramer’s rule

(𝟓 + 𝐣𝟓) – 𝐣𝟓 0
 = | – 𝐣𝟓 (𝟖 + 𝐣𝟖) – 𝟔| = (5+j5) { (8 + j8) 10 – 6 6} + j5 {– j510 – 0 } + 0 = (70 +620i)
𝟎 –𝟔 10
(𝟓 + 𝐣𝟓) 𝟑𝟎𝟎 0
2 = | – 𝐣𝟓 𝟎 – 𝟔| = (5+j5) { 0 – 6 (2545)} + 300 {– j510 – 0 } + 0 = (-2560j)
𝟎 −𝟐𝟓𝟒𝟓 10
∆2 (−𝟐𝟓𝟔𝟎𝐣)
𝐼2 = = = (−4.077 − 0.460𝑗)𝐴
∆ (70 + 620𝑗)

P.1.2.5. Use loop analysis to determine V2 such that current in 4 is zero shown in figure
1.2.5
Loop1:
5I1 + j2( I1 – I2) = 500
(5+j2)I1 – j2I2 = 500 (1)
Loop2:
2j( I2 – I1) + 4 I2 -2j( I2 – I3) = 0
– j2I1 + 4 I2 +2j I3 = 0 (2)
Loop3:
-2j( I3 – I2) + 2 I3 = -V2
2jI2 + (2 – 2j) I3 = -V2 (3)
Given: current in 4 is zero i.e. I2 = 0
Equation (1) ⇒(5+j2)I1 = 500

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I1 = (8.62 – 3.45j) A
Equation (2) ⇒ – j2I1 +2j I3 = 0 ⇒ I1 = I3
Equation (3) ⇒ (2 – 2j) I3 = -V2
V2 = - (2 – 2j) (8.62 – 3.45j) = - (10.345 – 24.13j) V

P.1.2.6. Find the voltage drop across the capacitor Use mesh analysis shown in figure 1.2.6
Loop1:
2I1 + (3+j5)( I1 – I2) = 2030
(5+j5)I1 – (3+j5)I2 = 2030 (1)

Loop2:
(3+j5)( I2 – I1) + (3-j8) I2 = -1045
– (3+ j5)I1 + (6-j3) I2 = -1045 (2)

(𝟓 + 𝐣𝟓) – (𝟑 + 𝐣𝟓)
 = | | = (𝟓 + 𝐣𝟓)(𝟔 − 𝐣𝟑) − (𝟑 + 𝐣𝟓)(𝟑 + 𝐣𝟓) = (𝟔𝟏 − 𝟏𝟓𝐣)
– (𝟑 + 𝐣𝟓) (𝟔 − 𝐣𝟑)

(2030) – (𝟑 + 𝐣𝟓)
∆2 = | | = (2030)(𝟔 − 𝐣𝟑) − (𝟑 + 𝐣𝟓)(1𝟎𝟒𝟓) = (𝟏𝟒𝟖. 𝟎𝟔𝟓 − 𝟒𝟖. 𝟓𝟑𝐣)
– (1𝟎𝟒𝟓) (𝟔 − 𝐣𝟑)

∆𝟐 (𝟏𝟒𝟖.𝟎𝟔𝟓−𝟒𝟖.𝟓𝟑𝐣)
𝑰𝟐 = ∆
= (𝟔𝟏−𝟏𝟓𝐣)
= (𝟐. 𝟒𝟕 − 𝟎. 𝟏𝟖𝟕𝒋)𝑨

𝑽−𝒋𝟖𝜴 = 𝑰𝟐 (−𝒋𝟖) = (−𝟏. 𝟓 − 𝟏𝟗. 𝟕𝟖𝒋)𝑽

P.1.2.7. Find power dissipated in 4V source Use mesh analysis shown in figure 1.2.7
Loop1:
I1 = 3A (1)
Loop2:
4(I2 – I1) = -6 – 2I3 (Here 2I3 is a voltage source hence from the direction of movement it’s a
voltage drop hence negative)
-4I1 + 4I2 +2I3 =- 6
4I2 +2I3 = 6 (2)
Loop3:
3(I3 + I4) = 2I3 – 4
I3 + 3I4 = -4 (3)
Loop4:
I4 = 0.5I2 (Here 0.5I2 is a current source)
-0.5I2 + I4 = 0 (4)
Solving (2) (3) and (4)
I1 = 3A I2 = 14 A, I3 = -25A, I4 = 7 A
Power dissipated in 4V source = 4 I3 = 425= 100 Watts

P.1.2.8. Find Ix Iy and current in 10. Use mesh analysis shown in figure 1.2.8
Solution: We will consider Ix and Iy itself as the loop currents
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Loop y:
5Iy + 10 (Iy – Ix) = 5 -5 Iy -10 Ix
20Iy =5 (1)
Iy = 0.25A
Loop x:
10 (Ix – Iy) + 5 Ix = -10 +5 Iy
-10 = -15Iy + 15 Ix (2)
Ix = -0.416A
Current in 10 = Iy –Ix = 0.666A

P.1.2.9. The mesh equations of the circuit are

(10-j5) I1 – 3 I2 = 1030
-3I1 +(12+j6)I2 – 5I3 = 0
-5I2 +(8+3j)I3 = 0 . Draw the network satisfying the above
equations.

In equation(1) there is no I3 term and in equation (3) there is no I1 term hence we can infer that
loop 1 and loop 3 are not connected.
We can assume the network as shown in the figure
Further equation (1) (10-j5) I1 – 3 I2 = 1030
I1 term represents sum of all impedences in loop1 while I2 term represents the impedence in
between. Hence 3Ω resistance is in between loo1 and loop2 while the remaining impedence
(10-j5 -3) = (7 – j5) is the impedence as shown. Further 7 represents resistance an –j5 represents
capacitance.
In Equation 2: -3I1 + (12+j6)I2 – 5I3 = 0
3 represents resistance between loop 2 and loop1 while 5 represents resistance between loop3
and loop2 and remaining (12+j6 – 5-3) = (4+j6) is the impedence as shown Where 4 represents
resistance and j6 represents inductance
In Equation 3: -5I2 +(8+3j)I3 = 0
5 represents resistance between loop3 and loop2 and remaining (8+j3 – 5) = (3+j3) is the
impedence as shown

1.3 Super mesh Analysis

We apply super mesh analysis when there is a current source between two loops.
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P.1.3. 1 Find power dissipated in 4Ω resistor. Use mesh analysis shown in figure 1.3.1
Since there is a current source between loop 1 and loop 2. We cannot apply mesh analysis
directly. Hence we can write an equation
I2 – I1 = 4A (1)

(Since I2 is in direction of 4A we write (I2 – I1)

Super mesh loop (1) and loop (2)
Super mesh is a combination of two loops considered
without the current source which is in between the
two loops
1(I1 – I3) + 2 (I2 – I3) +2I2 = 10
I1 +2I2 -3I3 = 10 (2)
Loop3:
I3 = 2 A (3)
Solving for I1 I2 I3 we get
I1 = 2.667A I2 = 6.667 I3 = 2 A

P.1.3. 2 Find power dissipated in 2Ω resistor. Use mesh analysis shown in figure 1.3.2
Loop1:
60 – 6ia = 2(I1 – I4)
ia = I4
60 = 2I1 + I4 (1)
Current source in between loop2 and
loop3
I2 – I4 = 4 (2)
Loop3
I3 = 5 (3)
Supermesh loop2 and loop4
6ia =2(I4 – I1) + 5 I4 +3(I4 – I3)+ 4(I2 – I3)
-2I1 + 4 I2 +4I4 =35 (4)
Solving for I1 I2 I3 I4 we get
I1 = 16.83A I2 = 10.58 I3 = 5 A I4 = 6.58 A
Power dissipated in 2Ω resistor = I12 2 = 210.25 Watts

P.1.3. 3 Find i1 and i2 using mesh analysis for the circuit in figure 1.3.3(a)
Solution: (We name the loop current as Ia IbIc and Id as shown in figure (b) since it is asked to
find currents i1 and i2)

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Loop a:
Ia = 5A (1)
Loop b and c : (current source between loop b and c)
Ic – Ib = 2.5 i1
i1 = Ic
Ib +1.5 Ic = 0 (2)
Supermesh b and c:
80(Ib – Ia) + 8(Ib – Id) +40 (Ic – Id) = 64
88Ib +40Ic - 48Id = 464 (3)
Loop d
8(Id – Ib) + 40 (Id – Ic) = 2i2
i2 = Ib - Id
-10Ib +50Id – 40Ic = 0 (4)
Solving
Ia =5A Ib = 4.094A Ic =-2.72A Id = -4.43
i1 = Ic = -2.72A
i2 = Ib - Id = 8.52A

1.4 Nodal Analysis

This analysis assumes voltages at the nodes as variables and uses KCL to determine unknowns.
1.4.1 Procedure :
1. Mark the junctions where two or more elements are connected as nodes and label them.

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2. Consider one of the nodes as the reference node (ground node).
3. Write KCL equation for the nodes except for reference node.
4. Solve the equations to get node voltages.
1.4.2 Sign Convention :
1. Currents entering the node are taken positive and currents leaving the node are taken
negative.
2. While writing the equation for a particular node that node voltage is considered to be
having a higher value than any other voltage.
3. Voltage at the reference node is zero. Hence other node voltages are with respect to
reference node.

P.1.4.1 Find the current in 5 resistor using node analysis for the circuit in figure 1.4.1
Solution:
At Node 1:
(We have three elements a current source of 2A, a resistor
of 2 and a resistor of 1. We apply KCL at node 1 then
current entering the node = current leaving the node)
𝑽𝟏 𝑽𝟏 −𝑽𝟐
𝟐= + (i.e. 2A is current source entering =
𝟐 𝟏
current in 2 + current in 1)
2 = 1.5 V1 - V2 (1)
At Node 2:
(We have three elements a resistor of 1, a resistor of 3 and a resistor of 5. We apply KCL at
node 1 then current entering the node = current leaving the node)
𝑽𝟐 −𝑽𝟏 𝑽𝟐 −5 𝑽𝟐
𝟎= 𝟏
+ 𝟑
+ 𝟓
1.667 = -V1 + 1.5333V2 (2)
V1 = 3.64V V2 = 3.46V
𝑽𝟐 𝟑.𝟒𝟔
Current in 5 = = = 𝟎. 𝟔𝟗𝟐𝑨
𝟓 𝟓

P.1.4.2. Find the current in R resistor using node analysis for the circuit in figure 1.4.2

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Node 1:
(Since 5V is connected directly at node 1 we take it as node 1
V1 = 5V (1)
Node 2 :
𝑽𝟐 −𝑽𝟏 𝑽𝟐 −𝑉3
𝟓= 𝟏
+ 𝟏
-V1 + 2V2 –V3 = 5 (2)
Node 3 :
𝑽𝟑 −𝑽𝟐 𝑉3
−𝟓 = +
𝟏 𝟏
- V2 + 2 V3 = - 5 (3)
V2= 5 V3 =O
𝑽𝟐 −𝑽𝟏
Current in R = 𝟏
=𝟎

P.1.4.3. Find Vx and Vy using node analysis for the circuit in figure 1.4.3
Node 1:
𝑽𝟏 𝑽𝟏 −𝑽𝟐 𝑽𝟏 −𝑽𝟑
𝟒
+ 𝟏𝟎
+ 𝟒
=𝟖
1 1 1 1 1
𝑉1 (4 + 10 + 4) − 𝑉2 ( 10) − 𝑉3 (4) = 8

12V1 – 2V2 – 5V3 = 160 (1)

Node 2:
𝑽𝟐 −𝑽𝟏 𝑽𝟐 −𝑽𝟑
+ = 𝟐𝟎 − 𝟖 − (−𝟒)
𝟏𝟎 𝟏𝟎
1 1 1 1
−𝑉1 (10) + 𝑉2 ( 10 + 10) − 𝑉3( 10) = 8

-V1 + 2V2 –V3 = 160 (2)

Node 3:
𝑽𝟑 −𝑽𝟏 𝑽𝟑 −𝑽𝟐 𝑉3
𝟒
+ 𝟏𝟎
+ 2
= −𝟒
1 1 1 1 1
−𝑉1 (4) − 𝑉2 ( 10) + 𝑉3 (2 + 4 + 10) = −4

-5V1 - 2V2 +17V3 = -80 (3)

V2 = 110V, V3 = 20V
Vx = V2 = 110V, Vy = V2 – V3 = 90V

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P.1.4.4. Find v1 and power supplied by the dependent current source using node analysis for
the circuit in figure 1.4.4
Node 1:
𝑽𝟏 −𝑽𝟐 𝑽𝟏 −𝑽𝟑
𝟐𝟎
+ 𝟓𝟎
=𝟓
1 1 1 1
𝑉1 (20 + 50) − 𝑉2 ( 20) − 𝑉3 (50) = 5

0.07V1 – 0.05V2 – 0.02V3 = 5 (1)

Node 2:
V2= 0.4v1
V1 =v1
0.4V1 – V2 = 0 (2)
Node 3:
𝑽𝟑 −𝑽𝟏 𝑽𝟑 −𝑽𝟐
+ = 𝟎. 𝟎𝟏𝒗𝟏
𝟓𝟎 𝟑𝟎

-0.03V1 – 0.0333V2 +0.0533V3 = 0

V1 = 148.15V V2 = 59.26V V3= 120.37V
Power supplied by dependent current source = V3  0.01v1 = 120.37 0.01148.15 = 178.32W

P.1.4.5. Find VA using node analysis for the circuit in figure 1.4.5

In this figure there is only one node unknown. Other node voltages are 12V and 6V

Hence applying node analysis at A

𝑽𝑨 − 6 𝑽𝑨 − 12 𝑽𝑨 − 12 𝑽𝑨
+ + +
𝟒 𝟒 𝟑 𝟏𝟎
=𝟑

1 1 1 1 6 12 12
𝑉𝐴 ( + + + ) = 3 + + +
4 4 3 10 4 4 3

VA = 12.32V

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1.5 Super Node Analysis

We apply super node analysis when there is a voltage source between two nodes.
P.1.5.1. Find the v using node analysis for the circuit in figure 1.5.1

There is a voltage source between two nodes V1 and V3

Hence we write an equation between node 1 and 3 as
V1 – V3 = 12 (1)
Super node 1 and 3
Here we consider both node 1 and 3 together having higher potential (i.e combining together
and assuming it an one node)
𝑽𝟏 −12 𝑽 −𝑽 𝑽 −𝑽
+ 𝟏 𝟐 + 𝟑 𝟐 =𝟑
𝟖 𝟔 𝟑
1 1 1 1 1 12
𝑉1 (8 + 6) − 𝑉2 ( 6 + 3) + 𝑉3 (3) =3+ 8
0.2916V1 – 0.5V2 + 0.333 V3 = 4.5 (2)
At node 2
𝑽𝟐 −𝑽𝟏 𝑽𝟐 −𝑽𝟑 𝑽𝟐
𝟔
+ 𝟑
+
𝟒
=0
1 1 1 1 1
−𝑉1 (6) + 𝑉2 ( 6 + 4 + 3) − 𝑉3 (3) = 0

-0.1666V1 + 0.75V2 –0.13333V3 = 0 (3)

V1 = 20, V2 = 8, V3 = 8
V2 =v= 8
P.1.5.2. Find the V1 V2 and V3 using node analysis for the circuit in figure 1.5.2
At Node 1 and Node 3 we have a voltage source:
𝑽𝟑 − 𝑽𝟏 = 𝟔 (1)
Since 6V source (+ve connected to V3 and –ve connected
to V1)
At Node 2 and Node 3 we have a voltage source
𝑉2 − 𝑉3 = 3𝑉1
𝟑𝑽𝟏 − 𝑽𝟐 + 𝑽𝟑 = 𝟎 (2)
Supernode 1,2 and 3:
𝑽𝟏 𝑽 −𝑽 𝑽𝟐 𝑽𝟐 −𝑽𝟏 𝑽𝟐 −𝑽𝟑 𝑽𝟑 −𝑽𝟐 𝑽𝟑
𝟎.𝟐
+ 𝟏𝟎.𝟓 𝟐 + 𝟏 + 𝟎.𝟓
+ 𝟏
+ 𝟏
+ 𝟏
=𝟔
( )
𝟑
1 1 1 1 1
𝑉1 (0.2 + 0.5 − 0.5) − 𝑉2 ( 0.5 − 3 − 0.5 + 1 − 1) + 𝑉3 (1 + 1 − 1) = 6

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5V1 + 3V2 + V3 = 6 (3)
V1 =-1V, V2 = 2V, V3 = 5V
P.1.5.3. The node voltage equations of a network are given by
𝟏 𝟏 𝟏 𝟏 𝟏 𝟏 𝟏 𝟏
(𝟔 + 𝟒𝒋 + 𝟓) 𝑽𝟏 − 𝑽
𝟓 𝟐
= 𝟐 and − 𝟓 𝑽𝟏 + (𝟐 − 𝟐𝒋 + 𝟓) 𝑽𝟐 = 𝟎
Derive the network.
Solution:
𝟏 𝟏 𝟏 𝟏
Equation (1) is (𝟔 + 𝟒𝒋 + 𝟓) 𝑽𝟏 − 𝑽
𝟓 𝟐
=𝟐
1
We can see term 5 common with V1 and V2 hence. Resistance of 5Ω will be in between while
(6+4j) will be other series resistance in loop1 and a current source of 2A is placed in series as
shown.
𝟏 𝟏 𝟏 𝟏 1
Equation (2) is − 𝑽𝟏 + ( − + ) 𝑽𝟐 = 𝟎 We can see term common with V1 and V2 hence.
𝟓 𝟐 𝟐𝒋 𝟓 5
Resistance of 5Ω will be in between as before while (2 – 2j) will be in series
As shown

P.1.5.4. The node voltage of a network is given by

𝟏. 𝟑𝟑 𝟐 −𝟎. 𝟑𝟑
| −𝟏 𝟎 −𝟎. 𝟐𝟓|
𝑽𝟐 = 𝟎 𝟒 𝟏
𝟏. 𝟑𝟑 −𝟏 −𝟎. 𝟑𝟑
| −𝟏 𝟏. 𝟕𝟓 −𝟎. 𝟐𝟓|
𝟎 𝟎 𝟏
Derive the network.
∆2
Solution: Since V2 = ∆
we write the equations as
1.33V1 – V2 -0.33V3 = 2 (1)
-V1 +1.75V2 -0.25V3 = 0 (2)
V3 = 4 (3)
In equation 1 resistance of 1Ω is common to both V1 and V2while 0.33Ω is common to both V1
and V3 and 2A is the current source entering at node 1. Inverse of 0.33 is 3Ω. Inverse of 1 is 1Ω
In equation 2 resistance of 1Ω is common to both V1 and V2while 0.25Ω is common to both V2
and V3 hence ( 1+0.25 = 1.25) the remaining resistance ie
(1.75 – 1.25 =0.25) Inverse of 0.25 = 4 and inverse of 0.5 is
2Ω.
In equation 3 we have V3 = 4
Hence we have a voltage source at node V3

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1.6 Source Transformation and Source shifting Techniques:

1.6.1. Source transformation:
The voltage and current sources are mutually transformable.
Consider a practical voltage source and a current source connected to load ZL as in figure
1.6.1(a) and figure 1.6.1(b).

𝑽
In figure (a) 𝑰𝒗 = (1)
𝒁𝒗 +𝒁𝑳
𝑰 𝒁𝒊
In figure (b) 𝑰𝒊 = 𝒁𝒊 +𝒁𝑳
(2)
For the two sources to be equal, their load currents must be same. When load is same.
𝐼𝑣 = 𝐼𝑖 (3)
𝑽 𝑰𝒁
𝒁𝒗 +𝒁𝑳
= 𝒁 +𝒁𝒊 (4)
𝒊 𝑳
When load impedence is open circuited voltage across AB = V as in figure (a)
When load impedence is open circuited voltage across CD = IZi as in figure (b)
must be same  𝑉 = 𝐼 𝑍𝑖 (5)
From equation (3) 𝒁𝒗 + 𝒁𝑳 = 𝒁𝒊 + 𝒁𝑳
𝒁𝒗 = 𝒁𝒊 (6)
Hence from equations (5) and (6) we can conclude that source may be transformed from one
form to another.
1.6.2.Source Shifting:

1.6.2.1 Voltage shift or V-shift

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1.6.2.2 I shift or Current -shift

P.1.6.1. For the network shown in figure 1. 6.1 determine V using source shift and/or source
transformation techniques only. Then verify by node equation.

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Solution:
Using I shift technique for 2A current source we write he network as in figure (a)

In figure (b) we have

used source
transformation of 2A,
1Ω to 2V, 1Ω

In figure (c) we have

reduced series reistances
(1+3 = 4)
And converting 2V,
4Ω(series) to current
source of 0.5A, 4 Ω( in
parallel) as in figure (d)

Figure (e) shows

(4||4 = 2) and 0.5 A
converted to voltage source
Finally we apply KVL
(2 + 2) I = 4 +1 – 3
I =0.5A
V= 4 – 2I
=3V

By node analysis

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At node 1:
𝑽𝟏 −𝑽𝟐 𝑽𝟏 −𝑽𝟑
𝟏
+ 𝟑
=𝟐
4V1 – 3V2 – V3 = 6 (1)
Node 2:
𝑽𝟐 −𝑽𝟏 𝑽𝟐 −𝑽𝟑 𝑽𝟐
𝟏
+ 𝟒
+ 𝟐
=𝟎
-4V1 + 7V2 – V3 = 0 (2)
V3 = 3 (3)
On solving (1) (2) and (3)
V2 = 3V

P.1.6.2. For the network shown in figure 1.6.2 reduce the network to a single voltage source in series
with a resistance using source shift and source transformation techniques only

Solution: Using Current Shift technique for 45A to 2Ω and

5Ω respectively . We can write the network as in figure (a)

Converting 45A,2Ω and 45A ,5Ω to voltage source. We

write the network as in figure (b)

The resistance 8 and 2 are in series and

Resistances 5 and 10 in series

Using Voltage shift technique we can reduce the network as in figure (c)

Further we can convert 30V,3Ω to 10A in parallel with 3Ω and reducing voltage source ( 90-30 = 60V)as
in figure (d)

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Converting 60V,10Ω and 225V, 15Ω to current source and 6||3 = 2 hence circuit in figure (d) is reduced
to figure (e). Further current source (6||15) = 9A and resistances (10||15) = 6 as in figure (f)

Converting figure (f) to voltage source

Figure h gives the equivalent circuit, single voltage source in series with a resistance.

1.7 Star-Delta Conversions.

Star Connection: Starting ends ( or finishing ends are connected together to point n
(neutral ) as shown in figure 1.7.1(a)
Delta connection: Finishing end of one impedence is connected to starting end of the next
impedence in a cyclic order as shown in figure 1.7.1(b).

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1.7.1 Delta to star conversion :

Consider the terminals 1 and 2 as in figure 1.7.1(a). The impedence between two terminals is
= Z 1 + Z2 (1)
Impedence between 1 and 2 as in figure 1.7.1 (b)
= Z12 ||(Z23 + Z31)
𝐙 (𝐙 +𝐙𝟑𝟏 )
= (𝐙𝟏𝟐 +𝐙𝟐𝟑 (2)
𝟏𝟐 𝟐𝟑 +𝐙𝟑𝟏 )

For equivalent circuits impedences between two terminals must be equal.

𝐙 (𝐙 +𝐙 )
Z1 + Z2 = (𝐙𝟏𝟐 +𝐙𝟐𝟑 +𝐙𝟑𝟏 (3)
𝟏𝟐 𝟐𝟑 𝟑𝟏 )

Similarly between 2 and 3

𝐙𝟐𝟑 (𝐙𝟐𝟏 +𝐙𝟑𝟏 )
Z2 + Z 3 = (4)
(𝐙𝟏𝟐 +𝐙𝟐𝟑 +𝐙𝟑𝟏 )
Similarly between 3 and 1
𝐙𝟑𝟏 (𝐙𝟐𝟏 +𝐙𝟐𝟑 )
Z3+ Z1 = (5)
(𝐙𝟏𝟐 +𝐙𝟐𝟑 +𝐙𝟑𝟏 )
Equation (3) – Equation (4)
𝐙𝟏𝟐 𝐙𝟐𝟑 +𝐙𝟏𝟐 𝐙𝟑𝟏 − 𝐙𝟐𝟑 𝐙𝟐𝟏 −𝐙𝟐𝟑 𝐙𝟑𝟏
Z1- Z3 = (𝐙𝟏𝟐 +𝐙𝟐𝟑 +𝐙𝟑𝟏 )
𝐙𝟏𝟐 𝐙𝟑𝟏 − 𝐙𝟐𝟑 𝐙𝟑𝟏 )
= (6)
(𝐙𝟏𝟐 +𝐙𝟐𝟑 +𝐙𝟑𝟏 )
Equation (5) + Equation (6)
𝟐 𝐙𝟏𝟐 𝐙𝟑𝟏
2Z1= (𝐙
𝟏𝟐 +𝐙𝟐𝟑 +𝐙𝟑𝟏 )
𝐙𝟏𝟐 𝐙𝟑𝟏
Z1= (7)
(𝐙𝟏𝟐 +𝐙𝟐𝟑 +𝐙𝟑𝟏 )

𝐙𝟐𝟑 𝐙𝟐𝟏
Z2= (𝐙 (8)
𝟏𝟐 +𝐙𝟐𝟑 +𝐙𝟑𝟏 )

𝐙𝟑𝟐 𝐙𝟑𝟏
Z3= (𝐙 +𝐙
(9)
𝟏𝟐 𝟐𝟑 +𝐙𝟑𝟏 )

1.7.2 Star to Delta conversion:

Equation (7) + Equation (8)

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𝒁𝟏𝟐 𝒁𝟑𝟏 + 𝒁𝟐𝟑 𝒁𝟐𝟏

𝒁𝟏 + 𝒁𝟐 = (𝒁𝟏𝟐 +𝒁𝟐𝟑 +𝒁𝟑𝟏 )
(10)

𝒁𝟏𝟐 𝒁𝟑𝟏 𝒁𝟐𝟑 𝒁𝟏𝟐

𝑬𝒒𝒖𝒂𝒕𝒊𝒐𝒏(𝟕) 𝑬𝒒𝒖𝒂𝒕𝒊𝒐𝒏(𝟖) 𝒁𝟏 × 𝒁𝟐 (𝒁𝟏𝟐 + 𝒁𝟐𝟑 + 𝒁𝟑𝟏 )(𝒁𝟏𝟐 + 𝒁𝟐𝟑 + 𝒁𝟑𝟏 )
= =
𝑬𝒒𝒖𝒂𝒕𝒊𝒐𝒏(𝟗) 𝒁𝟑 𝒁𝟐𝟑 𝒁𝟑𝟏
(𝒁𝟏𝟐 + 𝒁𝟐𝟑 + 𝒁𝟑𝟏 )

𝒁𝟏 ×𝒁𝟐 𝒁𝟏𝟐 𝟐
𝒁𝟑
= (𝒁𝟏𝟐 +𝒁𝟐𝟑 +𝒁𝟑𝟏 )
(11)

 Equation (10) + Equation (11)

𝒁𝟏 × 𝒁𝟐 𝒁𝟏𝟐 (𝒁𝟏𝟐 + 𝒁𝟐𝟑 + 𝒁𝟑𝟏 )

𝒁𝟏 + 𝒁𝟐 + =
𝒁𝟑 (𝒁𝟏𝟐 + 𝒁𝟐𝟑 + 𝒁𝟑𝟏 )
𝒁𝟏 ×𝒁𝟐
𝒁𝟏𝟐 = 𝒁𝟏 + 𝒁𝟐 + (12)
𝒁𝟑
𝒁𝟐 ×𝒁𝟑
𝒁𝟐𝟑 = 𝒁𝟐 + 𝒁𝟑 + 𝒁𝟏
(13)
𝒁𝟏 ×𝒁𝟑
𝒁𝟑𝟏 = 𝒁𝟑 + 𝒁𝟏 + (14)
𝒁𝟐

P.1.7.1. For the network shown in figure 1.7.1 Find the V1 resistance between A and B

Solution :
Converting Delta to Star (terminals DEF )

𝐙𝟏𝟐 𝐙𝟑𝟏
Z1= (𝐙
𝟏𝟐 +𝐙𝟐𝟑 +𝐙𝟑𝟏 )

2 ×2
𝑍1 = = 0.6667
2+2+2
Rewriti ng the network again

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Converting Star to Delta

𝒁𝟏 × 𝒁𝟐
𝒁𝟏𝟐 = 𝒁𝟏 + 𝒁𝟐 +
𝒁𝟑

2.667 × 2.667
2.667 + 2.667 + =8
2.667

8×2
8 ||2 = 8+2 = 1.6

RAB = (1.6 +1.6) || 1.6

= 3.2 || 1.6

RAB = 1.0667Ω

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P.1.7.2. For the network shown in figure 1.7.2 Find the total current supplied by the source
𝐑 𝐚𝐛 𝐑 𝐚𝐜 6 ×6
Ra= (𝐑 = 6+6+18 = 1.2Ω
𝐚𝐛 +𝐑 𝐚𝐜 +𝐑 𝐛𝐜 )

𝐑 𝐚𝐛 𝐑 𝐛𝐜 6 ×18
Rb= (𝐑 = 6+6+18 = 3.6Ω
𝐚𝐛 +𝐑 𝐚𝐜 +𝐑 𝐛𝐜 )

𝐑 𝐚𝐜 𝐑 𝐛𝐜 18 ×6
Rc= = = 3.6Ω
(𝐑 𝐚𝐛 +𝐑 𝐚𝐜 +𝐑 𝐛𝐜 ) 6+6+18

Rewriting the circuit

Since we are supposed to find the current supplied by

the source we will find resistance between the source =
Rcd = {(3.6 +18) || (6 +1.2) } + 3.6

={21.6||7.2} + 3.6
21.6×7.2
={ } + 3.6
21.6+7.2

= 5.4 +3.6 = 9Ω
𝑉 9
Current supplied by the source = 𝐼 = 𝑅 = 9
=1A
𝑐𝑑

P.1.7.3. For the network shown in figure 1.7.3 find Req

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Resistances 6,4 and 8 are in star. Converting to Delta

𝑹𝒂 ×𝑹𝒃 6 ×4
𝑹𝒂𝒃 = 𝑹𝒂 + 𝑹𝒃 + 𝑹𝒄
=6+4+ 8
= 13
𝑹𝒄 × 𝑹𝒃 8 ×4
𝑹𝒃𝒄 = 𝑹𝒄 + 𝑹𝒃 + =8+4+ = 17.33
𝑹𝒂 6

𝑹𝒂 ×𝑹𝒄 6 ×8
𝑹𝒄𝒂 = 𝑹𝒂 + 𝑹𝒄 + 𝑹𝒃
= 6+8+ 4
= 26

Resistances 5, 3 and 4 are in star. Converting into Delta

𝑹𝒂 ×𝑹𝒃 5 ×3
𝑹𝒂𝒃 = 𝑹𝒂 + 𝑹𝒃 + =5+3+ = 11.75
𝑹𝒄 4
𝑹𝒄 ×𝑹𝒃 3 ×4
𝑹𝒃𝒄 = 𝑹𝒄 + 𝑹𝒃 + 𝑹𝒂
= 3 + 4 + 5 = 9.4

𝑹𝒂 ×𝑹𝒄 5 ×4
𝑹𝒄𝒂 = 𝑹𝒂 + 𝑹𝒄 + 𝑹𝒃
= 5+4+ 3
= 15.667

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11.75 || 13 = 6.17

17.33 || 9.4 = 6.094

26||15.667 = 9.776

Hence we can now rewrite the network as

Req = {(10 ||6.094) + 6.17 } || 9.776

= { 3.78+6.17} || 9.776

Req = 4.94Ω

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