Experiment 4 - CSC 204L-1
Experiment 4 - CSC 204L-1
Experiment 4:
Designing of a Full adder circuit using integrated circuit logic gates and verifying the
truth table.
OBJECTIVE:
• To implement a full adder circuit using Ex-OR gates, AND gates and OR Gate.
APPARATUS:
• IC Type 7486 Quadruple 2-input XOR gates
• IC Type 7408 Quadruple 2-input AND gate
• IC Type 7432 Quadruple 2-input OR gate
• Digital Electronic Trainer Kit
• Power Supply Unit
THEORY:
Full Adder- Logic circuit with three inputs and two outputs. The inputs are a carry bit
(C IN) from a previous stage, a bit from the augend, and a bit from the addend,
respectively. The outputs are the sum bit and the carry-out bit (COUT) produced by the
addition of the bit
from the addend with the bit from the augend and CIN.
Circuit Diagram:
Input Output
X Y Cin S Co
0 0 0 0 0
0 0 1 1 0
0 1 0 1 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1
AND Operation:
Symbol Truth table
A B Q=A.B
0 0 0
0 1 0
1 0 0
1 1 1
OR Operation:
Symbol Truth table
A B Q=A+B
0 0 0
0 1 1
1 0 1
1 1 1
NOT Operation:
Symbol Truth table
A Q=Ā
0 1
1 0
** Presence of a small circle at the output side of any gate always denotes inversion
NOR Operation:
Symbol Truth table
A B ̅̅̅̅̅̅̅̅
Q=𝐀 +𝐁
0 0 1
0 1 0
1 0 0
1 1 0
NAND Operation:
Symbol Truth table
A B ̅̅̅̅
Q=𝐀𝐁
0 0 1
0 1 1
1 0 1
1 1 0
Pin diagram: