Experiment 5 - CSC 204L
Experiment 5 - CSC 204L
Experiment 5:
To study the characteristics of NOR latch NAND latch and J-K flip-flop by verifying
their truth tables.
OBJECTIVE:
• Familiarization with SR latch, J-K FF and D flip-flop.
APPARATUS:
• IC Type 7400 Quadruple 2-input NAND gates
• IC Type 7402 Quadruple 2-input NOR gates
• IC Type 7473 Dual J-K FF
• Digital Electronic Trainer Kit
• Power Supply Unit
THEORY:
NOR Latch diagram & Truth Table:
NAND Latch diagram & Truth Table:
74LS73
AND Operation:
Symbol Truth table
A B Q=A.B
0 0 0
0 1 0
1 0 0
1 1 1
OR Operation:
Symbol Truth table
A B Q=A+B
0 0 0
0 1 1
1 0 1
1 1 1
NOT Operation:
Symbol Truth table
A Q=Ā
0 1
1 0
** Presence of a small circle at the output side of any gate always denotes inversion
NOR Operation:
Symbol Truth table
A B ̅̅̅̅̅̅̅̅
Q=𝐀 +𝐁
0 0 1
0 1 0
1 0 0
1 1 0
NAND Operation:
Symbol Truth table
A B ̅̅̅̅
Q=𝐀𝐁
0 0 1
0 1 1
1 0 1
1 1 0
Pin diagram: