Mandal 1
Mandal 1
INDEX
Sr. Date Experiment Name Page Sign
No. No.
4
Write a program to multiply two 8-bit numbers using 8-9
addition.
PRACTICAL-1
AIM: Write a program to add two 8-bit numbers and store result at memory location / using
LDA .
PROGRAM (1A):
MVI A,35H
MVI B,12H
ADD B
MOV C,A
STA 2060H
HLT
OUTPUT:
PROGRAM (1-B)
LDA 2051H MOV B,A LDA 2052H ADD B MOV C,A STA 2060H HLT
OUTPUT:
PRACTICAL-3
AIM: Write a program to perform 16-bit addition of two numbers.
PROGRAM:
LHLD 2050H
XCHG
LHLD 2052H
DAD D
SHLD 2060H
HLT
Input:2050H:
1234H
2052H:
1312H
Output:
PROGRAM (3B)
PRACTICAL-4
AIM: Write a program to multiply two 8-bit numbers using addition.
MVI A,00H
MVI B,04H
ADD B
ADD B
ADD B
STA 2060H
HLT
OUTPUT:
2060H: 0CH
USING LOOPING :-
AIM: Write an ALP to transfer a block of data from memory location 2050H to 2060H.
PROGRAM:
LXI H, 2050H
LXI D,2060H
MVI C,08H
NXT:MOV A,M
STAX D
INX H
INX D
DCR C
JNZ NXT
HLT
INPUT: 2050H:05H
2051H:
09H
2052H:
07H
2053H:
02H
2054H:
04H
2055H:
05H
2056H:
03H
2057H:
01H
OUTPUT:
2060H:05H
2061H:
09H
2062H:
07H
2063H:
02H
2064H:
04H
2065H:
05H
2066H:
03H
2067H:
01H
PRACTICAL-6
AIM: Write a program to perform addition of 6 bytes of data stored at memory location
starting from 2050H.Use register B to save carry generated while performing addition.
Display sum and carry at consecutive locations 2060H and 2061H.
PROGRAM:
LXI H,2050H
MVI C,06H
MVI A,00H
MOV B,A
NXT1: ADD M
JNC NXT
INR B
NXT:INX H
DCR C
JNZ NXT1
STA 2060H
MOV A,B
STA 2061H
HLT
2052H: F1
2055H: F1
OUTPUT: 2060H: EE ,
2061H:01
PRACTICAL-7
(A)
PROGRAM:
LXI H,2050H
MOV A,M
INX H
CMP M
JNC NXT
MOV A,M
NXT:STA 2060H
HLT
AIM: Write a program to find the largest number in a set of 8 readings stored at 2050H.
Display the number at 2060H.
PROGRAM:
LXI H,2050H
MVI C,08H
MOV A,M
NXT1:INX H
CMP M
JNC NXT
MOV A,M
NXT:DCR C
JNZ NXT1
HLT
STA 2060H
OBSERVATIONS:
Input:
2050H: 22H
2051H: 2FH
2052H: 6DH
2053H: 13H
2054H: 2AH
2055H: 9EH
2056H: EAH
2057H: 08H
Output:
2060H: EAH
PROGRAM:
MVI B, 08H
START:LXI H,2050H
MVI C,08H
BACK:MOV A,M INX
H
CMP M
JC SKIP
JZ SKIP
MOV D,M
MOV M,A
DCX H
MOV M,D
INX H
SKIP:DCR C
JNC BACK
DCR B
JNZ START
HLT
INPUT: 2050H:05H
2051H: 04H
2052H: 03H
2053H: 01H
2054H: 02H
2055H: 07H
2056H:0DH
2057H:0AH
OUTPUT: 2050H:01H
2051H: 02H
2052H: 03H
2053H: 04H
2054H: 05H
2055H: 07H
2056H:0DH
2057H:0AH
PROGRAM:
LDA 2010H
MOV B,A ANI
0FH
MOV C,A MOV
A,B
ANI F0H
JZ SKIPMUL
RRC
RRC
RRC
RRC
MOV D,A
XRA A
MVI E,0AH
SUM:ADD D
DCR E
JNZ SUM
SKIPMUL:ADD C
STA 2020H
HLT
INPUT: 2010H: 72H
PROGRAM:
LXI H,8000H
MOV A,M
MOV B,A
STC
CMC
SUI 0AH
JC NUM
ADI 41H
JMP STORE
NUM: MOV A,B
ADI 30H
STORE:INX H
MOV M,A
HLT
PRACTICAL-11
Features of 8086
• 8086 is a 16bit processor. It’s ALU, internal registers works with 16bit binary
word.
• 8086 has a 16bit data bus. It can read or write data to a memory/port either
16bits or 8 bit at a time
• 8086 has a 20bit address bus which means, it can address upto 1MBmemory
location
• Frequency range of 8086 is 6-10 MH.
1=main & index registers; 2=segment registers and IP; 3=address adder; 4=internal address
bus; 5=instruction queue; 6=control unit (very simplified!); 7=bus interface; 8=internal
databus; 9=ALU; 10/11/12=external address/data/control bus.
Registers
The 8086 has eight more or less general 16-bit registers (including the stack
pointer but excluding the instruction pointer, flag register and segment registers).
Four of them, AX, BX, CX, DX, can also be accessed as twice as many 8- bit registers
while the other four, BP, SI, DI, SP, are 16-bit only.
A 64 KB (one segment) stack growing towards lower addresses is supported
in hardware; 16-bit words are pushed onto the stack, and the top of the stack is
pointed to by SS:SP. There are 256 interrupts, which can be invoked by both
hardware and software. The interrupts can cascade, using the stack to store the
return addresses.
The 8086 has 64 K of 8-bit (or alternatively 32 K of 16-bit word) I/O port space.
Flags
8086 has a 16-bit flags register. Nine of these condition code flags are active, and
indicate the current state of the processor: Carry flag (CF), Parity flag (PF), Auxiliary carry
flag(AF), Zero flag (ZF), Sign flag (SF), Trap flag (TF), Interrupt flag (IF), Direction flag (DF), and
Overflow flag (OF).
Segmentation
There are also four 16-bit segment registers that allow the 8086 CPU to access one
megabyte of memory in an unusual way. Rather than concatenating the segment register
with the address register, as in most processors whose address space exceeded their
register size, the 8086 shifts the 16-bit segment only four bits left before adding it to the 16-
bit offset (16×segment + offset), therefore producing a 20-bit external (or effective or
physical) address from the 32-bit segment: offset pair. As a result, each external address can
be referred to by 212 = 4096 different segment: offset pairs.
Conclusion:
We have studied the basic structure of the 8086 micrprocessor.