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RFID Basic

RFID

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0% found this document useful (0 votes)
9 views

RFID Basic

RFID

Uploaded by

Yaga Project
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 59

RFID

Radio Frequency Identification


The Basic Principle

Semiconductors 4
Basic Transceive Principle

Energy: Reader → Tag Data: Reader → Tag Data: Reader ← Tag


Card Card Card

LOAD modulation

Semiconductors 5
Main Criteria for Frequency Selection
• RFID frequencies
– < 135 kHz
– 13.56 MHz
– 862 - 928 MHz (UHF)
– 2.45 GHz
• Physical properties
• Regulations, future of regulations
• Communication distance (Minimal and maximal)
• Standards

Semiconductors 6
Physical Properties & Performance

125 kHz 13.56 MHz UHF 2.45 GHz

Water,
Humidity
   
Metal
Environment
   
Field
Characterics
   

Semiconductors 7
Typically Achievable Communication Distances
EU
1.5 m
UHF 13.56 MHz 125 kHz

US
1.5 m
1.5 m JP

1.5 m
1.5 m
1.5 m

3m
7m
0m
2.45 GHz

0.1 - 0.7 m
1m
0-1m

Semiconductors 8
Mifare

Semiconductors 10
What is mifare ? ®

mifare = ISO 14443A


®

• THE contactless interface for smart cards

• Standardised in ISO 14443A (Contactless Proximity Smart


Cards)

®
• The mifare Interface Platform is a family of Card ICs and
Reader Components which support the mifare® Interface
Semiconductors 11
ISO / IEC 14443 standard

• Part 1: Physical characteristics


– Physical size of the ISO14443 card
• Part 2: RF signal & power interface
– RF-interface (13.56 MHz, modulation, min. field-strength)
• Type A: 100% modulation, Miller bit-coding
• Type B: 10% modulation, NRZ bit-coding
• Part 3: Initialization & anti-collision
– Start of communication (request, anti-collision, select card)
• Type A: Bit-wise arbitration
• Type B: Time-slot Method
• Part 4: Transmission protocols
– Describes data exchange between reader and cards (ISO14443 does
not specify any specific application, security or encryption)

Semiconductors 12
System features of MIFARE®
 ISO credit card size
 high speed (typ 106 Kbaud;
typical ticketing transaction time < 100 ms)
 Multi-application memory (securely separated files for multi-
applications)
 high security (mutual authentication, encryption)
 anticollision (handling of several cards in the operating field)
 operating distance of up to 100 mm
 high reliability (no moving parts, no battery in card)
 high data integrity
 operating frequency of 13.56 MHz

Semiconductors 13
Applications

Pay-
Airline Phone
ID- GSM
Ticket
Card Telecom
Company ing University
contact
Card

Pay-TV
(contactless)
Public
Park&Ride
Transport
contactless EFTPOS
Terminal
Banking
Road contact
Toll Credit
(contactless)
Card

http://www.
Electronic xx.yy.at
Purse
Health Internet Geldkarte
Loyalty
Care Banking
Schemes

Semiconductors 14
CLASSIC - Blockdiagram
EEPROM: 1k Byte or 4k Byte
RF-Interface Digital Section

Clock
ATR Control
Data &
Arithmetic
Anti- Unit

E²-Interface
Modulator collision
Demodulator E²
Select Memory
Application
Voltage POR
Regulator E²PROM
Authentication & Crypto
Access Control Unit
Energy

Crypto Unit for (proprietary) Stream Cipher Encryption

Semiconductors 15
1k Classic - Memory Mapping
1024 Byte in 16 SECTORS with 64 addressable BLOCKS @ 16 BYTE each

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 0

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 1
FirstSECTOR
First SECTOR ##00w.
w.44BLOCKS
BLOCKS
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 2
EEPROM

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 3

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 0

0 1Total
2 3 amount
4 5 6 of
7 16
8 9 10 11 12
SECTORS 13 14
( 0…15 ) 15 BLOCK 1
LastSECTOR
Last SECTOR ##15
15 w.
w.44BLOCKS
BLOCKS
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 2

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 3

Semiconductors 16
Memory Split & Function
Every BLOCK has a fixed or alterable functionality ...

BLOCK 0 (FIX)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 “Manufacturer”
BLOCK 1 & 2
First SECTOR 0 : 4 BLOCKS (ALT) “Data”
EEPROM

BLOCK 3 (FIX)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 “Sector Trailer”

BLOCK 0 (ALT)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 “Data”
BLOCK 1 & 2
Total SECTOR
Last amount 15SECTORS
of 16 : 4 BLOCKS (ALT) “Data”

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 3 (FIX)

Semiconductors 17
BLOCK Function Cluster
SECTOR 0 / BLOCK 0 is always READ-ONLY ...
BLOCK 0 (FIX)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
“Manufacturer”

Manufacturer Data ( Byte 4 = 0123 )


Check Byte
EEPROM

Manufacturer-ID & Unique Serial Number

Holds KEYs & ACCESS CONDITIONs


BLOCK 3 (FIX)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
“Sector Trailer”

KEY A Access Conditions KEY B

All other = DATA / VALUE BLOCKS ...


Other BLOCKs
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (ALT) “Data”

Semiconductors 18
Sector Trailer Function
SECTOR 1 … 15 ( Remark: Special Function for SECTOR 0 ! )

DATA BLOCK OPERATIONS (enable or disable)


• READ • DECREMENT BLOCK 0, 1, 2
• INCREMENT
• WRITE • TRANSFER (Data or Value)
• RESTORE

BLOCK 3 (FIX)
EEPROM

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
“Sector Trailer”

KEY A KEY FUNCTIONALITY KEY B

Sector Access Conditions (24 Bit) Byte 9 = GPB = xx (not defined)

Transport Configuration (Pre-defined “Virgin-State”):


• KEY A must be used for authentication ...
• KEY A enables all other configurations ...

Semiconductors 19
Sector Access Conditions
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 0

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 1

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK 2
EEPROM

0 1 KEY
2 3A 4 5 6 7 8 9 10 11 12
KEY B13 14 15 BLOCK 3

Cx = INV Cx BLOCK 3 = Sector Trailer

BIT 0 C1
0 C3
0 C2
0 Control Bits C1 / C2 / C3 - BLOCK 0
BIT 1 C1
1 C3
1 C2
1 Control Bits C1 / C2 / C3 - BLOCK 1
BIT 2 C1
2 C3
2 C2
2 Control Bits C1 / C2 / C3 - BLOCK 2
BIT 3 C1
3 C3
3 C2
3 Control Bits C1 / C2 / C3 - BLOCK 3
BIT 4 C2
4 C1
4 C3
4 Control Bits C1 / C2 / C3 - BLOCK 0
BIT 5 C2
5 C1
5 C3
5 Control Bits C1 / C2 / C3 - BLOCK 1
BIT 6 C2
6 C1
6 C3
6 Control Bits C1 / C2 / C3 - BLOCK 2
BIT 7 C2
7 C1
7 C3
7 Control Bits C1 / C2 / C3 - BLOCK 3

Semiconductors 20
C1 / C2 / C3- Access Conditions
(WRITE: Access Condition Code for next Authentication)
BLOCK 3 (Sector Trailer)

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 ---- = n.a.

READ KEY A WRITE C1 C2 C3 READ KEY B WRITE READ AC WRITE


EEPROM

----- KEY A 0 0 0 KEY A KEY A KEY A -----

----- ----- 0 1 0 KEY A ----- KEY A -----

----- KEY B 1 0 0 ----- KEY B KEY A or B -----

----- ----- 1 1 0 ----- ----- KEY A or B -----

----- KEY A 0 0 1 KEY A KEY A KEY A KEY A *


----- KEY B 0 1 1 ----- KEY B KEY A or B KEY B

----- ----- 1 0 1 ----- ----- KEY A or B KEY B

----- ----- 1 1 1 ----- ----- KEY A or B -----

Condition Code
Pattern * Transport Access Condition

Semiconductors 21
C1 / C2 / C3 - Data Instructions
BLOCK 0, 1, 2 (Data) - Condition Code Pattern fixed in Block 3
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 BLOCK ADDR

Condition Code
Pattern

READ WRITE C1 C2 C3 INCR DECR / TRANSFER / RESTORE


EEPROM

0 0 0 Transport Access
KEY A or B KEY A or B KEY A or B KEY A or B
Condition
KEY A or B ----- 0 1 0 ----- -----

KEY A or B KEY B 1 0 0 ----- ----- ---- = n.a.

KEY A or B KEY B 1 1 0 KEY B KEY A or B

KEY A or B ----- 0 0 1 ----- KEY A or B

KEY B KEY B 0 1 1 ----- -----

KEY B ----- 1 0 1 ----- -----

----- ----- 1 1 1 ----- -----

Semiconductors 22
Access Condition Example
Value BLOCK 0

Value BLOCK 1
Data BLOCK 2
KeyA AC KeyB BLOCK 3
“Sector Trailer”

 Value Decrement & Reading by KeyA/KeyB


 Value Increment & Writing by KeyB ONLY
 Data Reading by KeyA/KeyB
 Data Writing by KeyB ONLY
 KeyA, KeyB & AC writing by KeyB ONLY
 KeyA & KeyB can NEVER be Read
 AC reading by KeyA/KeyB

Semiconductors 23
Some CLASSIC Facts – to remember
The very first BLOCK 0 contains UID & Manufacturer Data and is READ ONLY

Mifare Classic 1k / 4k with Single Size UID


Ultra Light & DESFire with Double Size UID
Triple Size UID not used yet ...

The SECTOR TRAILER holds the KEYs & ACCESS CONDITION info

Never use KEY B for authentication ...

The Block-NUMBERING convention in MIFAREWND is as follows:

Blocknumbers: 0 ... 63 / 255


Sector Trailer Block Designations: 004 ... 0063 / 00255

Semiconductors 24
mifare® 4k facts

 4 Kbyte EEPROM (3480 Byte free available)


 Unique serial number (4 Byte)
 40 securely separated sectors supporting multi-application:
 32 sectors consist of 4 blocks with a length of 16 Byte
 8 sectors consist of 16 blocks with a length of 16 Byte
 2 x 48 bit keys per sector for key hierarchy
 Access conditions free configurable based on 2 level
key hierarchy
 Number of single write operations: 100.000
 Data retention: 10 years

Semiconductors 25
Mifare® UL Facts
• Interface
– mifare interface acc. to ISO 14443A @ 13.56 MHz
– Baud rate 106 kbit
– Bit-wise anticollision
– Operating distance up to 10cm
– 100% compatible to all existing mifare readers
• Security
– 7 byte unique serial number fixed @ IC production
– Cascade level two acc ISO 14443A
– Read only locking per page
Semiconductors 26
Mifare® UL Facts cont.

• Memory
– 512 bit EEPROM
– 16 pages with 32 bit each
– 12 pages (384 bit) user r/w area
– 1 page (32 bit) bit wise (OTP) area
– Read-only locking per page

– Data retention of 5 years


– Write endurance 10000 cycles

Semiconductors 27
DESFire® facts
• Fully ISO 14443A compliant, up to part 4 (T=CL)
• ISO7816 support
• Unique 7 byte serial number ISO cascade level 2
• Memory: 4 KByte EEPROM, 1ms erase, 1ms program
• Flexible File System
– Up to 28 Applications per card
– Up to 16 Files per Application
– Up to 14 3DES keys per Application, with key versioning
– Automatic backup mechanism for all available file types
• Speed: Fast Data Transfer, up to 424 Kbit/s
• Security:
– Mutual Three Pass Authentication
– DES/3DES Data Encryption on RF-channel
– Data Authenticity by 4 byte 3DES MAC
Semiconductors 28
I-CODE

Semiconductors 30
What is a Smart Label ?
A paper label
with RFID inside

an antenna,
printed, etched
or stamped ...

… and a chip … on a substrate


attached to it e.g. a plastic
foil ...

Semiconductors 31
I•CODE Family Features

Memory Lock Size Security Special Features


I•CODE 1 512 bit Block No EAS, HC Version
I•CODE SLI 1024 bit Block No EAS, Inventory Read
I•CODE EPC 136 bit Byte No OTP, Destroy
I•CODE UID 192 bit No No R/W, Destroy
I•CODE SLI XS 1 kByte Sector Yes Memory Management
I•CODE SLI Sensor+ 1 kByte Sector No ADC, Timer, Sensors

Semiconductors 32
I•CODE 1 Features
• Bi-directional passive RF link at 13.56 MHz
• 512 bit EEPROM memory (384 bit user
programmable / 64 bit unique serial number)
• 1.2 m read/write operation
• Multi-label operation at 30 labels / second
• Dedicated EAS feature (re-usable EAS label)
• 1.5 m EAS detection range
• Compliance with FCC47 part 15, ETSI 300-330,
ETSI 300-683
• Easy migration path to ISO 15693
• Available for implementing into small inlets (I•CODE1
HC)

Semiconductors 33
I•CODE SLI Features
• Bi-directional passive RF link at 13.56 MHz
• Interface according to ISO 15693 / ISO 18000-3
• Multi-label operation at 60 labels / second
• User Memory size: 896bit
• Serial Number: 64 bits
• Operation Range up to 1.5m
• Deterministic anticollision algorithm
• Inventory Read Command
– anticollision delivers memory content instead of UID
• Fast Inventory Read Command
– I•CODE SLI response with double data rate
• Dedicated EAS feature (re-usable EAS label)
• Compliance with FCC47 part 15, ETSI 300-330,
ETSI 300-683

Semiconductors 34
I•CODE EPC Features
• Low End product of I•CODE family
• Bi-directional passive RF link at 13.56 MHz
• Interface according to to MIT Auto-ID Center EPC Specification
• ISO infrastructure compatible
• Advanced Anticollision (200 Labels/s) for fast moving objects
• User Memory size: 96bit; one time programmable memory (OTP)
• Operation Range up to 1.5m
• Robust signalling for noisy environment
• Destroy command
• Compliance with FCC47 part 15, ETSI 300-330,
ETSI 300-683

Semiconductors 35
I•CODE EPC Memory Organisation
Block # Bit # Purpose
0 MSB LSB
1 MSB LSB
2 MSB LSB
3 MSB LSB
4 MSB LSB

EPC Data
5 MSB LSB
6 MSB LSB
7 MSB LSB
OTP
8 MSB LSB
9 MSB LSB
10 MSB LSB
11 MSB LSB
12 MSB LSB Total Memory Size: 136 bit
CRC

– 96 bit EPC Data


16
13 MSB LSB
14 MSB LSB
– CRC 16 (of EPC)
– 24 bit Destroy Code
Destroy

15 MSB LSB
Code

16 MSB LSB

Semiconductors 36
I•CODE UID Features
• Low End product of I•CODE family
• Bi-directional passive RF link at 13.56 MHz
• EPC & ISO infrastructure compatible
• Advanced Anticollision (200 Labels/s) for fast moving objects
• 40 bit Unique Identifier (UID)
• User Memory size: 96bit; read & write
• Operation Range up to 1.5m
• Robust signalling for noisy environment
• Destroy command
• Compliance with FCC47 part 15, ETSI 300-330,
ETSI 300-683

Semiconductors 37
I•CODE UID Memory Organisation
Block # BIT # Purpose

0 MSB LSB

1 MSB LSB

2 MSB LSB

3 MSB LSB

4 MSB LSB

User Data (UD)


5 MSB LSB

R/W
6 MSB LSB

7 MSB LSB

Identifier Dataa (IDD)


8 MSB LSB

9 MSB LSB

10 MSB LSB

11 MSB LSB

CRC 16
12 MSB LSB

UD
13 MSB LSB

14 MSB LSB

15 MSB LSB
UID

Total Memory Size: 192 bit


16 MSB LSB

17 MSB LSB RO
18 MSB LSB
– 96 bit User Data
– UD CRC 16
CRC 16

19 MSB LSB

20 MSB LSB – 40 bit UID


– CRC 16 (of UID)
Destroy Code

21 MSB LSB

22 MSB LSB
OTP – 24 bit Destroy Code
23 MSB LSB

Semiconductors 38
13.56Mhz Reader ICs

Semiconductors 50
& Single Chip Reader Family

Feature Overview

• Buffered output driver for direct antenna connection


• Automatic detection of parallel µC / PC-Interface
• Flexible interrupt handling, programmable timer
• Comfortable 64 Byte send & receive buffer
• Hard reset with Low Power mode
• Software controlled Power Down Mode
• Unique serial number (UID), Crypto 1 (Stream Cipher) security
• Bit- and Byte-oriented framing
• Separate supply for digital, analog and transmitter part
• User-programmable start-up configuration
• Internal 13.56 MHz oscillator

Semiconductors 51
& Single Chip Reader Family
Overview
I-CODE

Selection Criteria RC500 RC530 RC531 RC400 RC632


ISO / IEC 14443 A    
ISO / IEC 14443 B  
ISO / IEC 15693  
MIFARE Classic / UL    
MIFARE DESFire/ProX    
I-Code  
106-212-424-848 kBaud   
Parallel Host Interface     
SPI Host Interface   
All devices in pin-compatible SO32 packages

Semiconductors 52
MF RC500 ISO14443 A reader IC
 Analog Front End IC
 Proximity operating distance
(up to 10 cm)
 SO32 housing
 Includes all RF circuitry

Supports
– ISO 14443A
– MIFARE ® PRO, PROX
– MIFARE ® Classic

Semiconductors 53
1>?@AB&C-"%..62&D&>:EFGGGH@&I>?J-%(,&A*%,*(
based on MF RC500

Classic

MF RC500
Host, parallel bus matching
circuit
µController MIFARE
MIFARE®®
PRO
PRO // PRO
PRO X
X
SAM

 ISO 14443A Terminal


 MF RC500 is Analog and Digital Core Component
 MIFARE ®Classic
 Open Protocol with Customer defined Security for 14443A DIF
Cards

Semiconductors 54
MF RC531 ISO14443 reader IC

pin- compatible to
MF RC500
Additional to MF RC500:
 ISO 14443-B

Supports
– ISO 14443A&B
– MIFARE ® PROX
– MIFARE ® Classic
– Other smart cards

Semiconductors 55
1>?@AB&C -"%..62&D&>:EFGGGH&I>?J-%(,&A*%,*(
based on MF RC531

Classic

MF RC531
parallel bus
matching
Host, circuit
µController SPI MIFARE
MIFARE®®
Up to
848kbaud PRO
PRO // PRO
PRO X
X
SAM
µC 14443 B

 Highest integration for ISO 14443A & B Terminal

Semiconductors 56
SL RC400 I•Code 1 & ISO 15693 Reader IC

 Analog Front End IC


 pin- compatible to MF RC500
 Proximity operating distance
(up to 10 cm)
 Includes all RF circuitry

Supports
– ISO15693
– I•CODE1

Semiconductors 57
I•Code 1 & ISO15693 - Reader
based on the SL RC400

SL RC400
I•CODE 1
Host, parallel bus matching
circuit
µController

I•CODE SLI

 Highest intregration for ISO 15693 Terminal


 MF RC400 is Analog and Digital Core Component
 supports I•CODE1 protocol

Semiconductors 58
CL RC632 ISO14443 & ISO15693 reader IC

Pin compatible to MF RC500,


MF RC530, MF RC531 and SL RC400
 ISO 14443 & ISO 15693

Supports
– ISO 14443, ISO 15693
– MIFARE ® PRO, PROX
– MIFARE ® Classic
– I•CODE1, I•CODE SLI

Semiconductors 60
ISO14443 & ISO15693 - Reader
based on the CL RC632

Classic

CL RC632
parallel bus
matching
Host, circuit
I•CODE 1
µController SPI
Up to MIFARE
MIFARE®®
848kbaud PRO
PRO // PRO
PRO X
X
SAM

µC 14443 B I•CODE SLI

 Highest integration for ISO 14443 & ISO 15693 Terminal


 MIFARE ® Classic protocol
 Open Protocol with Customer defined Security for 14443 DIF
Cards
 I•CODE1 protocol support

Semiconductors 61
& Single Chip Reader Family
Minimum Micore PCD
OSCIN OSCIN 1 32 OSCOUT RX
Rx1
OSCOUT
IRQ 2 31 RSTPD VMID R1 C3
MFIN 3 30 VMID R2
C4
AVSS
MFOUT 4 29 RX

TX1
Oscillator TX1 5 28 AVSS Tx11
L0 Cs
TVDD 6 27 AUX C0 Cp

TX2 7 Micore 26 AVDD


TVSS
TVSS

TVSS 8 25 DVDD
DIRECT PARALLEL PORT

C0 Cp
SO32
INTERFACE TO HOST

NCS 9 24 A2 TX2
RC-Noise Suppression !

TX22

NWR 10 23 A1 L0 Cs
µController interface
any 8 bit parallel

NRD 11 22 A0

Receiver Circuit Cable Matching Coil


DVSS 12 21 ALE
EMC-Filter Circuit
D0 13 20 D7

D1 14 19 D6

D2 15 18 D5

D3 16 17 D4

Min. Micore PCD Blockdiagram

PCD: Proximity Coupling Device

Semiconductors 62
• •& Single Chip Reader Family
Complete Micore PCD
OSCIN
OSCIN 1 32 OSCOUT RX
Rx1
OSCOUT
IRQ 2 31 RSTPD VMID R1 C3
Level
RS 232 Shifter
MFIN 3 30 VMID
C4
R2
AVSS
MFOUT 4 29 RX

I/O to HOST Oscillator TX1 5 28 AVSS


TX1

L0
Tx11

Cs
TVDD 6 27 AUX C0 Cp

(USB) UART TX2 7 Micore 26 AVDD


TVSS
TVSS

TVSS 8 25 DVDD
C0 Cp
NCS SO32 A2 TX2
Parallel or SPI

9 24
TX22

NWR 10 23 A1 L0 Cs
µController interface
any 8 bit parallel

NRD A0
Other Control

11 22

Receiver Circuit Cable Matching Coil


DVSS 12 21 ALE
EMC-Filter Circuit
D0 13 20 D7

D1 14 19 D6

D2 15 18 D5

D3 16 17 D4

µC
Cpl. Micore PCD Blockdiagram

PCD: Proximity Coupling Device

Semiconductors 63
& Single Chip Reader Family
Block diagram Overview

Micore

LEVEL SHIFTER
Digital Part Analog
Part

Semiconductors 64
To Analog Part of Micore

65
MFout

MFin
Rx
Tx
Level Shifters Serial Data
Switch
32 Bit Random
Generator

Decode

Bit Encode
SERIAL
CRYPTO 1
Unit

>Bit
SECURITY

Master

PARALLEL <
Key Buffer Parity & Frame
Block Diagram Digital Part

Gen. & Check


Internal Bus

32x16 Byte Bit Counter


EEPROM
& Acc. Ctrl. Parallel-Serial
Converter

Control CRC 16 / CRC 8


Register Bank Generate & Check

Progr.Timer Command Reg.


& State Mach.
64 Byte FIFO
Interrupt-Ctrl

& Control
RST & PD
Control

Semiconductors

Adaptive parallel uC Interface


ADR, ALE
D0 .. D7

CNTRL

IRQ

Reset
Block Diagram Analogue Part
TVdd
OSCout

Clock Generation
& Distribution
OSCin

Generation

Transmitter
Q-Clock
Tx1

Control
MFin Oscillator
RF-Part of RC 500
TRANSMITTER & CLOCK Tx2
Level Shifter
Serial Data
Switch

Tx TVss

Q-Channel Demodulator

Correlation &
Rx
Bit Decoding
Q-Channel Amplifier
Amplitude RF-Part of RC 500 Rx
Rating
MFout
RECEIVER
I - Channel Amplifier
Reference I - Channel Demodulator
Voltage
See Part 1
Analog Test MUX AUX

VMD

Semiconductors 66
Serial Signal Switch
Modulator
0 Source Switch

Serial Data OUT Envelope 1


Miller Coder 2 Modulator Driver Tx
3
Decoder
Source Switch
MFin
Serial
Manchester

Data
Decoder

IN 0 Manchester OUT
Subcarrier Carrier
1 Rx
2 Demodulator Demodulator
Manchester
3 w. Subcarrier
Envelope MFout
MFout
Transmit NRZ Select Switch
RFU
e.g. :Two antennas
Subcarrier 7 6 5 4 3 2 1 0
controlled with the
Demodulator 0 1
same digital signal
Digital Test Signal

Semiconductors 67
Micore EEPROM
512 Byte organized in 32 BLOCKS @ 16 BYTE each
BLOCK 0 = Product Information Field (READ only)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

RFU Serial Number CRC


Product Type Identifier Internal
EEPROM

BLOCK 1&2 = START-UP Register Initialisation Files (R/W)


Shipment
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Code !

BLOCK 3 … 7 = Register Initialisation Files (R/W)


2 Initialisation Sets
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 & 1 User Block !

BLOCK 8 … 31 = 32 KEYS for Crypto1-Unit (WRITE only)


6 Byte KEY
needs
01/2 1KEY2H &31/24KEY
5 H 61/27KEY
8 L 9& 1/2
10KEY
11
L 12 13 14 15 12 Bytes !
KEY-BYTE-FORMAT: KEY-Nibble & KEY-Nibble = 1 Byte

Semiconductors 68
Key Handling
From µC Parallel

WRITE E2 LOAD KEY E2


64 Byte FIFO EEPROM
- Keys -
Interface

Key Buffer
LOAD KEY
During AUTHENT 1

Serial Data Stream IN Serial Data Stream OUT


Crypto 1 Module
(Plain) (Encrypted)

Semiconductors 69
Additional Features
Timer & Power Down Modes
Programmable Timer Unit:

• Time-out Counter
• Watch-dog Counter Timer / Pre-Scaler Clock
• Stop Watch derived from 13.56 MHz
Chip Clock
• Programmable One-Shot
• Periodical Trigger

Power Reduction Modes: • Hard Power Down (RSTPD)


Turn-off I’s & O’s & Osc, freeze outputs
• Soft Power Down (PD REG CTRL)
Turn-off O’s & Osc, 512-Clk-wake up
• Stand By Mode (STB REG CTRL)
Turn-off O’s & Osc, 4-Clk-wake up
• Receiver Power Down (RX Auto BIT)
“Card” turns receiver part on / off

Semiconductors 70
Register Sets
Register Control in “Mifare
“Mifare WND”

PAGE 0 Command & Status

PAGE 1 Control & Status

PAGE 2 Transmitter & Coder Control

PAGE 3 Receiver & Decoder Control

PAGE 4 RF-Timing & Channel Redundancy

PAGE 5 FIFO, Timer & Interrupt Configuration

PAGE 6 Reserved for future use (RFU)*

PAGE 7 Test Control*


8 Register per PAGE / Address Range 00 … 3F - * Some addresses reserved for future use (=“0”) or PreSetted

Semiconductors 71
HITAG

Semiconductors 77
About HITAG
HITAGisisthe
HITAG thename
nameof ofaachip
chipfamily
familythat
thatare
areused
usedininpassive
passive
RFIDApplications
RFID Applicationsatataafrequency
frequencyrange
rangeofof100..150
100..150kHz.
kHz.

Thecomponents
The componentscomprise
comprisethe
thecore
coretechnology
technologyfor
forboth,
both,
thetransponder
the transponderand
andthe
theread/write
read/writedevice.
device.

Semiconductors 78
Key Benefits HITAG Family
Contactlessread/write
Contactless read/writeoperation
operationatatlong
longread
readrange
rangeup
upto
to1.5
1.5meter.
meter.

Morethan
More than200
200items
itemsidentified
identifiedsimultaneously
simultaneouslyininthe
thefield
fieldofofthe
theantenna.
antenna.

Securityapplications
Security applicationswith
withchip
chipintegrated
integratedsecret
secretkey
keybased
basedencryption
encryptionalgorithm.
algorithm.

Resistantto
Resistant toharsh
harshconditions
conditions(metal,
(metal,water,
water,electronic
electronicnoise).
noise).

Unlimitedoptions
Unlimited optionsfor
fordifferent
differenttransponder
transpondershapes
shapes

DifferentMemory
Different Memoryoptions
optionsfrom
from32
32bit
bitup
upto
to2048
2048bit.
bit.(HITAG
(HITAGS)S)

Runson
Runs onISO
ISOstandardised
standardisedinfrastructure
infrastructure(ISO
(ISO11784/85,
11784/85,14223-1,
14223-1,18000-2)
18000-2)

Semiconductors 79
ISO 18000-2, low frequency Logistic Standard

Statusof
Status ofthe
thestandard:
standard:FCD
FCDResolution
Resolution
Read/Write--Reader
Read/Write ReaderTalks
TalksFirst
First
Anticollision(1
Anticollision (1and
and16
16Timeslots)
Timeslots)
AirInterface
Air Interfaceas
astwo
twoParts
Parts, ,as
asininAnimal
AnimalID
ID(A:
(A:FDX
FDX125kHz
125kHz and
and
B:HDX-134kHz)
B: HDX-134kHz)
Readermust
Reader mustbe
beable
ableto
tosupport
supportAAand
andBB
Tagmust
Tag mustsupport
supportPart
PartAAor
orB.
B.

Semiconductors 84
ISO 18000-2, low frequency

Howcan
How canaaISO
ISO18000
18000Reader
ReaderreadreadHITAG
HITAGSS??
Thehardware
The hardwareisiscompatible
compatible,(Same
,(Sametype
typeof
ofmodulation
modulationas
asHITAG
HITAGSS
andHITAG
and HITAG1) 1)
e.g.the
e.g. theISO
ISO18000
18000reader
readerhas
hasalready
alreadycollision
collisiondetection
detection
Firmwaremust
Firmware musthave
havesome
someadders,
adders,since
sincethe
theprotocol
protocolisisdifferent.
different.
Weexpect
We expectthat
thatthere
therewill
willbe
bemany
manyreaders
readerssupporting
supportingonly
onlypart
partAA
orPart
or PartBBof
ofthe
thestandard
standard, ,(same
(sameas
asfor
forAnimal
AnimalID).
ID).

Semiconductors 85

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