Model and Design of A Power Driver For P
Model and Design of A Power Driver For P
Research Article
Model and Design of a Power Driver for
Piezoelectric Stack Actuators
Copyright © 2010 M. Chiaberge et al. This is an open access article distributed under the Creative Commons Attribution License,
which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
A power driver has been developed to control piezoelectric stack actuators used in automotive application. An FEM model of
the actuator has been implemented starting from experimental characterization of the stack and mechanical and piezoelectric
parameters. Experimental results are reported to show a correct piezoelectric actuator driving method and the possibility to obtain
a sensorless positioning control.
DC bus
(V)
The constitutive equations of a piezoelectric material at a element. If we consider charge driving, the equations of the
microscopically level are the following: stack are
i
C∗ = C + . (6)
i
mi ωi2
20
Introducing the residue term ϑ2i /mi = hi , the static
capacitance (at s → 0) can be written as
10
hi
C∗ = C + . (7)
i
ωi2
0 20 40 60 80
Vpzt (V)
So, the quantity sC ∗ corresponds to the equivalent low-
frequency admittance. Doing then a first-mode analysis, we
(a) should detract the first-mode quantity from equivalent low-
frequency capacitance:
sh h
Y (s) = 2 1 2 + s C ∗ − 12
s + ω1 ω1 s→0
30 ⎡ ⎤
h1
qpzt (um)
⎢ C ∗ − 2 s2 + ω12 ⎥ (8)
sh1 ⎢ ω ⎥
= 2 + s⎢
⎢
1 ⎥
⎥ .
20 s + ω12 ⎣ s2 + ω2
1 ⎦
s→0
10 Impedance poles are admittance zeros; so in order to find
impedance natural frequencies, admittance’s numerator is
imposed equal to zero.
0 200 400 600 800 Keeping apart the s parameter in the gradient of the
Qpiezo (uC) curve, it is possible to impose equal to zero just on the part
in brackets:
(b)
h h
Figure 2: Piezoelectric hysteresis behaviour with voltage and charge h1 + s2
C − 12
∗
+ ω12 C − 12 ∗
= 0. (9)
driving strategies. ω1 ω1
First zero’s pulsation is
Fpzt1 Fpzt2 h1 + ω12 C ∗ − h1 ω12
s2z1 = − 2 =− , (10)
C − h1 /ω1
∗ 1 − h1 /ω12 C ∗
qpzt1 qpzt2
where ωi are pulsations of admittance antiresonances, which
are in correspondence to the impedance resonances. From
Ipzt experimental tests on the piezoelectric stack or from FEM
analysis, it is possible to obtain the value of the first
Vpzt
antiresonance pulsation (which also is the first admittance
Figure 3: Schematic representation of a piezoelectric element. resonance value) sz1 . Substituting this value in the last
expression, the first residue h1 is
ω2
h1 = ω12 1 + 21 C ∗ . (11)
Reducing the mechanical model, it is possible to convert sz1
it into a frequency domain as shown in (5) as equivalent
admittance. In this way, the admittance associated to the first natural
frequency is
sϑ2 sϑ2 sϑ2 sh
Vpzt 1 2 + 2 2 +· · ·+ n + sC Y1 (s) = 2 1 2 . (12)
2 2
m1 s + ω1 m2 s + ω2 mn s2 + ωn2 s + ω1
= Ipzt . Keeping then in consideration all the successive modes, it is
(5) possible to extend the matter in order to determinate all the
4 EURASIP Journal on Embedded Systems
i i
i−1
1/s2zi C ∗ 2
j =1 ω j ω2j − s2zi + j =1 h j
2
k=2 ωk ωk2 − s2zi
=− i−1 .
2
j =1 ω j ω2j − s2zi
Figure 4: Electrical equivalent circuit for piezoelectric actuator
(14)
model.
103
101
100
10−1
10−2 PWM
Signal
10−3
Figure 6: Schematic architecture of the proposed driving stage.
10−4
102 103 104 105
Frequency (Hz)
in a complementary way. To obtain the complete discharge of
Experimental the piezoelectric equivalent capacitance, a dissipative section
FEM model (braking transistor) has been added.
Figure 5: FEM equivalent model and experimental measurements The most important physical quantity for a piezoelectric
comparison. actuator is the charge stored in the equivalent capacitance
which depends on temperature. To cover all the possible
driving techniques, the current flow to/from the actuator and
can be done by performing a position control on the injector the related voltage on it must be carefully measured and con-
needle. trolled. The basic converter scheme is proposed in Figure 7.
Unfortunately, no velocity, position, or force measure can
be performed inside the injector, neither on the piezoelectric 7. Power Driver Control
stack nor on the leverage.
So, in order to estimate the injector needle position, it Power driver control is based on an inner current loop and
is important to measure a related quantity. The constitutive an outer energy loop that controls the equivalent energy of
equations of a piezoelectric stack showed that the needle the actuator. The inner loop is a hysteretic current mode
position is strictly related to the electrical charge loaded controller with quasi constant frequency that solves the
in the equivalent capacitance of the injector itself. A direct problem of sub harmonic instability, guarantees a quasi
charge measurement is also possible but it is an intrusive constant switching frequency, and reduces the inductance
technique. Nevertheless, loaded charge is proportional to current ripple (Figure 8).
the current transferred to the piezo stack by the power The hysteretic “window” is adjusted by varying the valley
driver. current reference value starting from the difference between
The implemented control is based on two different reference switching periods and measured ones.
feedback loops: Starting from a hysteretic width initial value, the control
system measures the switching period, and using a frequency
(1) an inner loop which controls the injector current,
feedback loop, the integral regulator determines the hys-
(2) an outer loop which controls the charge stored in the teresis variation in order to maintain the frequency quasi
injector. constant [2].
The outer charge/energy loop (Figure 9) is a classic PI
Hence from the charge stored in the piezo equivalent
control law with anti-windup that follows the reference
capacitance, it is possible to estimate the needle position.
profile.
From the models above, it is possible to consider the
piezo stack as a capacitive load. A good method to drive
a capacitive load is to use a current generator driven by 8. Implementation
an external signal: the simplest way to implement this type
of current generator is to use a transconductance amplifier The proposed system is implemented using a DSP/FPGA
driven by a PWM signal (see Figure 6). based prototyping control platform developed at Mechatron-
A good solution to obtain a high-efficiency amplifier is to ics Lab. In Figure 10, it is possible to see the power board
use a class D amplifier with current mode control in order to with the bidirectional converter (on the left) and the FPGA
have a quasi-ideal current generator [1]. controller board (on the right) between dummy loads (top)
The chosen topology is based on a synchronous bidirec- and the piezoelectric injector (bottom).
tional Buck Converter operating in a Continuous Conduc- The power board is also provided with a boost DC/DC
tion Mode (CCM) in order to reduce current stresses on converter [3] also controlled from the same FPGA device
electronic components, where the two transistors are driven in order to make the system compliant with automotive
6 EURASIP Journal on Embedded Systems
M1 Rdis
+
Vsupply Cboost
M2
M3
Rsense
Vpzt (t)
V Iref (t) eI (t) M1 drive(t) Ipzt (t) (um)
(V) (V) (bit) (A)
Power Piezo
Current driver stack
control
qpzt (t)
(um)
Kh Tsw (s)
(uint16)
Integral eT (s) Tmis (s)
Time
control + counter
law −
Tref (s) Frequency
feedback
control
Current
sense
M1 drive(t)
V Ipeakref (t) (V) (bit)
V Ivalleyref (t) (V) Comparators
V Ipiezo (t) (V)
Hysteretic
Kh
(uint16)
Figure 8: Power driver control architecture with current and frequency control loops.
applications where the standard 12 V power source is not signals are used to schedule the algorithms. The profile
useful to drive the piezoelectric actuators. generator, for instance, uses a clock enable with a period of
The entire FPGA project takes up to 12 k logic elements 1 µs, the same used to trigger the ADC sampling.
(on a maximum of about 33 k available on the ALTERA Using a single main clock for most of the synchronous
Cyclone II device used in the application) divided into 18 logic allows to reduce problems related to different clock
main entities; the implemented code uses about 150 kbits of domains; only the ADC and DAC IP cores are fed by
the memory embedded on the FPGA and 4 DSP elements clock signals at lower frequency for the SPI communication
for the fast fixed point multiplications. The main clock has a between the FPGA and the converter devices; the ADCs clock
frequency of 100 MHz, generated by an internal PLL fed by has a frequency of 20 MHz which allows 1 µs of sampling
an external 50 MHz oscillator. period while the current loop DACs clock has a frequency of
All the state machines and processes are synchronized by 50 MHz resulting in 500 ns of maximum update period (the
the main clock, and some internally generated clock enable real frequency is controlled by the inner control loop).
EURASIP Journal on Embedded Systems 7
Brake and
EOI
comparator
Vpzt (t)
M1 drive(t) Ipzt (t)
Epiezo ref (t) eE (t) V Iref (t) eI (t) (um)
(bit) (A)
(V) (V) PI (V) (V) Current
Saturation Power Piezo
control control driver stack
qpzt (t)
V Ipiezo (t)
Anti (um)
Eelt (t) (V) Current Qpiezo (t)
wind-up
(V) sense (uC)
Qpiezo mis (t)
(V) Analog
integrator
Vpzt (t)
(um)
Measured Estimated
Charge storage Piezo Voltage Tip displacement Piezo Voltage Estimated position Position Error
Qpiezo [µC] V pzt [V] qpzt [um] pzt [V]
V qpzt [µm] Err [%]
275 45 16 45 16.56 3.38
384 65 24 65 23.88 0.48
545 83 34 83 34.7 2.03
604 90 40 90 38.67 3.44
714 110 48 110 46.06 4.21
878 120 56 120 57.08 1.89
933 130 60 130 60.78 1.28
1098 145 68 145 71.87 5.38
1164 155 80 155 76.3 4.85
The final goal of this FPGA implementation is to demon- In Figure 12, piezo actuator current (yellow) and piezo
strate that all the injector control strategies and algorithms voltage (magenta) are shown. The blue line in the oscil-
can easily fit in a final ASIC device for the automotive market loscope picture is the STROBE signal used to start charge
using standard available BCD silicon technologies. (fall edge) and discharge (rise edge) sequence during piezo-
electric actuator test. To avoid resonance oscillation, current
reference profile has a rise time of about 200 µs in order
9. Experimental Results
to guarantee a soft start charge phase while at the end
Experimental results were obtained using the test bench in of discharge phase the braking MOSFET turns on for the
Figure 11 in order to validate the relation between charge and complete discharge of the load (a small voltage/current peak
displacement as shown in Table 1, where in the last column is visible almost at the end of the discharge phase).
errors between indirect measure and experimental one are Figure 13 shows the dynamic behavior of the system
highlighted. applying a reference profile with multiple steps. Waveforms
As previously mentioned, tip displacement is strictly in the above figure are piezoelectric actuator current(yellow),
related to the charge stored in the actuator, so using an voltage (red), tip displacement (green), and stored charge
inverse kinematics it is possible to indirectly obtain the tip (blue), respectively. From the above pictures, it is possible
displacement measuring the charge. to notice a direct relationship between piezoelectric actuator
Typical voltage and current waveforms obtained with this stored charge and measured tip displacement while the
type of actuator driving stage are shown in Figures 12 and 13. voltage suffers of the intrinsic hysteresis phenomena.
8 EURASIP Journal on Embedded Systems
(a)
(b)
(c)
Sensor signal XYZ Linear stages
conditioning block
Qpzt (t) (uC)
Laser sensor
Temperature PID controller Injector support 10. Conclusion
In this paper, a complete approach to piezoelectric actuators
Figure 11: The experimental test bench for piezo injector charac- modeling and control strategy design has been presented.
terization. The results reported in the present paper show that the
model obtained is a good approximation of the real dynamic
response of the piezoelectric actuator and the tip displace-
ment can be estimated from the charge measurements with
an error less than 5% without a direct measure on the
C3
actuator (not possible in many applications).
The designed power module correctly drives the piezo-
electric actuator and allows controlling the tip displacement
C1
using the suggested indirect method.
Moreover, the presented bidirectional power driver
allows energy recovery from the actuator during the dis-
charge phase with an overall efficiency above 80%.
With respect to other implementations [4], the proposed
system is able to guarantee good performances with a single
C2 DCBUS rail voltage. Moreover, two nested control loops
(current and charge/energy) allow a very precise estimation
of needle position strictly related with fuel injection in the
cylinder combustion chamber. Those top performances lead
Figure 12: Piezoelectric actuator voltage and current during to high efficiency in engine combustion and less exhaust gas
charge/discharge phases. released in the atmosphere.
EURASIP Journal on Embedded Systems 9
References
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supply,” in Proceedings of the Unitrode Power Supply Design
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[2] X. Yang and Z. A. Wang, “A novel quasi-constant frequency
hysteretic current mode control approach,” in Proceedings of the
IEEE Annual Power Electronics Specialists Conference (PESC ’03),
vol. 3, pp. 1147–1150, June 2003.
[3] Q. Zhao and F. C. Lee, “High-efficiency, high step-up DC-DC
converters,” IEEE Transactions on Power Electronics, vol. 18, no.
1, pp. 65–73, 2003.
[4] G. Gnad and R. Kasper, “Power drive circuits for piezo-electric
actuators in automotive applications,” in Proceedings of the IEEE
International Conference on Industrial Technology (ICIT ’06), pp.
1597–1600, 2006.