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Chapter 1 - Introduction To Computer Abstractions

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6 views

Chapter 1 - Introduction To Computer Abstractions

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10423063
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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What is WSC and SaaS ?

Use abstraction by design means that any parts can be created by a company and other parts
can be created by another company.

Processor has many cores and each core runs independently, one core runs another
application, another core runs a different application. ⇒ Processor runs in parallel. ⇒
Performance is improving

Hierarchy of memories means we have many different types of memories

Read Seven Great Idea in text book 1 ( main textbook )

Storage devices = External Storages

How does Network Adapter work ?

Motherboard is used to connect these devices (slide 17)

What is PCB ? What is PCIe ?

● PCB is printed circuit board

Branch Education

SRAM = Static Ram

DRAM = Dynamic Ram

Cache memory has many layers, layer 1, 2, 3…

RISC is for ARM/MIPS or smartphone processor

CIXC : x86 or Intel processor

We learn RISC in this course, especially MIPS. Smartphone uses ARM

2 different kind of Assembly language for RISC and CIXC

We will learn Assembly language for MIPS, smartphone processors

ISA is a set of instructions that can run on a specific processor. For example, add T1,
T2→ instruction → Run on MIPS processors, but not on x86 processors

One instruction set may run on MIPS processor but not on an Intel processor.

RISC is much more simple and easy to learn. Focus on architecture and not Assembly so we
learn RISC which only use simple Assembly

Compare RISC and CIXC in table


Every cell in the memory has address, run instruction one by one (von Neumann architecture)

In memory we have instructions and data ( Figure 3.2 )

Inside CPU, we have some registers, PC ( Program Counter ), IR (Instruction Register),


AC(Accumulate Counter) and other registers ( Figure 3.2 ), ALU ( Arithmetic Logic Unit for
mathematic, compare,… )

In each I/o device, we have buffer to store the data

To connect, CPU, I/O Module and Main Memory, we use system bus to transfer data and
instructions. ( Figure 3.2)

Inside a computer, we have 4 actions : processor reads memory, processor communicates with
the I/O device, processor does some arithmetic on the data ( data processing, logic operation ),
processor can control

Basic Instruction Cycle : when a program runs, there is 2 cycles : fetch cycle and execute cycle

Fetch → Execute

Our program is stored in memory ⇒ we need to fetch the instruction and transfer to
each register ⇒ Execute the instruction after the instruction is inside the register
( this is sequential, we fetch and execute the instruction sequentially, one after
another )

The program counter holds the address of the instruction to be fetched next.

The processor increments the PC after each instruction fetch so that it will fetch the next
instruction in the sequence.

At the beginning, the PC stores the first instruction, the fetch cycle will fetch instruction at the
address of the first instruction to the instruction register, stored in IR then the PC will increase to
1 to prepare for loading the next instruction ( the 2nd instruction ), we will then execute the first
instruction

Each opcode has a different function. For example, Opcode = 1 loads AC from memory,
Opcode = 2 store AC from memory, Opcode = 5 Add to AC from Memory. For example 1 9 4 0
means load AC from memory at address 9 4 0 means load 940 which is 3

At the beginning, CPU always has the address of the first instruction then it fetches the
instruction using the fetch cycle and then executes the instruction using the execution cycle.

Instruction Format has 2 parts : Opcode and Address of Memory

When we are about to execute the next instruction, PC will increases by 1 to


prepare for the next cycle ⇒ The next instruction is 5 9 4 1, 5 means add to AC from
memory, 941 = 2 ⇒ 3 + 2 = 5 ( 3 is from the first instruction being loaded to
memory )
CPU has 32 bits or 64 bits which is the size of the register, when the register has different sizes,
we would need different instruction set, that is why when we download a program, we are asked
whether our CPu has 32 or 64 bits.

AC = temporary storage

The instruction format contains opcode and address instead of opcode and data since if
instruction contains data then it will not generalize when we need to add 3 numbers or 100
numbers, however, with the instruction format containing opcode and address then we can add
number one by one and stores the intermediate result through AC.

Interrupt cycle is cycle that happens when for instance our program is waiting for input, our
program spans, not stops. Without interrupt cycle, our program wont know how long to stop and
will wait for long time, when we have interrupt cycle, we can execute while waiting for input

Data lines is shared among CPU, Memory, I/O, that is why when CPU transfers the data to the
memory it cannot transfer to I/O

Since the bus line is shared, when the CPU transfer data to I/O, CPU cannot read the
memory ⇒ Solution : Point to point interconnect.

CPU uses Harvard Architecture. Harvard Architecture saves power, better than Von Neumann

Intel chip is based on Von Neuman architecture, it consumes more energy

Von Neuman consumes more energy, thats why Harvard architecture for smartphone since
energy saving is highly important.

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