CSE 4293: Computer Architecture

(Fall-22)

ASSIGNMENT ON
Modified Simple As Possible
Computer (MSAP)
 Block Diagram of MSAP

D
CP 8 bit
Register Ld
Ed
EP Program CLK
LP 16 bit
CLK
counter
(16 bit)
C
Hexadecimal
8 bit
Register Lc
Ec
input pad
CLK

Input encoder
Ein and register 8/16 bit A
CLK (16 bit)
8 bit
Register La
Ea
CLK

W Bus
16 bit
MAR 16 bit Lf CLK
Lmr Eal
CLK
(16 bit)
S0
Flag
ALU S1 register
S2

Erm
R1
D 8 bit
E R1 RAM
R C W1 B
O R2 64 KB 8 bit
Register
W D Lb
E W1 W2 Eb
R 8 bit CLK
W2
8 bit

8 bit

R2 Temporary
8 bit Register Lt
Et
MDR CLK
Emd (16 bit)
DE
Lmd 16 bit no C O
Stack op. Es
DE
CLK
16 bit pointer (16 dec
inc
R Id

bit) En
C
LK
Lir Instruction
Output
CLK
Register 8 bit Eo
8 bit Register
(8 bit) CLK
(8 bit)

Control
CLK ROM
Display
CLK
26 Control Words
Explanation of control words:

Cp : Increase program counter by 1

Lp: Loads to program counter
Ep: Connects program counter to bus

Ein: Connects input port to bus

Lmr: Loads to MAR

Erm: Enables ram, at Erm=1

RW
= 00 means data from ram is sent to lower nibble (8 bits) of bus
=01 means data from ram is sent to MDR
=10 means data from upper nibble from bus is received by ram
=11 means data from lower nibble from bus is received by ram

Emd & Lmd:

00--- do nothing
01-- load data to lower nibble of MDR 10-- load data to higher nibble of MDR 11--
enable output of MDR

Lir: Loads to Instruction register

J: Checks whether jump condition is satisfied or not (absent in block diagram)

La: Loads to register A

Ea: Sends the data of register A to bus

Eal: Sends result of ALU to bus

Lf: Updates flag register
S0,S1,S2
001= CMP
010=XOR
011= RCL
100= INC
101= MUL
000/111= no operation (HLT)

Lb: Loads to register B

Eb: Sends the data of register B to bus

Lt: Loads to Temporary register

Et: Sends the data of Temporary register to bus

Es, Id:
00= no operation
01= decrease stack pointer value by 1
10= increase stack pointer value by 1
11= Connects stack pointer register to bus

Eo: Enables output register

Lfb: Loads to flag register

Efb: Sends the data of flag register to bus
 Group Allocation

Group - A Group - B
Opcode Instruction Opcode Instruction
00 IN A 00 IN B
01 INC B 01 MOV C, B
02 MOV B, byte 02 MOV A, byte
03 MOV C, byte 03 RCL A
04 RCL A 04 MOV A, D
05 MOV D, B 05 XOR A, D
06 XOR A, D 06 INC B
07 OUT A 07 OUT A
08 HLT 08 HLT

Group - C Group - D
Opcode Instruction Opcode Instruction
00 IN C 00 IN D
01 MOV B, byte 01 MOV D, byte
02 MOV B, C 02 MOV B, D
03 MOV D, byte 03 MOV C, byte
04 XOR A, D 04 XOR A, D
05 MOV C, B 05 MOV B, C
06 RCL A 06 IN B
07 OUT C 07 OUT D
08 HLT 08 HLT
Group - E Group - F
Opcode Instruction Opcode Instruction
00 IN A 00 IN B
01 MOV B, byte 01 INC B
02 INC B 02 MOV C, B
03 MOV D, byte 03 MOV A, byte
04 XOR A, D 04 XOR A, D
05 MOV C, A 05 MOV B, D
06 RCL A 06 RCL A
07 OUT C 07 OUT B
08 HLT 08 HLT
 Group Allocation

Group - G Group - H
Opcode Instruction Opcode Instruction
00 IN A 00 IN B
01 INC A 01 MOV A, B
02 MOV B, A 02 MOV D, byte
03 MOV D, byte 03 RCL A
04 RCL A 04 MOV C, D
05 MOV C, D 05 MOV D, byte
06 XOR A, D 06 INC B
07 OUT A 07 OUT B
08 HLT 08 HLT

Group - I Group - J
Opcode Instruction Opcode Instruction
00 IN C 00 IN D
01 MOV B, C 01 INC B
02 INC B 02 MOV D, B
03 MOV D, byte 03 MOV C, byte
04 XOR A, D 04 MOV A, C
05 MOV B, C 05 RCL A
06 RCL A 06 XOR A, D
07 OUT B 07 OUT A
08 HLT 08 HLT
Group - K Group - L
Opcode Instruction Opcode Instruction
00 IN A 00 IN B
01 INC B 01 INC B
02 RCL A 02 MOV A, B
03 MOV D, byte 03 MOV D, byte
04 XOR A, D 04 XOR A, D
05 MOV B, A 05 MOV B, A
06 MOV C, byte 06 RCL A
07 OUT B 07 OUT A
08 HLT 08 HLT
 Group Allocation

ST Id ( A ) Group ST Id ( A) Group
190105001 A 190105032 A
190105002 B 190105033 B
190105003 C 190105035 C
190105006 D 190105036 D
190105007 E 190105038 E
190105008 F 190105041 F
190105009 G 190105042 G
190105011 H 190105044 H
190105012 I 190105045 I
190105014 J 190105046 J
190105015 K 190105047 K
190105016 L 190105049 L
190105017 A 190105050 A
190105019 B 190105051 B
190105020 C 190105052 C
190105021 D 160105180 D
190105022 E 170205040 E
190105024 F 170205088 F
190105025 G 180105108 G
190105026 H 180105129 H
190105027 I 180105197 I
190105028 J 180205007 J
190105029 K
190105031 L
 Group Allocation

ST Id ( C ) Group ST Id ( B_D ) Group

190105103 A 190105053 A
190105104 B 190105057 B
190105105 C 190105058 C
190105106 D 190105061 D
190105107 E 190105064 E
190105108 F 190105066 F
190105109 G 190105068 G
190105110 H 190105069 H
190105111 I 190105070 I
190105112 J 190105071 J
190105115 K 190105072 K
190105117 L 190105073 L
190105118 A 190105074 A
190105120 B 190105075 B
190105121 C 190105076 C
190105125 D 190105079 D
190105126 E 190105080 E
190105127 F 190105081 F
190105128 G 190105082 G
190105129 H 190105084 H
190105131 I 190105085 I
190105132 J 190105087 J
190105133 K 190105089 K
190105136 L 190105096 L
 Group Allocation
ST Id ( C ) Group ST Id ( B_D ) Group
190105139 A 190105098 A
190105141 B 190105100 B
190105142 C 190105102 C
190105144 D 190105154 D
190105150 E 190105155 E
190105151 F 190105158 F
190105152 G 190105162 G
190105153 H 190105163 H
180205166 I 190105166 I
170205070 J 190105167 J
180205009 K 190105169 K
180205187 L 190105171 L
180205152 A 190105174 A
ST Id ( B_D ) Group 190105175 B
190105198 A 190105180 C
190105199 B 190105182 D
190105200 C 190105186 E
190105201 D 190105189 F
190105204 E 190105190 G
190105205 F 190105193 H
160105087 G 190105194 I
180205126 H 190105195 J
180105191 I 190105196 K
180205149 J 190105197 L
 CSE 4293 Assignment on MSAP
Section: A_B_C_D
(This assignment is mandatory and considered as two QUIZ marks)
(Assignment Deadline: 12 Aug, 11:59 PM)

Assignment Instructions:
1. Write the control words for your instructions
2. Generate the .bin files for address and control ROMs by provided
MATLAB code
3. Load the necessary files on the circuit and verify your instruction

Instructions for Uploading the assignment in Google Classroom:

You need to submit a zip file (rename as 1X0X05XXX_CSE 4293_MSAP)
which includes the following files: -
1. Excel version of your binary control word (rename as 1X0X05XXX
_con word binary)
2. Excel version of your decimal control word (rename as 1X0X05XXX
_con word decimal)
3. Bin file of address rom and control ROM (5 files) (rename as
ADD_ROM, C_ROM1, C_ROM2, C_ROM3, C_ROM4)
4. Circuit file of 8-bit PC (MSAP) (rename as 1X0X05XXX_circuit)
5. Submit a report on our project (minimum 3-outputs) (rename as
1X0X05XXX_MSAP_report)