EE303 Digital System Design

Class Introduction

In-Cheol Park
School of EE, KAIST
 EE303
◆ Course Name: Digital System Design
◆ No Prerequisite
◆ Instructor: In-Cheol Park (박인철)
[email protected] , Tel. 042)350-3461,
National NanoFab Center 316
◆ Teaching Assistants:
Sungho Kim (김성호 [email protected])
Seungju Woo (우승주 [email protected])
Seunghee Han (한승희 [email protected])
Hansol Jung (정한솔 [email protected])
Kangjun Choi (최강준 [email protected])

◆ All the documents will be distributed via KLMS

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 EE303 Course Description

The goal of this course is for the students to understand the principles of
digital gates and how to design digital logic circuits using the gates, and
to learn several mathematical manipulations of Boolean algebra and
practical design techniques useful in minimizing the circuit complexity.

Starting from combinational circuits, this class deals with how to express
the circuit to be designed and how to optimize it, and then moves to
sequential circuits on which most of digital circuits are based.

In addition, this course introduces the most popular hardware

description language, Verilog, as it is essential in modern design
methodology to describe circuits in the language.

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 EE303 Textbook

Charles H. Roth and Larry L. Kinney,

"Fundamentals of Logic Design,”
Thomson, 7th Edition.

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 Homework

A small number of problems, which are mainly in the textbook, will

be announced as homework after each chapter is completely
delivered in order to make the students practice the techniques
touched in the classroom and comprehend the concept lying behind
the knowledge.

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EE303 Tentative Timetable

Week Main Contents Reference

1 Number Systems
2 Boolean Algebra
3 Minterm and Maxterm Expansion
4 Karnaugh Map, QM Method
5 NAND and NOR gates
6 Combinational Circuit Design
7 Verilog Description
8 Mid-Term Exam.
9 Multiplexers, Decoders, Latches, Flip-flops
10 Registers, Counters, Clocked Sequential Circuits
11 State Graphs and tables
12 Reduction of State Tables
13 Sequential Circuit Design
14 Verilog Description
15 Arithmetic Operations
16 Final Exam.

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 Chapter 1.

Introduction
Number Systems and Conversion
 Outline

◆ Digital Systems and Switching Circuits

◆ Number Systems and Conversion
◆ Binary Arithmetic
◆ Representation of Negative Numbers
❖ Addition of 2’s Complement Numbers
❖ Addition of 1’s Complement Numbers
◆ Binary Codes

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 1.1 Digital Systems and Switching Circuits (1)

◆ Analog vs Digital
Analog Digital
▪ Continuous
▪ Discrete
▪ Natural Phenomena
▪ Binary Digit (bit) : (0, 1)
(Pressure, Temperature, …)
→ Enables digital signal processing
▪ Difficulty in realizing,
▪ Easy to realize and process
processing using electronics
using electronics

◆ Digital systems
❖ Reliable, easy to integrate.

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 1.1 Digital Systems and Switching Circuits (2)

◆ Switching Circuit
❖ Combinational Circuit
⚫ Outputs depend on only present inputs, not on past inputs
❖ Sequential Circuit
⚫ Outputs depend on both present inputs and past inputs
⚫ Has “memory” function

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 1.2 Number Systems and Conversion (1)

Radix(base)
N = (a4 a3a2 a1a0 .a−1a−2 a−3 ) R
= a4  R 4 + a3  R 3 + a2  R 2 + a1  R1 + a0  R 0
+ a−1  R −1 + a−2  R −2 + a−3  R −3

Examples
▪ Decimal 953.7810 = 9 102 + 5 101 + 3 100 + 7 10−1 + 8 10−2

▪ Binary 1011.112 = 1 23 + 0  2 2 + 1 21 + 1 20 + 1 2 −1 + 1 2 −2
1 1 3
= 8 + 0 + 2 +1+ + = 11 = 11.7510
2 4 4
▪ Hexadecimal A2F16 = 10 162 + 2 161 + 15 160 = 2560 + 32 + 15 = 260710

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 1.2 Number Systems and Conversion (2)

◆ Conversion of Decimal to base-R

N = (an an−1    a2 a1a0 ) R = an R n + an−1R n−1 +    + a2 R 2 + a1R1 + a0

N
= an R n −1 + an −1 R n −2 +    + a2 R1 + a1 = Q1 , remainder a0
R

Q1
= a n R n − 2 + a n −1 R n −3 +    + a 3 R 1 + a 2 = Q 2 , remainder a1
R

Q2
= an R n −3 + an −1 R n −4 +    + a3 = Q3 , remainder a2
R

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 1.2 Number Systems and Conversion (3)

◆ Example
❖ Convert 5310 to binary

2 53

2 26 rem. = 1 = a0
2 13 rem. = 0 = a1

2 6 rem. = 1 = a2 5310 = 1101012

2 3 rem. = 0 = a3

2 1 rem. = 1 = a4

0 rem. = 1 = a5

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 1.2 Number Systems and Conversion (4)

◆ Conversion of a decimal fraction to base-R

F = (.a−1a−2 a−3    a−m ) R = a−1R −1 + a−2 R −2 + a−3 R −3 +    + a−m R − m

FR = a−1 + a−2 R −1 + a−3 R −2 +    + a−m R − m+1 = a−1 + F1

F1R = a−2 + a−3 R −1 +    + a−m R − m+ 2 = a−2 + F2

F2 R = a−3 +    + a−m R − m+3 = a−3 + F3

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 1.2 Number Systems and Conversion (5)

◆ Example
❖ Conversion from .62510 to binary

F = .625 F1 = .250 F2 = .500

 2  2  2
1.250 0.500 1.000
(a−1 = 1) ( a − 2 = 0) (a−3 = 1)

.62510 = .1012

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 1.2 Number Systems and Conversion (6)

◆ Example
❖ Convert 0.710 to binary
.7
2
(1).4
2
(0).8
2
(1).6
2
(1).2
2
(0).4 Process starts repeating here because .4 was previously
2 obtained
(0).8 0.710 − 0.1 0110 0110 0110  2

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 1.2 Number Systems and Conversion (7)

◆ Example
❖ Conversion from binary to octal or hexadecimal
⚫ Starting at the binary point, the bits are divided into groups of
four(for hexadecimal), and is replaced by a hexadecimal digit

1001101.0101112 = 001 001 101 . 010 111 = 115.278

1 1 5 2 7

1001101.0101112 = 0100 1101 . 0101 1100 = 4 D.5C16

4 D 5 C

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 1.3 Binary Arithmetic (1)

◆ Addition
0+0 =0
0 +1 = 1
1+ 0 =1
1 +1 = 0 and carry 1 to the next column

Example
1111 carries
1310 = 1101
1110 = 1011
11000 = 2410

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 1.3 Binary Arithmetic (2)

◆ Subtraction
0−0 = 0
0 −1 = 1 and borrow 1 from the next column
1− 0 =1
1 −1 = 0

Example

1 (indicates 1111 borrows 111 borrows

a borrow
11101 10000 111001
From the
− 10011 3rd column) − 11 − 1011
1010 1101 101110

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 1.3 Binary Arithmetic (3)

◆ Subtraction example with decimal

column 2 column 1

205
− 18
205 − 18 = [2  102 + 0  101 + 5 100 ]
−[ 1 101 + 8  100 ]
187
note borrow from column 1
= [2  102 + (0 − 1) 101 + (10 + 5)  100 ]
−[ 1 101 + 8  100 ]
note borrow from column 2
= [( 2 − 1)  102 + (10 + 0 − 1)  101 + 15  100 ]
−[ 1)  101 + 8  100 ]
= [1102 + 8  101 + 7  100 ] = 187

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 1.3 Binary Arithmetic (4)

◆ Multiplication example with decimal

❖ 1510 x 1310 = 19510

1111 multiplicand
1101 multiplier
1111 first partial product
0000 second partial product
(01111) sum of first two partial products
1111 third partial product
(1001011) sum after adding third partial product
1111 fourth partial product
11000011 final product (sum after adding fourth partial prodoct)

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 1.3 Binary Arithmetic (5)

◆ Division example

1101
1011 10010001
1011
1110
1011
1101 The quotient is 1101 with a remainder
1011 of 10.

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 1.4 Representation of Negative Numbers (1)

◆ Sign and magnitude (signed magnitude)

❖ The first digit is the sign digit and the remaining (n-1) digits
represent the magnitude

For n=4,
3 2 1 0
0 1 0 1
=5
sign magnitude

3 2 1 0
1 1 0 1 = -5
sign magnitude

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 1.4 Representation of Negative Numbers (2)

◆ 2’s complement number

❖ Easy to design arithmetic units
❖ Positive number is represented in the same way as in the
signed-magnitude method
❖ Negative number is defined by N * = 2n − N
Example
For n=4, -N in 2’s complement number
3 2 1 0 3 2 1 0 1) invert the bit pattern of N
0 0 1 1 =3 1 1 0 1 = -3
2) add 1 to it

❖ Other representation 0011 1100 1101

n−2
X = − xn −1  2 n −1
+  xi 2i
i =0

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 1.4 Representation of Negative Numbers (3)

◆ 1’s complement number

❖ Easy to design arithmetic units
❖ Positive number is represented in the same way as in the
signed-magnitude method
❖ Negative number is defined by N = (2n −1) − N
Example
For n=4,
3 2 1 0 3 2 1 0
0 0 1 1 =3 1 1 0 0 = -3

❖ Other representation
n−2
X = − xn −1  (2 n −1
− 1) +  xi 2i
i =0

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 1.4 Representation of Negative Numbers (4)

Signed Binary Integers

Sequence Signed 2’s 1’s
Magnitude complement complement
1111 -7 -1 -0
1110 -6 -2 -1
1101 -5 -3 -2
1100 -4 -4 -3
1011 -3 -5 -4
1010 -2 -6 -5
1001 -1 -7 -6
1000 -0 -8 -7
0111 7 7 7
0110 6 6 6
0101 5 5 5
0100 4 4 4
0011 3 3 3
0010 2 2 2
0001 1 1 1
0000 0 0 0
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 1.4 Representation of Negative Numbers (5)

◆ Addition of 2’s complement numbers

Case 1 +3 0011
+4 0100
+7 0111 (correct answer)
Case 2 +5 0101
+6 0110
1011 wrong answer because of overflow (+11 requires
5 bits including sign)
Case 3 +5 0101
−6 1010
1111 (correct answer)
Case 4 1011
−5
+6 0110
(1)0001 correct answer when the carry from the sign bit
is ignored (this is not an overflow)

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 1.4 Representation of Negative Numbers (6)

Case 5 −3 1101
−4 1100
−7 (1)1001 correct answer when the last carry is ignored
(this is not an overflow)

Case 6 −5 1011
−6 1010
(1)0101 wrong answer because of overflow
(-11 requires 5 bits including sign)

How to check the overflow ?

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 Overflow Detection

◆ An overflow occurs
if adding two positive numbers gives a negative answer or
if adding two negative numbers gives a positive answer.

An alternative method:
◆ An overflow occurs
if and only if the carry out of the sign position is not equal
to the carry into the sign position.

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 1.4 Representation of Negative Numbers (7)

◆ Addition of 1’s complement numbers

Case 3 +5 0101
−6 1001
−1 1110 (correct answer)
1010
Case 4
−5 0110
+6 (1) 0000
1 (end-around carry)
0001 (correct answer, no overflow)

1100
Case 5
−3 1011
−4 (1) 0111
1 (end-around carry)
1000 (correct answer, no overflow)

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 1.4 Representation of Negative Numbers (8)

Case 6 1010
−5 1001
−6 (1) 0011
1 (end-around carry)
0100 (wrong answer because of overflow)

Case 4 : − A + B (where B  A)
A + B = (2 n − 1 − A) + B = 2 n + ( B − A) − 1

Case 5 : − A − B ( A + B  2 n−1 )
A + B = (2 n − 1 − A) + (2 n − 1 − B) = 2 n + [2 n − 1 − ( A + B)] − 1

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1.5 Binary Codes (1)

9 3 7.2 5
    
1001 0011 0111 . 0010 0101

8-4-2-1
Decimal Code 6-3-1-1 Excess-3 2-out-of-5 Gray
Digit (BCD) Code Code Code Code
0 0000 0000 0011 00011 0000
1 0001 0001 0100 00101 0001
2 0010 0011 0101 00110 0011
3 0011 0100 0110 01001 0010
4 0100 0101 0111 01010 0110
5 0101 0111 1000 01100 1110
6 0110 1000 1001 10001 1010
7 0111 1001 1010 10010 1011
8 1000 1011 1011 10100 1001
9 1001 1100 1100 11000 1000

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 1.5 Binary Codes (2)

6-3-1-1 Code: 1011

N = w3a3 + w2 a2 + w1a1 + w0 a0

N = 6 1 + 3  0 + 11 + 11 = 8

ASCII (American Standard Code for Information Interchange) Code

1010011 1110100 1100001 1110010 1110100

S t a r t

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